LG Display LD470DUN-TFB1 Specification
( ● ) Preliminary Specification
( ) Final Specification
Title 47.0” WUXGA TFT LCD
LD470DUN
Product Specification
SPECIFICATION
FOR
APPROVAL
BUYER General
MODEL
APPROVED BY
/
/
/
SIGNATURE
DATE
SUPPLIER LG DISPLAY Co., Ltd.
*MODEL LD470DUN
SUFFIX TFB1(RoHS Verified)
*When you obtain standard approval,
please use the above model name without suffix
APPROVED BY
/ Team Leader
REVIEWED BY
/Project Leader
PREPARED BY
/ Engineer
SIGNATURE
DATE
Please return 1 copy for your confirmation with
your signature and comments.
Ver. 0.2
PD Product Design Dept.
LG Display Co., Ltd
1 / 29
Product Specification
CONTENTS
LD470DUN
Number ITEM
COVER
CONTENTS
RECORD OF REVISIONS
1 GENERAL DESCRIPTION
2 ABSOLUTE MAXIMUM RATINGS
3 ELECTRICAL SPECIFICATIONS
3-1 ELECTRICAL CHARACTERISTICS
3-2 INTERFACE CONNECTIONS
3-3 SIGNAL TIMING SPECIFICATIONS
3-4 LVDS SIGNAL SPECIFICATIONS
3-5 COLOR DATA REFERENCE
3-6 POWER SEQUENCE
4 OPTICAL SPECIFICATIONS
5 MECHANICAL CHARACTERISTICS
6 RELIABILITY
Page
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6
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8
10
11
14
15
17
21
24
7 INTERNATIONAL STANDARDS
7-1 SAFETY
7-2 EMC
7-3 ENVIRONMENT
8 PACKING
8-1 INFORMATION OF LCM LABEL
8-2 PACKING FORM
9 PRECAUTIONS
9-1 MOUNTING PRECAUTIONS
9-2 OPERATING PRECAUTIONS
9-3 ELECTROSTATIC DISCHARGE CONTROL
9-4 PRECAUTIONS FOR STRONG LIGHT EXPOSURE
9-5 STORAGE
9-6 HANDLING PRECAUTIONS FOR PROTECTION FILM
9-7 APPROPRIATE CONDITION FOR PUBLIC DISPLAY
Ver. 0.2
25
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2 / 29
Product Specification
RECORD OF REVISIONS
Revision No. Revision Date Page Description
0.1 Feb 04,2013 - Preliminary Specification (First Draft)
0.2 May 10, 2013 4,7 Power Consumption
22, 23 Mechanical Characteristics
LD470DUN
Ver. 0.2
3 / 29
LD470DUN
Product Specification
1. General Description
The LD470DUN is a Color Active Matrix Liquid Crystal Display with an integral Light Emitting Diode (LED)
Local Block backlight system. The matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive display type which is operating in the normally black mode. It has a 54.64 inch diagonally
measured active display area with WUXGA resolution (1080 vertical by 1920 horizontal pixel array).
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arrayed in vertical stripes.
Gray scale or the luminance of the sub-pixel color is determined with a 10-bit gray scale signal for each dot.
Therefore, it can present a palette of more than 1.06Bilion colors.
It has been designed to apply the 10-bit 2-port LVDS interface.
It is intended to support Public Display where high brightness, super wide viewing angle, high color gamut,
high color depth and fast response time are important.
Mini-LVDS(RGB)
Control
Signals
Power Signals
Source Driver Circuit
S1 S1920
G1
Gate Driver Circuit
TFT - LCD Panel
(1920 × RGB × 1080 pixels)
[Gate In Panel]
G1080
V : 10Block
H : 8 Block
LVDS
LVDS 1,2
2Port
LVDS
Select
+12.0V
+24.0V, GND, On/off
Ext VBR-B
CN1
(51pin)
EEPROM
SCL
SDA
Timing Controller
[LVDS Rx]
+ Local Dimming
Power Circuit
Block
LED Driver
General Features
Active Screen Size 46.96 inches(1192.87mm) diagonal
Outline Dimension 1044.9(H) x 590.0(V) x 52.5mm(D) (Typ.)
Pixel Pitch 0.5415(H) X 0.5415(V)
Pixel Format 1920 horiz. by 1080 vert. Pixels, RGB stripe arrangement
Color Depth 10Bit (D), 1.06 Billion colors
Luminance, White 500 cd/m2 (Center 1point ,Typ.)
Viewing Angle (CR>10) Viewing angle free ( R/L 178 (Min.), U/D 178 (Min.))
Power Consumption Total 88.9W (Typ.) [Logic=10.9 W, Backlight= 78W(@EXTVBR-B = 100%)
Weight 13,500 g (Typ.)
Display Mode Transmissive mode, Normally black
Surface Treatment
Possible Display Type Landscape and Portrait Enabled
Hard coating(3H), Anti-reflection treatment of the front polarizer (Reflectance〈 2%)
Ver. 0.2
4 / 29
LD470DUN
Product Specification
2. Absolute Maximum Ratings
The following items are maximum values which, if exceeded, may cause faulty operation or permanent damage
to the LCD module.
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameter Symbol
Power Input Voltage
Driver Control Voltage
T-Con Option Selection Voltage VLOGIC -0.3 +4.0 VDC
Operating Temperature TOP 0 +50 °C
Storage Temperature TST -20 +60 °C
Panel Front Temperature TSUR - +68 °C 4
Operating Ambient Humidity HOP 10 90 %RH
Storage Humidity HST 10 90 %RH
LCD Circuit VLCD -0.3 +14.0 VDC
Driver VBL -0.3 + 27.0 VDC
ON/OFF VON/OFF -0.3 +3.9 VDC
Brightness EXTVBR-B 0.0 +3.9 VDC
Status Status -0.3 +5.5 VDC
Value
Unit Note
Min Max
1
2,3
2,3
Note.
1. Ambient temperature condition (Ta = 25 2 °C )
2. Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be Max 39°C, and no condensation of water.
3. Gravity mura can be guaranteed below 40°C condition.
4. The maximum operating temperatures is based on the test condition that the surface temperature
of display area is less than or equal to 68°C with LCD module alone in a temperature controlled chamber.
Thermal management should be considered in final product design to prevent the surface temperature of
display area from being over 68℃. The range of operating temperature may be degraded in case of
improper thermal management in final product design.
90%
60
60%
Ver. 0.2
Wet Bulb
Temperature [°C]
20
10
0
10 20 30 40 50 60 70 800-20
Dry Bulb Temperature [°C]
30
40
50
40%
10%
Storage
Operation
Humidity
[(%)RH]
5 / 29
LD470DUN
Product Specification
3. Electrical Specifications
3-1. Electrical Characteristics
It requires two power inputs. One is employed to power for the LCD circuit. The other Is used for the LED
backlight and LED Driver circuit.
Table 2. ELECTRICAL CHARACTERISTICS
Parameter Symbol
Unit Note
Min Typ Max
Circuit :
Value
Power Input Voltage V
Power Input Current I
Power Consumption P
Rush current I
LCD
LCD
LCD
RUSH
Notes: 1. The specified current and power consumption are under the V
10.8 12.0 13.2
- 914 1188
- 1201 1561
- 10.9 14.17
- - 5
=12.0V, 25 2°C, fV=60Hz
LCD
V
DC
mA 1
mA 2
Watt 1
A 3
condition whereas mosaic pattern(8 x 6) is displayed and fV is the frame frequency.
2. The current is specified at maximum current pattern.
3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).
4. Ripple voltage level is recommended under ±5% of typical voltage
Ver. 0.2
White : 1023Gray
Black : 0Gray
Mosaic Pattern(8 x 6)
6 / 29
Product Specification
Table 3. ELECTRICAL CHARACTERISTICS (Continue)
LD470DUN
Parameter Symbol
LED Driver :
Power Supply Input Voltage VBL 22.8 24.0 25.2 Vdc 1
Power Supply Input Current IBL - 3.25
Power Supply Input Current (In-Rush) Inrush - -
Power Consumption PBL -
On/Off
Brightness Adjust ExtVBR-B 1 - 100 % On Duty, 6
Input Voltage for
Control System
Signals
LED :
Life Time 50,000 60,000 Hrs 2
PWM Frequency for
NTSC & PAL
Pulse Duty Level
(PWM)
VSYNC, SIN, SCLK ,
Reverse
(Local Dimming)
On V on 2.5 - 3.6 Vdc
Off V off -0.3 0.0 0.7 Vdc
PAL 100 Hz 3
NTSC 120 Hz 3
High Level 2.5 - 3.6
Low Level 0.0 - 0.7
High Level 2.7 3.3 3.6
Low Level -0.3 0.0 0.4
Min Typ Max
Values
78 90
3.75
4.73
Unit Notes
A Ext VBR-B = 100%
VBL = 22.8V
A
Ext VBR-B = 100%
W Ext VBR-B = 100%
Vdc
Vdc
Vdc
Vdc
HIGH : on duty
LOW : off duty
4
Notes :
1. Electrical characteristics are determined after the unit has been ‘ON’ and stable for approximately 60
minutes at 25±2°C. The specified current and power consumption are under the typical supply Input voltage
24Vand VBR (ExtVBR-B : 100%), it is total power consumption.
2. The life time (MTTF) is determined as the time which luminance of the LED is 50% compared to that of initial
value at the typical LED current (ExtVBR-B :100%) on condition of continuous operating in LCM state at
25±2°C.
3. LGD recommend that the PWM freq. is synchronized with Two times harmonic of V_sync signal of system.
Though PWM frequency is over 120Hz (max 252Hz), function of LED Driver is not affected.
4. The duration of rush current is about 200ms. This duration is applied to LED on time.
5. Even though inrush current is over the specified value, there is no problem if I2T spec of fuse is satisfied.
6. Ext_PWM Signal have to input available duty range.
Between 99% and 100% ExtVBR-B duty have to be avoided. ( 99% < ExtVBR-B < 100%)
But ExtVBR-B 0% and 100% is possible.
High
Available duty range
Low
0% 1% 99% 100%Ext_PWM Input Duty
Ver. 0.2
7 / 29
LD470DUN
Product Specification
3-2. Interface Connections
This LCD module employs two kinds of interface connection, a 51-pin connector is used for the module
electronics and Master 14-pin and Slave 12-pin connectors are used for the integral backlight system.
3-2-1. LCD Module
- LCD Connector(CN1): FI-RE51S-HF or Equivalent, Refer to below table.
- Mating Connector : FI-RE51HL
Table 4. MODULE CONNECTOR(CN1) PIN CONFIGURATION
No Symbol Description No Symbol Description
1 GND
2
3
4
5
6
7
8
9
10
11 GND
12 RO0N
13 RO0P
14 RO1N
15
16 RO2N
17 RO2P
18 GND
19 ROCLKN
20
21 GND
22 RO3N
23 RO3P
24 RO4N
25 RO4P
26
NC No Connection
NC No Connection
NC No Connection (Reserved for LGD)
NC No Connection (Reserved for LGD)
NC No Connection (Reserved for LGD)
LVDS Select
NC No Connection
NC No Connection
Local Dimming ‘H’ =Enable only
RO1P
ROCLKP
NC
Ground
‘H’ =JEIDA , ‘L’ = VESA
Ground
FIRST LVDS Receiver Signal (A-)
FIRST LVDS Receiver Signal (A+)
FIRST LVDS Receiver Signal (B-)
FIRST LVDS Receiver Signal (B+)
FIRST LVDS Receiver Signal (C-)
FIRST LVDS Receiver Signal (C+)
Ground
FIRST LVDS Receiver Clock Signal(-)
FIRST LVDS Receiver Clock Signal(+)
Ground
FIRST LVDS Receiver Signal (D-)
FIRST LVDS Receiver Signal (D+)
FIRST LVDS Receiver Signal (E-)
FIRST LVDS Receiver Signal (E+)
No Connection
27
Bit Select
28
29
30
31
32
33
34
35
36
37
38
39
40 RE4N
41 RE4P
42
43
44
45
46
47
48
49
50
51
- - -
RE0N
RE0P
RE1N
RE1P
RE2N
RE2P
GND
RECLKN
RECLKP
GND
RE3N
RE3P
NC
NC
NC
GND Ground
GND Ground
GND Ground
VLCD Power Supply +12.0V
VLCD Power Supply +12.0V
VLCD Power Supply +12.0V
VLCD Power Supply +12.0V
‘H’ = 10bit(D) , ‘L’ = 8bit
SECOND LVDS Receiver Signal (A-)
SECOND LVDS Receiver Signal (A+)
SECOND LVDS Receiver Signal (B-)
SECOND LVDS Receiver Signal (B+)
SECOND LVDS Receiver Signal (C-)
SECOND LVDS Receiver Signal (C+)
Ground
SECOND LVDS Receiver Clock Signal(-)
SECOND LVDS Receiver Clock Signal(+)
Ground
SECOND LVDS Receiver Signal (D-)
SECOND LVDS Receiver Signal (D+)
SECOND LVDS Receiver Signal (E-)
SECOND LVDS Receiver Signal (E+)
No Connection
No Connection
No Connection
Notes:
1. All GND(ground) pins should be connected together to the LCD module’s metal frame.
2. All VLCD (power input) pins should be connected together.
3. All Input levels of LVDS signals are based on the EIA 644 Standard.
4. Specific pins(pin No. #2~#6) are used for internal data process of the LCD module.
These pins should be no connection.
5. It may be happened to Abnormal Display during the system interface signal is not
6. If Specific pin No. #7, #10, #27 is “NC”, LCD Module may be happened to Abnormal Display
Ver. 0.2
8 / 29
Product Specification
3-2-2. Backlight Module
Master
LED Driver Connector -
: 20022WR-H14B2(Yeonho) / 20022WR-H12B2(Yeonho)
Mating Connector -
: 20022HS-14B2 / 20022HS-12B2
Table 5. LED DRIVER CONNECTOR PIN CONFIGULATION
Pin No Symbol Description 14PIN 12PIN Note
LD470DUN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
VBL Power Supply +24.0V VBL VBL
VBL Power Supply +24.0V VBL VBL
VBL Power Supply +24.0V VBL VBL
VBL Power Supply +24.0V VBL VBL
VBL Power Supply +24.0V VBL VBL
GND Backlight Ground GND GND
GND Backlight Ground GND GND
GND Backlight Ground GND GND
GND Backlight Ground GND GND
GND Backlight Ground GND GND
Status Status Status Don’t Care 2
VON/OFF Backlight ON/OFF control VON/OFF Don’t Care
EXTVBR-B External PWM
GND Backlight Ground GND - 1
EXTVBR-B -
1
3
Notes :1. GND should be connected to the LCD module’s metal frame.
2. Normal : Low (under 0.7V) / Abnormal :Open
3. High : on duty / Low : off duty, Pin#14 can be opened. ( if Pin #14 is open , EXTVBR-B is 100% )
4. Each impedance of pin #12 and #13 is over 50 [KΩ] .
◆ Rear view of LCM
14
…
1
<Master>
Ver. 0.2
PCB
…
…
12
1
<Slave>
PCB
◆ Status
…
9 / 29
LD470DUN
Product Specification
3-3. Signal Timing Specifications
Table 6 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal timings
should be satisfied with the following specification for normal operation.
Table 6-1. TIMING TABLE for NTSC (DE Only Mode)
ITEM Symbol Min Typ Max Unit Note
Display Period tHV - 960 - tclk
Horizontal
Vertical
Frequency
Blank tHB 100 140 240 tclk
Total tHP 1060 1100 1200 tclk 2200/2
Display Period tVV - 1080 - tHP
Blank tVB 11 45 69 tHP
Total tVP 1091 1125 1149 tHP
DCLK fCLK 70 74.25 77 MHz 148.5/2
Horizontal fH 65 67.5 70 KHz
Vertical fV 57 60 63 Hz
Table 6-2. TIMING TABLE for PAL (DE Only Mode)
ITEM Symbol Min Typ Max Unit Note
Display Period tHV - 960 - tclk
Horizontal
Blank tHB 100 140 240 tclk
Total tHP 1060 1100 1200 tclk 2200/2
Display Period tVV - 1080 - tHP
Vertical
Frequency
Note
The Input of HSYNC & VSYNC signal does not have an effect on normal operation(DE Only Mode).
Blank tVB 228 270 300 tHP
Total tVP 1308 1350 1380 tHP
DCLK fCLK 70 74.25 77 MHz 148.5/2
Horizontal fH 65 67.5 70 KHz
Vertical fV 47 50 53 Hz
The performance of the electro-optical characteristics may be influenced by variance of the vertical
refresh rate.
Ver. 0.2
10 / 29
3-4. LVDS Signal Specification
3-4-1. LVDS Input Signal Timing Diagram
LD470DUN
Product Specification
DE, Data
DCLK
First data
Second data
0.7VDD
0.3VDD
tCLK
DE(Data Enable)
0.5 VDD
Invalid data
Invalid data
Valid data
Pixel 0,0
Valid data
Pixel 1,0
tHP
Pixel 2,0
Pixel 3,0
Invalid data
Invalid data
tHV
DE(Data Enable)
Ver. 0.2
1 1080
tVV
tVP
11 / 29
3-4-2. LVDS Input Signal Characteristics
1) DC Specification
LVDS -
LVDS +
LD470DUN
Product Specification
# VCM= {(LVDS +) + ( LVDS -)} /2
0V
V
CM
V
IN _ MAXVIN _ MIN
Description Symbol Min Max Unit Note
LVDS Common mode Voltage V
LVDS Input Voltage Range V
CM
IN
1.0 1.5 V -
0.7 1.8 V -
Change in common mode Voltage ΔVCM 250 mV -
2) AC Specification
T
clk
LVDS Clock
A
LVDS Data
(F
= 1/T
)
clk
A
LVDS 1’st Clock
LVDS 2nd / 3rd / 4th Clock
tSKEW
t
SKEW_mintSKEW_max
tSKEW
clk
T
clk
80%
20%
t
RF
Description Symbol Min Max Unit Note
LVDS Differential Voltage
Low Threshold
LVDS Clock to Data Skew Margin t
LVDS Clock/DATA Rising/Falling time t
Effective time of LVDS t
LVDS Clock to Clock Skew Margin (Even to Odd) t
1. All Input levels of LVDS signals are based on the EIA 644 Standard.
Note
High Threshold
2. If tRF isn’t enough, t
should be meet the range.
eff
V
TH
V
TL
SKEW
RF
eff
SKEW_EO
3. LVDS Differential Voltage is defined within t
Ver. 0.2
100 300 mV
-300 -100 mV
|(0.25*T
260 (0.3*T
)/7| ps -
clk
)/7 ps 2
clk
±360 ps -
1/7* T
clk
eff
3
T
clk
-
12 / 29
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