LG Display LD420EUB-SDA1 Specification

LD420EUB

Product Specification

SPECIFICATION

FOR

APPROVAL

)

( (

Preliminary Specification

●

)

Final Specification

Title 42.0” WUXGA TFT LCD

BUYER Panasonic

MODEL

APPROVED BY

SIGNATURE

DATE

SUPPLIER LG DISPLAY Co., Ltd.

*MODEL LD420EUB

SUFFIX SDA1

APPROVED BY

O. H. Lee

/ Chief Senior Engineer

REVIEWED BY

J.B. Chun

/ Senior Engineer

PREPARED BY

K.B. Park / Engineer

SIGNATURE

DATE

Please return 1 copy for your confirmation with

your signature and comments.

Ver. 0.0 1 / 38

PD Product Design Dept.

LG Display Co., Ltd

Product Specification

CONTENTS

LD420EUB

Number ITEM

COVER CONTENTS

RECORD OF REVISIONS 1 GENERAL DESCRIPTION 2 ABSOLUTE MAXIMUM RATINGS 3 ELECTRICAL SPECIFICATIONS

3-1 ELECTRICAL CHARACTERISTICS 3-2 INTERFACE CONNECTIONS 3-3 SIGNAL TIMING SPECIFICATIONS

3-4 LVDS SIGNAL SPECIFICATIONS 3-5 COLOR DATA REFERENCE

3-6 POWER SEQUENCE 4 OPTICAL SPECIFICATIONS 5 MECHANICAL CHARACTERISTICS 6 RELIABILITY

Page

1 2 3 4 5 6 6

8 11 12 15 16 18 22 25

7 INTERNATIONAL STANDARDS

7-1 SAFETY 7-2 EMC 7-3 ENVIRONMENT

8 PACKING

8-1 INFORMATION OF LCM LABEL

8-2 PACKING FORM

9 PRECAUTIONS

9-1 MOUNTING PRECAUTIONS 9-2 OPERATING PRECAUTIONS 9-3 ELECTROSTATIC DISCHARGE CONTROL 9-4 PRECAUTIONS FOR STRONG LIGHT EXPOSURE 9-5 STORAGE 9-6 HANDLING PRECAUTIONS FOR PROTECTION FILM 9-7 APPROPRIATE CONDITION FOR PUBLIC DISPLAY

26 26 26 26 27 27 27 28 28 28 29 29 29 29 29

Ver. 0.0 2 / 38

Product Specification

RECORD OF REVISIONS

Revision No. Revision Date Page Description

0.0 Nov. 2, 2012 - Preliminary specification (First Draft)

LD420EUB

Ver. 0.0 3 / 38

LD420EUB

Product Specification

1. General Description

The LD420EUB is a Color Active Matrix Liquid Crystal Display with an integral Light Emitting Diode (LED) backlight system. The matrix employs a-Si Thin Film Transistor as the active element. It is a transmissive display type which is operating in the normally black mode. It has a 42.02 inch diagonally measured active display area with WUXGA resolution (1080 vertical by 1920 horizontal pixel array). Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arrayed in vertical stripes. Gray scale or the luminance of the sub-pixel color is determined with a 10-bit gray scale signal for each dot. Therefore, it can present a palette of more than 1.06Bilion colors. It has been designed to apply the 10-bit 2-port LVDS interface. It is intended to support Public Display where high brightness, super wide viewing angle, high color gamut, high color depth and fast response time are important.

Mini-LVDS(RGB)

Control Signals

Power Signals

Source Driver Circuit

S1 S1920

TFT - LCD Panel

(1920 × RGB × 1080 pixels)

[Gate In Panel]

G1080

LVDS

2Port

LVDS Select

Bit Select

+12.0V

CN1

(51pin)

LVDS 1,2

Option signal

I2C

EEPROM

SCL

SDA

Timing Controller

LVDS Rx + ODC

Integrated

Power Circuit

Block

Back light Assembly

+24.0V, GND, On/Off

LED Driver

General Features

Active Screen Size 42.02 inches(1067.31mm) diagonal Outline Dimension Pixel Pitch 0.4845 mm x 0.4845 mm Pixel Format 1920 horiz. by 1080 vert. Pixels, RGB stripe arrangement Color Depth 10bit(D), 1.06Billon colors Luminance, White 450 cd/m2 (Center 1point ,Typ.) Viewing Angle (CR>10) Viewing angle free ( R/L 178 (Min.), U/D 178 (Min.) Power Consumption Total 90.8W (Typ.) [Logic= 7.6W, LED Driver=83.2W(ExtVbr_B=100% )] Weight 9.2 Kg (Typ.) Display Mode Transmissive mode, Normally black Surface Treatment Hard coating(3H), Anti-glare treatment of the front polarizer (Haze 10%) Possible Display Type Landscape and Portrait Enabled

958.4(H) × 551.3(V) X 10.8(B)/24.0 mm(D) (Typ.)

Ver. 0.0 4 / 38

LD420EUB

Product Specification

2. Absolute Maximum Ratings

The following items are maximum values which, if exceeded, may cause faulty operation or permanent damage to the LCD module.

Table 1. ABSOLUTE MAXIMUM RATINGS

Parameter Symbol

Power Input Voltage

Driver Control Voltage

T-Con Option Selection Voltage VLOGIC -0.3 +4.0 VDC Operating Temperature TOP 0 +50 Storage Temperature TST -20 +60 Panel Front Temperature TSUR - +68 Operating Ambient Humidity HOP 10 90 %RH

Storage Humidity HST 10 90 %RH

Note

1. Ambient temperature condition (Ta = 25  2 °C )

LCD Circuit VLCD -0.3 +14.0 VDC Driver VBL -0.3 + 27.0 VDC ON/OFF VOFF / VON -0.3 +5.5 VDC Brightness EXTVBR-B 0.0 +5.5 VDC

Value

Unit Note

Min Max

°C °C °C

2. Temperature and relative humidity range are shown in the figure below. Wet bulb temperature should be Max 39°C, and no condensation of water.

3. Gravity mura can be guaranteed below 50°C condition.

4. The maximum operating temperatures is based on the test condition that the surface temperature

of display area is less than or equal to 68°C with LCD module alone in a temperature controlled chamber. Thermal management should be considered in final product design to prevent the surface temperature of display area from being over 68℃. The range of operating temperature may be degraded in case of improper thermal management in final product design.

90%

2,3

60%

Wet Bulb Temperature [°C]

10 20 30 40 50 60 70 800-20 Dry Bulb Temperature [°C]

Ver. 0.0 5 / 38

40%

Humidity [(%)RH]

10%

Storage

Operation

LD420EUB

Product Specification

3. Electrical Specifications 3-1. Electrical Characteristics

It requires two power inputs. One is employed to power for the LCD circuit. The other Is used for the LED backlight and LED Driver circuit.

Table 2. ELECTRICAL CHARACTERISTICS

Parameter Symbol

Min Typ Max

Circuit :

Power Input Voltage VLCD 10.8 12.0 13.2 VDC

- 630 820 mA 1

Power Input Current ILCD

- 940 1,222 mA 2 Power Consumption PLCD 7.6 9.9 Watt 1 Rush current IRUSH - - 3.0 A 3

Value

Unit Note

Note

1. The specified current and power consumption are under the V

=12.0V, Ta=25  2°C, fV=60Hz condition,

LCD

and mosaic pattern(8 x 6) is displayed and fV is the frame frequency.

2. The current is specified at the maximum current pattern.

3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).

4. Ripple voltage level is recommended under ±5% of typical voltage.

White : 1023 Gray

Black : 0 Gray

Mosaic Pattern(8 x 6)

Ver. 0.0 6 / 38

Product Specification

Table 3. ELECTRICAL CHARACTERISTICS (Continue)

LD420EUB

Parameter Symbol

LED Driver :

Power Supply Input Voltage VBL 22.8 24.0 25.2 Vdc 1

Power Supply Input Current IBL

Power Supply Input Current (In-Rush) In-rush - - 5.0 A

Power Consumption PBL -

On/Off

Input Voltage for

Control System

Signals

Life Time 50,000 - Hrs 2

Brightness Adjust Ext V

PWM Frequency for NTSC & PAL

Pulse Duty Level (PWM)

On V on 2.5 - 5.0 Vdc Off V off -0.3 0.0 0.7 Vdc

BR-B

PAL 100 Hz 3

NTSC 120 Hz 3

High Level 2.4 - 5.0

Low Level 0.0 - 0.7

Min Typ Max

1 - 100 %

Values

3.47 3.73 A 1

83.2 89.5

Unit Notes

VBL = 22.8V Ext V

BR-B

W 1

On Duty

Vdc Vdc

HIGH : on duty

LOW : off duty

= 100%

notes :

1. Electrical characteristics are determined after the unit has been „ON‟ and stable for approximately 60

minutes at 25±2°C. The specified current and power consumption are under the typical supply Input voltage 24Vand VBR (ExtVBR-B : 100%), it is total power consumption.

2. The life time is determined as the time which luminance of the LED is 50% compared to that of initial value at the typical LED current (ExtVBR-B :100%) on condition of continuous operating in LCM state at 25±2°C. (Min @ L50B10)

3. LGD recommend that the PWM freq. is synchronized with One time harmonic of V_sync signal of system. Though PWM frequency is over 120Hz (max 252Hz), function of LED Driver is not affected.

4. The duration of rush current is about 200ms. This duration is applied to LED on time.

5. Even though inrush current is over the specified value, there is no problem if I2T spec of fuse is satisfied.

6. ExtV

After Driver ON signal is applied, ExtV

signal have to input available duty range and sequence.

BR-B

After that, ExtV

1% and 100% is possible

BR-B

should be sustained from 5% to 100% more than 500ms.

BR-B

For more information, please see 3-6-2. Sequence for LED Driver.

Ver. 0.0 7 / 38

Product Specification

3-2. Interface Connections

This LCD module employs two kinds of interface connection, 51-pin connector is used for the module electronics and 14-pin connector is used for the integral backlight system.

3-2-1. LCD Module

- LCD Connector(CN1): FI-RE51S-HF(manufactured by JAE) or compatible

- Mating Connector : FI-R51HL(JAE) or compatible

Table 4-1. MODULE CONNECTOR(CN1) PIN CONFIGURATION

No Symbol Description No Symbol Description

NC No Connection

LVDS Select

NC No Connection

GND

R1AN

R1AP

R1BN

R1BP

R1CN

R1CP

GND

R1CLKN

R1CLKP

GND

R1DN

R1DP

R1EN

R1EP

Reserved

‘H’ =JEIDA , ‘L’ or NC = VESA

Ground

FIRST LVDS Receiver Signal (A-)

FIRST LVDS Receiver Signal (A+)

FIRST LVDS Receiver Signal (B-)

FIRST LVDS Receiver Signal (B+)

FIRST LVDS Receiver Signal (C-)

FIRST LVDS Receiver Signal (C+) Ground

FIRST LVDS Receiver Clock Signal(-)

FIRST LVDS Receiver Clock Signal(+) Ground

FIRST LVDS Receiver Signal (D-)

FIRST LVDS Receiver Signal (D+)

FIRST LVDS Receiver Signal (E-)

FIRST LVDS Receiver Signal (E+) No connection or GND

Bit Select

- - -

R2AN

R2AP

R2BN

R2BP

R2CN

R2CP

GND

R2CLKN

R2CLKP

GND

R2DN

R2DP

R2EN

R2EP

Reserved

GND Ground

NC No connection

VLCD Power Supply +12.0V

‘H’ or NC= 10bit(D) , ‘L’ = 8bit

SECOND LVDS Receiver Signal (A-)

SECOND LVDS Receiver Signal (A+)

SECOND LVDS Receiver Signal (B-)

SECOND LVDS Receiver Signal (B+)

SECOND LVDS Receiver Signal (C-)

SECOND LVDS Receiver Signal (C+) Ground

SECOND LVDS Receiver Clock Signal(-)

SECOND LVDS Receiver Clock Signal(+) Ground

SECOND LVDS Receiver Signal (D-)

SECOND LVDS Receiver Signal (D+)

SECOND LVDS Receiver Signal (E-)

SECOND LVDS Receiver Signal (E+) No connection or GND

No connection or GND

LD420EUB

Note:

1. All GND (ground) pins should be connected together to the LCD module‟s metal frame.

2. All VLCD (power input) pins should be connected together.

3. All input levels of LVDS signals are based on the EIA 644 Standard.

4. #1~#6, #8~#10 & # 47(No connection) These pins are reserved only for LGD (Do not connect)

Ver. 0.0 8 / 38

Product Specification

3-2-2. Backlight Module

Master

LED Driver Connector

: 20022WR - H14B2(Yeonho) or compatible

Mating Connector

: 20022HS - 14B2 or compatible

Table 5. LED DRIVER CONNECTOR PIN CONFIGURATION

Pin No Symbol Description Note

LD420EUB

1 2 3 4 5 6 7 8

9 10 11 12 13 14

GND GND GND GND GND

Status

VON/OFF

NC Don‟t care

EXT V

BR-B

Power Supply +24.0V Power Supply +24.0V Power Supply +24.0V Power Supply +24.0V Power Supply +24.0V Backlight Ground Backlight Ground Backlight Ground Backlight Ground Backlight Ground Back Light Status 2 Backlight ON/OFF control

External PWM 3

Notes :1. GND should be connected to the LCD module‟s metal frame.

2. Normal : Low (under 0.7V) / Abnormal : Open

3. High : on duty / Low : off duty, Pin#14 can be opened. ( if Pin #14 is open , EXT V

4. Each impedance of pin #12 and 14 is over 50 [KΩ] .

BR-B

is 100% )

◆

◆ Rear view of LCM

Status

PCB

…

Ver. 0.0 9 / 38

LD420EUB

Product Specification

3-3. Signal Timing Specifications

Table 6 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal timings should be satisfied with the following specification for normal operation.

Table 6-1. TIMING TABLE for NTSC (DE Only Mode)

ITEM Symbol Min Typ Max Unit Note

Horizontal

Vertical

Frequency

Display

Period

Blank tHB 100 140 240 tclk

Total tHP 1060 1100 1200 tclk 2200/2

Display

Period

Blank tVB 11 45 69 tHP

Total tVP 1091 1125 1149 tHP

DCLK fCLK 70 74.25 77 MHz 148.5/2

Horizontal fH 65 67.5 70 KHz

Vertical fV 57 60 63 Hz

tHV - 960 - tclk

tVV - 1080 - tHP

Table 6-2. TIMING TABLE for PAL (DE Only Mode)

ITEM Symbol Min Typ Max Unit Note

Horizontal

Display

Period

Blank tHB 100 140 240 tclk

Total tHP 1060 1100 1200 tclk 2200/2

tHV - 960 - tclk

Vertical

Frequency

Display

Period

Blank tVB 228 270 300 tHP

Total tVP 1308 1350 1380 tHP

DCLK fCLK 70 74.25 77 MHz 148.5/2

Horizontal fH 65 67.5 70 KHz

Vertical fV 47 50 53 Hz

tVV - 1080 - tHP

Note:

1. The input of HSYNC & VSYNC signal does not have an effect on normal operation (DE Only Mode). If you use spread spectrum of EMI, add some additional clock to minimum value for clock margin.

2. The performance of the electro-optical characteristics may be influenced by variance of the vertical

refresh rate and the horizontal frequency

※ Timing should be set based on clock frequency.

Ver. 0.0 10 / 38

3-4. LVDS Signal Specification

3-4-1. LVDS Input Signal Timing Diagram

LD420EUB

Product Specification

DCLK

First data

Second data

Third data

Forth data

DE(Data Enable)

tCLK

0.5 VDD

Invalid data

DE, Data

Valid data

Pixel 0

Valid data

Pixel 1

Valid data

Pixel 2

Valid data

Pixel 3

Pixel 4

Pixel 5

Pixel 6

Pixel 7

0.7VDD

0.3VDD

Invalid data

* tHB = tHFP + tWH +tHBP

* tVB = tVFP + tWV +tVBP

1 1080

DE(Data Enable)

tVV

tVP

Ver. 0.0 11 / 38

3-4-2. LVDS Input Signal Characteristics

1) DC Specification

LVDS -

LVDS +

LD420EUB

Product Specification

# VCM= {(LVDS +) + ( LVDS -)} /2

IN _ MAXVIN _ MIN

Description Symbol Min Max Unit Note LVDS Common mode Voltage V LVDS Input Voltage Range V

1.0 1.5 V -

0.7 1.8 V -

Change in common mode Voltage ΔVCM - 250 mV -

2) AC Specification

clk

LVDS Clock

LVDS Data

= 1/T

)

clk

LVDS 1‟st Clock

LVDS 2nd/ 3rd/ 4thClock

tSKEW

SKEW_mintSKEW_max

tSKEW

clk

80%

20%

Description Symbol Min Max Unit Note

LVDS Differential Voltage

High Threshold

Low Threshold

LVDS Clock to Data Skew t LVDS Clock/DATA Rising/Falling time t Effective time of LVDS t LVDS Clock to Clock Skew (Even to Odd) t

1. All Input levels of LVDS signals are based on the EIA 644 Standard.

Note

2. If t

isn‟t enough, t

should be meet the range.

eff

3. LVDS Differential Voltage is defined within t

SKEW

eff

SKEW_EO

eff

Ver. 0.0 12 / 38

100 600 mV

-600 -100 mV

- |(0.25*T

260 |(0.3*T

|±360|

- |1/7* T

)/7| ps -

clk

)/7| ps 2

clk

- ps | ps -

clk

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