LG Display LC600EUD-FEM2 Specification

(●) Preliminary Specification

( ) Final Specification

Title 60.0” WUXGA TFT LCD

LC600EUD

Product Specification

SPECIFICATION

FOR

APPROVAL

BUYER Panasonic

MODEL

APPROVED BY

SIGNATURE

DATE

SUPPLIER LG Display Co., Ltd.

*MODEL LC600EUD

SUFFIX FEM2

*When you obtain standard approval,

please use the above model name without suffix

APPROVED BY

O.H. Lee / Team Leader

REVIEWED BY

B.Y.Kim / Project Leader

PREPARED BY

K.H.Kim / Engineer

SIGNATURE

DATE

Please return 1 copy for your confirmation with

your signature and comments.

Ver. 0.1

TV Product Development Dept.

LG Display Co., Ltd.

0 / 39

Product Specification

CONTENTS

LC600EUD

Number

COVER

CONTENTS

RECORD OF REVISIONS

3-1

3-2

3-3

3-4 LVDS SIGNAL SPECIFICATIONS 11

3-5

3-6

GENERAL DESCRIPTION

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

INTERFACE CONNECTIONS

SIGNAL TIMING SPECIFICATIONS

COLOR DATA REFERENCE

POWER SEQUENCE

OPTICAL SPECIFICATIONS

MECHANICAL CHARACTERISTICS

RELIABILITY

ITEM

Page

7-1

7-2

7-3

8-1

8-2

9-1 MOUNTING PRECAUTIONS 28

9-2

9-3

9-4

9-5 STORAGE 29

9-6 HANDLING PRECAUTIONS FOR PROTECTION FILM 29

Ver. 0.1

INTERNATIONAL STANDARDS

SAFETY

EMC

ENVIRONMENT

PACKING

INFORMATION OF LCM LABEL

PACKING FORM

PRECAUTIONS

OPERATING PRECAUTIONS

ELECTROSTATIC DISCHARGE CONTROL

PRECAUTIONS FOR STRONG LIGHT EXPOSURE

1 / 39

Product Specification

RECORD OF REVISIONS

Revision No. Revision Date Page Description

0.1 Fab, 28, 2012 - Preliminary Specification (First Draft)

LC600EUD

Ver. 0.1

2 / 39

LC600EUD

Product Specification

1. General Description

The LC600EUD is a Color Active Matrix Liquid Crystal Display with an integral Light Emitting Diode (LED) bac k li ght s y st em. T h e m a tr i x em plo ys a - Si T h in Fi l m T ra n s is t or as th e a c tiv e e lem e nt. It is a transmissive display type which is operating in the normally black mode. It has a 59.58 inch diagonally measured active display area with WUXGA resolution (1080 vertical by 1920 horizontal pixel array). Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arrayed in vertical stripes. Gray scale or the luminance of the sub-pixel color is determined with a 10-bit gray scale signal for each dot. Therefore, it can present a palette of more than 1.06Bilion colors. It has been designed to apply the 10-bit 4-port LVDS interface. It is intended to support LCD TV, PCTV where high brightness, super wide viewing angle, high color gamut, high color depth and fast response time are important.

Mini-LVDS(RGB)

Source Driver Circuit

LVDS

CN2

(41pin)

EEPROM

2Port

LVDS

2Port

LVDS Select

Bit Select

+12.0V

CN1

(51pin)

LVDS 3,4

LVDS 1,2

Option signal

I2C

SCL

SDA

Timing Controller

LVDS Rx + L/Dim + DGA + ODC

Integrated

Power Circuit

Power Signals

Control Signals

S1 S1920

TFT - LCD Panel

(1920 × RGB × 1080 pixels)

G1080

Block

+24.0V, GND, On/Off

ExtVBR-B

LED Driver

General Features

Active Screen Size 59.58 inch (1513.397mm) diagonal

Outline Dimension 1346.0(H) x 769.3(V) x 11.9 (D)(Typ.)

Pixel Pitch 687㎛ x 687㎛ x RGB

Pixel Format 1920 horiz. by 1080 vert. Pixels, RGB stripe arrangement

Color Depth 10bit(D), 1.06Billon colors

Luminance, White 350 cd/m2 (Center 1point ,Typ.)

Viewing Angle (CR>10) Viewing angle free ( R/L 178 (Min.), U/D 178 (Min.))

Back light Assembly

Power Consumption Total 145.04 W (Typ.) [Logic= 5.04W, LED Backlight= 140W (IF=125mA)]

Weight 19.5 Kg (Typ.)

Display Mode Transmissive mode, Normally black

Surface Treatment Hard coating(3H), Anti-glare treatment of the front polarizer (Haze < 1%)

Ver. 0.1

3 / 39

LC600EUD

Product Specification

2. Absolute Maximum Ratings

The following items are maximum values which, if exceeded, may cause faulty operation or permanent damage to the LCD module.

Table 1. ABSOLUTE MAXIMUM RATINGS

Parameter` Symbol

Power Input Voltage

Driver Control Voltage

Operating Temperature TOP 0 +50 °C

Storage Temperature TST -20 +65 °C

Panel Front Temperature TSUR - +68 °C 4

Operating Ambient Humidity HOP 10 90 %RH

Storage Humidity HST 10 90 %RH

Note

1. Ambient temperature condition (Ta = 25 ± 2 °C )

LCD Circuit VLCD -0.3 +14.0 VDC

Driver VBL -0.3 + 27.0 VDC

ON/OFF VOFF / VON -0.3 +5.5 VDC

Brightness EXTVBR-B 0.0 +5.5 VDC

Value

Unit Note

Min Max

2. Temperature and relative humidity range are shown in the figure below.

Wet bulb temperature should be Max 39°C, and no condensation of water.

3. Gravity mura can be guaranteed below 40°C condition.

4. The maximum operating temperatures is based on the test condition that the surface temperature

of display area is less than or equal to 68°C with LCD module alone in a temperature controlled chamber. Thermal management should be considered in final product design to prevent the surface temperature of display area from being over 68℃. The range of operating temperature may be degraded in case of improper thermal management in final product design.

2,3

Ver. 0.1

Wet Bulb Temperature [°C]

10 20 30 40 50 60 70 800-20

Dry Bulb Temperature [°C]

90%

60%

40%

10%

Storage

Operation

Humidity [(%)RH]

4 / 39

LC600EUD

Product Specification

3. Electrical Specifications

3-1. Electrical Characteristics

It requires two power inputs. One is employed to power for the LCD circuit. The other Is used for the LED backlight.

Table 2. ELECTRICAL CHARACTERISTICS

Parameter Symbol

Min Typ Max

Circuit :

Power Input Voltage VLCD 10.8 12.0 13.2 VDC

Power Input Current ILCD

Power Consumption PLCD - 5.04 6.55 Watt 1

Rush current IRUSH - - 5.0 A 3

Note

1. The specified current and power consumption are under the V

- 420 546 mA 1

- 450 585 mA 2

Value

Unit Note

=12.0V, Ta=25 ± 2°C, fV=120Hz

LCD

condition, and mosaic pattern(8 x 6) is displayed and fVis the frame frequency.

2. The current is specified at the maximum current pattern.

3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).

4. Ripple voltage level is recommended under ±5% of typical voltage

White : 1023 Gray Black : 0 Gray

Ver. 0.1

Mosaic Pattern(8 x 6)

5 / 39

Product Specification

Table 3. ELECTRICAL CHARACTERISTICS (Continue)

LC600EUD

Parameter Symbol

LED Driver :

Power Supply Input Voltage VBL 22.8 24.0 25.2 Vdc 1

Power Supply Input Current IBL

Power Supply Input Current (In-Rush) In-rush - - 8.2 A peak

Power Consumption PBL -

On/Off

Input Voltage for

Control System

Signals

LED :

Life Time 30,000 Hrs 2

Brightness Adjust ExtVBR-B 1 - 100 % On Duty , 6

PWM Frequency for NTSC & PAL

Pulse Duty Level (PWM)

On V on 2.5 - 5.0 Vdc

Off V off -0.3 0.0 0.7 Vdc

PAL 100 Hz 3

NTSC 120 Hz 3

High Level 2.4 - 5.0

Low Level 0.0 - 0.7

Min Typ Max

Values

5.9

140.0 155.6

6.5

Unit Notes

A rms 1

VBL = 22.8V Ext VBR-B = 100%, 4

W 1

Vdc

HIGH : on duty

LOW : off duty

Notes :

1. Electrical characteristics are determined after the unit has been ‘ON’ and stable for approximately 60

minutes at 25±2°C. The specified current and power consumption are under the typical supply Input voltage 24Vand VBR (ExtVBR-B : 100%), it is total power consumption.

2. The life time (MTTF) is determined as the time which luminance of the LED is 50% compared to that of initial value at the typical LED current (ExtVBR-B :100%) on condition of continuous operating in LCM state at 25±2°C.

3. LGD recommend that the PWM freq. is synchronized with One time harmonic of V_sync signal of system. Though PWM frequency is over 120Hz (max 252Hz), function of LED Driver is not affected.

4. The duration of rush current is about

200ms. This duration is applied to LED on time.

5. Even though inrush current is over the specified value, there is no problem if I2T spec of fuse is satisfied.

6. Ext_PWM Signal have to input available duty range. Between 99% and 100% ExtVBR-B duty have to be avoided. ( 99% < ExtVBR-B < 100%) But ExtVBR-B 0% and 100% is possible.

High

Available duty range

Low

Ver. 0.1

99% 100%Ext_PWM Input Duty

6 / 39

LC600EUD

Product Specification

3-2. Interface Connections

This LCD module employs two kinds of interface connection, 51-pin connector and 41-pin connector are used for the module electronics and Two 8-pin connectors are used for the integral backlight system.

3-2-1. LCD Module

- LCD Connector(CN1): FI-RE51S-HF(manufactured by JAE) or GT05P-51S-H38(manufactured by LSM) or IS050-C51B-C39(manufactured by UJU)

- Mating Connector : FI-R51HL(JAE) or compatible

Table 4-1. MODULE CONNECTOR(CN1) PIN CONFIGURATION

No Symbol Description No Symbol Description

10 11

20 21

24 25 26

LVDS Select

GND

R1AN

R1AP

R1BN

R1BP

R1CN

R1CP

GND

R1CLKN R1CLKP

GND

R1DN

R1DP

R1EN R1EP

NC or GND

No Connection (Note 4)

‘H’ =JEIDA , ‘L’ or NC = VESA

No Connection (Note 4)

No Connection (Note 4) Ground

FIRST LVDS Receiver Signal (A-)

FIRST LVDS Receiver Signal (A+)

FIRST LVDS Receiver Signal (B-)

FIRST LVDS Receiver Signal (B+)

FIRST LVDS Receiver Signal (C-)

FIRST LVDS Receiver Signal (C+) Ground

FIRST LVDS Receiver Clock Signal(-)

FIRST LVDS Receiver Clock Signal(+) Ground

FIRST LVDS Receiver Signal (D-)

FIRST LVDS Receiver Signal (D+)

FIRST LVDS Receiver Signal (E-) FIRST LVDS Receiver Signal (E+)

No Connection or Ground

Bit Select

39 40

46 47

50 51

- - -

R2AN

R2AP

R2BN

R2BP

R2CN

R2CP

GND

R2CLKN

R2CLKP

GND

R2DN

R2DP

R2EN

R2EP

NC or GND

GND Ground (Note 6)

GND Ground

NC No connection VLCD Power Supply +12.0V

VLCD Power Supply +12.0V

VLCD Power Supply +12.0V VLCD Power Supply +12.0V

‘H’ or NC= 10bit(D) , ‘L’ = 8bit

SECOND LVDS Receiver Signal (A-)

SECOND LVDS Receiver Signal (A+)

SECOND LVDS Receiver Signal (B-)

SECOND LVDS Receiver Signal (B+)

SECOND LVDS Receiver Signal (C-)

SECOND LVDS Receiver Signal (C+) Ground

SECOND LVDS Receiver Clock Signal(-)

SECOND LVDS Receiver Clock Signal(+) Ground

SECOND LVDS Receiver Signal (D-)

SECOND LVDS Receiver Signal (D+)

SECOND LVDS Receiver Signal (E-)

SECOND LVDS Receiver Signal (E+)

No Connection or Ground

Note

Ver. 0.1

1. All GND (ground) pins should be connected together to the LCD module’s metal frame.

2. All VLCD (power input) pins should be connected together.

3. All Input levels of LVDS signals are based on the EIA 644 Standard.

4. #1~#6 & #8~#10 NC (No Connection): These pins are used only for LGD (Do not connect)

5. LVDS pin (pin No. #24,25,40,41) are used for 10Bit(D) of the LCD module. If used for 8Bit(R), these pins are no connection.

6. Specific pin No. #44 is used for “No signal detection” of system signal interface. It should be GND for NSB (No Signal Black) while the system interface signal is not. If this pin is “H”, LCD Module displays AGP (Auto Generation Pattern).

7 / 39

LC600EUD

Product Specification

-LCD Connector(CN2): FI-RE41S-HF(manufactured by JAE) or GT05P-41S-H38(manufactured by LSM)

- or IS050-C41B-C39(manufactured by UJU)

- Mating Connector : FI-RE41HL(JAE) or compatible

Table 4-2. MODULE CONNECTOR(CN2) PIN CONFIGURATION

No Symbol Description No Symbol Description

4 NC

13 RB3P

18 RCLK3P

NC NC

GND

RA3N

RA3P

RB3N

RC3N

RC3P

GND

RCLK3N

GND

RD3N

RD3P

No connection 22

No connection 23

No connection 24 GND Ground No connection

No connection

No connection 27

No connection 28

No connection 29 RB4P Ground

THIRD LVDS Receiver Signal (A-)

THIRD LVDS Receiver Signal (A+)

THIRD LVDS Receiver Signal (B-)

THIRD LVDS Receiver Signal (B+)

THIRD LVDS Receiver Signal (C-)

THIRD LVDS Receiver Signal (C+) Ground

THIRD LVDS Receiver Clock Signal(-)

THIRD LVDS Receiver Clock Signal(+) Ground

THIRD LVDS Receiver Signal (D-)

THIRD LVDS Receiver Signal (D+)

25 GND Ground

34 RCLK4P

40 GND Ground

41 GND Ground

RE3N

RE3P

RA4N

RA4P

RB4N

RC4N

RC4P

GND

RCLK4N

GND

RD4N

RD4P

RE4N

RE4P

THIRD LVDS Receiver Signal (E-)

THIRD LVDS Receiver Signal (E+)

FORTH LVDS Receiver Signal (A-)

FORTH LVDS Receiver Signal (A+)

FORTH LVDS Receiver Signal (B-)

FORTH LVDS Receiver Signal (B+)

FORTH LVDS Receiver Signal (C-)

FORTH LVDS Receiver Signal (C+) Ground

FORTH LVDS Receiver Clock Signal(-)

FORTH LVDS Receiver Clock Signal(+) Ground

FORTH LVDS Receiver Signal (D-)

FORTH LVDS Receiver Signal (D+)

FORTH LVDS Receiver Signal (E-)

FORTH LVDS Receiver Signal (E+)

Note : 1. All GND (ground) pins should be connected together to the LCD module’s metal frame.

2. LVDS pin (pin No. #22,23,38,39) are used for 10Bit(D) of the LCD module. If used for 8Bit(R), these pins are no connection.

CN1 CN2

#1 #51

#51 #1 #41

#1 #41

Rear view of LCM

Ver. 0.1

8 / 39

Product Specification

3-2-2. Backlight Module

Master

-LED Driver Connector

20022WR - H14B2(Yeonho)

- Mating Connector

: 20022HS - 14B2

Table 5-1. LED DRIVER CONNECTOR PIN CONFIGURATION

Pin No Symbol Description Note

1 VBL Power Supply +24.0V

2 VBL Power Supply +24.0V

3 VBL Power Supply +24.0V

4 VBL Power Supply +24.0V

5 VBL Power Supply +24.0V

6 GND Backlight Ground

7 GND Backlight Ground

8 GND Backlight Ground

9 GND Backlight Ground

10 GND Backlight Ground

LC600EUD

11 Status

12 VON/OFF

13 NC

14 EXTVBR-B

Back Light Status

Backlight ON/OFF control

Don’t care

External PWM

Notes :1. GND should be connected to the LCD module’s metal frame.

2. Normal : Low (under 0.7V) / Abnormal :Open

3. High : on duty / Low : off duty, Pin#14 can be opened. ( if Pin #14 is open , EXTVBR-B is 100% )

4. Each impedance of pin #12 and #14 is 40[KΩ], 100[KΩ].

◆ Rear view of LCM

PCB

…

◆ Status

Ver. 0.1

9 / 39

LC600EUD

Product Specification

3-3. Signal Timing Specifications

Table 6 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal timings should be satisfied with the following specification for normal operation.

Table 6. TIMING TABLE (DE Only Mode)

ITEM Symbol Min Typ Max Unit Note

Horizontal

Vertical

Frequency

Display

Period

Blank tHB 40 70 200 tCLK 1

Total tHP 520 550 680 tCLK

Display

Period

Blank tVB

Total tVP

ITEM Symbol Min Typ Max Unit Note

DCLK fCLK 66.97 74.25 78.00 MHz

Horizontal fH 121.8 135 140 KHz 2

Vertical fV

tHV 480 480 480 tCLK 1920 / 4

tVV 1080 1080 1080 Lines

(228)

1100

(1308)

108

(95)

(270)

1125

(1350)

120

(100)

(300)

1166

(1380)

122

(104)

Lines 1

Lines

NTSC (PAL)

Note: 1. The input of HSYNC & VSYNC signal does not have an effect on normal operation (DE Only Mode).

If you use spread spectrum of EMI, add some additional clock to minimum value for clock margin.

2. The performance of the electro-optical characteristics may be influenced by variance of the vertical refresh rate and the horizontal frequency

※ Timing should be set based on clock frequency.

Ver. 0.1

10 / 39

3-4. LVDS Signal Specification

3-4-1. LVDS Input Signal Timing Diagram

LC600EUD

Product Specification

DCLK

First data

Second data

Third data

Forth data

DE(Data Enable)

tCLK

0.5 VDD

Invalid data

DE, Data

Valid data

Pixel 0 Pixel 4

Valid data

Pixel 1 Pixel 5

Valid data

Pixel 2 Pixel 6

Valid data

Pixel 3 Pixel 7

0.7VDD

0.3VDD

Invalid data

DE(Data Enable)

Ver. 0.1

* tHB = tHFP + tWH +tHBP

* tVB = tVFP + tWV +tVBP

1 1080

tVV

tVP

11 / 39

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