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LC550EUQ-SCA2
Specification
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LG Display LC550EUQ-SCA2 Specification

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LC550EUQ
Product Specification
CONTENTSCONTENTS
COVER
CONTENTS
RECORD OF REVISIONS
1 GENERAL DESCRIPTION
2 ABSOLUTE MAXIMUM RATINGS
3 ELECTRICAL SPECIFICATIONS
3-1 ELECTRICAL CHARACTERISTICS
3-2 INTERFACE CONNECTIONS
3-3 SIGNAL TIMING SPECIFICATIONS
3-4 LVDS Signal Specification
3-5 Color Data Reference
3-6 POWER SEQUENCE
4 OPTICAL SPECIFICATIONS
5 MECHANICAL CHARACTERISTICS
Page
0
1
2
3
4
5
5
7
9
10
13
14
16
20
6 RELIABILITY
7 INTERNATIONAL STANDARDS
7-1 SAFETY
7-2 EMI
7-3 ENVIRONMENT
8 PACKING
8-1 INFORMATION OF LCM LABEL
8-2 PACKING FORM
9 PRECAUTIONS
9-1 MOUNTING PRECAUTIONS
9-2 OPERATING PRECAUTIONS
9-3 ELECTROSTATIC DISCHARGE CONTROL
9-4 PRECAUTIONS FOR STRONG LIGHT EXPOSURE
9-5 STORAGE
9-6 HANDLING PRECAUTIONS FOR PROTECTION FILM
23
24
24
24
24
25
25
25
26
26
26
27
27
27
27
Ver.1.0
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Revision No. Revision Date Page Description
0.0 July, 20, 2010 - Preliminary Specification (First Draft)
0.1 August. 11. 2010 7, 38~43 Change Option Pin Configuration
0.2 September. 02. 2010 6 Change Power Consumption (PBL) - 3D mode
1.0 September.03.2010 - Final Specification
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LC550EUQ
Product Specification
RECORD OF REVISIONS
15 Change Table 9. (Delete T5, T6ÎT5)
21~22 Change Front view / Rear view
46 Modify L/R indicator application timing
Ver.1.0
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1. General Description
The LC550EUQ is a Color Active Matrix Liquid Crystal Display with an integral Light Emitting Diode (LED) backlight system. The matrix employs a-Si Thin Film Transistor as the active element. It is a transmissive type display operating in the normally black mode. It has a 54.64 inch diagonally measured active display area with WUXGA resolution (1080 vertical by 1920 horizontal pixel array). Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical stripes. Gray scale or the luminance of the sub-pixel color is determined with a 10-bit gray scale signal for each dot. Therefore, it can present a palette of more than 1.06Bilion colors. It is intended to support LCD TV, PCTV where high brightness, super wide viewing angle, high color gamut, high color depth and fast response time are important.
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LC550EUQ
Product Specification
3D Enable
LVDS Select
L/R Indicator
L/D Enable
LVDS(2Port)
Bit Select
+12.0V
VSYNC, SIN, SCLK, GND 3D Enable
+24.0V, GND, On/Off
ExtV
BR-B
CN3
(51pin)
Shutter Glass Out
General Features
Flash*2
MEMC*2
LED Driver
DDR2*2
EEPROM
SCL
SDA
Timing
Controller
(OPC+DGA+ODC)
Power Circuit
Block
Mini-LVDS(RGB)
G1
Gate Driver Circuit
G1080
V : 2Block
Source Driver Circuit
S1 S1920
TFT - LCD
Panel
(1920 Ý RGB Ý 1080
pixels)
H : 8 Block
Local Dimming : 16 Block
Active Screen Size 54.64 inches(1387.80mm) diagonal Outline Dimension 1261.6(H) Ý732.4(V) X 11.4(B)/24.2(D)mm (Typ.)
Pixel Pitch 0.630 mm x 0.630 mm
Pixel Format 1920 horiz. by 1080 vert. Pixels, RGB stripe arrangement
Color Depth 10bit(D), 1.06Billon colors
Luminance, White 450 cd/m2 (Center 1point ,Typ.)
Viewing Angle (CR>10) Viewing angle free ( R/L 178 (Min.), U/D 178 (Min.))
Power Consumption
Weight 21.5Kg (Typ.)
Display Mode Transmissive mode, Normally black Surface Treatment Hard coating(3H), Anti-reflection treatment of the front polarizer (Reflectanceର 2%)
Ver.1.0
Total 148.2 W (Typ.) (Logic=11.9 W with T-CON, Backlight=136.3W @ with Driver
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2. Absolute Maximum Ratings
The following items are maximum values which, if exceeded, may cause faulty operation or permanent damage to the LCD module.
Table 1. ABSOLUTE MAXIMUM RATINGS
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LC550EUQ
Product Specification
Parameter Symbol
Power Input Voltage
Driver Control Voltage
T-Con Option Selection Voltage VLOGIC -0.3 +4.0 VDC
Operating Temperature TOP 0 +50 C
Storage Temperature TST -20 +60 C
Panel Front Temperature TSUR - +68 C 4
Operating Ambient Humidity HOP 10 90 %RH
Storage Humidity HST 10 90 %RH
Note
1. Ambient temperature condition (Ta =
LCD Circuit VLCD -0.3 +14.0 VDC
Driver VBL -0.3 + 27.0 VDC
ON/OFF VOFF / VON -0.3 +5.5 VDC
Brightness EXTVBR-B 0.0 +5.5 VDC
25 r 2 C )
Value
Unit Note
Min Max
2. Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be Max 39C, and no condensation of water.
3. Gravity mura can be guaranteed below 40C condition.
4. The maximum operating temperatures is based on the test condition that the surface temperature
of display area is less than or equal to 68C with LCD module alone in a temperature controlled chamber. Thermal management should be considered in final product design to prevent the surface temperature of display area from being over 68୅. The range of operating temperature may degraded in case of improper thermal management in final product design.
90%
1
2,3
2,3
60
60%
Ver.1.0
Wet Bulb Temperature [
10
0
10 20 30 40 50 60 70 800-20
Dry Bulb Temperature [
C]
20
30
40
50
40%
Humidity [(%)RH]
10%
C]
Storage
Operation
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3. Electrical Specifications
3-1. Electrical Characteristics
Table 2. ELECTRICAL CHARACTERISTICS
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LC550EUQ
Product Specification
Parameter Symbol
Min Typ Max
Circuit :
Power Input Voltage VLCD 10.8 12.0 13.2 VDC
Power Input Current ILCD
Power Consumption PLCD
Rush current IRUSH -
Note
1. The specified current and power consumption are under the V
ࣩ ࣵࣵ࣬ ࣭࣮ࣨࣴࣳ
- 1,940 2,520 mA 2
ࣩ ࣭࣭࣪ࣵ ࣱࣱ࣭࣪
condition whereas mosaic pattern(8 x 6) is displayed and f
Value
ࣩ
=12.0V, Ta=25 r 2C, fV=240Hz
LCD
is the frame frequency.
V
15 A 3
2. The current is specified at the maximum current pattern.
3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).
White : 1023 Gray Black : 0 Gray
Unit Note
mA 1
Watt 1
Mosaic Pattern(8 x 6)
Ver.1.0
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Table 3. ELECTRICAL CHARACTERISTICS (Continue)
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LC550EUQ
Product Specification
Parameter Symbol
LED Driver :
Power Supply Input Voltage VBL 22.8 24.0 25.2 Vdc 1
Power Supply Input Current (peak) IBL_A
Power Supply Input Current (In-Rush) Irush
Power Consumption PBL
On/Off
Input Voltage for
Control System
Signals
LED :
Life Time 30,000 Hrs 2
Brightness Adjust ExtVBR-B 1 - 100 %
Pulse Duty Level (PWM)
PWM Frequency for NTSC & PAL
On V on 2.5 - 5.0 Vdc
Off V off -0.3 0.0 0.7 Vdc
High Level 2.5 - 5.0
Low Level 0.0 - 0.7
PAL 97 100 103 Hz
NTSC 117 120 123 Hz
Min Typ Max
-
-
--7.6A
- - 10.4 A
-
Values
5.7
7.8
136.3 141.8
64.7 67.1
6.0
8.3
Unit Notes
A Ext VBR-B = 100%
A 3D Mode
VBL = 22.8V
Ext VBR-B =100%....4
3D Mode VBL = 22.8V
Ext VBR-B =100%....4
W Ext VBR-B = 100%
W 3D Mode
On Duty
Vdc
Vdc
HIGH : on duty
LOW : off duty
6
3
Notes :
1. Electrical characteristics are determined after the unit has been ‘ON’ and stable for approximately 60
minutes at 25·2¶C. The specified current and power consumption are under the typical supply Input voltage 24Vand V
BR (ExtVBR-B : 100%), it is total power consumption.
2. The life time(MTTF) is determined as the time which luminance of the LED is 50% compared to that of initial value at the typical LED current (ExtVBR-B :100%) on condition of continuous operating in LCM state at 25·2¶C.
3. LGD recommend that the PWM freq. is synchronized with One time harmonic of V_sync signal of system. Though PWM frequency is over 120Hz (max 252Hz), function of LED Driver is not affected.
4. The duration of rush current is about 10ms.
5. Even though inrush current is over the specified value, there is no problem if I
2
T spec of fuse is satisfied.
6. Ext_PWM Signal have to input available duty range. Between 99% and 100% ExtVBR-B duty have to be avoided. ( 99% < ExtVBR-B < 100%) But ExtVBR-B 0% and 100% are available.
High
Available duty range
Low
0%
1%
Ver.1.0
99% 100%Ext_PWM Input Duty
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ዥ
ዥ
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Product Specification
3-2. Interface Connections
This LCD module employs one kind of interface connection, 51-pin connector is used for the module electronics and 14-pin connector is used for the integral backlight system.
3-2-1. LCD Module
- LCD Connector : FI-R51S-HF(manufactured by JAE) (CN3) Refer to below and next Page table
- Mating Connector : FI-R51HL(JAE)
Table 4-1. MODULE CONNECTOR(CN3) PIN CONFIGURATION
No Symbol Description No Symbol Description
1 3D Enable 3D Enable (H:3D, L:2D) 27 Bit Select ‘H’ or NC = 10bit(D), ‘L’ = 8bit
2 I2C_SDA (I2C_SDA) ,Note 8 28
3 I2C_SCL (I2C_SCL) ,Note8 29
4 SDA SDA (For Local Dimming) 30
5 SCL SCL (For Local Dimming) 31 R2BP SECOND LVDS Receiver Signal (B+)
6 WP WP (Write Protection) 32
7 LVDS Select ‘H’ or NC =JEIDA , ‘L’ = VESA 33
8 LR indicator L/R Indicator, Note9 34 GND Ground
9 SG OUT Shutter Glass Signal Out 35
10 Local Dimming
11
12
13
14
15 R1BP FIRST LVDS Receiver Signal (B+) 41
16
17
18
19
20 R1CLKP FIRST LVDS Receiver Clock Signal(+) 46 GND Ground
21
22
23
24
25
26 NC No Connection - - -
GND
R1AN
R1AP
R1BN
R1CN
R1CP
GND
R1CLKN
GND
R1DN
R1DP
R1EN
R1EP
Local Dimming
‘H’ =Enable , ‘L’ or NC = Disable
Ground 37
FIRST LVDS Receiver Signal (A-) 38
FIRST LVDS Receiver Signal (A+) 39
FIRST LVDS Receiver Signal (B-) 40
FIRST LVDS Receiver Signal (C-) 42
FIRST LVDS Receiver Signal (C+) 43
Ground 44 GND Ground
FIRST LVDS Receiver Clock Signal(-) 45 GND Ground
Ground 47 NC No connection
FIRST LVDS Receiver Signal (D-) 48 VLCD Power Supply +12.0V
FIRST LVDS Receiver Signal (D+) 49 VLCD Power Supply +12.0V
FIRST LVDS Receiver Signal (E-) 50 VLCD Power Supply +12.0V
FIRST LVDS Receiver Signal (E+) 51 VLCD Power Supply +12.0V
36
R2AN
R2AP
R2BN
R2CN
R2CP
R2CLKN
R2CLKP
GND
R2DN
R2DP
R2EN
R2EP
NC
NC
SECOND LVDS Receiver Signal (A-)
SECOND LVDS Receiver Signal (A+)
SECOND LVDS Receiver Signal (B-)
SECOND LVDS Receiver Signal (C-)
SECOND LVDS Receiver Signal (C+)
SECOND LVDS Receiver Clock Signal(-)
SECOND LVDS Receiver Clock Signal(+)
Ground
SECOND LVDS Receiver Signal (D-)
SECOND LVDS Receiver Signal (D+)
SECOND LVDS Receiver Signal (E-)
SECOND LVDS Receiver Signal (E+) No connection
No connection
LC550EUQ
1. All GND(ground) pins should be connected together to the LCD module’s metal frame.
2. All V
LCD (power input) pins should be connected together.
3. All Input levels of LVDS signals are based on the EIA 644 Standard.
4. Specific pins(pin No. #10) are used for Local Dimming function of the LCD module.
If 3D mode is operated, this pins are necessary ‘L’ status. (Please see the Appendix_
for more information.)
5. LVDS pin (pin No. #24,25,40,41) are used for 10Bit(D) of the LCD module.
6. Specific pins (pin No. #1) are used for selecting 3D/2Dmode.
7. Specific pins (pin No. #9) are output signal from the LCD module
8. Specific pin (pin No. #2, #3) is used for Controlling MEMC Chip register in the LCM Module.
9. Specific pin (pin No. #8) is reserved for 3D input (Frame Sequential Type) Control. (Please see the Appendix_
Ver.1.0
for more information)
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3-2-2. Backlight Module
Master
-LED Driver Connector : 20022WR-14B1(Yeonho) or Equivalent
- Mating Connector : 20022HS-14 or Equivalent
Table 5. LED DRIVER CONNECTOR PIN CONFIGURATION
Pin No Symbol Description Note
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LC550EUQ
Product Specification
1
2
3
4
5
6
7
8
9
10
11
12
13
14
VBL Power Supply +24.0V
VBL Power Supply +24.0V
VBL Power Supply +24.0V
VBL Power Supply +24.0V
VBL Power Supply +24.0V
GND Backlight Ground
GND Backlight Ground
GND Backlight Ground
GND Backlight Ground
GND Backlight Ground
NC
ON/OFF
V
EXTVBR-B
Status
No connection
Backlight ON/OFF control
External PWM
Backlight Status
Notes : 1. GND should be connected to the LCD module’s metal frame.
2. High : on duty / Low : off duty, Pin#13 can be opened. ( if Pin #13 is open , EXTVBR-B is 100% )
3. Normal : Low (Under 0.7V) Abnormal : High (Over 2.5V)
4. Each impedance of pin #12 and 13 is over
50 [K˟].
1
2
3
୛ Rear view of LCM
PCB
14
…
…
1
<Master>
Ver.1.0
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Product Specification
3-3. Signal Timing Specifications
Table 6 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal timings should be satisfied with the following specification for normal operation.
Table 6. TIMING TABLE (DE Only Mode)
ITEM Symbol Min Typ Max Unit Note
LC550EUQ
Horizontal
Vertical
Frequency
Display
Period
Blank t
Total tHP 1040 1100 1260 tCLK
Display
Period
Blank t
Total t
ITEM Symbol Min Typ Max Unit Note
DCLK f
Horizontal fH 64.1 67.5 69 KHz 2
Vertical f
t
HV 960 960 960 tCLK 1920 / 2
HB 80 140 400 tCLK 1
t
VV 1080 1080 1080 Lines
VB
VP
CLK 70.5 74.25 75 MHz
V
20
(228)
1100
(1308)
57
(47.5)
45
(270)
1125
(1350)
60
(50)
86
(300)
1166
(1380)
60.6
(50.5)
Lines 1
Lines
2Pixel/CLK, 148.5MHz/2
Hz
NTSC : 57~60.6Hz (PAL : 47.5~50.5Hz)
2
Note: 1. The input of HSYNC & VSYNC signal does not have an effect on normal operation (DE Only Mode).
If you use spread spectrum of EMI, add some additional clock to minimum value for clock margin.
2. The performance of the electro-optical characteristics may be influenced by variance of the vertical refresh rate and the horizontal frequency
୔ Timing should be set based on clock frequency.
Ver.1.0
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3-4. LVDS Signal Specification
3-4-1. LVDS Input Signal Timing Diagram
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LC550EUQ
Product Specification
DCLK
First data
Second data
Third data
Forth data
DE(Data Enable)
tCLK
0.5 VDD
Invalid data
Invalid data
Invalid data
Invalid data
DE, Data
Valid data
Pixel 0
Valid data
Pixel 1
Valid data
Pixel 2
Valid data
Pixel 3
Pixel 4
Pixel 5
Pixel 6
Pixel 7
0.7VDD
0.3VDD
Invalid data
Invalid data
Invalid data
Invalid data
DE(Data Enable)
Ver.1.0
* tHB = tHFP + tWH +tHBP
* tVB = tVFP + tWV +tVBP
1 1080
tVV
tVP
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3-4-2. LVDS Input Signal Characteristics
1) DC Specification
LVDS -
LVDS +
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LC550EUQ
Product Specification
V
IN _MAXVIN _MIN
# VCM= {(LVDS +) + ( LVDS - )}/ 2
0V
V
CM
Description Symbol Min Max Unit Note
LVDS Common mode Voltage V
LVDS Input Voltage Range V
CM
IN
1.0 1.5 V -
0.7 1.8 V -
Change in common mode Voltage ȟVCM 250 mV -
2) AC Specification
T
clk
LVDS Clock
A
LVDS Data
(F
= 1/T
)
clk
A
LVDS 1’st Clock
LVDS 2nd/ 3rd/ 4thClock
tSKEW
t
SKEW_mintSKEW_max
tSKEW
clk
T
clk
80%
20%
t
RF
Description Symbol Min Max Unit Note
LVDS Differential Voltage
High Threshold
Low Threshold
LVDS Clock to Data Skew t
LVDS Clock/DATA Rising/Falling time t
Effective time of LVDS t
LVDS Clock to Clock Skew (Even to Odd) t
Note
1. All Input levels of LVDS signals are based on the EIA 644 Standard.
2. If t
isn’t enough, t
RF
should be meet the range.
eff
3. LVDS Differential Voltage is defined within t
Ver.1.0
V
TH
V
TL
SKEW
RF
eff
SKEW_EO
100 300 mV
-300 -100 mV
|(0.25*T
260 |(0.3*T
)/7| ps -
clk
)/7| ps 2
clk
|·360| ps -
|1/7* T
clk|
eff
ps -
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LC550EUQ
Product Specification
360ps
V+ data
Vcm
V­data
V+ clk
Vcm
0.5tui
tui
VTH
VTL
360ps
teff
tui : Unit Interval
V­clk
Ver.1.0
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࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬
࣭࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ
࣪࣪࣪
࣭࣭࣭࣭࣭࣭࣭࣭࣭ࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜ࣬
࣭࣭࣭࣭࣭࣭࣭࣭࣭࣭ࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜ
࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬
࣭࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ
࣪࣪࣪
࣭࣭࣭࣭࣭࣭࣭࣭࣭ࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜ࣬
࣭࣭࣭࣭࣭࣭࣭࣭࣭࣭ࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜ
࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬
࣭࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ
࣪࣪࣪
࣭࣭࣭࣭࣭࣭࣭࣭࣭ࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜ࣬
࣭࣭࣭࣭࣭࣭࣭࣭࣭࣭ࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜ
3-5. Color Data Reference
The brightness of each primary color(red,green,blue) is based on the 10bit gray scale data input for the color. The higher binary input, the brighter the color. Table 7 provides a reference for color versus data input.
Table 7. COLOR DATA REFERENCE
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LC550EUQ
Product Specification
Input Color Data
Basic Color
RED
Color
ࣾ
࣭࣮࣯ࣜࣤ࣬ࣥ
࣭࣮࣯ࣜࣤ࣬ࣥ
ࣾ࣭࣮࣯ࣜࣤ࣬ࣥ
ࣿ



ࣜࣤ࣬࣬࣬࣬ࣥ
࣭ࣜࣤ࣬࣬࣬ࣥ
…
࣭࣮࣮ࣜࣤ࣬ࣥ
࣭࣮࣯ࣜࣤ࣬ࣥ
ࣜࣤ࣬࣬࣬࣬ࣥࣜ
RED
MSB LSB
ࣵࣜࣴࣜࣳࣜࣲࣜࣱࣜࣰࣜ࣯ࣜ࣮ࣜ࣭ࣜ࣬ ࣵࣜࣴࣜࣳࣜࣲࣜࣱࣜࣰࣜ࣯ࣜ࣮ࣜ࣭ࣜ࣬ ࣰࣱࣲ࣯࣮࣭ࣾࣵࣜࣾࣴࣜࣾࣳࣜࣾࣜࣾࣜࣾࣜࣾࣜࣾࣜࣾࣜࣾ࣬
࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬
࣭࣭࣭࣭࣭࣭࣭࣭࣭࣭ࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬
࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣭࣭࣭࣭࣭࣭࣭࣭࣭࣭ࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬
࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣭࣭࣭࣭࣭࣭࣭࣭࣭࣭ࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜ
࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣭࣭࣭࣭࣭࣭࣭࣭࣭࣭ࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜ ࣭࣭࣭࣭࣭࣭࣭࣭࣭࣭ࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜ
࣭࣭࣭࣭࣭࣭࣭࣭࣭࣭ࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣭࣭࣭࣭࣭࣭࣭࣭࣭࣭ࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜ
࣭࣭࣭࣭࣭࣭࣭࣭࣭࣭ࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜ ࣭࣭࣭࣭࣭࣭࣭࣭࣭࣭ࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬
࣭࣭࣭࣭࣭࣭࣭࣭࣭࣭ࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜ ࣭࣭࣭࣭࣭࣭࣭࣭࣭࣭ࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜ ࣭࣭࣭࣭࣭࣭࣭࣭࣭࣭ࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜ
࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣬
MSB LSB
࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬
࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬
࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬
࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬
GREEN
MSB LSB
࣪࣪࣪ ࣪࣪࣪
࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬
BLUE
GREEN
BLUE
࣭ࣜࣤ࣬࣬࣬ࣥ
࣪࣪࣪
࣭࣮࣮ࣜࣤ࣬ࣥ
࣭࣮࣯ࣜࣤ࣬ࣥ
ࣾࣜࣤ࣬࣬࣬࣬ࣥࣜ
ࣾ࣭ࣜࣤ࣬࣬࣬ࣥ
࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣬
࣪࣪࣪ ࣪
࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣭
࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣭
࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣬
࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣬
… ࣪࣪࣪ ࣪࣪࣪ ࣪
ࣾ࣭࣮࣮ࣜࣤ࣬ࣥ
ࣾ࣭࣮࣯ࣜࣤ࣬ࣥ
࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣭
࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣭
࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬
࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬
࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬
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࣪࣪࣪
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Global LCD Panel Exchange Center
3-6. Power Sequence
3-6. Power Sequence
3-6-1. LCD Driving circuit3-6-1. LCD Driving circuit
3-6-1. LCD Driving circuit3-6-1. LCD Driving circuit
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LC550EUQ
Product Specification
Power Supply For LCD
V
LCD
Interface Signal (Tx_clock)
User Control Signal
(LVDS_select, BIT _select,
L-DIM Enable, 3D Enable)
Power for LED
Table 8. POWER SEQUENCE
Parameter
1 0.5 - 20 ms -
T
T
2 1--s4
3 3--s3
T
T
4 200 - - ms 3
5 1--s5
T
T
6 --T2ms4
T
7 4-s
8 100 - ms 6
T
90%
10%
0V
T
1
T2
30%
0V
100%
T6
T7
Value
Min Typ Max
Valid Data
T3 T4
LED ON
90%
10%
T8
10%
T5
Vcm: LVDS Common mode Voltage
Unit Notes
Note :
1. Please avoid floating state of interface signal at invalid period.
2. When the power supply for LCD (VLCD) is off, be sure to pull down the valid and invalid data to 0V.
3. The
T3 / T4 is recommended value, the case when failed to meet a minimum specification,
abnormal display would be shown. There is no reliability problem.
4. If the on time of signals(Interface signal and user control signals) precedes the on time of Power(V it will be happened abnormal display. When
5.
T5 should be measured after the Module has been fully discharged between power off and on
T6 is NC status, T6 doesn’t need to be measured.
period.
6. It is recommendation specification that T8 has to be 100ms as a minimum value.
7. When the power for LCD (VLCD) is on, be sure to start only 2D mode.
If it is started in 3Dmode, abnormal display may occur.
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