LG Display LC550EUN-SEM1 Specification
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LC550EUN
Product Specification
SPECIFICATION
FOR
APPROVAL
() Preliminary Specification
()Final Specification
Title 55.0” WUXGA TFT LCD
BUYER CHN
MODEL
APPROVED BY
/
/
SIGNATURE
DATE
SUPPLIER LG Display Co., Ltd.
*MODEL LC550EUN
SUFFIX SEM1 (RoHS Verified)
*When you obtain standard approval,
please use the above model name without suffix
APPROVED BY
J.T. Kim / Team Leader
REVIEWED BY
D.K. Yang / Project Leader
SIGNATURE
DATE
PREPARED BY
/
Please return 1 copy for your confirmation with
your signature and comments.
Ver. 0.0
J.H. Oh / Engineer
TV Product Development Dept.
LG Display Co., Ltd.
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LC550EUN
Product Specification
CONTENTS
Number ITEM
COVER
CONTENTS
RECORD OF REVISIONS 2
1 GENERAL DESCRIPTION
2 ABSOLUTE MAXIMUM RATINGS
3 ELECTRICAL SPECIFICATIONS
3-1 ELECTRICAL CHARACTERISTICS
3-2 INTERFACE CONNECTIONS
3-3 SIGNAL TIMING SPECIFICATIONS
3-4 SIGNAL TIMING WAVEFORMS 10
3-5 COLOR DATA REFERENCE
3-6 POWER SEQUENCE
4 OPTICAL SPECIFICATIONS
5 MECHANICAL CHARACTERISTICS
6 RELIABILITY
Page
0
1
3
4
5
5
7
9
13
14
16
22
25
7 INTERNATIONAL STANDARDS
7-1 SAFETY
7-2 EMC 26
7-3 ENVIRONMENT 26
8 PACKING
8-1 DESIGNATION OF LOT MARK
8-2 PACKING FORM
9 PRECAUTIONS 28
9-1 MOUNTING PRECAUTIONS 28
9-2 OPERATING PRECAUTIONS 28
9-3 ELECTROSTATIC DISCHARGE CONTROL 29
9-4 PRECAUTIONS FOR STRONG LIGHT EXPOSURE 29
9-5 STORAGE 29
9-6 HANDLING PRECAUTIONS FOR PROTECTION FILM 29
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26
27
27
27
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Revision No. Revision Date Page Description
0.1 Aug, 30, 2011 - Preliminary Specification(First Draft)
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LC550EUN
Product Specification
RECORD OF REVISIONS
Ver. 0.0
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1. General Description
The LC550EUN is a Color Active Matrix Liquid Crystal Display with an integral Light Emitting Diode (LED)
backlight system. The matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive display type which is operating in the normally black mode. It has a 54.64 inch diagonally
measured active display area with WUXGA resolution (1080 vertical by 1920 horizontal pixel array).
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arrayed in vertical stripes.
Gray scale or the luminance of the sub-pixel color is determined with a 8-bit gray scale signal for each dot.
Therefore, it can present a palette of more than 16.7Milion colors.
It has been designed to apply the 8-bit 2-port LVDS interface.
It is intended to support LCD TV, PCTV where high brightness, super wide viewing angle, high color gamut,
high color depth and fast response time are important.
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LC550EUN
Product Specification
LVDS
2Port
LVDS
Select
OPC
Enable
BR-B
ExtV
+12.0V
PWM_OUT
1~3
CN1
(51pin)
CN2
(4 pin)
LVDS 1,2
Option
signal
I2C
EEPROM
SCL
Timing Controller
LVDS Rx + OPC + DGA
Power Circuit
SDA
Integrated
Block
EPI(RGB)
Control
Signals
Power Signals
Source Driver Circuit
S1 S1920
G1
TFT - LCD Panel
(1920 Ý RGB Ý 1080 pixels)
[Gate In Panel]
G1080
Scanning Block 1
PWM_OUT
1~3
+24.0V, GND, On/Off
LED Driver
Scanning Block 2
Scanning Block 3
General Features
Active Screen Size 54.64 inches(1387.80mm) diagonal
Outline Dimension 1244.6(H) ϧ 720.9(V) ϧ 9.9(B) / 23.1(D) mm (Typ.) (TBD)
Pixel Pitch 0.630 mm x 0.630 mm
Pixel Format 1920 horiz. by 1080 vert. Pixels, RGB stripe arrangement
Color Depth 8bit, 16.7 Million colors
Luminance, White 360 cd/m2(Center 1point ,Typ.)
Viewing Angle (CR>10) Viewing angle free ( R/L 178 (Min.), U/D 178 (Min.))
Power Consumption Total 109.6W (Typ.) [Logic= 7.2W, LED Driver=100.1W(TBD) (ExtVbr_B=100% )]
Weight 16.5Kg (Typ.) (TBD)
Display Mode Transmissive mode, Normally black
Surface Treatment Hard coating(3H), Anti-glare treatment of the front polarizer (Haze TBD)
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2. Absolute Maximum Ratings
The following items are maximum values which, if exceeded, may cause faulty operation or permanent damage
to the LCD module.
Table 1. ABSOLUTE MAXIMUM RATINGS
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LC550EUN
Product Specification
Parameter Symbol
Power Input Voltage
Driver Control Voltage
T-Con Option Selection Voltage VLOGIC
Operating Temperature TOP
Storage Temperature TST
Panel Front Temperature TSUR - +68 ¶C 4
Operating Ambient Humidity HOP
Storage Humidity HST 10 90 %RH
Note
1. Ambient temperature condition (Ta =
LCD Circuit VLCD
Driver VBL -0.3 + 27.0 VDC
ON/OFF VOFF / VON
Brightness EXTVBR-B
25 r 2 ¶C )
Value
Min Max
-0.3 +14.0
-0.3 +5.5
0.0 +3.6
-0.3 +4.0
0 +50
-20 +60
10 90
Unit Note
VDC
VDC
VDC
VDC
¶C
¶C
%RH
2. Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be Max 39¶C, and no condensation of water.
3. Gravity mura can be guaranteed below 40¶C condition.
4. The maximum operating temperatures is based on the test condition that the surface temperature
of display area is less than or equal to 68¶C with LCD module alone in a temperature controlled chamber.
Thermal management should be considered in final product design to prevent the surface temperature of
display area from being over 68. The range of operating temperature may be degraded in case of
improper thermal management in final product design.
90%
1
2,3
2,3
60
60%
Storage
Operation
Ver. 0.0
Wet Bulb
Temperature [
10
0
10 20 30 40 50 60 70 800-20
Dry Bulb Temperature [
¶C]
20
30
40
50
40%
Humidity [(%)RH]
10%
¶C]
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3. Electrical Specifications
3-1. Electrical Characteristics
It requires two power inputs. One is employed to power for the LCD circuit. The other Is used for the LED
backlight and LED Driver circuit.
Table 2. ELECTRICAL CHARACTERISTICS
Parameter Symbol
Circuit :
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LC550EUN
Product Specification
Value
Unit Note
Min Typ Max
Power Input Voltage VLCD 10.8 12.0 13.2 VDC
Power Input Current ILCD
Power Consumption PLCD 7.4(TBD) 9.67(TBD) Watt 1
Rush current IRUSH - - 5.0(TBD) A 3
ExtV
BR-B
Brightness Adjust for Back Light
ExtV
BR-B
Frequency
Pulse Duty Level
(PWM)
Note
1. The specified current and power consumption are under the V
High Level
Low Level
condition, and mosaic pattern(8 x 6) is displayed and f
- 620(TBD) 806(TBD) mA 1
- 915(TBD) 1190(TBD) mA 2
5 - 100 %
1 - 100 %
40 50/60 80 Hz
2.5 - 3.6 Vdc
0 - 0.8 Vdc
=12.0V, Ta=25 r 2¶C, fV=60Hz
LCD
is the frame frequency.
V
HIGH : on duty
LOW : off duty
2. The current is specified at the maximum current pattern.
3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).
4. ExtV
After Driver ON signal is applied, ExtV
After that, ExtV
signal have to input available duty range and sequence.
BR-B
1% and 100% is possible
BR-B
should be sustained from 5% to 100% more than 500ms.
BR-B
For more information, please see 3-6-2. Sequence for LED Driver.
5. Ripple voltage level is recommended under ·5% of typical voltage
On Duty
4
White : 255 Gray
Black : 0 Gray
Mosaic Pattern(8 x 6)
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Table 3. ELECTRICAL CHARACTERISTICS (Continue)
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LC550EUN
Product Specification
Parameter Symbol
LED Driver :
Power Supply Input Voltage VBL 22.8 24.0 25.2 Vdc 1
Power Supply Input Current IBL
Power Supply Input Current (In-Rush) In-rush - - 5.7(TBD) A
Power Consumption PBL -
Input Voltage for
Control System
Signals
LED :
Life Time 30,000 50,000 Hrs 2
On/Off
On V on 2.5 - 5.0 Vdc
Off V off -0.3 0.0 0.7 Vdc
Min Typ Max
Values
-
4.17
100.1
4.55
109.3
Unit Notes
A1
BL = 22.8V
V
ExtV
BR-B
W1
= 100%
3
Notes :
1. Electrical characteristics are determined after the unit has been ‘ON’ and stable for approximately 60
minutes at 25·2¶C. The specified current and power consumption are under the typical supply Input voltage
24Vand V
BR (ExtVBR-B : 100%), it is total power consumption.
2. The life time (MTTF) is determined as the time which luminance of the LED is 50% compared to that of initial
value at the typical LED current (ExtVBR-B :100%) on condition of continuous operating in LCM state at
25·2¶C.
3. The duration of rush current is about 200ms. This duration is applied to LED on time.
2
4. Even though inrush current is over the specified value, there is no problem if I
Ver. 0.0
T spec of fuse is satisfied.
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3-2. Interface Connections
This LCD module employs two kinds of interface connection, 51-pin connector is used for the module
electronics and 14-pin connector is used for the integral backlight system.
3-2-1. LCD Module
- LCD Connector(CN1): FI-R51S-HF(manufactured by JAE) or compatible
- Mating Connector : FI-R51HL(JAE) or compatible
Table 4. MODULE CONNECTOR(CN1) PIN CONFIGURATION
No Symbol Description No Symbol Description
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
NC
NC
NC
NC
NC
NC
LVDS Select
ExtVBR-B
NC
OPC Enable ‘H’ = Enable , ‘L’ or NC = Disable
GND
R1AN
R1AP
R1BN
R1BP
R1CN
R1CP
GND
R1CLKN
R1CLKP
GND
R1DN
R1DP
NC No connection
NC No connection
NC or GND
No Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4)
‘H’ =JEIDA , ‘L’ or NC = VESA
External PWM (from System)
No Connection (Note 4)
Ground
FIRST LVDS Receiver Signal (A-)
FIRST LVDS Receiver Signal (A+)
FIRST LVDS Receiver Signal (B-)
FIRST LVDS Receiver Signal (B+)
FIRST LVDS Receiver Signal (C-)
FIRST LVDS Receiver Signal (C+)
Ground
FIRST LVDS Receiver Clock Signal(-)
FIRST LVDS Receiver Clock Signal(+)
Ground
FIRST LVDS Receiver Signal (D-)
FIRST LVDS Receiver Signal (D+)
No Connection or Ground
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Product Specification
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
-- -
R2AN
R2AP
R2BN
R2BP
R2CN
R2CP
GND
R2CLKN
R2CLKP
GND
R2DN
R2DP
NC or GND
NC or GND
G
GND Ground
GND Ground
VLCD Power Supply +12.0V
VLCD Power Supply +12.0V
VLCD Power Supply +12.0V
VLCD Power Supply +12.0V
LC550EUN
NC No connection
SECOND LVDS Receiver Signal (A-)
SECOND LVDS Receiver Signal (A+)
SECOND LVDS Receiver Signal (B-)
SECOND LVDS Receiver Signal (B+)
SECOND LVDS Receiver Signal (C-)
SECOND LVDS Receiver Signal (C+)
Ground
SECOND LVDS Receiver Clock Signal(-)
SECOND LVDS Receiver Clock Signal(+)
Ground
SECOND LVDS Receiver Signal (D-)
SECOND LVDS Receiver Signal (D+)
NC No connection
NC No connection
No Connection or Ground
No Connection or Ground
ND Ground (Note 6)
NC No connection
Note
1. All GND(ground) pins should be connected together to the LCD module’s metal frame.
2. All V
LCD (power input) pins should be connected together.
3. All Input levels of LVDS signals are based on the EIA 644 Standard.
4. #1~#6 & #9 NC (No Connection): These pins are used only for LGD (Do not connect)
5. Specific pins(pin No. #10) are used for OPC function of the LCD module.
If not used, these pins are no connection. (Please see the Appendix VI for more information.)
6. Specific pin No. #44 is used for “No signal detection” of system signal interface.
It should be GND for NSB(No Signal Black) during the system interface signal is not.
If this pin is “H”, LCD Module displays AGP(Auto Generation Pattern).
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Product Specification
3-2-2. Backlight Module
Master
-LED Driver Connector
: 20022WR - H14B2(Yeonho) or Compatible
- Mating Connector
: 20022HS - 14B2 or Compatible
Table 5-1. LED DRIVER CONNECTOR PIN CONFIGURATION
Pin No Symbol Description Note
LC550EUN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
VBL Power Supply +24.0V
VBL Power Supply +24.0V
VBL Power Supply +24.0V
VBL Power Supply +24.0V
VBL Power Supply +24.0V
GND Backlight Ground
GND Backlight Ground
GND Backlight Ground
GND Backlight Ground
GND Backlight Ground
Status
ON/OFF
V
NC
NC
Back Light Status
Backlight ON/OFF control
Don’t care
Don’t care
Notes :1. GND should be connected to the LCD module’s metal frame.
2. Normal : Low (under 0.7V) / Abnormal : Open
3. Each impedance of pin #12 is over 50 [K˟] .
1
2
3
Rear view of LCM
PCB
1
14
…
1
14
…
<Master>
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3-3. Signal Timing Specifications
Table 6 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal
timings should be satisfied with the following specification for normal operation.
Table 6. TIMING TABLE (DE Only Mode)
ITEM Symbol Min Typ Max Unit Note
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LC550EUN
Product Specification
Horizontal
Vertical
Frequency
Display
Period
Blank t
Total t
Display
Period
Blank tVB
Total tVP
ITEM Symbol Min Typ Max Unit Note
DCLK fCLK 63.00 74.25 78.00 MHz
Horizontal fH 57.3 67.5 70 KHz 2
Vertical f
HV 960 960 960 tCLK 1920 / 2
t
HB 100 140 240 tCLK 1
HP 1060 1100 1200 tCLK
t
VV 1080 1080 1080 Lines
20
(228)
1100
(1308)
V
57
(47)
45
(270)
1125
(1350)
60
(50)
69
(300)
1149
(1380)
63
(53)
Lines 1
Lines
Hz
NTSC
(PAL)
2
Note: 1. The input of HSYNC & VSYNC signal does not have an effect on normal operation (DE Only Mode).
If you use spread spectrum of EMI, add some additional clock to minimum value for clock margin.
2. The performance of the electro-optical characteristics may be influenced by variance of the vertical
refresh rate and the horizontal frequency
Timing should be set based on clock frequency.
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3-4. LVDS Signal Specification
3-4-1. LVDS Input Signal Timing Diagram
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LC550EUN
Product Specification
DE, Data
DCLK
First data
Second data
0.7VDD
0.3VDD
tCLK
DE(Data Enable)
0.5 VDD
Invalid data
Invalid data
Valid data
Pixel 0,0
Valid data
Pixel 1,0
tHP
Pixel 2,0
Pixel 3,0
Invalid data
Invalid data
tHV
DE(Data Enable)
Ver. 0.0
1 1080
tVV
tVP
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3-4-2. LVDS Input Signal Characteristics
1) DC Specification
LVDS -
LVDS +
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LC550EUN
Product Specification
#VCM= {( LVDS +) + ( LVDS -)} /2
0V
V
CM
V
IN _MAXVIN _MIN
Description Symbol Min Max Unit Note
LVDS Common mode Voltage V
LVDS Input Voltage Range V
CM
IN
1.0 1.5 V -
0.7 1.8 V -
Change in common mode Voltage ȟVCM - 250 mV -
2) AC Specification
T
clk
LVDS Clock
A
LVDS Data
(F
=1/T
)
clk
A
LVDS 1’st Clock
LVDS 2nd/ 3rd/ 4thClock
tSKEW
tSKEW
t
SKEW_mintSKEW_max
clk
T
clk
80%
20%
t
RF
Description Symbol Min Max Unit Note
LVDS Differential Voltage
High Threshold
Low Threshold
LVDS Clock to Data Skew t
LVDS Clock/DATA Rising/Falling time t
Effective time of LVDS t
LVDS Clock to Clock Skew (Even to Odd) t
Note
1. All Input levels of LVDS signals are based on the EIA 644 Standard.
2. If t
isn’t enough, t
RF
should be meet the range.
eff
3. LVDS Differential Voltage is defined within t
Ver. 0.0
V
TH
V
TL
SKEW
RF
eff
SKEW_EO
100 300 mV
-300 -100 mV
- |(0.25*T
260 |(0.3*T
)/7| ps -
clk
)/7| ps 2
clk
|·360| - ps -
- |1/7* T
eff
|ps -
clk
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