LG Display LC550EUN-FFF1 Specification

( ) Preliminary Specification ( ) Final Specification
Title 55.0” WUXGA TFT LCD
LC550EUN
Product Specification
SPECIFICATION
FOR
APPROVAL
BUYER Genaral
MODEL
APPROVED BY
/
/
/
SIGNATURE
DATE
SUPPLIER LG Display Co., Ltd.
*MODEL LC550EUN
*When you obtain standard approval,
please use the above model name without suffix
APPROVED BY
Y.S. Park / Team Leader
REVIEWED BY
K. Y. Chong / Project Leader
PREPARED BY
J. S. Bae / Engineer
SIGNATURE
DATE
Please return 1 copy for your confirmation with
your signature and comments.
Ver. 0.1
TV Product Development Dept.
LG Display Co., Ltd.
0 /39
Product Specification
CONTENTS
LC550EUN
Number ITEM
COVER
CONTENTS
RECORD OF REVISIONS 2
1 GENERAL DESCRIPTION
2 ABSOLUTE MAXIMUM RATINGS
3 ELECTRICAL SPECIFICATIONS
3-1 ELECTRICAL CHARACTERISTICS
3-2 INTERFACE CONNECTIONS
3-3 SIGNAL TIMING SPECIFICATIONS
3-4 SIGNAL TIMING WAVEFORMS 11
3-5 COLOR DATA REFERENCE
3-6 POWER SEQUENCE
4 OPTICAL SPECIFICATIONS
5 MECHANICAL CHARACTERISTICS
6 RELIABILITY
Page
0
1
3
4
5
5
7
9
14
15
17
23
26
7 INTERNATIONAL STANDARDS
7-1 SAFETY
7-2 EMC
7-3 ENVIRONMENT 27
8 PACKING
8-1 DESIGNATION OF LOT MARK
8-2 PACKING FORM
9 PRECAUTIONS 29
9-1 MOUNTING PRECAUTIONS 29
9-2 OPERATING PRECAUTIONS 30
9-3 ELECTROSTATIC DISCHARGE CONTROL 30
9-4 PRECAUTIONS FOR STRONG LIGHT EXPOSURE 30
9-5 STORAGE 30
9-6 OPERATING GONDITION GUIDE 30
Ver. 0.1
27
27
27
28
28
28
1 /39
Product Specification
RECORD OF REVISIONS
Revision No. Revision Date Page Description
0.1 Nov, 13, 2012 - Preliminary Specification (First Draft)
LC550EUN
Ver. 0.1
2 /39
LC550EUN
Product Specification
1. General Description
The LC550EUN is a Color Active Matrix Liquid Crystal Display with an integral Light Emitting Diode (LED) backlight system. The matrix employs a-Si Thin Film Transistor as the active element. It is a transmissive display type which is operating in the normally black mode. It has a 54.64 inch diagonally measured active display area with WUXGA resolution (1080 vertical by 1920 horizontal pixel array). Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arrayed in vertical stripes. Gray scale or the luminance of the sub-pixel color is determined with a 8-bit gray scale signal for each dot. Therefore, it can present a palette of more than 16.7Milion colors. It has been designed to apply the 8-bit 2-port LVDS interface. It is intended to support LCD TV, PCTV where high brightness, super wide viewing angle, high color gamut, high color depth and fast response time are important.
LVDS
EEPROM
EPI(RGB)
Source Driver Circuit
2Port
LVDS Select
OPC Enable
BR-B
ExtV
+12.0V
PWM_OUT
1~3
CN1
(51pin)
CN2
(4 pin)
LVDS 1,2
Option signal
I2C
SCL
SDA
Timing Controller
LVDS Rx + OPC + DGA
Integrated
Power Circuit
Block
G1
Control Signals
G1080
Power Signals
S1 S1920
TFT - LCD Panel
(1920 × RGB × 1080 pixels)
[Gate In Panel]
Scanning Block 1
PWM_OUT
1~3
+24.0V, GND, On/Off
LED Driver
Scanning Block 2
Scanning Block 3
General Features
Active Screen Size 54.64 inches(1387.80mm) diagonal
Outline Dimension
Pixel Pitch 0.630 mm x 0.630 mm
Pixel Format 1920 horiz. by 1080 vert. Pixels, RGB stripe arrangement Color Depth 8bit, 16.7 Million colors Luminance, White 350 cd/m2 (Center 1point ,Typ.)
1230.4(H) × 706.8(V) × 10.8 (B) / 23.5(D) mm (Typ.)
Viewing Angle (CR>10) Viewing angle free ( R/L 178 (Min.), U/D 178 (Min.))
Power Consumption Total 71.98W (Typ.) [Logic= 6.88W, LED Driver=65.1W(TBD) (ExtVbr_B=100% )]
Weight 16.5 Kg (TBD.) Display Mode Transmissive mode, Normally black Surface Treatment Hard coating(2H), Anti-glare treatment of the front polarizer (Haze < 1%)
Ver. 0.1
3 /39
LC550EUN
Product Specification
2. Absolute Maximum Ratings
The following items are maximum values which, if exceeded, may cause faulty operation or permanent damage to the LCD module.
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameter Symbol
LCD Circuit V
Power Input Voltage
Driver V
ON/OFF V
Driver Control Voltage
Brightness EXTV
T-Con Option Selection Voltage V
Operating Temperature T
Storage Temperature T
Panel Front Temperature T
Operating Ambient Humidity H
Storage Humidity H
Notes
1. Ambient temperature condition (Ta =
2. Temperature and relative humidity range are shown in the figure below. Wet bulb temperature should be Max 39°C, and no condensation of water.
3. Gravity mura can be guaranteed below 40°C condition.
4. The maximum operating temperatures is based on the test condition that the surface temperature
of display area is less than or equal to 68°C with LCD module alone in a temperature controlled chamber. Thermal management should be considered in final product design to prevent the surface temperature of display area from being over 68. The range of operating temperature may be degraded in case of improper thermal management in final product design.
LCD
BL
OFF
LOGIC
OP
ST
SUR
OP
ST
25 2 °C )
/ V
BR-B
ON
Value
Unit Notes
Min Max
-0.3 +14.0 V
-0.3 + 27.0 V
-0.3 +5.5 V
-0.3 +4.0 V
-0.3 +4.0 V
0 +50
-20 +60
- +68
°C
°C
°C
10 90 %RH
10 90 %RH
90%
DC
DC
DC
DC
DC
1
2,3
4
2,3
Ver. 0.1
Wet Bulb Temperature [°C]
20
10
0
10 20 30 40 50 60 70 800-20
Dry Bulb Temperature [
30
40
°C
50
60
60%
Storage
40%
Humidity [(%)RH]
10%
]
Operation
4 /39
LC550EUN
Product Specification
3. Electrical Specifications
3-1. Electrical Characteristics
It requires two power inputs. One is employed to power for the LCD circuit. The other Is used for the LED backlight and LED Driver circuit.
Table 2. ELECTRICAL CHARACTERISTICS
Parameter Symbol
Min Typ Max
Circuit :
Value
Unit notes
Power Input Voltage V
LCD
10.8 12.0 13.2 V
- 573 745 mA 1
Power Input Current I
LCD
- 840 1092 mA 2
Power Consumption P
Rush current I
Brightness Adjust for Back Light
Pulse Duty Level (PWM)
notes
1. The specified current and power consumption are under the V condition, and mosaic pattern(8 x 6) is displayed and f
LCD
RUSH
ExtV
BR-B
ExtV
BR-B
Frequency High Level
Low Level
6.88 8.94 Watt 1
- - 5.0 A 3 5 - 100 % 1 - 100 %
40 50/60 80 Hz
2.5 - 3.6 Vdc 0 - 0.8 Vdc
=12.0V, Ta=25  2°C, fV=60Hz
LCD
is the frame frequency.
V
2. The current is specified at the maximum current pattern.
3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).
4. ExtV After Driver ON signal is applied, ExtV After that, ExtV
signal have to input available duty range and sequence.
BR-B
1% and 100% is possible
BR-B
should be sustained from 5% to 100% more than 500ms.
BR-B
For more information, please see 3-6-2. Sequence for LED Driver.
5. Ripple voltage level is recommended under ±5% of typical voltage
DC
On Duty
4
HIGH : on duty
LOW : off duty
Ver. 0.1
White : 255 Gray Black : 0 Gray
Mosaic Pattern(8 x 6)
5 /39
Product Specification
Table 3. ELECTRICAL CHARACTERISTICS (Continue)
LC550EUN
Parameter Symbol
LED Driver :
Power Supply Input Voltage VBL 22.8 24.0 25.2 Vdc 1
Power Supply Input Current IBL
Power Supply Input Current (In-Rush) In-rush - - 4.9 A
Power Consumption PBL -
Input Voltage for
Control System
Signals
LED :
Life Time 30,000 50,000 Hrs 2
On/Off
On V on 2.5 - 5.0 Vdc Off V off -0.3 0.0 0.7 Vdc
Min Typ Max
Values
-
2.71
65.1
2.92
70.1
Unit notes
A 1
= 22.8V
BL
V ExtV
W 1
BR-B
= 100%
3
notes :
1. Electrical characteristics are determined after the unit has been ‘ON’ and stable for approximately 60 minutes at 25±2°C. The specified current and power consumption are under the typical supply Input voltage 24Vand V
BR
(Ext
V
: 100%), it is total power consumption.
BR-B
2. The life time (MTTF) is determined as the time which luminance of the LED is 50% compared to that of initial value at the typical LED current (ExtVBR-B :100%) on condition of continuous operating in LCM state at 25±2°C.
3. The duration of rush current is about 200ms. This duration is applied to LED on time.
4. Even though inrush current is over the specified value, there is no problem if I
2
T spec of fuse is satisfied.
Ver. 0.1
6 /39
LC550EUN
Product Specification
3-2. Interface Connections
This LCD module employs two kinds of interface connection, 51-pin connector is used for the module electronics and 14-pin connector is used for the integral backlight system.
3-2-1. LCD Module
- LCD Connector(CN1): FI-RE51S-HF(manufactured by JAE) or GT05P-51S-H38(manufactured by LSM) or
IS050-C51B-C39(manufactured by UJU)
- Mating Connector : FI-R51HL(JAE) or compatible
Table 4. MODULE CONNECTOR(CN1) PIN CONFIGURATION
No Symbol Description No Symbol Description
1 2 3 4 5 6 7 8 9
10 11
12 13 14 15 16 17 18 19 20 21 22 23 24
25 26
NC NC NC NC NC NC
LVDS Select
ExtVBR-B
NC
OPC Enable ‘H’ = Enable , ‘L’ or NC = Disable
GND R1AN R1AP R1BN R1BP
R1CN R1CP
GND
R1CLKN R1CLKP
GND R1DN R1DP
NC No connection NC No connection
NC or GND
No Connection (notes 4) No Connection (notes 4) No Connection (notes 4) No Connection (notes 4) No Connection (notes 4) No Connection (notes 4)
H=JEIDA , Lor NC = VESA
External PWM (from System) No Connection (notes 4)
Ground FIRST LVDS Receiver Signal (A-)
FIRST LVDS Receiver Signal (A+) FIRST LVDS Receiver Signal (B-) FIRST LVDS Receiver Signal (B+) FIRST LVDS Receiver Signal (C-) FIRST LVDS Receiver Signal (C+)
Ground
FIRST LVDS Receiver Clock Signal(-) FIRST LVDS Receiver Clock Signal(+)
Ground FIRST LVDS Receiver Signal (D-) FIRST LVDS Receiver Signal (D+)
No Connection or Ground
27 28
29 30 31
32 33 34 35 36 37 38 39
40 41 42 43 44 45 46
47 48 49 50 51
- - -
NC No connection
R2AN R2AP R2BN R2BP
R2CN R2CP
GND R2CLKN R2CLKP
GND
R2DN R2DP
NC No connection NC No connection
NC or GND NC or GND
GND Ground (notes 6)
GND Ground
GND Ground
NC No connection VLCD Power Supply +12.0V VLCD Power Supply +12.0V VLCD Power Supply +12.0V VLCD Power Supply +12.0V
SECOND LVDS Receiver Signal (A-) SECOND LVDS Receiver Signal (A+) SECOND LVDS Receiver Signal (B-) SECOND LVDS Receiver Signal (B+)
SECOND LVDS Receiver Signal (C-) SECOND LVDS Receiver Signal (C+)
Ground SECOND LVDS Receiver Clock Signal(-)
SECOND LVDS Receiver Clock Signal(+) Ground
SECOND LVDS Receiver Signal (D-) SECOND LVDS Receiver Signal (D+)
No Connection or Ground No Connection or Ground
notes
Ver. 0.1
1. All GND(ground) pins should be connected together to the LCD module’s metal frame.
2. All V
(power input) pins should be connected together.
LCD
3. All Input levels of LVDS signals are based on the EIA 644 Standard.
4. #1~#6 & #9 NC (No Connection): These pins are used only for LGD (Do not connect)
5. Specific pins(pin No. #10) are used for OPC function of the LCD module. If not used, these pins are no connection. (Please see the Appendix VI for more information.)
6. Specific pin No. #44 is used for “No signal detection” of system signal interface. It should be GND for NSB(No Signal Black) during the system interface signal is not. If this pin is “H”, LCD Module displays AGP(Auto Generation Pattern).
7 /39
Product Specification
3-2-2. Backlight Module
Master
-LED Driver Connector : 20022WR - H14B2(Yeonho) or Compatible
- Mating Connector : 20022HS - 14B2 or Compatible
Table 5-1. LED DRIVER CONNECTOR PIN CONFIGURATION
Pin No Symbol Description Note
BL
1
V
Power Supply +24.0V
LC550EUN
2 3
4
5 6 7 8
9 10 11
12
13
14
V
BL
V
BL
BL
V
BL
V
GND Backlight Ground
GND Backlight Ground
GND Backlight Ground
GND Backlight Ground
GND Backlight Ground
Status
ON/OFF
V
NC
NC
Power Supply +24.0V
Power Supply +24.0V
Power Supply +24.0V
Power Supply +24.0V
Back Light Status
Backlight ON/OFF control
Don’t care
Don’t care
Notes :1. GND should be connected to the LCD module’s metal frame.
2. Normal : Low (under 0.7V) / Abnormal : Open
3. Each impedance of pin #12 is over 50 [KΩ] .
1
2
3
Rear view of LCM
1
Ver. 0.1
14
<Master>
Status
PCB
1
14
8 /39
LC550EUN
Product Specification
3-3. Signal Timing Specifications
Table 6 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal timings should be satisfied with the following specification for normal operation.
Table 6. TIMING TABLE (DE Only Mode)
ITEM Symbol Min Typ Max Unit notes
Horizontal
Vertical
Frequency
Display
Period
Blank t
Total t
Display
Period
Blank t
Total t
tHV 960 960 960 tCLK 1920 / 2
HB
HP
t
VV
VB
VP
100 140 240 tCLK 1
1060 1100 1200 tCLK
1080 1080 1080 Lines
20
(228)
1100
(1308)
45
(270)
1125
(1350)
69
(300)
1149
(1380)
Lines 1
Lines
ITEM Symbol Min Typ Max Unit notes
DCLK f
Horizontal f
Vertical f
CLK
H
V
63.00 74.25 78.00 MHz
57.3 67.5 70 KHz 2
57
(47)
60
(50)
63
(53)
Hz
NTSC (PAL)
2
notes: 1. The input of HSYNC & VSYNC signal does not have an effect on normal operation (DE Only Mode).
If you use spread spectrum of EMI, add some additional clock to minimum value for clock margin.
2. The performance of the electro-optical characteristics may be influenced by variance of the vertical refresh rate and the horizontal frequency
3. Spread Spectrum Rate (SSR) for 50KHz ~ 100kHz Modulation Frequency(FMOD) is calculated by
(7 – 0.06*Fmod), where Modulation Frequency (FMOD) unit is KHz. LVDS Receiver Spread spectrum Clock is defined as below figure
Timing should be set based on clock frequency.
Ver. 0.1
9 /39
LC550EUN
Product Specification
Please pay attention to the followings when you set Spread Spectrum Rate(SSR) and Modulation Frequency(FMOD)
1. Please set proper Spread Spectrum Rate(SSR) and Modulation Frequency (FMOD) of TV system LVDS output.
2. Please check FOS after you set Spread Spectrum Rate(SSR) and Modulation Frequency(FMOD) to avoid abnormal display. Especially, harmonic noise can appear when you use Spread Spectrum under FMOD 30 KHz.
Ver. 0.1
10 /39
3-4. LVDS Signal Specification
3-4-1. LVDS Input Signal Timing Diagram
LC550EUN
Product Specification
DE, Data
DCLK
First data
Second data
0.7VDD
0.3VDD
tCLK
Invalid data
Invalid data
DE(Data Enable)
0.5 VDD
Valid data
Pixel 0,0
Valid data
Pixel 1,0
t
HP
Pixel 2,0
Pixel 3,0
Invalid data
Invalid data
t
HV
DE(Data Enable)
Ver. 0.1
1 1080
t
VV
t
VP
11 /39
Loading...
+ 28 hidden pages