LG Display LC550EUF-LDC1 Specification

LC550EUF

Product Specification

SPECIFICATION

FOR

APPROVAL

)

(
(

Preliminary Specification

●

)

Final Specification

Title 55.0” WUXGA TFT LCD

BUYER GENERAL

MODEL

APPROVED BY

/

/

/

SIGNATURE

DATE

SUPPLIER L&T Display Technology., Ltd.

*MODEL LC550EUF

SUFFIX LDC1 (RoHS Verified)

*When you obtain standard approval,
please use the above model name without suffix

APPROVED BY

/ Team Leader

REVIEWED BY

Y. H Choi / Project Leader

PREPARED BY

/ Engineer

SIGNATURE

DATE

Please return 1 copy for your confirmation with

your signature and comments.

Ver. 0.1

R&D Dept.

L&T Display Technology., Ltd

Product Specification

CONTENTS

LC550EUF

Number

1

2
3

3-1
3-2
3-3

3-4
3-5
3-6

4

5

ITEM

COVER 1
CONTENTS
RECORD OF REVISIONS
GENERAL DESCRIPTION

ABSOLUTE MAXIMUM RATINGS
ELECTRICAL SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
INTERFACE CONNECTIONS
SIGNAL TIMING SPECIFICATIONS

SIGNAL TIMING WAVEFORMS
COLOR DATA REFERENCE

POWER SEQUENCE
OPTICAL SPECIFICATIONS
MECHANICAL CHARACTERISTICS

Page

11
12

15
16

17

23

2
3

4

5
6
6
8

6

6-1

7

7-1

7-2
7-3
7-4

7-5
7-6
7-7 OPERATING CONDIDITON GUIDE

Ver. 0.1

INTERNATIONAL STANDARDS
ENVIRONMENT
PRECAUTIONS
MOUNTING PRECAUTIONS
OPERATING PRECAUTIONS
ELECTROSTATIC DISCHARGE CONTROL
PRECAUTIONS FOR STRONG LIGHT EXPOSURE

STORAGE

HANDLING PRECAUTIONS FOR PROTECTION FILM

26
26
27

27

27
28
28

28
28
28

1 /38

Product Specification

RECORD OF REVISIONS

Revision No. Revision Date Page Description

1.0 Jun, 07, 2011 - Preliminary Specification

LC550EUF

Ver. 0.1

2 /38

LC550EUF

Product Specification

1. General Description

The LC550EUF is a Color Active Matrix Liquid Crystal Display with an integral Light Emitting Diode (LED)
backlight system. The matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive type display operating in the normally black mode. It has a 54.64 inch diagonally measured
active display area with WUXGA resolution (1080 vertical by 1920 horizontal pixel array).
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical stripes.
Gray scale or the luminance of the sub-pixel color is determined with a 8-bit gray scale signal for each dot.
Therefore, it can present a palette of more than 16.7M(true) colors.
It is intended to support LCD TV, PCTV where high brightness, super wide viewing angle, high color gamut,

high color depth and fast response time are important.

Mini-LVDS(RGB)

Control
Signals

Power Signals

Source Driver Circuit

S1 S1920

G1

TFT - LCD Panel

(1920 × RGB × 1080 pixels)

G1080

LVDS

2Port

LVDS

2Port

LVDS
Select

Bit
Select

+12.0V

CN2

(41pin)

CN1

(51pin)

LVDS 3,4

LVDS 1,2

Option
signal

I2C

EEPROM

SCL

SDA

Timing Controller

LVDS Rx + DGA + ODC

Integrated

Power Circuit

Block

LED Anode
LED Cathode

CN1 (12pin)
CN2 (13pin)

V : 8Block

Local Dimming : 16 Block

General Features

Active Screen Size
Outline Dimension
Pixel Pitch 0.630 mm x 0.630 mm x RGB
Pixel Format 1920 horiz. by 1080 vert. Pixels, RGB stripe arrangement
Color Depth 10Bit(D), 1.06 Billion colors
Luminance, White 400 cd/m2 (Center 1point ,Typ.)
Viewing Angle (CR>10) Viewing angle free ( R/L 178 (Min.), U/D 178 (Min.))
Power Consumption Total 122.5W (Typ.) [Logic= 6.1W, LED Driver=116.4W @ with LED Driver]
Weight 14.5 Kg (TBD.)

Display Mode Transmissive mode, Normally black
Surface Treatment Hard coating(2H), Anti-glare treatment of the front polarizer (Haze 10%)

54.64 inch (1387.80mm) diagonal

1253.6(H) × 725.0(V) X 21.0(B)/10.8 mm(D) (Typ.)

V : 8Block

Ver. 0.1

3 /38

LC550EUF

Product Specification

2. Absolute Maximum Ratings

The following items are maximum values which, if exceeded, may cause faulty operation or permanent damage
to the LCD module.

Table 1. ABSOLUTE MAXIMUM RATINGS

Parameter Symbol

Unit Note

Min Max

Value

Power Input Voltage

LED Input Voltage VF - +180.0 VDC
T-Con Option Selection Voltage VLOGIC

Panel Front Temperature TSUR

Note

1. Ambient temperature condition (Ta = 25  2 °C )

LCD Circuit VLCD -0.3 +14.0 VDC

Driver VBL -0.3 + 27.0 VDC

-0.3 +4.0 VDC

- +68

°C

1

2

2. The maximum operating temperatures is based on the test condition that the surface temperature
of display area is less than or equal to 68°C with LCD module alone in a temperature controlled chamber.
Thermal management should be considered in final product design to prevent the surface temperature of
display area from being over 68℃. The range of operating temperature may be degraded in case of
improper thermal management in final product design.

Ver. 0.1

4 /38

LC550EUF

Product Specification

3. Electrical Specifications
3-1. Electrical Characteristics

It requires two power inputs. One is employed to power for the LCD circuit. The other Is used for the LED
backlight and LED Driver circuit.

Table 2. ELECTRICAL CHARACTERISTICS

Parameter Symbol

Unit Note

Min Typ Max

Value

Circuit :

Power Input Voltage VLCD 10.8 12.0 13.2 VDC

Power Input Current ILCD

Power Consumption PLCD - 6.1 8.0 Watt 1
Rush current IRUSH - - 5.0 A 3

Note

1. The specified current and power consumption are under the V

- 510 663 mA 1

- 765 995 mA 2

=12.0V, Ta=25  2°C, fV=120Hz

LCD

condition, and mosaic pattern(8 x 6) is displayed and fV is the frame frequency.

2. The current is specified at the maximum current pattern.

3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).

White : 1023 Gray
Black : 0 Gray

Ver. 0.1

Mosaic Pattern(8 x 6)

5 /38

Product Specification

Table 3. ELECTRICAL CHARACTERISTICS (Continue)

LC550EUF

Parameter Symbol

Values

Unit Note

Min Typ Max

Backlight Assembly :

Forward Current
(one array)

Forward Voltage V
Forward Voltage Variation
Power Consumption P

Anode I
Cathode I

F (anode)

F (cathode)

F

△V

F

BL

Burst Dimming Duty On duty
Burst Dimming Frequency 1/T

400

95 100 105

58.0 64.0 70.0

92.8 102.4 112.0
10 - 100
95 182

1.7

mAdc
mAdc

Vdc
Vdc

W 6

%

Hz 8

LED Array : (APPENDIX-V)

Life Time 30,000 50,000 Hrs 7

The design of the LED driver must have specifications for the LED array in LCD Assembly.

Notes :

The electrical characteristics of LED driver are based on Constant Current driving type.
The performance of the LED in LCM, for example life time or brightness, is extremely influenced by the
characteristics of the LED Driver. So, all the parameters of an LED driver should be carefully designed.
When you design or order the LED driver, please make sure unwanted lighting caused by the mismatch of the
LED and the driver (no lighting, flicker, etc) has never been occurred. When you confirm it, the LCD–
Assembly should be operated in the same condition as installed in your instrument.

1. Electrical characteristics are based on LED Array specification.

2. Specified values are defined for a Backlight Assembly. (2 LED arrays/LCM)

3. Each LED array has 2 anode terminals and 8 cathode terminals.
The forward current(IF) of the anode terminals are 400mA and it supplies 100mA into 4
Strings, respectively

1string(10 LED PKG)

Anode#1

Anode#2

400mA

400mA

° ° °

° ° °

° ° °

Cathode #1

100mA

Cathode #4

100mA

1 Array (8 Strings)

° ° °

° ° °

° ° °

100mA

100mA

Cathode #5

Cathode #8

4. The forward voltage(VF) of LED array depends on ambient temperature (Appendix-VII)

5. ΔV

means Max VF-Min VF in one Backlight. So VF variation in a Backlight isn’t over Max. 1.7V

F

6. Maximum level of power consumption is measured at initial turn on.
Typical level of power consumption is measured after 1hrs aging at 25  2°C.

7. The life time(MTTF) is determined as the time at which brightness of the LED is 50% compared to that of
initial value at the typical LED current on condition of continuous operating at 25  2°C, based on duty 100%.

8. The reference method of burst dimming duty ratio.

It is recommended to use synchronous V-sync frequency to prevent waterfall
(Vsync x 1 =Burst Frequency)
Though PWM frequency is over 182Hz (max252Hz), function of backlight is not affected.

Ver. 0.1

±5%

2, 3

4
5

6 /38

LC550EUF

Product Specification

3-2. Interface Connections

This LCD module employs two kinds of interface connection, 51-pin connector and 41-pin connector are used
for the module electronics and 12-pin,13-pin connectors are used for the integral backlight system.

3-2-1. LCD Module

- LCD Connector(CN1): FI-RE51S-HF(manufactured by JAE)
Refer to below and next Page table

- Mating Connector : FI-R51HL(JAE) or compatible

Table 4-1. MODULE CONNECTOR(CN1) PIN CONFIGURATION

No Symbol Description No Symbol Description

NC or GND

1
2
3
4
5
6
7
8
9

10
11 GND

12 R1AN
13 R1AP
14 R1BN
15
16 R1CN
17 R1CP
18 GND
19 R1CLKN
20
21 GND
22 R1DN
23 R1DP
24 R1EN

25 R1EP
26

NC
NC
NC

NC
NC

LVDS Select

NC
NC
NC No Connection (Note 4)

R1BP

R1CLKP

NC or GND

No Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4)

‘H’ =JEIDA , ‘L’ or NC = VESA
No Connection (Note 4)

No Connection (Note 4)

Ground
FIRST LVDS Receiver Signal (A-)

FIRST LVDS Receiver Signal (A+)
FIRST LVDS Receiver Signal (B-)
FIRST LVDS Receiver Signal (B+)
FIRST LVDS Receiver Signal (C-)
FIRST LVDS Receiver Signal (C+)

Ground
FIRST LVDS Receiver Clock Signal(-)

FIRST LVDS Receiver Clock Signal(+)
Ground

FIRST LVDS Receiver Signal (D-)
FIRST LVDS Receiver Signal (D+)
FIRST LVDS Receiver Signal (E-)

FIRST LVDS Receiver Signal (E+)
No Connection or Ground

27

Bit Select
28
29
30
31
32
33
34
35
36
37
38
39

40 R2EN
41 R2EP
42
43
44
45
46

47
48
49
50
51

- - -

R2AN
R2AP
R2BN

R2BP
R2CN

R2CP

GND
R2CLKN
R2CLKP

GND

R2DN
R2DP

NC or GND
NC or GND

GND Ground

GND Ground

GND Ground

NC No connection
VLCD Power Supply +12.0V
VLCD Power Supply +12.0V
VLCD Power Supply +12.0V
VLCD Power Supply +12.0V

‘H’ or NC= 10bit(D) , ‘L’ = 8bit
SECOND LVDS Receiver Signal (A-)

SECOND LVDS Receiver Signal (A+)
SECOND LVDS Receiver Signal (B-)

SECOND LVDS Receiver Signal (B+)
SECOND LVDS Receiver Signal (C-)

SECOND LVDS Receiver Signal (C+)
Ground

SECOND LVDS Receiver Clock Signal(-)
SECOND LVDS Receiver Clock Signal(+)

Ground
SECOND LVDS Receiver Signal (D-)

SECOND LVDS Receiver Signal (D+)
SECOND LVDS Receiver Signal (E-)
SECOND LVDS Receiver Signal (E+)

No Connection or Ground
No Connection or Ground

Note

Ver. 0.1

1. All GND(ground) pins should be connected together to the LCD module’s metal frame.

2. All VLCD (power input) pins should be connected together.

3. All Input levels of LVDS signals are based on the EIA 644 Standard.

4. #1~#6 & #8~#10 NC (No Connection): These pins are used only for LGD (Do not connect)

5. LVDS pin (pin No. #24,25,40,41) are used for 10Bit(D) of the LCD module.
If used for 8Bit(R), these pins are no connection.

6. Specific pin No. #44 is used for “No signal detection” of system signal interface.

It should be GND for NSB(No Signal Black) during the system interface signal is not.

If this pin is “H”, LCD Module displays AGP(Auto Generation Pattern).

7 /38

Product Specification

-LCD Connector (CN2) : FI-RE41S-HF (manufactured by JAE)

- Mating Connector : FI-RE41HL or compatible

Table 4-2. MODULE CONNECTOR(CN2) PIN CONFIGURATION

No Symbol Description No Symbol Description

1
2
3
4 NC
5
6
7
8

9
10
11
12
13 RB3P
14
15
16
17
18 RCLK3P
19
20
21

NC
NC
NC

NC
NC
NC
NC

GND
RA3N
RA3P
RB3N

RC3N
RC3P

GND

RCLK3N

GND
RD3N
RD3P

No connection 22
No connection 23
No connection 24 GND Ground

No connection
No connection

No connection 27
No connection 28
No connection 29 RB4P

Ground
THIRD LVDS Receiver Signal (A-)

THIRD LVDS Receiver Signal (A+)
THIRD LVDS Receiver Signal (B-)
THIRD LVDS Receiver Signal (B+)
THIRD LVDS Receiver Signal (C-)
THIRD LVDS Receiver Signal (C+)

Ground
THIRD LVDS Receiver Clock Signal(-)

THIRD LVDS Receiver Clock Signal(+)
Ground

THIRD LVDS Receiver Signal (D-)
THIRD LVDS Receiver Signal (D+)

25 GND Ground
26

30
31
32
33
34 RCLK4P
35
36
37
38
39
40 GND Ground
41 GND Ground

-

RE3N

RE3P

RA4N

RA4P

RB4N

RC4N
RC4P

GND

RCLK4N

GND
RD4N
RD4P
RE4N

RE4P

THIRD LVDS Receiver Signal (E-)
THIRD LVDS Receiver Signal (E+)

FORTH LVDS Receiver Signal (A-)
FORTH LVDS Receiver Signal (A+)
FORTH LVDS Receiver Signal (B-)
FORTH LVDS Receiver Signal (B+)
FORTH LVDS Receiver Signal (C-)
FORTH LVDS Receiver Signal (C+)

Ground
FORTH LVDS Receiver Clock Signal(-)

FORTH LVDS Receiver Clock Signal(+)
Ground

FORTH LVDS Receiver Signal (D-)
FORTH LVDS Receiver Signal (D+)
FORTH LVDS Receiver Signal (E-)
FORTH LVDS Receiver Signal (E+)

LC550EUF

Note : 1. All GND(ground) pins should be connected together to the LCD module’s metal frame.

2. LVDS pin (pin No. #22,23,38,39) are used for 10Bit(D) of the LCD module.
If used for 8Bit(R), these pins are no connection.

CN1 CN2

#1 #51 #1 #41

CN1 CN2

#1 #51

#1 #41

Rear view of LCM

Ver. 0.1

8 /38

3-2-2. Backlight Module

LC550EUF

Product Specification

[ CN201 ]

1) LED Array Assy Connector (Plug)
: 20022HS-13B2(BK) (manufactured by Yeonho) or equivalent

2) Mating Connector (Receptacle)
: 20022WR-13BD (manufactured by Yeonho) or equivalent

[ CN202 ]

1) LED Array Assy Connector (Plug)
: 20022HS-12B2 (manufactured by Yeonho) or equivalent

2) Mating Connector (Receptacle)
: 20022WR-12BD (manufactured by Yeonho )or equivalent

Table 5. BACKLIGHT CONNECTOR PIN CONFIGURATION(CN201,CN202)

No Symbol

1
2

3
4
5
6

7

8

9
10
11
12

13

Anode_L1

(1~4Cathode)

N.C
L1 Cathode
L2 Cathode
L3 Cathode
L4 Cathode

N.C
L5 Cathode
L6 Cathode
L7 Cathode
L8 Cathode

N.C

Anode_L2

(5~8Cathode)

Description

LED Input Current
Open

LED Output Current
LED Output Current
LED Output Current
LED Output Current
Open
LED Output Current
LED Output Current
LED Output Current
LED Output Current
Open

LED Input Current

Note

No Symbol

1
2

3
4
5
6
7
8

9
10
11

12

Anode_R2

(5~8Cathode)

N.C

R8Cathode
R7 Cathode
R6 Cathode
R5 Cathode
R4 Cathode
R3 Cathode
R2 Cathode
R1 Cathode

N.C

Anode_R1

(1~4Cathode)

Description

LED Input Current
Open

LED Output Current
LED Output Current
LED Output Current
LED Output Current
LED Output Current
LED Output Current
LED Output Current
LED Output Current

Open

LED Input Current

Note

◆ Rear view of LCM

Ver. 0.1

13pin 12pin

L8

L7

L6

1

CN202 CN201

R8

R7

R6

L4 L5

R4 R5

L2 L3

L1

T-con

배면

R2 R3

R1

9 /38

LC550EUF

Product Specification

3-3. Signal Timing Specifications

Table 6 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal
timings should be satisfied with the following specification for normal operation.

Table 6. TIMING TABLE (DE Only Mode)

ITEM Symbol Min Typ Max Unit Note

Horizontal

Vertical

Frequency

Display

Period

Blank tHB 40 70 200 tCLK 1

Total tHP 520 550 680 tCLK

Display

Period

Blank tVB

Total tVP

tHV 480 480 480 tCLK 1920 / 4

tVV 1080 1080 1080 Lines

20

(228)

1100

(1308)

45

(270)

1125

(1350)

86

(300)

1166

(1380)

Lines 1

Lines

ITEM Symbol Min Typ Max Unit Note

DCLK fCLK 66.97 74.25 78.00 MHz

Horizontal fH 121.8 135 140 KHz 2

2

Vertical fV

108

(95)

120

(100)

122

(104)

Hz

NTSC: 108~122Hz
(PAL : 95~104Hz)

Note: 1. The input of HSYNC & VSYNC signal does not have an effect on normal operation (DE Only Mode).
If you use spread spectrum of EMI, add some additional clock to minimum value for clock margin.

2. The performance of the electro-optical characteristics may be influenced by variance of the vertical
refresh rate and the horizontal frequency

※ Timing should be set based on clock frequency.

Ver. 0.1

10 /38

3-4. LVDS Signal Specification

3-4-1. LVDS Input Signal Timing Diagram

LC550EUF

Product Specification

DCLK

First data

Second data

Third data

Forth data

DE(Data Enable)

tCLK

0.5 VDD

Invalid data

Invalid data

Invalid data

Invalid data

DE, Data

Valid data

Pixel 0

Valid data

Pixel 1

Valid data

Pixel 2

Valid data

Pixel 3

Pixel 4

Pixel 5

Pixel 6

Pixel 7

0.7VDD

0.3VDD

Invalid data

Invalid data

Invalid data

Invalid data

DE(Data Enable)

Ver. 0.1

1 1080

tVV

tVP

* tHB = tHFP + tWH +tHBP

* tVB = tVFP + tWV +tVBP

11 /38