LG Display LC550EUD-SCA1 Specification
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LC550EUD
Product Specification
SPECIFICATION
FOR
APPROVAL
)
(
Preliminary Specification
)
(
Final Specification
Title 55.0” WUXGA TFT LCD
BUYER General
MODEL
APPROVED BY
/
/
SIGNATURE
DATE
SUPPLIER LG Display Co., Ltd.
*MODEL LC550EUD
SUFFIX SCA1 (RoHS Verified)
*When you obtain standard approval,
please use the above model name without suffix
APPROVED BY
P.Y. Kim / Team Leader
REVIEWED BY
J.Y. Jeong / Project Leader
SIGNATURE
DATE
PREPARED BY
/
Please return 1 copy for your confirmation with
your signature and comments.
Ver. 0.0
T.Y. Kim / Engineer
TV Product Development Dept.
LG Display Co., Ltd.
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LC550EUD
Product Specification
CONTENTS
Number ITEM
COVER 1
CONTENTS
RECORD OF REVISIONS
1 GENERAL DESCRIPTION
2 ABSOLUTE MAXIMUM RATINGS
3 ELECTRICAL SPECIFICATIONS
3-1 ELECTRICAL CHARACTERISTICS
3-2 INTERFACE CONNECTIONS
3-3 SIGNAL TIMING SPECIFICATIONS
3-4 LVDS SIGNAL SPECIFICATIONS
3-5 COLOR DATA REFERENCE
3-6 POWER SEQUENCE
4 OPTICAL SPECIFICATIONS
5 MECHANICAL CHARACTERISTICS
Page
2
3
4
5
6
6
8
12
13
16
17
19
23
6 RELIABILITY
7 INTERNATIONAL STANDARDS
7-1 SAFETY
7-2 EMC
7-3 Environment
8 PACKING
8-1 INFORMATION OF LCM LABEL
8-2 PACKING FORM
9 PRECAUTIONS
9-1 MOUNTING PRECAUTIONS
9-2 OPERATING PRECAUTIONS
9-3 ELECTROSTATIC DISCHARGE CONTROL
9-4 PRECAUTIONS FOR STRONG LIGHT EXPOSURE
9-5 STORAGE
9-6 HANDLING PRECAUTIONS FOR PROTECTION FILM
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Revision No. Revision Date Page Description
0.0 Nov, 12, 2009 - Preliminary Specification(First Draft)
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LC550EUD
Product Specification
RECORD OF REVISIONS
Ver. 0.0
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1. General Description
The LC550EUD is a Color Active Matrix Liquid Crystal Display with an integral Light Emitting Diode (LED)
backlight system. The matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive display type which is operating in the normally black mode. It has a 42.02 inch diagonally
measured active display area with WUXGA resolution (1080 vertical by 1920 horizontal pixel array).
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arrayed in vertical stripes.
Gray scale or the luminance of the sub-pixel color is determined with a 10-bit gray scale signal for each dot.
Therefore, it can present a palette of more than 1.06Bilion colors.
It has been designed to apply the 10-bit 4-port LVDS interface.
It is intended to support LCD TV, PCTV where high brightness, super wide viewing angle, high color gamut,
high color depth and fast response time are important.
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LC550EUD
Product Specification
Mini-LVDS(RGB)
Control
Signals
Gate Driver Circuit
Source Driver Circuit
S1 S1920
G1
TFT - LCD Panel
(1920 Ý RGB Ý 1080 pixels)
LVDS
2Port
LVDS
2Port
LVDS
Select
Bit
Select
+12.0V
CN2
(41pin)
CN1
(51pin)
LVDS 3,4
LVDS 1,2
Option
signal
I2C
EEPROM
SCL
SDA
Timing Controller
LVDS Rx + OPC + DGA + ODC
Integrated
Power Circuit
Local Dim
CN3
(8 pin)
Dim
DCLK
VSYNC, SIN, SCLK, GND
+24.0V, GND, On/Off
ExtV
BR-B
Block
Power Signals
LED Driver
G1080
V : 12Block
H : 2Block
Local Dimming : 24 Block
General Features
Active Screen Size 54.64 inches(1387.83mm) diagonal
Outline Dimension 1261.6(H) Ý732.4(V) X 11.4(B)/24.2 mm(D) (Typ.)
Pixel Pitch 0.63mm Ý 0.63mm
Pixel Format 1920 horiz. by 1080 vert. Pixels, RGB stripe arrangement
Color Depth 8-bit, 16.7 M colors ( 1.06B colors @ 10 bit (D) System Output )
Luminance, White 450 cd/m2(Center 1point ,Typ.)
Viewing Angle (CR>10) Viewing angle free ( R/L 178 (Min.), U/D 178 (Min.))
Power Consumption
Weight 21.5 Kg (Typ.)
Display Mode Transmissive mode, Normally black
Surface Treatment Hard coating(3H), Anti-glare treatment of the front polarizer (Haze 10%)
Total 142.3 W (Typ.) (Logic=8.3W(TBD) with T-CON, LED Backlight =134W(TBD) @
with Driver )
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2. Absolute Maximum Ratings
The following items are maximum values which, if exceeded, may cause faulty operation or damage to the
LCD module.
Table 1. ABSOLUTE MAXIMUM RATINGS
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LC550EUD
Product Specification
Parameter
Power Input Voltage
Driver Control Voltage
T-Con Option Selection Voltage VLOGIC
Operating Temperature TOP
Storage Temperature TST
Panel Front Temperature TSUR - +TBD ¶C
Operating Ambient Humidity HOP
Storage Humidity HST 10 90 %RH
Note
1. Ambient temperature condition (Ta = 25 r 2 ¶C )
2. Temperature and relative humidity range are shown in the figure below. Wet bulb temperature
should be Max 39 ¶C and no condensation of water.
3. Gravity mura can be guaranteed below 40 condition.
4. The maximum operating temperature is based on the test condition that the surface temperature
of display area is less than or equal to TBD with LCD module alone in a temperature controlled
chamber. Thermal management should be considered in final product design to prevent the surface
temperature of display area from being over TBD . The range of operating temperature may
degrade in case of improper thermal management in final product design.
LCD Circuit VLCD
Driver VBL -0.3 + 27.0 VDC
ON/OFF
Brightness
VOFF / VON
EXTVBR-B
Value
Min Max
-0.3 +14.0
-0.3 +5.5
0.0 +5.5
-0.3 +4.0
0 +50
-20 +60
10 90
Unit
VDC
VDC
VDC
VDC
¶C
¶C
%RH
NoteSymbol
1
2,3
4
2,3
90%
60
60%
Ver. 0.0
Wet Bulb
Temperature [
10
0
10 20 30 40 50 60 70 800-20
Dry Bulb Temperature [
¶C]
20
30
40
50
40%
Humidity [(%)RH]
10%
¶C]
Storage
Operation
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3. Electrical Specifications
3-1. Electrical Characteristics
It requires two power inputs. One is employed to power for the LCD circuit. The other Is used for the LED
backlight and LED Driver circuit.
Table 2. ELECTRICAL CHARACTERISTICS
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LC550EUD
Product Specification
Parameter Symbol
Min Typ Max
Circuit :
Power Input Voltage VLCD 10.8 12.0 13.2 VDC
Power Input Current ILCD
Power Consumption PLCD 8.22 10.68 Watt 1
Rush current IRUSH - - 5.0 A 3
Note
1. The specified current and power consumption are under the V
- 685 890 mA 1
- 985 1280 mA 2
condition whereas mosaic pattern(8 x 6) is displayed and f
Value
=12.0V, Ta=25 r 2¶C, fV=120Hz
LCD
is the frame frequency.
V
Unit Note
2. The current is specified at the maximum current pattern.
3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).
White : 1023 Gray
Black : 0 Gray
Mosaic Pattern(8 x 6)
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Table 3. ELECTRICAL CHARACTERISTICS (Continue)
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LC550EUD
Product Specification
Parameter Symbol
LED Driver :
Power Supply Input Voltage VBL 22.8 24.0 25.2 Vdc
Power Supply Input Current IBL_A
Power Supply Input Current (In-Rush) Irush - - 9.2 A
Power Consumption PBL -
On/Off
Brightness Adjust
PWM Frequency for
NTSC & PAL
Pulse Duty Level
(PWM)
VSYNC, SIN, SCLK
(Local Dimming)
LED :
Life Time
On V on 2.5 - 5.0 Vdc
Off V off -0.3 0.0 0.8 Vdc
BR-B 10 - 100 % On Duty
ExtV
PAL 100 Hz 3
NTSC 120 Hz 3
High Level 2.5 - 5.0
Low Level 0.0 - 0.8
High Level 2.7 3.3 3.6
Low Level -0.3 0.0 0.4
Min Typ Max
30,000
(TBD)
Values
-
5.6
134.4 142.8
5.95
Unit Notes
1
AExt V
WExt V
Vdc
Vdc
Vdc
Vdc
Hrs 2
BR-B = 100%
BL = 22.8V
V
Ext V
BR-B = 100%
4
BR-B = 100%
HIGH : on duty
LOW : off duty
Notes :
1. Electrical characteristics are determined after the unit has been ‘ON’ and stable for approximately 60
minutes at 25·2¶C. The specified current and power consumption are under the typical supply Input voltage
24Vand V
BR (ExtVBR-B : 100%), it is total power consumption.
2. The life time(MTTF) is determined as the time which luminance of the LED is 50% compared to that of initial
value at the typical LED current (ExtVBR-B :100%) on condition of continuous operating in LCM state at
25·2¶C.
3. LGD recommend that the PWM freq. is synchronized with One time harmonic of Vsync signal of system.
Though PWM frequency is over 120Hz (max 252Hz), function of LED Driver is not affected.
4. The duration of rush current is about 10ms.
5. Even though inrush current is over the specified value, there is no problem if I
Ver. 0.0
2
T spec of fuse is satisfied.
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Product Specification
3-2. Interface Connections
This LCD module employs two kinds of interface connection, 51-pin connector and 41-pin connector are used
for the module electronics and 14-pin connector is used for the integral backlight system.
3-2-1. LCD Module
- LCD Connector : FI-R51S-HF(manufactured by JAE) or KN25-51P-0.5SH(manufactured by Hirose)
(CN1) Refer to below and next Page table
- Mating Connector : FI-R51HL(JAE) or compatible
Table 4-1. MODULE CONNECTOR(CN1) PIN CONFIGURATION
No Symbol Description No Symbol Description
Reverse ‘H’ = Enable , ‘L’ or NC = Disable
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
NC No Connection
NC No Connection
NC No Connection (Reserved for LGD)
NC No Connection (Reserved for LGD)
NC No Connection (Reserved for LGD)
LVDS Select
EXTV
BR-B External VBR (From System)
NC No Connection
L-DIM Enable ‘H’ = Enable , ‘L’ or NC = Disable
GND
R1AN
R1AP
R1BN
R1BP
R1CN
R1CP
GND
R1CLKN
R1CLKP
GND
R1DN
R1DP
R1EN
R1EP
NC
‘H’ =JEIDA , ‘L’ or NC = VESA
Ground
FIRST LVDS Receiver Signal (A-)
FIRST LVDS Receiver Signal (A+)
FIRST LVDS Receiver Signal (B-)
FIRST LVDS Receiver Signal (B+)
FIRST LVDS Receiver Signal (C-)
FIRST LVDS Receiver Signal (C+)
Ground
FIRST LVDS Receiver Clock Signal(-)
FIRST LVDS Receiver Clock Signal(+)
Ground
FIRST LVDS Receiver Signal (D-)
FIRST LVDS Receiver Signal (D+)
IRST LVDS Receiver Signal (E-)
F
FIRST LVDS Receiver Signal (E+)
No Connection
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
-
Bit Select
R2AN
R2AP
R2BN
R2BP
R2CN
R2CP
GND
R2CLKN
R2CLKP
GND
R2DN
R2DP
R2EN
R2EP
NC
NC
GND
GND
GND
NC
VLCD
VLCD
VLCD
VLCD
LC550EUD
‘H’ or NC= 10bit(D) , ‘L’ = 8bit
SECOND LVDS Receiver Signal (A-)
SECOND LVDS Receiver Signal (A+)
SECOND LVDS Receiver Signal (B-)
SECOND LVDS Receiver Signal (B+)
SECOND LVDS Receiver Signal (C-)
SECOND LVDS Receiver Signal (C+)
Ground
SECOND LVDS Receiver Clock Signal(-)
SECOND LVDS Receiver Clock Signal(+)
Ground
SECOND LVDS Receiver Signal (D-)
SECOND LVDS Receiver Signal (D+)
SECOND LVDS Receiver Signal (E-)
SECOND LVDS Receiver Signal (E+)
No Connection
No Connection
Ground
Ground
Ground
No connection
Power Supply +12.0V
Power Supply +12.0V
Power Supply +12.0V
Power Supply +12.0V
--
Note
1. All GND(ground) pins should be connected together to the LCD module’s metal frame.
2. All V
LCD (power input) pins should be connected together.
3. All Input levels of LVDS signals are based on the EIA 644 Standard.
4. Specific pins(pin No. #2~#6) are used for internal data process of the LCD module.
These pins should be no connection.
5. Specific pins(pin No. # 8~#10) are used for Local Dimming function of the LCD module.
If not used, these pins are no connection. (Please see the Appendix III-4 for more information.)
6. LVDS pin (pin No. #24,25,40,41) are used for 10Bit(D) of the LCD module.
If used for 8Bit(R), these pins are no connection.
7. Specific pin No. #44 is used for “No signal detection” of system signal interface.
It should be GND for NSB(No Signal Black) during the system interface signal is not.
If this pin is “H”, LCD Module displays AGP(Auto Generation Pattern).
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-LCD Connector : FI-RE41S-HF (manufactured by JAE) or KN25-41P-0.5SH (manufactured by Hirose)
(CN2)
- Mating Connector : FI-RE41HL
Table 4-2. MODULE CONNECTOR(CN2) PIN CONFIGURATION
No Symbol Description No Symbol Description
1
2
3
4NC
5
6
7
8
9
10
11
12
13 RB3P
14
15
16
17
18 RCLK3P
19
20
21
NC
NC
NC
NC
NC
NC
NC
GND
RA3N
RA3P
RB3N
RC3N
RC3P
GND
RCLK3N
GND
RD3N
RD3P
No connection(Reserved)
No connection
No connection
No connection
No connection
No connection
No connection
No connection
Ground
THIRD LVDS Receiver Signal (A-)
THIRD LVDS Receiver Signal (A+)
THIRD LVDS Receiver Signal (B-)
THIRD LVDS Receiver Signal (B+)
THIRD LVDS Receiver Signal (C-)
THIRD LVDS Receiver Signal (C+)
Ground
THIRD LVDS Receiver Clock Signal(-)
THIRD LVDS Receiver Clock Signal(+)
Ground
THIRD LVDS Receiver Signal (D-)
THIRD LVDS Receiver Signal (D+)
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Product Specification
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
-
RE3N
RE3P
RA4N
RA4P
RB4N
RB4P
RC4N
RC4P
RCLK4N
RCLK4P
RD4N
RD4P
RE4N
RE4P
GND
GND
GND
GND
GND
GND
LC550EUD
THIRD LVDS Receiver Signal (E-)
THIRD LVDS Receiver Signal (E+)
Ground
Ground
FORTH LVDS Receiver Signal (A-)
FORTH LVDS Receiver Signal (A+)
FORTH LVDS Receiver Signal (B-)
FORTH LVDS Receiver Signal (B+)
FORTH LVDS Receiver Signal (C-)
FORTH LVDS Receiver Signal (C+)
Ground
FORTH LVDS Receiver Clock Signal(-)
FORTH LVDS Receiver Clock Signal(+)
Ground
FORTH LVDS Receiver Signal (D-)
FORTH LVDS Receiver Signal (D+)
FORTH LVDS Receiver Signal (E-)
FORTH LVDS Receiver Signal (E+)
Ground
Ground
Note : 1. All GND(ground) pins should be connected together to the LCD module’s metal frame.
2. LVDS pin (pin No. #22,23,38,39) are used for 10Bit(D) of the LCD module.
If used for 8Bit(R), these pins are no connection.
Table 4-3. MODULE CONNECTOR(CN3) PIN CONFIGURATION
No Symbol Description
1 VSYNC Vertical Sync signal
2N.C.No Connection
3N.C.No Connection
4 SIN Local Dimming Serial Data
5 GND Backlight Ground
6 SCLK Local Dim Serial Clock
7 GND Backlight Ground
8 Reserved Backlight Ground or No Connection
CN1 CN2
#1 #51
#1 #41
#1
CN3
CN1 CN2
#1 #51 #1 #41
#8
CN3
#1 #8
Rear view of LCM
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3-2-2. Backlight Module
Master
- LED Driver Connector : 20022WR-14B1(Yeonho)
or Equivalent
- Mating Connector : 20022HS-14 or Equivalent
Table 5. LED DRIVER CONNECTOR PIN CONFIGURATION
Pin No Symbol Description Master Note
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LC550EUD
Product Specification
1
2
3
4
5
6
7
8
9
10
11
12
13
14
VBL Power Supply +24.0V
VBL Power Supply +24.0V
VBL Power Supply +24.0V
VBL Power Supply +24.0V
VBL Power Supply +24.0V
GND Backlight Ground
GND Backlight Ground
GND Backlight Ground
GND Backlight Ground
GND Backlight Ground
VBR-A
ON/OFF
V
EXTVBR-B
Status
N.C
Backlight ON/OFF control
External PWM
LED Status
VBL
V
BL
VBL
VBL
VBL
GND
GND
GND
GND
GND
OPEN or GND
ON/OFF
V
EXTVBR-B
Status 3
Notes : 1. GND should be connected to the LCD module’s metal frame.
2. High : on duty / Low : off duty, Pin#13 can be opened. ( if Pin #13 is open , EXTVBR-B is 100% )
3. Normal : Low (under 0.7V) / Abnormal : High (upper 3.0V)
4. Each impedance of pin #12 and 13 is over TBD [K˟] and over TBD [K˟].
1
2
Rear view of LCM
PCB
14
…
…
<Master>
1
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3-2-3. Local Dimming Interface
- Local Dimming Interface Connector : 12507WR-08L(YEONHO Elec.) or Equivalent
- Mating Connector: 12507HS-08L(YEONHO Elec.) or Equivalent
Table 5-2. LOCAL DIMMING INTERFACE CONNECTOR PIN CONFIGULATION
Pin No Symbol Description Note
1 VSYNC Vertical Sync signal
2 GND Backlight Ground 1
3 GND Backlight Ground
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LC550EUD
Product Specification
4 DIN Local Dimming Serial Data
5 GND Backlight Ground
6 DCLK Local Dim Serial Clock
7 GND Backlight Ground
8 Reserved Backlight Ground or No Connection
Notes : 1. GND should be connected to the LCD module’s metal frame.
Rear view of LCM
PCB
8
…
…
1
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3-3. Signal Timing Specifications
Table 6 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal
timings should be satisfied with the following specification for normal operation.
Table 6-1. TIMING TABLE for NTSC (DE Only Mode)
ITEM Symbol Min Typ Max Unit Note
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LC550EUD
Product Specification
Horizontal
Vertical
Frequency
Display
Period
Blank
Total
Display
Period
Blank t
Total t
DCLK
Horizontal
Vertical
t
HV
HB
t
tHP
t
VV 1080 1080 1080 Lines
VB 16 45 86 Lines 1
VP 1096 1125 1166 Lines
fCLK
fH
f
V
480 480 480 tCLK 1920 / 4
40 70 200 tCLK 1
520 550 680 tCLK
Table 6-2 TIMING TABLE for DVB/PAL (DE Only Mode)
Symbol
Horizontal
Display
Period
Blank
tHV
tHB
MHz78.0074.2566.97
2KHz140135121.8
2Hz122120108
NoteUnitMaxTypMinITEM
1920 / 4tCLK480480480
1tCLK2007040
Vertical
Frequency
Total
Display
Period
DCLK
Horizontal
Vertical
HP
t
VBBlank
VPTotal
fCLK
fH
fV
tCLK680550520
Lines108010801080tVV
1Lines300270228t
Lines138013501308t
MHz78.0074.2566.97
2KHz140135121.8
2Hz10410095
Note 1. The Input of HSYNC & VSYNC signal does not have an effect on normal operation(DE Only Mode).
If you use spread spectrum for EMI, add some additional clock to minimum value for clock margin.
2. The performance of the electro-optical characteristics may be influenced by variance of the vertical
refresh rate and the horizontal frequency.
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3-4. LVDS Signal Specification
3-4-1. LVDS Input Signal Timing Diagram
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LC550EUD
Product Specification
DCLK
First data
Second data
Third data
Forth data
DE(Data Enable)
tCLK
0.5 VDD
Invalid data
Invalid data
Invalid data
Invalid data
DE, Data
Valid data
Pixel 0
Valid data
Pixel 1
Valid data
Pixel 2
Valid data
Pixel 3
Pixel 4
Pixel 5
Pixel 6
Pixel 7
0.7VDD
0.3VDD
Invalid data
Invalid data
Invalid data
Invalid data
DE(Data Enable)
Ver. 0.0
* tHB = tHFP + tWH +tHBP
* tVB = tVFP + tWV +tVBP
1 1080
tVV
tVP
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