LG Display LC550EQD-FGF2 Specification
( ● ) Preliminary Specification
( ) Final Specification
Title 55.0” WUXGA TFT LCD
LC550EQD
Product Specification
SPECIFICATION
FOR
APPROVAL
BUYER General
LCD MODEL LC550EQD-FGF2
SET MODEL
APPROVED BY
/
/
/
SIGNATURE
DATE
SUPPLIER LG Display Co., Ltd.
*MODEL LC55EQD
SUFFIX FGF2 (RoHS Verified)
APPROVED BY
B. Y. Kim /Team Leader
REVIEWED BY
S. B. Lee / Project Leader
PREPARED BY
K.H. Kim / Engineer
SIGNATURE
DATE
Please return 1 copy for your confirmation with
your signature and comments.
Ver. 0.0
TV Product Development Dept.
LG Display Co., Ltd.
1 /38
Product Specification
CONTENTS
LC550EQD
Number
COVER
CONTENTS
RECORD OF REVISIONS 3
1
2
3
3-1
3-2
3-3
3-4 V by Oone SIGNAL SPECIFICATIONS 13
3-5
3-6
4
5
6
GENERAL DESCRIPTION
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
INTERFACE CONNECTIONS
SIGNAL TIMING SPECIFICATIONS
COLOR DATA REFERENCE
POWER SEQUENCE
OPTICAL SPECIFICATIONS
MECHANICAL CHARACTERISTICS
RELIABILITY
ITEM
Page
1
2
4
5
6
6
8
12
15
16
18
24
27
7
7-1
7-2
7-3
8 PACKING 29
8-1 PACKING FORM 29
9
9-1
9-2
9-3 ELECTROSTATIC DISCHARGE CONTROL 31
9-4 PRECAUTIONS FOR STRONG LIGHT EXPOSURE 31
9-5 STORAGE 31
9-6 Operating condition guide 31
Ver. 0.0
INTERNATIONAL STANDARDS
Safety
EMC
ENVIRONMENT
PRECAUTIONS
MOUNTING PRECAUTIONS
OPERATING PRECAUTIONS
28
28
28
28
30
30
30
2 /38
Product Specification
RECORD OF REVISIONS
Revision No. Revision Date Page Description
0.0 Jun,22, 2013 - Preliminary Specification(First Draft)
LC550EQD
Ver. 0.0
3 /38
LC550EQD
Product Specification
1. General Description
The LC550EQD is a Color Active Matrix Liquid Crystal Display with an integral Source PCB and the Gate PCB
at each side. The matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive display type which is operating in the normally black mode. It has a 54.64 inch diagonally
measured active display area with QWUXGA resolution progressive mode (2160 vertical by 3840 horizontal
pixel array).
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arrayed in vertical stripes.
Gray scale or the luminance of the sub-pixel color is determined with a 10-bit gray scale signal for each dot.
Therefore, it can present a palette of more than 1.06Bilion colors.
It has been designed to apply the 10-bit 16 Lane V by One interface.
It is intended to support LCD TV, PCTV where high brightness, super wide viewing angle, high color gamut,
high color depth and fast response time are important.
CN1
+12V
(5pin)
Vby1
8lane
Data
format
CN2
(51pin)
Bit
select
HTPDN
LOCKN
Vby1
CN3
8lane
(41pin)
SIN, SCLK, V_Sync
+24.0V, GND, On/Off
ExtVBR-B
Vby1
1~8lane
Option
signal
I2C
Vby1
9~16lane
EEPROM
SCL
SDA
Timing Controller
Vby1 Rx +L/D
+DGA + ODC
Power Circuit
Block
LED Driver
Power Signals
EPI(RGB)
Gate Driver Circuit
Control
Signals
General Features
Active Screen Size 54.64 inches(1387.8mm) diagonal
Outline Dimension 1223.4 (H) x 697.2 (V) x11.7 (B) (Typ.)
Source Driver Circuit
S1 S3840
G1
TFT - LCD Panel
(3840 × RGB × 2160 pixels)
G2160
Local Dimming :12 Block
G1
G2160
Gate Driver Circuit
Pixel Pitch 0.315 mm x 0.315 mm
Pixel Format 3840 horiz. by 2160 vert. Pixels, RGB stripe arrangement
Color Depth 10bit(D), 1.06Billon colors
Luminance, White 450cd/m2 (Center 1point ,Typ.)
Viewing Angle (CR>10) Viewing angle free ( R/L 178 (Min.), U/D 178 (Min.))
Power Consumption Total 100.8W (Typ.) [Logic= 11.5W, LED Driver=89.3W (ExtVbr_B=100% )] (TBD)
Weight 16.5kg(Typ.) (TBD)
Display Mode Transmissive mode, Normally black
Surface Treatment Hard coating(2H), Anti-glare treatment of the front polarizer 1%(Typ)
Ver. 0.0
4 /38
LC550EQD
Product Specification
2. Absolute Maximum Ratings
The following items are maximum values which, if exceeded, may cause faulty operation or permanent damage
to the LCD module.
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameter Symbol
Unit Notes
Min Max
LCD Circuit VLCD -0.3 +14.0 VDC
Power Input Voltage
Driver VBL -0.3 + 27.0 VDC
ON/OFF VOFF / VON -0.3 +3.9 VDC
1
Value
Driver Control Voltage
Brightness EXTVBR-B -0.3 +3.9 VDC
Status Status -0.3 +3.9
T-Con Option Selection Voltage VLOGIC
Operating Temperature TOP 0 +50
-0.3 +4.0 VDC
°C
2,3
Storage Temperature TST -20 +60
Panel Front Temperature TSUR
- +68
°C
°C
4
Operating Ambient Humidity HOP 10 90 %RH
2,3
Storage Humidity HST 10 90 %RH
Notes
1. Ambient temperature condition (Ta = 25 2 °C )
2. Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be Max 39°C, and no condensation of water.
3. Gravity mura can be guaranteed below 40°C condition.
4. The maximum operating temperatures is based on the test condition that the surface temperature
of display area is less than or equal to 68°C with LCD module alone in a temperature controlled chamber.
Thermal management should be considered in final product design to prevent the surface temperature of
display area from being over 68℃. The range of operating temperature may be degraded in case of
improper thermal management in final product design.
90%
Ver. 0.0
Wet Bulb
Temperature [°C]
20
10
0
10 20 30 40 50 60 70 80 0 -20
Dry Bulb Temperature [°C]
30
40
50
60
60%
40%
10%
Storage
Operation
Humidity [(%)RH]
5 /38
LC550EQD
Product Specification
3. Electrical Specifications
3-1. Electrical Characteristics
It requires two power inputs. One is employed to power for the LCD circuit. The other Is used for the LED
backlight and LED Driver circuit.
Table 2. ELECTRICAL CHARACTERISTICS
Parameter Symbol
Min Typ Max
Circuit :
Power Input Voltage VLCD 10.8 12.0 13.2 VDC
Power Input Current ILCD
T-CON Option
Selection Voltage
Power Consumption PLCD - 11.5 15 Watt 1
Rush current IRUSH - - 12 A 3
Input High Voltage V
Input Low Voltage VIL 0 - 0.7
IH
- 953 1240 mA 1
- 984 1280 mA 2
2.7 - 3.6
Value
Unit Note
VDC
VDC
notes
1. The specified current and power consumption are under the V
=12.0V, Ta=25 2°C, fV=120Hz
LCD
condition, and mosaic pattern(8 x 6) is displayed and fV is the frame frequency.
2. The current is specified at the maximum current pattern.
3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).
4. Ripple voltage level is recommended under ±5% of typical voltage
White : 1023 Gray
Black : 0 Gray
Ver. 0.0
Mosaic Pattern(8 x 6)
6 /38
Product Specification
Table 3. ELECTRICAL CHARACTERISTICS (Continue)
LC550EQD
-
-
Values
3.7(TBD)
89.3
(TBD)
4.0(TBD)
7.5
(TBD)
96.5
(TBD)
Unit Notes
A 1
VBL = 21.6V
A
Ext VBR-B = 100%
W 1
On Duty
Vdc
Vdc
HIGH : on duty
LOW : off duty
Parameter Symbol
LED Driver :
Power Supply Input Voltage VBL
Power Supply Input Current IBL
Power Supply Input Current (In-Rush) In-rush - -
Power Consumption PBL
On/Off
Input Voltage for
Control System
Signals
LED :
Life Time 30,000 50,000 Hrs 2
Brightness Adjust ExtVBR-B 1 - 100 %
PWM Frequency for
NTSC & PAL
Pulse Duty Level
(PWM)
On V on 2.5 - 3.6 Vdc
Off V off -0.3 0.0 0.7 Vdc
PAL 100 Hz 3
NTSC 120 Hz 3
High Level 2.5 - 3.6
Low Level 0.0 - 0.7
Min Typ Max
21.6 24.0 25.2 Vdc 1
4
6
Notes :
1. Electrical characteristics are determined after the unit has been ‘ON’ and stable for approximately 60
minutes at 25±2°C. The specified current and power consumption are under the typical supply Input voltage
24Vand VBR (ExtVBR-B : 100%), it is total power consumption.
2. The life time (MTTF) is determined as the time which luminance of the LED is 50% compared to that of initial
value at the typical LED current (ExtVBR-B :100%) on condition of continuous operating in LCM state at
25±2°C.
3. LGD recommend that the PWM freq. is synchronized with One time harmonic of V_sync signal of system.
Though PWM frequency is over 120Hz (max 252Hz), function of LED Driver is not affected.
4. The duration of rush current is about 200ms. This duration is applied to LED on time.
5. Even though inrush current is over the specified value, there is no problem if I2T spec of fuse is satisfied.
6. Ext_PWM Signal have to input available duty range.
Between 99% and 100% ExtVBR-B duty have to be avoided. ( 99% < ExtVBR-B < 100%)
But ExtVBR-B 0% and 100% are available.
High
Available duty range
Low
0%
1%
Ver. 0.0
99% 100% Ext_PWM Input Duty
7 /38
LC550EQD
Product Specification
3-2. Interface Connections
This LCD module employs three kinds of interface connection, 5-pin connector, 51pin connector and 41-pin
Connector are used for the module electronics
3-2-1. LCD Module
- LCD Connector(CN1): SM05B-PASS-TB (manufactured by JST)
- Mating Connector : PAP-05V-S(JST) or compatible
Table 3-1. MODULE CONNECTOR(CN1) PIN CONFIGURATION
Pin No Symbol Description Note
1
2
3
GND Ground
GND Ground
VLCD Power Supply +12.0V
4
5
VLCD Power Supply +12.0V
VLCD Power Supply +12.0V
Ver. 0.0
8 /38
Product Specification
- LCD Connector(CN1): FI-RE51S-HF(manufactured by JAE)
- Mating Connector : FI-R51HL(JAE) or compatible
Table 3-2. MODULE CONNECTOR(CN2) PIN CONFIGURATION
No Symbol Description No Symbol Description
1
NC (Reserved)
2
NC (Reserved) Power Supply +12.0V (reserved)
3
NC (Reserved) Power Supply +12.0V (reserved)
4
NC (Reserved) Power Supply +12.0V (reserved)
5
NC (Reserved) Power Supply +12.0V (reserved)
6
NC (Reserved) Power Supply +12.0V (reserved)
7
NC (Reserved) Power Supply +12.0V (reserved)
8
NC (Reserved) Power Supply +12.0V (reserved)
9 NC NO CONNECTION 35 Rx2p V-by-One HS Data Lane 2
10 GND
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
GND
GND
GND
GND
Data format 0
Data format 1
PCID_EN
SDA SDA (For I2C)
SCL SCL (For I2C)
NC NO CONNECTION
Bit SEL
L-DIM Enable
AGP or NSB
GND
HTPDN Hot plug detect
LOCKN Lock detect
Power Supply +12.0V (reserved)
Ground
Ground
Ground
Ground
Ground
Input Data Format [1:0] :
‘00’=Mode1, ’01’=Mode2,
’10’=Mode3, ’11’=Mode4
‘H’ : PCID Enable
‘L’ or ‘NC’ : PCID Disable
‘H’ or NC= 10bit(D) , ‘L’ = 8bit
‘H’=Enable, ‘L’ or NC=Disable
‘H’ or NC : AGP
‘L’ : NSB (No signal Black)
Ground
27
28 Rx0n V-by-One HS Data Lane 0
29 Rx0p V-by-One HS Data Lane 0
30 GND
31 Rx1n V-by-One HS Data Lane 1
32 Rx1p V-by-One HS Data Lane 1
33 GND
34 Rx2n V-by-One HS Data Lane 2
36 GND
37 Rx3n V-by-One HS Data Lane 3
38 Rx3p V-by-One HS Data Lane 3
39 GND
40
41
42
43
44
45
46
47
48
49
50
51
- - -
GND
Ground
Ground
Ground
Ground
Ground
Rx4n V-by-One HS Data Lane 4
Rx4p V-by-One HS Data Lane 4
GND
Ground
Rx5n V-by-One HS Data Lane 5
Rx5p V-by-One HS Data Lane 5
GND
Ground
Rx6n V-by-One HS Data Lane 6
Rx6p V-by-One HS Data Lane 6
GND
Ground
Rx7n V-by-One HS Data Lane 7
Rx7p V-by-One HS Data Lane 7
GND
Ground
LC550EQD
Note
Ver. 0.0
1. All GND (ground) pins should be connected together to the LCD module’s metal frame.
2. #1~#8NC(No connection) : These pin are used for back up power source, Vlcd(power input)
These pin are should be connected together.
3. All Input levels of V-by-One signals are based on the V-by-One-HS Standard Version 1.3
4. #9 & #20 NC(No Connection) : These pins are used only for LGD (Do not connect)
5. About specific pin(#15, #16), Please see the Appendix
7. Specific pin No. #23 is used for “No signal detection” of system signal interface.
It should be GND for NSB (No Signal Black) while the system interface signal is not.
If this pin is “H”, LCD Module displays AGP (Auto Generation Pattern).
9 /38
Product Specification
-LCD Connector (CN2) : FI-RE41S-HF(manufactured by JAE)
- Mating Connector : FI-RE41HL
Table 3-3. MODULE CONNECTOR(CN2) PIN CONFIGURATION
No Symbol Description No Symbol Description
LC550EQD
1 GND
2 Rx8n V-by-One HS Data Lane 8 23 Rx15n V-by-One HS Data Lane 15
3 Rx8p V-by-One HS Data Lane 8 24 Rx15p V-by-One HS Data Lane 15
4 GND
5 Rx9n V-by-One HS Data Lane 9 26 NC NO CONNECTION
6 Rx9p V-by-One HS Data Lane 9 27 NC NO CONNECTION
7 GND
8 Rx10n V-by-One HS Data Lane 10 29 NC NO CONNECTION
9 Rx10p V-by-One HS Data Lane 10 30 NC NO CONNECTION
10 GND
11 Rx11n V-by-One HS Data Lane 11 32 NC NO CONNECTION
12 Rx11p V-by-One HS Data Lane 11 33 NC NO CONNECTION
13 GND
14 Rx12n V-by-One HS Data Lane 12 35 NC NO CONNECTION
15 Rx12p V-by-One HS Data Lane 12 36 NC NO CONNECTION
16 GND
17 Rx13n V-by-One HS Data Lane 13 38 NC NO CONNECTION
18 Rx13p V-by-One HS Data Lane 13 39 NC NO CONNECTION
19 GND
20 Rx14n V-by-One HS Data Lane 14 41 NC NO CONNECTION
Ground
Ground
Ground
Ground
Ground
Ground
Ground
22 GND
25 GND
28 NC NO CONNECTION
31 NC NO CONNECTION
34 NC NO CONNECTION
37 NC NO CONNECTION
40 NC NO CONNECTION
Ground
Ground
21 Rx14p V-by-One HS Data Lane 14 -
notes : 1. All GND (ground) pins should be connected together to the LCD module’s metal frame.
2. #26~#41 NC (No Connection) : These pins are used only for LGD (Do not connect)
CN1
#1
CN1
#1 #5
CN2 CN3
#1 #51 #1 #41
#5
CN2 CN3
#1 #51
#1 #41
Rear view of LCM
Ver. 0.0
10 /38
Product Specification
3-2-2. Backlight Module
Master
-LED Driver Connector
: 20022WR - H14B2(Yeonho) or Compatible
- Mating Connector
: 20022HS - 14B2 or Compatible
Table 5-1. LED DRIVER CONNECTOR PIN CONFIGURATION
Pin No Symbol Description Note
LC550EQD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
VBL Power Supply +24.0V
VBL Power Supply +24.0V
VBL Power Supply +24.0V
VBL Power Supply +24.0V
VBL Power Supply +24.0V
GND
GND
GND
GND
GND
Status
ON/OFF
V
NC Don’t care
EXTVBR-B External PWM 3
Backlight Ground
Backlight Ground
Backlight Ground
Backlight Ground
Backlight Ground
Back Light Status 2
Backlight ON/OFF control 3
1
Notes :1. GND should be connected to the LCD module’s metal frame.
2. Normal : Low (under 0.7V) / Abnormal : Open
3. High : on duty / Low : off duty, Pin#14 can be opened. ( if Pin #14 is open , EXTVBR-B is 100% )
4. Each impedance of pin #12 and 14 is over 50 [KΩ] .
◆ Rear view of LCM
1
Ver. 0.0
◆ Status
PCB
14
1
…
14
…
<Master>
11 /38
LC550EQD
Product Specification
3-3. Signal Timing Specifications
Table 4 shows the signal timing required at the input of the Vx1 transmitter. All of the interface signal timings
should be satisfied with the following specification for normal operation.
Table 4. TIMING TABLE (DE Only Mode)
ITEM Symbol Min Typ Max Unit Note
Horizontal
Vertical
Frequency
Display
Period
Blank
Total
Display
Period
Blank
Total
ITEM Symbol Min Typ Max Unit Note
DCLK
Horizontal
Vertical
tHV
tHB
tHP
tVV
tVB
tVP
fCLK
fH
fV
240 240 240
25 35 60
265 275 300
2160 2160 2160
40
(456)
2200
(2616)
67 74.25 78.00
244 270 280
108
(95)
90
(540)
2250
(2700)
120
(100)
172
(600)
2332
(2760)
122
(104)
tCLK
tCLK
tCLK
Lines
Lines
Lines
MHz
KHz
Hz
3840/16
1
1
1188/16
1
2
NTSC
(PAL)
notes: 1. The input of HSYNC & VSYNC signal does not have an effect on normal operation (DE Only Mode).
If you use spread spectrum of EMI, add some additional clock to minimum value for clock margin.
2. The performance of the electro-optical characteristics may be influenced by variance of the vertical
refresh rate and the horizontal frequency
※ Timing should be set based on clock frequency.
Ver. 0.0
12 /38
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