LG Display LC490DUJ-SGK1 Specification
(●) Preliminary Specification
( ) Final Specification
Title 49.0” WUXGA TFT LCD
LC490DUJ
Product Specification
SPECIFICATION
FOR
APPROVAL
BUYER KTC
MODEL
APPROVED BY
/
/
/
SIGNATURE
DATE
SUPPLIER LG Display Co., Ltd.
*MODEL LC490DUJ
SUFFIX SGK1 (RoHS Verified)
APPROVED BY
H. S. Song / Team Leader
REVIEWED BY
S. S. Kim / Project Leader
PREPARED BY
H. W. Kim / Engineer
SIGNATURE
DATE
Please return 1 copy for your confirmation with
your signature and comments.
Ver. 0.0
TV Product Development Dept.
LG Display Co., Ltd.
1 / 42
Product Specification
CONTENTS
LC490DUJ
Number ITEM
COVER
CONTENTS
RECORD OF REVISIONS
1 GENERAL DESCRIPTION
2 ABSOLUTE MAXIMUM RATINGS
3 ELECTRICAL SPECIFICATIONS
3-1 ELECTRICAL CHARACTERISTICS
3-2 INTERFACE CONNECTIONS
3-3 SIGNAL TIMING SPECIFICATIONS
3-4 LVDS SIGNAL SPECIFICATIONS
3-5 INTARA INTERFACE SIGNAL SPECIFICATION
3-6 COLOR DATA REFERENCE
3-7 POWER SEQUENCE
4 OPTICAL SPECIFICATIONS
5 MECHANICAL CHARACTERISTICS
6 MECHANICAL DIMENSION
Page
1
2
3
4
5
6
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7
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10
13
14
15
16
22
23
6-1 BOARD ASSEMBLY DIMENSION
6-2 CONTROL BOARD ASSEMBLY DIMMENSION
7 RELIABILITY
8 INTERNATIONAL STANDARDS
8-1 SAFETY 26
8-2 ENVIRONMENT 26
9 PACKING
9-1 PACKING FORM
10 PRECAUTIONS
10-1 HANDLING PRECAUTIONS
10-2 OPERATING PRECAUTIONS
10-3 PROTECTION FILM
10-4 STORAGE PRECAUTIONS
10-5 PACKING PRECAUTIONS
10-6 OPERATING CONDITION GUIDE
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Ver. 0.0
2 / 42
Product Specification
RECORD OF REVISIONS
Revision No. Revision Date Page Description
0.0 Jul, 19, 2013 - Preliminary Specification(First Draft)
LC490DUJ
Ver. 0.0
3 / 42
LC490DUJ
Product Specification
1. General Description
The LC490DUJ is a Color Active Matrix Liquid Crystal Display with an integral the Source PCB and Gate
implanted on Panel (GIP). The matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive type display operating in the normally black mode. It has a 48.50 inch diagonally measured
active display area with WUXGA resolution (1080 vertical by 1920 horizontal pixel array).
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical stripes.
Gray scale or the luminance of the sub-pixel color is determined with a 8-bit gray scale signal for each dot.
Therefore, it can present a palette of more than 16.7Million colors.
It is intended to support LCD TV, PCTV where high brightness, super wide viewing angle, high color gamut,
high color depth and fast response time are important.
EPI(RGB)
Control
Signals
Power Signals
Source Driver Circuit
S1 S1920
G1
TFT - LCD Panel
(1920 × RGB × 1080 pixels)
[Gate In Panel]
G1080
LVDS
2Port
LVDS
Select
+12.0V
CN1
(51pin)
LVDS 1,2
Option
signal
I2C
EEPROM
SCL
Timing Controller
LVDS Rx + DGA
Power Circuit
SDA
Integrated
Block
General Features
Active Screen Size 48.50 inches(1232.00mm) diagonal
Outline Dimension 1085.5(H) X 617.7(V) X 1.4(B) mm (Typ.)
Pixel Pitch 0.5593 mm x 0.5593 mm
Pixel Format 1920 horiz. by 1080 vert. Pixels, RGB stripe arrangement
Color Depth 8-bit, 16.7 Million colors
Drive IC Data Interface
Transmittance (With POL) 6.90 %(Typ.)
Viewing Angle (CR>10) Viewing angle free ( R/L 178 (Min.), U/D 178 (Min.))
Weight 2.06Kg (Typ.)[TBD]
Display Mode Transmissive mode, Normally black
Surface Treatment (Top) Hard coating(3H), Anti-glare treatment ,Haze 1%(Typ.),
Ver. 0.0
Source D-IC : 8-bit EPI, gamma reference voltage, and control signals
Gate D-IC : Gate In Panel
4 / 42
LC490DUJ
Product Specification
2. Absolute Maximum Ratings
The following items are maximum values which, if exceeded, may cause faulty operation or permanent damage
to the LCD module.
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameter Symbol
Value
Unit Note
Min Max
Power Input Voltage LCD Circuit VLCD -0.3 +14.0 VDC
T-Con Option Selection Voltage VLOGIC -0.3 +4.0 VDC
Operating Temperature TOP 0 +50
Storage Temperature(without packing) TST -20 +60
Panel Front Temperature TSUR - +68
°C
°C
°C
Operating Ambient Humidity HOP 10 90 %RH
Storage Humidity HST 5 90 %RH
Note
1. Ambient temperature condition (Ta = 25 2 °C )
2. Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be Max 39°C, and no condensation of water.
3. Gravity mura can be guaranteed below 40°C condition.
4. The maximum operating temperatures is based on the test condition that the surface temperature
of display area is less than or equal to 68°C with LCD module alone in a temperature controlled chamber.
Thermal management should be considered in final product design to prevent the surface temperature of
display area from being over 68℃. The range of operating temperature may be degraded in case of
improper thermal management in final product design.
1
2,3
4
2,3
Ver. 0.0
Wet Bulb
Temperature [°C]
20
10
0
10 20 30 40 50 60 70 800-20
Dry Bulb Temperature [°C]
30
40
50
60
90%
60%
40%
10%
5%
Storage
Operation
Humidity [(%)RH]
5 / 42
Product Specification
3. Electrical Specifications
3-1. Electrical Characteristics
Table 2. ELECTRICAL CHARACTERISTICS
LC490DUJ
Parameter Symbol
Min Typ Max
Circuit :
Power Input Voltage VLCD 10.8 12.0 13.2 VDC
Power Input Current ILCD
T-CON Option
Selection Voltage
Power Consumption PLCD - 5.36(TBD) 7.55(TBD) Watt 1
Rush current IRUSH - - 5.0 A 3
1. The specified current and power consumption are under the V
Note
Input High Voltage V
Input Low Voltage V
IH
IL
- 447(TBD) 581(TBD) mA 1
- 620(TBD) 806(TBD) mA 2
2.7 - 3.6
0 - 0.7
Value
=12.0V, Ta=25 2°C, fV=60Hz
LCD
Unit Note
VDC
VDC
condition, and mosaic pattern(8 x 6) is displayed and fVis the frame frequency.
2. The current is specified at the maximum current pattern.
3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).
4. Ripple voltage level is recommended under ± 5% of typical voltage
White : 255 Gray
Black : 0 Gray
Ver. 0.0
Mosaic Pattern(8 x 6)
6 / 42
LC490DUJ
Product Specification
3-2. Interface Connections
This LCD module employs two kinds of interface connection, 51-pin connector is used for the module
electronics.
3-2-1. LCD Module
- LCD Connector(CN1): FI-RE51S-HF(manufactured by JAE) or GT05P-51S-H38(manufactured by LSM)
or IS050-C51B-C39(manufactured by UJU)
- Mating Connector : FI-R51HL(JAE) or compatible
Table 3. MODULE CONNECTOR(CN1) PIN CONFIGURATION
No Symbol Description No Symbol Description
1
2
3
4
5
6
7
8
9
10
11 GND
12 R1AN
13 R1AP
14 R1BN
15
16 R1CN
17 R1CP
18 GND
19 R1CLKN
20
21 GND
22 R1DN
23 R1DP
24
25
26
NC
NC
NC
NC
NC
NC
LVDS Select
NC
NC
NC
R1BP
R1CLKP
NC No connection
NC No connection
NC or GND
No Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4)
‘H’ =JEIDA , ‘L’ or NC = VESA
No Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4)
Ground
FIRST LVDS Receiver Signal (A-)
FIRST LVDS Receiver Signal (A+)
FIRST LVDS Receiver Signal (B-)
FIRST LVDS Receiver Signal (B+)
FIRST LVDS Receiver Signal (C-)
FIRST LVDS Receiver Signal (C+)
Ground
FIRST LVDS Receiver Clock Signal(-)
FIRST LVDS Receiver Clock Signal(+)
Ground
FIRST LVDS Receiver Signal (D-)
FIRST LVDS Receiver Signal (D+)
No Connection or Ground
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29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
- - -
NC No connection
R2AN
R2AP
R2BN
R2BP
R2CN
R2CP
GND
R2CLKN
R2CLKP
GND
R2DN
R2DP
NC No connection
NC No connection
NC or GND
NC or GND
GND Ground (Note 5)
GND Ground
GND Ground
NC No connection
VLCD Power Supply +12.0V
VLCD Power Supply +12.0V
VLCD Power Supply +12.0V
VLCD Power Supply +12.0V
SECOND LVDS Receiver Signal (A-)
SECOND LVDS Receiver Signal (A+)
SECOND LVDS Receiver Signal (B-)
SECOND LVDS Receiver Signal (B+)
SECOND LVDS Receiver Signal (C-)
SECOND LVDS Receiver Signal (C+)
Ground
SECOND LVDS Receiver Clock Signal(-)
SECOND LVDS Receiver Clock Signal(+)
Ground
SECOND LVDS Receiver Signal (D-)
SECOND LVDS Receiver Signal (D+)
No Connection or Ground
No Connection or Ground
Note
Ver. 0.0
1. All GND(ground) pins should be connected together to the LCD module‟s metal frame.
2. All VLCD (power input) pins should be connected together.
3. All Input levels of LVDS signals are based on the EIA 644 Standard.
4. #1~#6 & #8~#10 NC (No Connection): These pins are used only for LGD (Do not connect)
5. Specific pin No. #44 is used for “No signal detection” of system signal interface.
It should be GND for NSB(No Signal Black) during the system interface signal is not.
If this pin is “H”, LCD Module displays AGP(Auto Generation Pattern).
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LC490DUJ
Product Specification
3-3. Signal Timing Specifications
Table 6 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal
timings should be satisfied with the following specification for normal operation.
Table 6. TIMING TABLE for NTSC & PAL(DE Only Mode)
ITEM Symbol Min Typ Max Unit notes
Horizontal
Vertical
Frequency
Display
Period
Blank tHB 100 140 240 tCLK 1
Total tHP 1060 1100 1200 tCLK
Display
Period
Blank tVB 20 45 300 Lines 1
Total tVP 1100 1125 1380 Lines
ITEM Symbol Min Typ Max Unit notes
DCLK fCLK 60.00 74.25 78.00 MHz
Horizontal fH 57.3 67.5 70 KHz 2
Vertical fV 47 60 63 Hz 2
tHV 960 960 960 tCLK 1920 / 2
tVV 1080 1080 1080 Lines
notes: 1. The input of HSYNC & VSYNC signal does not have an effect on normal operation (DE Only Mode).
If you use spread spectrum of EMI, add some additional clock to minimum value for clock margin.
2. The performance of the electro-optical characteristics may be influenced by variance of the vertical
refresh rate and the horizontal frequency
3. Spread Spectrum Rate (SSR) for 50KHz ~ 100kHz Modulation Frequency(FMOD) is calculated by
(7 – 0.06*Fmod), where Modulation Frequency (FMOD) unit is KHz.
LVDS Receiver Spread spectrum Clock is defined as below figure
※ Timing should be set based on clock frequency.
Ver. 0.0
8 / 42
LC490DUJ
Product Specification
※ Please pay attention to the followings when you set Spread Spectrum Rate(SSR) and Modulation Frequency(FMOD)
1. Please set proper Spread Spectrum Rate(SSR) and Modulation Frequency (FMOD) of TV system LVDS output.
2. Please check FOS after you set Spread Spectrum Rate(SSR) and Modulation Frequency(FMOD) to avoid
abnormal display. Especially, harmonic noise can appear when you use Spread Spectrum under FMOD 30 KHz.
Ver. 0.0
9 / 42
3-4. LVDS Signal Specification
3-4-1. LVDS Input Signal Timing Diagram
LC490DUJ
Product Specification
DE, Data
DCLK
First data
Second data
0.7VDD
0.3VDD
tCLK
DE(Data Enable)
0.5 VDD
Invalid data
Invalid data
Valid data
Pixel 0,0
Valid data
Pixel 1,0
tHP
Pixel 2,0
Pixel 3,0
Invalid data
Invalid data
tHV
DE(Data Enable)
Ver. 0.0
1 1080
tVV
tVP
10 / 42
3-4-2. LVDS Input Signal Characteristics
1) DC Specification
LVDS -
LVDS +
LC490DUJ
Product Specification
# VCM= {(LVDS +) + ( LVDS -)}/2
0V
V
CM
V
IN _ MAXVIN _ MIN
Description Symbol Min Max Unit Note
LVDS Common mode Voltage V
LVDS Input Voltage Range V
CM
IN
1.0 1.5 V -
0.7 1.8 V -
Change in common mode Voltage ΔVCM - 250 mV -
2) AC Specification
2) AC Specification
T
clk
LVDS Clock
LVDS Data
(F
= 1/T
)
clk
LVDS 1‟st Clock
LVDS 2ndClock
tSKEW
tSKEW
clk
T
clk
t
SKEW_mintSKEW_max
Description Symbol Min Max Unit notes
V
LVDS Differential Voltage
LVDS Clock to Data Skew t
Effective time of LVDS t
LVDS Clock to Clock Skew (Even to Odd) t
1. All Input levels of LVDS signals are based on the EIA 644 Standard.
notes
TH
V
TL
SKEW
eff
SKEW_EO
2. LVDS Differential Voltage is defined within t
Ver. 0.0
100 600 mV
-600 -100 mV
- |(0.2*T
|± 360|
- |1/7* T
eff
Tested with Differential Probe
)/7| ps -
clk
- ps -
| ps -
clk
2
11 / 42
Product Specification
LC490DUJ
LVDS Data
0V
(Differential)
LVDS CLK
0.5tui
360ps
tui
VTH
VTL
360ps
teff
tui : Unit Interval
0V
(Differential)
* This accumulated waveform is tested with differential probe
Ver. 0.0
12 / 42
LC490DUJ
Product Specification
3-5. Intra interface Signal Specification
3-5-1. EPI Signal Specification
Table 5. ELECTRICAL CHARACTERISTICS
Parameter Symbol Condition MIN TYP MAX Unit notes
Logic & EPI Power Voltage VCC - 1.62 1.8 1.98 VDC
EPI input common voltage VCM LVDS Type 0.8 VCC/2 1.3 V
EPI input differential voltage Vdiff - 150 - 500 mV
EPI Input eye diagram Veye - 90 - - mV
Effective Veye width time B1&B2 0.25 - - UI
EPI +
0 V
0 V
(Differential Probe)
Vdiff
Vdiff
(Differential Probe)
EPI Differential signal characteristics
*Source PCB
EPI -
0 V
1 UI
0.5 UI
B1 B2
Eye Pattern of EPI Input
Vdiff
Vcm
(Active Probe)
Veye
Veye
Ver. 0.0
FIG. 3 Measure point
13 / 42
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