LG Display LC470WUF-SBR1 Specification

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()Preliminary Specification
() Final Specification
Title 47.0” WUXGA TFT LCD
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Product Specification
SPECIFICATION
FOR
APPROVAL
BUYER General
APPROVED BY
/
/
/
SIGNATURE
DATE
SUPPLIER RAKEN
*MODEL LC470WUF
SUFFIX SBR1(ROHS Verified)
*When you obtain standard approval,
please use the above model name without suffix
APPROVED BY
/ Team Leader
REVIEWED BY
/ PM
PREPARED BY
/ Engineer
SIGNATURE
DATE
Please return 1 copy for your confirmation with
your signature and comments.
Ver. 1.0
RAKEN Technology Co., Ltd
LCM R&D Dept.
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LC470WUF
Product Specification
CONTENTS
Number
1
2
3
3-1
3-2
3-3
3-4
3-5
3-6
4
5
COVER
CONTENTS
GENERAL DESCRIPTION
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
INTERFACE CONNECTIONS
SIGNAL TIMING SPECIFICATIONS
SIGNAL TIMING WAVEFORMS
COLOR DATA REFERENCE
POWER SEQUENCE
OPTICAL SPECIFICATIONS
MECHANICAL CHARACTERISTICS
ITEM
Page
1
2
3RECORD OF REVISIONS
4
5
6
6
10
13
15
16
17
18
22
Ver. 1.0
RELIABILITY6
INTERNATIONAL STANDARDS7
SAFETY7-1
EMC7-2
PACKING8
INFORMAITION OF LCM LABEL8-1
PACKING FORM8-2
25
26
26
26
27
27
27
28PRECAUTIONS9
28MOUNTING PRECAUTIONS9-1
28OPERATING PRECAUTIONS9-2
29ELECTROSTATIC DISCHARGE CONTROL9-3
29PRECAUTIONS FOR STRONG LIGHT EXPOSURE9-4
29STORAGE9-5
29HANDLING PRECAUTIONS FOR PROTECTION FILM9-6
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LC470WUF
Product Specification
RECORD OF REVISIONS
DescriptionPageRevision DateRevision No.
1.0
Aug, 25, 2009
Final CAS V1.0 Release
Final Specification
Ver. 1.0
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1. General Description
LC470WUF is a Color Active Matrix Liquid Crystal Display with an Cold Cathode Fluorescent Lamp(CCFL) backlight system. The matrix employs a-Si Thin Film Transistor as the active element. It is a transmissive type display operating in the normally black mode. It has a 46.96 inch diagonally measured active display area with WUXGA resolution (1080 vertical by 1920 horizontal pixel array) Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical stripes. Gray scale or the luminance of the sub-pixel color is determined with a 10-bit gray scale signal for each dot, thus presenting a palette of more than 1.06Billion(FRC) of colors. It has been designed to apply the 10-bit 4 port LVDS interface. It is intended to support LCD TV, PCTV where high brightness, super wide viewing angle, high color gamut, high color depth and fast moving picture response time are important.
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LC470WUF
Product Specification
LVDS
2Port
+12.0V
LVDS
LVDS Select
Bit Select
High Input
High Input
2Port
CN2
(41pin)
CN1
(51pin)
General Features
EEPROM
SCL
SDA
Timing Controller
[LVDS Rx + OPC + ODC
integrated]
Power Circuit
Block
CN3, 3pin, 22 Lamps/@155 mA
CN4, 3pin, 22 Lamps/@155mA
46.96 inch (1192.87mm) diagonalActive Screen Size
1096.0(H) x 640.0 (V) x 50.5 mm (D) (Typ.)Outline Dimension
0.5415 mm x 0.5415 mm x RGBPixel Pitch
1920 horiz. by 1080 vert. Pixels, RGB stripe arrangementPixel Format
Mini-LVDS(RGB)
G1
Gate Driver Circuit
G1080
Source Driver Circuit
S1 S1920
TFT - LCD Panel
(1920 Ý RGB Ý 1080 pixels)
Back light Assembly
10Bit(D), 1.06 Billion colorsColor Depth
500 cd/m2 (Center 1point ,Typ.)Luminance, White
Viewing angle free ( R/L 178 (Min.), U/D 178 (Min.))Viewing Angle (CR>10)
Total 219.7W (Typ.) (Logic=6.72W, Backlight=213W @with inverter)Power Consumption
12.5 Kg (Typ.) Weight
Transmissive mode, Normally blackDisplay Mode
Surface Treatment
Ver. 1.0
Hard coating(3H), Anti-glare treatment of the front polarizer (Haze 10%)
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2. Absolute Maximum Ratings
The following items are maximum values which, if exceeded, may cause faulty operation or damage to the LCD module.
Table 1. ABSOLUTE MAXIMUM RATINGS
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LC470WUF
Product Specification
Parameter Remark
Symbol
MaxMin
Value
Power Input
Voltage
Operating Temperature
Storage Temperature
Operating Ambient Humidity
Storage Humidity
LCM
Operating Voltage (one side)
LCD
OP
ST
OP
ST
+14.0-0.3V
V[ RMS]20001000VOPB/L Input voltage
Note : 1. Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be Max 39 C. and no condensation of water.
2. Gravity mura can be guaranteed below 40C condition.
90%
60
60%
Unit
C+500TC+60-20T
%RH9010H
%RH9010H
DC
at 25 r 2 ¶CV
GY\Gr YG¶j
ExtV
BR-B 100%
Note 1,2
Ver. 1.0
Wet Bulb Temperature [
10
0
10 20 30 40 50 60 70 800-20
Dry Bulb Temperature [
C
20
50
]
30
40
40%
Humidity [(%)RH]
10%
C]
Storage
Operation
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3. Electrical Specifications
3-1. Electrical Characteristics
It requires two power inputs. One is employed to power for the LCD circuit.
The other Is used for the CCFL backlight circuit.
Table 2. ELECTRICAL CHARACTERISTICS
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LC470WUF
Product Specification
Parameter Symbol
Value
Circuit :
Power Input Voltage
Power Input Current
Power Consumption
Rush current
LCD
I
LCD
LCD
RUSH
Note : 1. The specified current and power consumption are under the V
condition whereas mosaic pattern(8 x 6) is displayed and f
is the frame frequency.
V
2. The current is specified at maximum current pattern.
3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).
White : 1023 Gray Black : 0 Gray
MaxTypMin
13.212.010.8V
=12.0V, 25 r 2C, fV=120Hz
LCD
V
DC
NoteUnit
1mA728560392
2mA1027790553
1Watt8.746.72-P
3A5--I
Mosaic Pattern(8 x 6)
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Table 3. ELECTRICAL CHARACTERISTICS of Back Light Assembly & Lamp (Continue)
Parameter Symbol
Backlight Assembly :
Operating Voltage
(one side,fBL=45KHz, IBL= 155mArms))
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Product Specification
Values
LC470WUF
NotesUnit
MaxTypMin
155013501150VBL
RMS
1, 2V
Operating Current (one side)
Established Starting Voltage (one side)
Operating Frequency
Striking Time
Parameter Symbol
Lamp : (APPENDIX-II)
Lamp Voltage (one side)
Discharge Stabilization Time
Lamp Frequency
Lamp Temperature
Established Starting Voltage (one side)
0 25
0
LAMP
LAMP
T
LAMP
VS
BL
TIME
S
S
VS25
Values
165155145IBL
1400--
1200--
RMS
RMS
MaxTypMin
875750700V
873ILAMPLamp Current (one side)
80
1400-V
1200-
RMS
RMS
KHz804530f
C
RMS
1mA
1, 3V
4kHz474543f
3sec2S
1,3pF-22-CbBalance Cap.
6Watt250213-PBLPower Consumption
9%100-20a/T*100Burst Dimming Duty
9Hz182981/TBurst Dimming Frequency
NotesUnit
1, 2V
1mA
1, 5Min3--T
Center
Both side130
1, 3V
7Hrs50,000Life Time
Note : The design of the inverter must have specifications for the lamp in LCD Assembly.
The electrical characteristics of inverter are based on High-High Driving type.
The performance of the lamps in LCM, for example life time or brightness, is extremely influenced by
the characteristics of the DC-AC inverter. So, all the parameters of an inverter should be carefully
designed so as not to produce too much leakage current from high-voltage output of the inverter.
When you design or order the inverter, please make sure unwanted lighting caused by the mismatch
of the lamp and the inverter (no lighting, flicker, etc) has never been occurred. When you confirm it,
the LCD– Assembly should be operated in the same condition as installed in your instrument.
Do not attach a conductive tape to lamp connecting wire.
If you attach conductive tape to the lamp wire, not only luminance level can be lower than typical one but also inverter operate abnormally on account of leakage current which is generated between lamp wire and conductive tape.
1. Specified values are defined for a Backlight Assembly.( IBL : 22 lamp, 7mA/Lamp)
2. Operating voltage is measured at 25 r 2C(after 2hr.aging). The variance range for operating voltage is r 10%.
V
] should be applied to the lamps for more than Striking time (S
3. The established starting voltage [
S
for start-up. Inverter open voltage must be more than established starting voltage. Otherwise, the lamps may not be turned on. The used lamp current is typical value.
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}T
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LC470WUF
Product Specification
S TIME
Vs = (Vpk-pk) / [ 2*root(2)]
4. Lamp frequency may produce interference with horizontal synchronous frequency. As a result, the may cause beat on the display. Therefore, lamp frequency shall be away as much as possible from the horizontal
synchronous frequency and its harmonics range in order to prevent interference.
5. The brightness of the lamp after lighted for 5minutes is defined as 100%.
is the time required for the brightness of the center of the lamp to be not less than 95% at typical current.
T
S
The screen of LCD module may be partially dark by the time the brightness of lamp is stable after turn on.
6. Maximum level of power consumption is measured at initial turn on. Typical level of power consumption is measured after 2hrs aging at 25 r 2C.
7. The life time is determined as the time at which brightness of the lamp is 50% compared to that of initial
value at the typical lamp current on condition of continuous operating at 25 r 2C, based on duty 100%.
8.The output of the inverter must have symmetrical(negative and positive) voltage and current waveform
(Unsymmetrical ratio is less than 10%). Please do not use the inverter which has not only unsymmetrical
voltage and current but also spike wave. Requirements for a system inverter design, which is intended to achieve better display performance,
power efficiency and more reliable lamp characteristics. It can help increase the lamp lifetime and reduce leakage current.
a. The asymmetry rate of the inverter waveform should be less than 10%. b. The distortion rate of the waveform should be within ˲2 ·10%.
* Inverter output waveform had better be more similar to ideal sine wave.
* Asymmetry rate:
I
p
| I
–I –p| / Iopx 100%
p
* Distortion rate
I
-p
I
(or I –p) / I
p
Ver. 1.0
op
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9. The reference method of burst dimming duty ratio. It is recommended to use synchronous V-sync frequency to prevent waterfall (Vsync x 1 =Burst Frequency)
PWM
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LC470WUF
Product Specification
{
A
+3.3V TTL
I-out
Output of Inverter to Lamp
90%
PWM duty={ A/T } * 100
Point A : rising time 90% of Iout point . Point B : falling starting point . I out duty = { a/T } * 100 PWM Frequency = 1/T
We recommend not to be much different between PWM duty and Iout duty .Minimum PWM duty ratio should be defined based on the minimum luminance.Dimming current output rising and falling time may produce humming and inverter trans’ sound noise.Burst dimming duty should be 100% for more than 1second after turn on.Equipment
Oscilloscope :TDS3054B(Tektronix) Current Probe : P6022 AC (Tektronix) High Voltage Probe: P5100(Tektronix)
10. The Cable between the backlight connector and its inverter power supply should be connected directly with a minimized length. The longer cable between the backlight and the inverter may cause the lower luminance of lamp and may require more higher starting voltage ( Vs ).
Point A
a
Point B
11. The operating current must be measured as near as backlight assembly input.
12. The operating current unbalance between left and right must be under 10% of Typical current
Left(Master) current – Right(Slave) Currentର 10% of typical current
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3-2. Interface Connections
This LCD module employs two kinds of interface connection, 51-pin and 41-pin connector are used for the module electronics and two 3-pin Balance PCB connectors are used for the integral backlight system.
3-2-1. LCD Module
- LCD Connector(CN1): FI-RE51S-HF (manufactured by JAE) or KN25-51P-0.5SH(manufactured by Hirose) Refer to below and next Page table
- Mating Connector : FI-RE51HL(JAE) or compatible
Table 4-1. MODULE CONNECTOR(CN1) PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10 11
12
13
14
15
16
17
18
19
20 21
22
23
24 25 26
GND
LVDS Select
GND
R1AN
R1AP
R1BN R1BP
R1CN
R1CP
GND
R1CLKN R1CLKP
GND
R1DN
R1DP
R1EN R1EP
Reserved
Ground
No ConnectionNC
No ConnectionNC
No ConnectionNC
No ConnectionNC
No ConnectionNC
‘H’ =JEIDA , ‘L’ or NC = VESA
External VBR (From System)VBR EXT
OPC output (From LCM)OPC OUT
‘H’ = Enable , ‘L’ or NC = Disable OPC Enable
G
round
FIRST LVDS Receiver Signal (A-)
FIRST LVDS Receiver Signal (A+)
FIRST LVDS Receiver Signal (B-)
FIRST LVDS Receiver Signal (B+)
FIRST LVDS Receiver Signal (C-)
FIRST LVDS Receiver Signal (C+) Ground
FIRST LVDS Receiver Clock Signal(-)
FIRST LVDS Receiver Clock Signal(+) Ground
FIRST LVDS Receiver Signal (D-)
FIRST LVDS Receiver Signal (D+)
FIRST LVDS Receiver Signal (E-) FIRST LVDS Receiver Signal (E+)
No connection or GND
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LC470WUF
Product Specification
DescriptionSymbolNo
No
27
28
29
30
31
32
33
34
35
36
37
38
39 40
41
42
43
44
45
46 47
48
49
50 51
-
Symbol
Bit Select
R2AN
R2AP
R2BN
R2BP
R2CN
R2CP
GND
R2CLKN
R2CLKP
GND
R2DN
R2DP
R2EN
R2EP
Reserved
Reserved
GND
GND
GND
NC VLCD
VLCD
VLCD VLCD
-
Description
‘H’ or NC= 10bit(D) , ‘L’ = 8bit
SECOND LVDS Receiver Signal (A-)
SECOND LVDS Receiver Signal (A+)
SECOND LVDS Receiver Signal (B-)
SECOND LVDS Receiver Signal (B+)
SECOND LVDS Receiver Signal (C-)
SECOND LVDS Receiver Signal (C+)
Ground
SECOND LVDS Receiver Clock Signal(-)
SECOND LVDS Receiver Clock Signal(+) Ground
SECOND LVDS Receiver Signal (D-)
SECOND LVDS Receiver Signal (D+)
SECOND LVDS Receiver Signal (E-)
SECOND LVDS Receiver Signal (E+) No connection or GND
No connection or GND
Ground
Ground
Ground
No connection Power Supply +12.0V
Power Supply +12.0V
Power Supply +12.0V Power Supply +12.0V
-
Notes :
1. All GND(ground) pins should be connected together to the LCD module’s metal frame.
2. All V
LCD (power input) pins should be connected together.
3. All Input levels of LVDS signals are based on the EIA 644 Standard.
4. Specific pins(pin No. #2~#6) are used for internal data process of the LCD module. If not used, these pins are no connection.
5. LVDS pin (pin No. #24,25,40,41) are used for 10Bit(D) of the LCD module. If used for 8Bit(R), these pins are no connection.
6. Specific pin No. #44 is used for “No signal detection” of system signal interface. It should be GND for NSB(No Signal Black) during the system interface signal is not. If this pin is “H”, LCD Module displays AGP(Auto Generation Pattern).
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- LCD Connector(CN2): FI-RE41S-HF(manufactured by JAE), Refer to below table
- Mating Connector : FI-RE41HL
Table 4-2. MODULE CONNECTOR(CN2) PIN CONFIGURATION
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LC470WUF
Product Specification
10
11
12
14
15
16
17
19
20
21
DescriptionSymbolNo
NC
2
3
5
6
7
8
9
NC
NC
NC4
NC
NC
NC
NC
͸Ϳ͵
RA3N
RA3P
RB3N
RB3P13
RC3N
RC3P
GND
RCLK3N
RCLK3P18
GND
RD3N
RD3P
No connection(Reserved)1
No connection
No connection
No connection
No connection
No connection
No connection
No connection
Ground
THIRD LVDS Receiver Signal (A-)
THIRD LVDS Receiver Signal (A+)
THIRD LVDS Receiver Signal (B-)
THIRD LVDS Receiver Signal (B+)
THIRD LVDS Receiver Signal (C-)
THIRD LVDS Receiver Signal (C+)
Ground
THIRD LVDS Receiver Clock Signal(-)
THIRD LVDS Receiver Clock Signal(+)
Ground
THIRD LVDS Receiver Signal (D-)
THIRD LVDS Receiver Signal (D+)
No
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
Symbol
RE3N
RE3P
GND
GND
RA4N
RA4P
RB4N
RB4P
RC4N
RC4P
GND
RCLK4N
RCLK4P
GND
RD4N
RD4P
RE4N
RE4P
GND
GND
-
THIRD LVDS Receiver Signal (E-)
THIRD LVDS Receiver Signal (E+)
Ground
Ground
FOURTH LVDS Receiver Signal (A-)
FOURTH LVDS Receiver Signal (A+)
FOURTH LVDS Receiver Signal (B-)
FOURTH LVDS Receiver Signal (B+)
FOURTH LVDS Receiver Signal (C-)
FOURTH LVDS Receiver Signal (C+)
Ground
FOURTH LVDS Receiver Clock Signal(-)
FOURTH LVDS Receiver Clock Signal(+)
Ground
FOURTH LVDS Receiver Signal (D-)
FOURTH LVDS Receiver Signal (D+)
FOURTH LVDS Receiver Signal (E-)
FOURTH LVDS Receiver Signal (E+)
Ground
Ground
Description
Notes : 1. All GND(ground) pins should be connected together to the LCD module’s metal frame.
2. LVDS pin (pin No. #22,23,38,39) are used for 10Bit(D) of the LCD module. If used for 8Bit(R), these pins are no connection.
[CN1]
-Part/No. : FI-RE51S-HF(JAE)
CN1 CN2
#1
#51 #1 #41
- Mating connector : FI-RE51HL
KN25-51P-0.5SH(Hirose)
(Manufactured by JAE)
[CN2]
#1 #51
#1 #41
- Part/No. : FI-RE41S-HF(JAE)
- Mating connector : FI-RE41HL (Manufactured by JAE)
Rear view of LCM
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3-2-2. Backlight Module
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LC470WUF
Product Specification
[ Master ]
1) Balance Connector
: 65002WS-03 (manufactured by YEONHO)or equivalent
2) Mating Connector
: 65002HS-03 (manufactured by YEONHO) or equivalent.
[ Slave ]
1) Balance Connector
: 65002WS-03 (manufactured by YEONHO)or equivalent
2) Mating Connector
: 65002HS-03 (manufactured by YEONHO) or equivalent.
Table 5. BACKLIGHT CONNECTOR PIN CONFIGURATION(CN2,CN3)
SymbolNo
H_Input
H_Input
FB
Rear view of LCM
123
Master
Master
High_Input2
NC3
1
23
Slave
Slave
High_InputHigh_Input 1
High_Input
NC
Note
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3-3. Signal Timing Specifications
Table 6 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal timing should be satisfied with the following specification for normal operation.
Table 6. TIMING TABLE for NTSC/ATSC (DE Only Mode)
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LC470WUF
Product Specification
Horizontal
Vertical
Frequency
Display
Period
Blank
Total
Display
Period
Blank
Total
DCLK
Horizontal
Symbol
HV
t
HB
t
HP
t
VV
t
VB
t
tVP
Symbol
fCLK
fH
NoteUnitMaxTypMinITEM
480480480
2007040
680550520
108010801080
864510
116611251090
75.0074.2566.97
136.4135121.8
tCLK
CLK
t
CLK
t
Lines
Lines
Lines
MHz
KHz
1920/4
1
1
NoteUnitMaxTypMinITEM
2
Vertical
Notes : 1. The Input of HSYNC & VSYNC signal does not have an effect on normal operation(DE Only Mode).
If you use spread spectrum for EMI, add some additional clock to minimum value for clock margin.
2. The performance of the electro-optical characteristics may be influenced by variance of the vertical refresh rate and the horizontal frequency.
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f
V
121.2120108.2
Hz
2
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Table 7 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal timing should be satisfied with the following specification for normal operation.
Table7. TIMING TABLE for DVB/PAL (DE Only Mode)
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LC470WUF
Product Specification
Horizontal
Vertical
Frequency
Display
Period
Blank
Total
Display
Period
Blank
Total
DCLK
Horizontal
Symbol
tHV
t
HB
HP
t
VV
t
VB
t
tVP
Symbol
f
CLK
H
f
NoteUnitMaxTypMinITEM
480480480
2007040
680550520
108010801080
300270228
138013501308
75.0074.2566.97
136.4135121.8
t
CLK
t
CLK
tCLK
Lines
Lines
Lines
MHz
KHz
1920/4
1
1
NoteUnitMaxTypMinITEM
2
Vertical
Notes : 1. The Input of HSYNC & VSYNC signal does not have an effect on normal operation(DE Only Mode).
If you use spread spectrum for EMI, add some additional clock to minimum value for clock margin.
2. The performance of the electro-optical characteristics may be influenced by variance of the vertical refresh rate and the horizontal frequency.
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fV
103.710095
Hz
2
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