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LC470EUN
Product Specification
1. General Description
The LC470EUN is a Color Active Matrix Liquid Crystal Display with an integral Light Emitting Diode (LED)
backlight system. The matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive display type which is operating in the normally black mode. It has a 46.96 inch diagonally
measured active display area with WUXGA resolution (1080 vertical by 1920 horizontal pixel array).
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arrayed in vertical stripes.
Gray scale or the luminance of the sub-pixel color is determined with a 8-bit gray scale signal for each dot.
Therefore, it can present a palette of more than 16.7Milion colors.
It has been designed to apply the 8-bit 2-port LVDS interface.
It is intended to support LCD TV, PCTV where high brightness, super wide viewing angle, high color gamut,
high color depth and fast response time are important.
LVDS
2Port
LVDS
Select
OPC/TM
Enable
ExtVBR-B
+12.0V
CN1
(51pin)
LVDS 1,2
Option
signal
I2C
EEPROM
SCL
SDA
Timing Controller
LVDS Rx + OPC + DGA
Integrated
Power Circuit
Control
Signals
Power Signals
Block
PWM_OUT
1~3
CN2
(4 pin)
PWM_OUT
1~3
LED Driver
+24.0V, GND, On/Off
General Features
Active Screen Size46.96 inches(1192.87mm) diagonal
EPI(RGB)
Source Driver Circuit
S1S1920
G1
TFT - LCD Panel
(1920 RGB 1080 pixels)
[Gate In Panel]
G1080
Scanning Block 1
Scanning Block 2
Scanning Block 3
Outline Dimension1070.6(H) 622.0(V) X 9.9(B)/23.1 mm(D) (Typ.)
Pixel Pitch0.5415 mm x 0.5415 mm
Pixel Format1920 horiz. by 1080 vert. Pixels, RGB stripe arrangement
Power ConsumptionTotal 79.2W (Typ.) [Logic=6.4W , LED Driver=72.8W(ExtVbr_B=100% )]
Weight10.9 Kg (Typ.)
Display ModeTransmissive mode, Normally black
Surface TreatmentHard coating(2H), Anti-glare treatment of the front polarizer (Haze < 1%)
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LC470EUN
Product Specification
2. Absolute Maximum Ratings
The following items are maximum values which, if exceeded, may cause faulty operation or permanent damage
to the LCD module.
Table 1. ABSOLUTE MAXIMUM RATINGS
ParameterSymbol
Power Input Voltage
Driver Control Voltage
T-Con Option Selection VoltageVLOGIC
Operating TemperatureTOP
Storage TemperatureTST
Panel Front Temperature TSUR-+68
Operating Ambient HumidityHOP
Storage HumidityHST1090%RH
Note
1. Ambient temperature condition (Ta =
LCD CircuitVLCD
DriverVBL-0.3+ 27.0VDC
ON/OFFVOFF /VON
BrightnessEXTVBR-B
25 ± 2C)
Value
MinMax
-0.3+14.0
-0.3+5.5
-0.3+4.0
-0.3+4.0
0+50
-20+60
1090
2. Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be Max 39C, and no condensation of water.
3. Gravity mura can be guaranteed below 40C condition.
4. The maximum operating temperatures is based on the test condition that the surface temperature
of display area is less than or equal to 68C with LCD module alone in a temperature controlled chamber.
Thermal management should be considered in final product design to prevent the surface temperature of
display area from being over 68. The range of operating temperature may be degraded in case of
improper thermal management in final product design.
90%
UnitNote
VDC
VDC
VDC
VDC
C
C
C
%RH
2,3
2,3
1
4
60
60%
Storage
Operation
Ver. 0.0
Wet Bulb
Temperature [
10
0
10203040506070800-20
Dry Bulb Temperature [
20
50
C
]
30
40
40%
Humidity [(%)RH]
10%
C
]
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LC470EUN
Product Specification
3. Electrical Specifications
3-1. Electrical Characteristics
It requires two power inputs. One is employed to power for the LCD circuit. The other Is used for the LED
backlight and LED Driver circuit.
Table 2. ELECTRICAL CHARACTERISTICS
ParameterSymbol
Circuit :
ILCDPower Input Current
ExtV
BR-B
Brightness Adjust for Back Light
ExtV
BR-B
Frequency
Pulse Duty Level
(PWM)
1. The specified current and power consumption are under the V
Note
High Level
Low Level
condition, and mosaic pattern(8 x 6) is displayed and f
Value
MaxTypMin
=12.0V, Ta=25 ± 2C, fV=60Hz
is the frame frequency.
V
LCD
2. The current is specified at the maximum current pattern.
3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).
4. ExtV
After Driver ON signal is applied, ExtV
After that, ExtV
signal have to input available duty range and sequence.
BR-B
1% and 100% is possible
BR-B
should be sustained from 5% to 100% more than 500ms.
BR-B
For more information, please see 3-6-2. Sequence for LED Driver.
5. Ripple voltage level is recommended under 5% of typical voltage
NoteUnit
VDC13.212.010.8VLCDPower Input Voltage
1mA698537-
2mA1170900-
1Watt8.46.4PLCDPower Consumption
3A3.0--IRUSHRush current
%100-5
%100-1
Hz8050/6040
Vdc3.6-2.5
Vdc0.8-0
On Duty
4
HIGH : on duty
LOW : off duty
White : 255 Gray
Black : 0 Gray
Mosaic Pattern(8 x 6)
Ver. 0.0
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Product Specification
Table 3. ELECTRICAL CHARACTERISTICS (Continue)
Values
ParameterSymbol
MinTypMax
LED Driver :
Power Supply Input VoltageVBL22.824.025.2Vdc1
UnitNotes
LC470EUN
Power Supply Input Current IBL
Power Supply Input Current (In-Rush)In-rush--5.0A
Power ConsumptionPBL-
Input Voltage for
Control System
Signals
LED :
Life Time30,00050,000Hrs2
On/Off
OnV on2.5-5.0Vdc
OffV off-0.30.00.7Vdc
-
3.0
72.879.5
3.3
A1
VBL = 22.8V
Ext VBR-B = 100%
3
W1
Notes :
1. Electrical characteristics are determined after the unit has been ON and stable for approximately 60
minutes at 252C. The specified current and power consumption are under the typical supply Input voltage
24Vand V
BR (ExtVBR-B : 100%), it is total power consumption.
2. The life time (MTTF) is determined as the time which luminance of the LED is 50% compared to that of initial
value at the typical LED current (ExtVBR-B :100%) on condition of continuous operating in LCM state at
252C.
3. The duration of rush current is about 200ms. This duration is applied to LED on time.
2
4. Even though inrush current is over the specified value, there is no problem if I
T spec of fuse is satisfied.
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Product Specification
3-2. Interface Connections
This LCD module employs two kinds of interface connection, 51-pin connector is used for the module
electronics and 14-pin connector is used for the integral backlight system.
3-2-1. LCD Module
- LCD Connector(CN1): FI-R51S-HF(manufactured by JAE) or compatible
- Mating Connector : FI-R51HL(JAE) or compatible
Table 4. MODULE CONNECTOR(CN1) PIN CONFIGURATION
LC470EUN
11
12
13
14
16
17
18
19
21
22
23
NCNo Connection (Note 4)1
GND
R1AN
R1AP
R1BN
R1CN
R1CP
GND
R1CLKN
GND
R1DN
R1DP
DescriptionSymbolNo
No Connection (Note 4)NC2
No Connection (Note 4)NC3
No Connection (Note 4)NC4
No Connection (Note 4)NC5
No Connection (Note 4)NC6
H =JEIDA , L or NC = VESA LVDS Select7
External PWM (from System)ExtVBR-B8
No Connection (Note 4)NC9
H = Enable , L or NC = Disable OPC Enable10
Ground
FIRST LVDS Receiver Signal (A-)
FIRST LVDS Receiver Signal (A+)
FIRST LVDS Receiver Signal (B-)
FIRST LVDS Receiver Signal (B+)R1BP15
FIRST LVDS Receiver Signal (C-)
FIRST LVDS Receiver Signal (C+)
Ground
FIRST LVDS Receiver Clock Signal(-)
FIRST LVDS Receiver Clock Signal(+)R1CLKP20
Ground
FIRST LVDS Receiver Signal (D-)
FIRST LVDS Receiver Signal (D+)
No connectionNC24
No connectionNC25
No Connection or GroundNC or GND26
No
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
-
Symbol
NC
R2AN
R2AP
R2BN
R2BP
R2CN
R2CP
GND
R2CLKN
R2CLKP
GND
R2DN
R2DP
NC
NC
NC or GND
NC or GND
GND
GND
GND
NC
VLCD
VLCD
VLCD
VLCD
-
Description
No connection
SECOND LVDS Receiver Signal (A-)
SECOND LVDS Receiver Signal (A+)
SECOND LVDS Receiver Signal (B-)
SECOND LVDS Receiver Signal (B+)
SECOND LVDS Receiver Signal (C-)
SECOND LVDS Receiver Signal (C+)
Ground
SECOND LVDS Receiver Clock Signal(-)
SECOND LVDS Receiver Clock Signal(+)
Ground
SECOND LVDS Receiver Signal (D-)
SECOND LVDS Receiver Signal (D+)
No connection
No connection
No Connection or Ground
No Connection or Ground
Ground (Note 6)
Ground
Ground
No connection
Power Supply +12.0V
Power Supply +12.0V
Power Supply +12.0V
Power Supply +12.0V
-
Note
1. All GND(ground) pins should be connected together to the LCD modules metal frame.
2. All V
LCD (power input) pins should be connected together.
3. All Input levels of LVDS signals are based on the EIA 644 Standard.
4. #1~#6 & #9 NC (No Connection): These pins are used only for LGD (Do not connect)
5. Specific pins(pin No. #10) are used for OPC function of the LCD module.
If not used, these pins are no connection. (Please see the Appendix VI for more information.)
6. Specific pin No. #44 is used for No signal detection of system signal interface.
It should be GND for NSB(No Signal Black) during the system interface signal is not.
If this pin is H, LCD Module displays AGP(Auto Generation Pattern).
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Product Specification
3-2-2. Backlight Module
Master
-LED Driver Connector
: 20022WR - H14B2(Yeonho) or Compatible
- Mating Connector
: 20022HS - 14B2 or Compatible
Table 5. LED DRIVER CONNECTOR PIN CONFIGURATION
Pin NoSymbolDescriptionNote
LC470EUN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
VBLPower Supply +24.0V
VBLPower Supply +24.0V
VBLPower Supply +24.0V
VBLPower Supply +24.0V
VBLPower Supply +24.0V
GND
GND
GND
GND
GND
StatusBack Light Status
ON/OFF
V
NC
NC
Backlight Ground
Backlight Ground
Backlight Ground
Backlight Ground
Backlight Ground
Backlight ON/OFF control
Dont care
Dont care
Notes : 1. GND should be connected to the LCD modules metal frame.
2. Normal : Low (under 0.7V) / Abnormal : Open
1
2
3
3. The impedance of pin #12 is over 50 [K].
Rear view of LCM
Status
PCB
1
14
1
14
<Master>
Ver. 0.0
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LC470EUN
Product Specification
3-3. Signal Timing Specifications
Table 6 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal
timings should be satisfied with the following specification for normal operation.
Table 6. TIMING TABLE (DE Only Mode)
ITEMSymbolMinTypMaxUnitNote
Horizontal
Vertical
Frequency
Display
Period
Blankt
Totalt
Display
Period
Blankt
Totalt
ITEMSymbolMinTypMaxUnitNote
DCLKf
Horizontalf
Verticalf
HV960960960tCLK1920 / 2
t
HB100140240tCLK1
HP106011001200tCLK
VV108010801080Lines
t
VB
VP
CLK63.0074.2578.00MHz
H57.367.570KHz2
V
20
(228)
1100
(1308)
57
(47)
45
(270)
1125
(1350)
60
(50)
69
(300)
1149
(1380)
63
(53)
Lines1
Lines
Hz
NTSC
(PAL)
2
Note: 1. The input of HSYNC & VSYNC signal does not have an effect on normal operation (DE Only Mode).
If you use spread spectrum of EMI, add some additional clock to minimum value for clock margin.
2. The performance of the electro-optical characteristics may be influenced by variance of the vertical
refresh rate and the horizontal frequency
Timing should be set based on clock frequency.
Ver. 0.0
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3-4. LVDS Signal Specification
3-4-1. LVDS Input Signal Timing Diagram
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LC470EUN
Product Specification
DE, Data
DCLK
First data
Second data
0.7VDD
0.3VDD
tCLK
DE(Data Enable)
0.5 VDD
Invalid data
Invalid data
Valid data
Pixel 0,0
Valid data
Pixel 1,0
Pixel 2,0
Pixel 3,0
Invalid data
Invalid data
tHV
DE(Data Enable)
Ver. 0.0
tHP
11080
tVV
tVP
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3-4-2. LVDS Input Signal Characteristics
1) DC Specification
LVDS -
LVDS +
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LC470EUN
Product Specification
0V
#VCM={(LVDS +) + ( LVDS -)}/2
DescriptionSymbolMinMaxUnitNote
LVDS Common mode VoltageV
LVDS Input Voltage RangeV
Change in common mode Voltage
2) AC Specification
LVDS Clock
A
LVDS Data
(F
T
LVDS 1st Clock
tSKEW
tSKEW
V
IN _ MAXVIN _ MIN
CM
IN
V
CM
1.01.5V-
0.71.8V-
VCM-250mV-
T
clk
=1/T
clk
)
clk
A
clk
80%
LVDS 2nd/3rd/4thClock
t
SKEW_mintSKEW_max
DescriptionSymbolMinMaxUnitNote
High Threshold
LVDS Differential Voltage
Low Threshold
LVDS Clock to Data Skewt
LVDS Clock/DATA Rising/Falling timet
Effective time of LVDSt
LVDS Clock to Clock Skew (Even to Odd)t
Note
1. All Input levels of LVDS signals are based on the EIA 644 Standard.
2. If t
isnt enough, t
RF
should be meet the range.
eff
3. LVDS Differential Voltage is defined within t
Ver. 0.0
V
TH
V
TL
SKEW
RF
eff
SKEW_EO
100600mV
-600-100mV
-|(0.2*T
260|(0.3*T
)/7|ps-
clk
)/7|ps2
clk
|360|-ps-
-|1/7* T
eff
|ps-
clk
20%
t
RF
3
11 /38
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