LG Display LC470EUF-LDC6 Specification
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LC470EUF
Product Specification
SPECIFICATION
FOR
APPROVAL
)
(
(
Preliminary Specification
)
Final Specification
Title 47.0” WUXGA TFT LCD
BUYER LGE
MODEL
APPROVED BY
/
/
SIGNATURE
DATE
SUPPLIER L&T Display Technology., Ltd.
*MODEL LC470EUF
SUFFIX LDC6 (RoHS Verified)
*When you obtain standard approval,
please use the above model name without suffix
APPROVED BY
/ Team Leader
REVIEWED BY
Y. H Choi / Project Leader
SIGNATURE
DATE
PREPARED BY
/
Please return 1 copy for your confirmation with
your signature and comments.
Ver. 1.0
/ Engineer
R&D Dept.
L&T Display Technology., Ltd
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LC470EUF
Product Specification
CONTENTS
Number
1
2
3
3-1
3-2
3-3
3-4
3-5
3-6
4
5
ITEM
COVER 1
CONTENTS
RECORD OF REVISIONS
GENERAL DESCRIPTION
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
INTERFACE CONNECTIONS
SIGNAL TIMING SPECIFICATIONS
SIGNAL TIMING WAVEFORMS
COLOR DATA REFERENCE
POWER SEQUENCE
OPTICAL SPECIFICATIONS
MECHANICAL CHARACTERISTICS
Page
2
3
4
5
6
6
8
11
12
15
16
17
23
6
6-1
7
7-1
7-2
7-3
7-4
7-5
7-6
7-7 OPERATING CONDIDITON GUIDE
Ver. 1.0
INTERNATIONAL STANDARDS
ENVIRONMENT
PRECAUTIONS
MOUNTING PRECAUTIONS
OPERATING PRECAUTIONS
ELECTROSTATIC DISCHARGE CONTROL
PRECAUTIONS FOR STRONG LIGHT EXPOSURE
STORAGE
HANDLING PRECAUTIONS FOR PROTECTION FILM
26
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27
27
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Revision No. Revision Date Page Description
0.1 Apr, 26, 2011 - Preliminary Specification
0.2 Jun, 09, 2011 23,24 Update Mechanical Drawing
1.0 Aug, 08, 2011 3 Update General Features
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LC470EUF
Product Specification
RECORD OF REVISIONS
22 Update Mechanical Characteristics
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1. General Description
The LC470EUF is a Color Active Matrix Liquid Crystal Display with an integral Light Emitting Diode (LED)
backlight system. The matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive type display operating in the normally black mode. It has a 46.96inch diagonally measured
active display area with WUXGA resolution (1080 vertical by 1920 horizontal pixel array).
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical stripes.
Gray scale or the luminance of the sub-pixel color is determined with a 8-bit gray scale signal for each dot.
Therefore, it can present a palette of more than 16.7M(true) colors.
It is intended to support LCD TV, PCTV where high brightness, super wide viewing angle, high color gamut,
high color depth and fast response time are important.
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LC470EUF
Product Specification
LVDS
CN2
(41pin)
2Port
LVDS 3,4
LVDS
CN1
(51pin)
LVDS 1,2
Option
signal
I2C
2Port
LVDS
Select
Bit
Select
+12.0V
LED Anode
LED Cathode
General Features
Active Screen Size
Outline Dimension
Pixel Pitch
Pixel Format
Color Depth
Luminance, White
Viewing Angle (CR>10)
EEPROM
SCL
SDA
Timing Controller
LVDS Rx + DGA + ODC
Integrated
Power Circuit
Block
CN1 (12pin)
CN2 (13pin)
46.96 inch (1192.78mm) diagonal
1079.0(H) x 625.0 (V) x 10.8(B) / 21.0 mm (D) (Typ.)
0.5415 mm x 0.5415 mm x RGB
1920 horiz. by 1080 vert. Pixels, RGB stripe arrangement
10Bit(D), 1.06 Billion colors
400 cd/m2 (Center 1point ,Typ.)
Viewing angle free ( R/L 178 (Min.), U/D 178 (Min.))
Mini-LVDS(RGB)
Control
Signals
Power Signals
Source Driver Circuit
S1 S1920
G1
TFT - LCD Panel
(1920 Ý RGB Ý 1080 pixels)
[Gate In Panel]
G1080
H : 2Block
V : 8Block
Local Dimming : 16 Block
Power Consumption
Weight
Display Mode
Surface Treatment
Total 90W(Typ.) [Logic= 8.0W, Backlight=82W (ExtVbr_B=100% )]
12.4 Kg
Transmissive mode, Normally black
Hard coating(2H), Anti-glare treatment of the front polarizer (Haze 10%)
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2. Absolute Maximum Ratings
The following items are maximum values which, if exceeded, may cause faulty operation or permanent damage
to the LCD module.
Table 1. ABSOLUTE MAXIMUM RATINGS
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LC470EUF
Product Specification
Value
Parameter Note
Symbol
Unit
MaxMin
Power Input Voltage
Note
1. Ambient temperature condition (Ta =
VLCDLCD Circuit
VFLED Input Voltage
VLOGICT-Con Option Selection Voltage
25 r 2 ¶C )
+14.0-0.3
+180.0-
+4.0-0.3
VDC
VDC+ 27.0-0.3VBLDriver
VDC
VDC
2. The maximum operating temperatures is based on the test condition that the surface temperature
of display area is less than or equal to 68¶C with LCD module alone in a temperature controlled chamber.
Thermal management should be considered in final product design to prevent the surface temperature of
display area from being over 68. The range of operating temperature may be degraded in case of
improper thermal management in final product design.
1
¶C+68-TSURPanel Front Temperature
2
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3. Electrical Specifications
3-1. Electrical Characteristics
It requires two power inputs. One is employed to power for the LCD circuit. The other Is used for the LED
backlight and LED Driver circuit.
Table 2. ELECTRICAL CHARACTERISTICS
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LC470EUF
Product Specification
Parameter Symbol
Value
MaxTypMin
Circuit :
ILCDPower Input Current
Note
1. The specified current and power consumption are under the V
condition, and mosaic pattern(8 x 6) is displayed and f
is the frame frequency.
V
=12.0V, Ta=25 r 2¶C, fV=120Hz
LCD
2. The current is specified at the maximum current pattern.
3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).
White : 1023 Gray
Black : 0 Gray
NoteUnit
VDC13.212.010.8VLCDPower Input Voltage
1mA871670-
2mA1261970-
1Watt10.58.04-PLCDPower Consumption
3A5.0--IRUSHRush current
Mosaic Pattern(8 x 6)
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Table 3. ELECTRICAL CHARACTERISTICS (Continue)
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LC470EUF
Product Specification
Parameter Symbol
Values
Unit Note
Min Typ Max
Backlight Assembly :
Forward Current
(one array)
Forward Voltage V
Forward Voltage Variation V
Power Consumption P
Burst Dimming Duty On duty
Burst Dimming Frequency 1/T
LED Array : (APPENDIX-V)
Life Time 30,000 50,000 Hrs 7
The design of the LED driver must have specifications for the LED array in LCD Assembly.
Note :
Anode I
Cathode I
F (anode)
F (cathode)
F
F
BL
ࣱࣵ ࣭࣬࣬ ࣱ࣭࣬
ࣰࣰࣲ࣪ ࣱ࣭࣮࣪ ࣱࣲ
ࣰ࣮ࣳ࣪ ࣭ࣴ࣪ࣵ ࣲࣴࣵ࣪
࣭࣬ ࣩ ࣭࣬࣬
ࣱࣵ ࣭࣮ࣴ
ࣰ࣬࣬
࣭࣪ࣳ
mAdc
mAdc
Vdc 4
Vdc 5
W 6
%
Hz 8
The electrical characteristics of LED driver are based on Constant Current driving type.
The performance of the LED in LCM, for example life time or brightness, is extremely influenced by the
characteristics of the LED Driver. So, all the parameters of an LED driver should be carefully designed.
When you design or order the LED driver, please make sure unwanted lighting caused by the mismatch of the
LED and the driver (no lighting, flicker, etc) has never been occurred. When you confirm it, the LCD–
Assembly should be operated in the same condition as installed in your instrument.
1. Electrical characteristics are based on LED Array specification.
2. Specified values are defined for a Backlight Assembly. (IBL : 2 LED array, 150mA/LED array)
3. Each LED array has 2 anode terminal and 8 cathode terminals.
The forward current(I
) of the anode terminal is 400mA and it supplies 100mA into 4 strings, respectively
F
8 (LED Package / 1string)
·5%
2, 3
Anode
4. The forward voltage (V
5. ȟV
means Max VF-Min VFin one Backlight. So VFvariation in a Backlight isn’t over Max. 1.7V
F
¶¶¶
¶¶¶
¶¶¶
¶¶¶
) of LED array depends on ambient temperature (Appendix-V)
F
Cathode #1
Cathode #2
8 (LED String / 1 Array)
Cathode #8
6. Maximum level of power consumption is measured at initial turn on.
Typical level of power consumption is measured after 1hrs aging at 25 r 2¶C.
7. The life time (MTTF) is determined as the time at which brightness of the LED is 50% compared to that of
initial value at the typical LED current on condition of continuous operating at 25 r 2¶C, based on duty 100%.
8. The reference method of burst dimming duty ratio.
It is recommended to use synchronous V-sync frequency to prevent waterfall
(Vsync x 1 =Burst Frequency)
Though PWM frequency is over 182Hz (max252Hz), function of backlight is not affected.
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Product Specification
3-2. Interface Connections
This LCD module employs two kinds of interface connection, 51-pin connector and 41-pin connector are used
for the module electronics and 12-pin,13-pin connectors are used for the integral backlight system.
3-2-1. LCD Module
- LCD Connector(CN1): FI-RE51S-HF(manufactured by JAE)
Refer to below and next Page table
- Mating Connector : FI-R51HL(JAE) or compatible
Table 4-1. MODULE CONNECTOR(CN1) PIN CONFIGURATION
LC470EUF
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
NC or GND
NC
NC
NC
NC
NC
LVDS Select
NC
NC
GND
R1AN
R1AP
R1BN
R1BP
R1CN
R1CP
GND
R1CLKN
R1CLKP
GND
R1DN
R1DP
R1EN
R1EP
NC or GND
DescriptionSymbolNo
No Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4)
‘H’ =JEIDA , ‘L’ or NC = VESA
No Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4)NC
Ground
FIRST LVDS Receiver Signal (A-)
FIRST LVDS Receiver Signal (A+)
FIRST LVDS Receiver Signal (B-)
FIRST LVDS Receiver Signal (B+)
FIRST LVDS Receiver Signal (C-)
FIRST LVDS Receiver Signal (C+)
Ground
FIRST LVDS Receiver Clock Signal(-)
FIRST LVDS Receiver Clock Signal(+)
Ground
FIRST LVDS Receiver Signal (D-)
FIRST LVDS Receiver Signal (D+)
FIRST LVDS Receiver Signal (E-)
FIRST LVDS Receiver Signal (E+)
No Connection or Ground
No
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
-
Symbol
Bit Select
R2AN
R2AP
R2BN
R2BP
R2CN
R2CP
GND
R2CLKN
R2CLKP
GND
R2DN
R2DP
R2EN
R2EP
NC or GND
NC or GND
GND
GND
GND
NC
VLCD
VLCD
VLCD
VLCD
-
Description
‘H’ or NC= 10bit(D) , ‘L’ = 8bit
SECOND LVDS Receiver Signal (A-)
SECOND LVDS Receiver Signal (A+)
SECOND LVDS Receiver Signal (B-)
SECOND LVDS Receiver Signal (B+)
SECOND LVDS Receiver Signal (C-)
SECOND LVDS Receiver Signal (C+)
Ground
SECOND LVDS Receiver Clock Signal(-)
SECOND LVDS Receiver Clock Signal(+)
Ground
SECOND LVDS Receiver Signal (D-)
SECOND LVDS Receiver Signal (D+)
SECOND LVDS Receiver Signal (E-)
SECOND LVDS Receiver Signal (E+)
No Connection or Ground
No Connection or Ground
Ground
Ground
Ground
No connection
Power Supply +12.0V
Power Supply +12.0V
Power Supply +12.0V
Power Supply +12.0V
-
Note
1. All GND(ground) pins should be connected together to the LCD module’s metal frame.
2. All V
LCD (power input) pins should be connected together.
3. All Input levels of LVDS signals are based on the EIA 644 Standard.
4. #1~#6 & #8~#10 NC (No Connection): These pins are used only for LGD (Do not connect)
5. LVDS pin (pin No. #24,25,40,41) are used for 10Bit(D) of the LCD module.
If used for 8Bit(R), these pins are no connection.
6. Specific pin No. #44 is used for “No signal detection” of system signal interface.
It should be GND for NSB(No Signal Black) during the system interface signal is not.
If this pin is “H”, LCD Module displays AGP(Auto Generation Pattern).
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-LCD Connector (CN2) : FI-RE41S-HF (manufactured by JAE)
- Mating Connector : FI-RE41HL or compatible
Table 4-2. MODULE CONNECTOR(CN2) PIN CONFIGURATION
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LC470EUF
Product Specification
10
11
12
14
15
16
17
19
20
21
DescriptionSymbolNo
NC
2
3
5
6
7
8
9
NC
NC
NC4
NC
NC
NC
NC
GND
RA3N
RA3P
RB3N
RB3P13
RC3N
RC3P
GND
RCLK3N
RCLK3P18
GND
RD3N
RD3P
No connection1
No connection
No connection
No connection
No connection
No connection
No connection
No connection
Ground
THIRD LVDS Receiver Signal (A-)
THIRD LVDS Receiver Signal (A+)
THIRD LVDS Receiver Signal (B-)
THIRD LVDS Receiver Signal (B+)
THIRD LVDS Receiver Signal (C-)
THIRD LVDS Receiver Signal (C+)
Ground
THIRD LVDS Receiver Clock Signal(-)
THIRD LVDS Receiver Clock Signal(+)
Ground
THIRD LVDS Receiver Signal (D-)
THIRD LVDS Receiver Signal (D+)
No
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
-
Symbol
RE3N
RE3P
GND
GND
RA4N
RA4P
RB4N
RB4P
RC4N
RC4P
GND
RCLK4N
RCLK4P
GND
RD4N
RD4P
RE4N
RE4P
GND
GND
THIRD LVDS Receiver Signal (E-)
THIRD LVDS Receiver Signal (E+)
Ground
Ground
FORTH LVDS Receiver Signal (A-)
FORTH LVDS Receiver Signal (A+)
FORTH LVDS Receiver Signal (B-)
FORTH LVDS Receiver Signal (B+)
FORTH LVDS Receiver Signal (C-)
FORTH LVDS Receiver Signal (C+)
Ground
FORTH LVDS Receiver Clock Signal(-)
FORTH LVDS Receiver Clock Signal(+)
Ground
FORTH LVDS Receiver Signal (D-)
FORTH LVDS Receiver Signal (D+)
FORTH LVDS Receiver Signal (E-)
FORTH LVDS Receiver Signal (E+)
Ground
Ground
Description
Note : 1. All GND(ground) pins should be connected together to the LCD module’s metal frame.
2. LVDS pin (pin No. #22,23,38,39) are used for 10Bit(D) of the LCD module.
If used for 8Bit(R), these pins are no connection.
#1 #51 #1 #41
#1 #51
CN1 CN2
CN1 CN2
#1 #41
Rear view of LCM
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3-2-2. Backlight Module
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LC470EUF
Product Specification
[ CN201 ]
1) LED Array Assy Connector (Plug)
: 20022HS-13B2(BK) (manufactured by Yeonho) or equivalent
2) Mating Connector (Receptacle)
: 20022WR-13BD (manufactured by Yeonho) or equivalent
[ CN202 ]
1) LED Array Assy Connector (Plug)
: 20022HS-12B2 (manufactured by Yeonho) or equivalent
2) Mating Connector (Receptacle)
: 20022WR-12BD (manufactured by Yeonho )or equivalent
Table 5. BACKLIGHT CONNECTOR PIN CONFIGURATION(CN201,CN202)
No Symbol
1
2
3
4
5
6
7
8
9
10
11
12
13
Anode_L1
(1~4Cathode)
N.C
L1 Cathode
L2 Cathode
L3 Cathode
L4 Cathode
N.C
L5 Cathode
L6 Cathode
L7 Cathode
L8 Cathode
N.C
Anode_L2
(5~8Cathode)
Description
LED Input Current
Open
LED Output Current
LED Output Current
LED Output Current
LED Output Current
Open
LED Output Current
LED Output Current
LED Output Current
LED Output Current
Open
LED Input Current
Note
No Symbol
1
2
3
4
5
6
7
8
9
10
11
12
Anode_R2
(5~8Cathode)
N.C
R8Cathode
R7 Cathode
R6 Cathode
R5 Cathode
R4 Cathode
R3 Cathode
R2 Cathode
R1 Cathode
N.C
Anode_R1
(1~4Cathode)
Description
LED Input Current
Open
LED Output Current
LED Output Current
LED Output Current
LED Output Current
LED Output Current
LED Output Current
LED Output Current
LED Output Current
Open
LED Input Current
Note
Rear view of LCM
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13pin 12pin
1
{T
1
CN202CN201
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3-3. Signal Timing Specifications
Table 6 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal
timings should be satisfied with the following specification for normal operation.
Table 6. TIMING TABLE (DE Only Mode)
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LC470EUF
Product Specification
Symbol
Display
Period
Horizontal
Vertical 1Lines
Frequency
Blank
Total
Display
Period
DCLK
Horizontal
Vertical
tHV
tHB
t
HP
VV
t
VBBlank
t
VPTotal
fCLK
fH
f
V
20
(228)
1100
(1308)
108
(95)
45
(270)
1125
(1350)
120
(100)
86
(300)
1166
(1380)
122
(104)
tCLK680550520
Lines108010801080t
Lines
MHz78.0074.2566.97
Hz
NoteUnitMaxTypMinITEM
1920 / 4tCLK480480480
1tCLK2007040
NoteUnitMaxTypMinSymbolITEM
2KHz140135121.8
2
NTSC: 108~122Hz
(PAL : 95~104Hz)
Note: 1. The input of HSYNC & VSYNC signal does not have an effect on normal operation (DE Only Mode).
If you use spread spectrum of EMI, add some additional clock to minimum value for clock margin.
2. The performance of the electro-optical characteristics may be influenced by variance of the vertical
refresh rate and the horizontal frequency
Timing should be set based on clock frequency.
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3-4. LVDS Signal Specification
3-4-1. LVDS Input Signal Timing Diagram
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LC470EUF
Product Specification
DCLK
First data
Second data
Third data
Forth data
DE(Data Enable)
tCLK
0.5 VDD
Invalid data
Invalid data
Invalid data
Invalid data
DE, Data
Valid data
Pixel 0
Valid data
Pixel 1
Valid data
Pixel 2
Valid data
Pixel 3
Pixel 4
Pixel 5
Pixel 6
Pixel 7
0.7VDD
0.3VDD
Invalid data
Invalid data
Invalid data
Invalid data
DE(Data Enable)
Ver. 1.0
* tHB = tHFP + tWH +tHBP
* tVB = tVFP + tWV +tVBP
1 1080
tVV
tVP
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