LG Display LC420WXE-SBA1 Specification

LC420WXE
Product Specification
SPECIFICATION
FOR
APPROVAL
)
(
(
Preliminary Specification
)
Final Specification
42.0” WXGA TFT LCDTitle
MODEL
APPROVED BY
/
/
/
GeneralBUYER
SIGNATURE
DATE
LG.Display Co., Ltd.SUPPLIER
LC420WXE*MODEL
SBA1 (RoHS Verified)SUFFIX
*When you obtain standard approval,
APPROVED BY
J. T Kim / Team Leader
REVIEWED BY
Y. H Choi / Project Leader
PREPARED BY
Y. D Lee / Engineer
SIGNATURE
DATE
Please return 1 copy for your confirmation with
your signature and comments.
Ver. 1.0
TV Products Development Dept.
LG. Display LCD Co., Ltd
1 / 37
Product Specification
CONTENTS
LC420WXE
PageItemNumber
COVER
CONTENTS
RECORD OF REVISIONS
GENERAL DESCRIPTION1
ABSOLUTE MAXIMUM RATINGS2
ELECTRICAL SPECIFICATIONS3
ELECTRICAL CHARACTERISTICS3-1
INTERFACE CONNECTIONS3-2
SIGNAL TIMING SPECIFICATIONS3-3
SIGNAL TIMING WAVEFORMS3-4
COLOR INPUT DATA REFERENCE3-5
POWER SEQUENCE3-6
OPTICAL SPECIFICATIONS4
MECHANICAL CHARACTERISTICS5
RELIABILITY6
INTERNATIONAL STANDARDS7
1
2
3
4
5
6
6
10
12
13
14
15
16
20
23
24
Ver. 1.0
SAFETY7-1
EMC7-2
PACKING8
DESIGNATION OF LOT MARK8-1
PACKING FORM8-2
PRECAUTIONS9
MOUNTING PRECAUTIONS9-1
OPERATING PRECAUTIONS9-2
ELECTROSTATIC DISCHARGE CONTROL9-3
PRECAUTIONS FOR STRONG LIGHT EXPOSURE9-4
STORAGE9-5
HANDLING PRECAUTIONS FOR PROTECTION FILM9-6
24
24
25
25
25
26
26
26
27
27
27
27
2 / 37
Product Specification
RECORD OF REVISIONS
CAS Version 0.0 Release -Jun, 25, 20080.0
Update Haze % for Front Polarizer4Sep, 10, 20080.1
Update Optical Characteristics ( Color Coordinates , G-to-G )16,17
Update Mechanical Drawing for Rear view ( Guide Lamp added)22
Update Appendix VI for LVDS Characteristics-Sep, 20, 20080.2
Update Mechanical Drawings for front and rear view21-22Jan, 07, 20091.0
Final Specification
LC420WXE
DescriptionPageRevision DateRevision No.
Ver. 1.0
3 / 37
LC420WXE
Product Specification
1. General Description
The LC420WXE is a Color Active Matrix Liquid Crystal Display with an integral External Electrode Fluorescent Lamp(EEFL) backlight system. The matrix employs a-Si Thin Film Transistor as the active element. It is a transmissive type display operating in the normally black mode. It has a 42.0 inch diagonally measured ac t i ve d is p la y ar e a w i th W XG A r es o lu t i o n (7 68 ve rt ica l b y 1 366 h or i zo n ta l p ix el a r ra y) . Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical stripes. Gray scale or the luminance of the sub-pixel color is determined with a 8-bit gray scale signal for each dot, thus presenting a palette of more than 16.7M(true) colors. It has been designed to apply the 8-bit 1-port LVDS interface. It is intended to support LCD TV, PCTV where high brightness, super wide viewing angle, high color gamut, high color depth and fast response time are important.
+12.0V
5pair
LVDS 1Port
LVDS Select
OPC_Enable
OPC out
ExtVBR-B
High Input
High Input
#9
#10
#27
#28
CN5
(30pin)
General Features
EEPROM
(LUT)
SCL
SDRAM
LVDS Rx (Receiver)
DCR & ODC Controller
Timing Controller
Power Circuit
Block
CN2, 3pin, 18 Lamps/@135 mA
CN2, 3pin, 18 Lamps/@135 mA
42.02 inches(1067.308mm) diagonalActive Screen Size
983 mm(H) x 576 mm(V) x 46.0 mm(D) including T-CON Cover Shield (Typ.)Outline Dimension
0.227mm x 0.681mm x RGBPixel Pitch
1366 horiz. by 768 vert. Pixels RGB stripe arrangementPixel Format
8-bit, 16.7 M colorsColor Depth
500 cd/m2 (Center 1-point) (Typ.)Luminance, White
Viewing Angle Free ( R/L 178 (Typ.), U/D 178 (Typ))Viewing Angle (CR>10)
Total 158.3W (Typ.) (Logic=4.3W, Backlight=154W @ with Inverter )Power Consumption
10.0 (Typ.) Weight
Transmissive mode, Normally blackDisplay Operating Mode
SDA
Mini-LVDS(RGB)
G1
Gate Driver Circuit
G768
Source Driver Circuit
S1 S1366
TFT - LCD Panel
(1366 × RGB × 768 pixels)
Back light Assembly
Ver. 1.0
Hard coating(663H), Anti-glare treatment of the front polarizer (Haze 10%)Surface Treatment
4 / 37
LC420WXE
Product Specification
2. Absolute Maximum Ratings
The following items are maximum values which, if exceeded, may cause faulty operation or damage to the LCD module.
Table 1. ABSOLUTE MAXIMUM RATINGS
Value
Parameter Remark
Symbol
Unit
MaxMin
Power Input Voltage
B/L Input voltage
Operating Voltage (one side)
V [RMS]1100700VOP
°C+500TOPOperating Temperature
°C+60-20TSTStorage Temperature
%RH9010HOPOperating Ambient Humidity
%RH9010HSTStorage Humidity
Note 1. Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be 39 °C Max, and no condensation of water.
2. Gravity mura can be guaranteed under 40 °C condition.
90%
60
60%
at 25 ± 2 °CV [DC]+14.0+8.0VLCDLCD circuit
at 25 ± 2 °C
Burst Dimming Duty 100%
Page 9 #9 pin+3.6V-0.3VVIOption Input Voltage ( LVDS Select )
Note 1
Ver. 1.0
Wet Bulb Temperature [°C]
20
10
0
10 20 30 40 50 60 70 800-20 Dry Bulb Temperature [°C]
30
40
50
40%
10%
Storage
Operation
Humidity [(%)RH]
5 / 37
LC420WXE
Product Specification
3. Electrical Specifications
3-1. Electrical Characteristics
It requires two power inputs. One is employed to power for the LCD circuit. The other input power for the EEFL Backlight.
Table 2. ELECTRICAL CHARACTERISTICS
Parameter Symbol
Value
Circuit :
ILCDPower Input Current
Note : 1. The specified current and power consumption are under the V
condition whereas mosaic pattern(8 x 6) is displayed and fVis the frame frequency.
2. The current is specified at the maximum current pattern.
3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).
White : 255Gray Black : 0Gray
MaxTypMin
V [DC]12.612.011.4VLCDPower Input Voltage
=12.0V, 25 ± 2°C, fV=60Hz
LCD
NoteUnit
1mA465358-
2mA598460-
1Watt5.584.30PLCDPower Consumption
3A3.0--IRUSHRush current
Ver. 1.0
Mosaic Pattern(8 x 6)
6 / 37
Product Specification
Table 3. ELECTRICAL CHARACTERISTICS of Back Light Assembly & Lamp (Continue)
LC420WXE
Parameter Symbol
Values
NotesUnit
MaxTypMin
Backlight Assembly :
Operating Voltage
(one side,fBL=63KHz,IBL= 135mArms)
Operating Current (one side)
Established Starting Voltage (one side)
0 25
Parameter Symbol
VS
Values
1100950800VBL
144135126IBL
1200-
1000-
RMS
RMS
RMS
1, 2V
1mA
1, 3V
4kHz646260fBLOperating Frequency
3sec1.5--S TIMEStriking Time
6Watt154PBLPower Consumption
9%10020PWM dutyBurst Dimming Duty
9Hz182-981/TBurst Dimming Frequency
NotesUnit
MaxTypMin
Lamp : (APPENDIX-VI)
1, 2V
1mA
1, 5Min3--TSDischarge Stabilization Time
1, 3V
7Hrs50,000Life Time
Established Starting Voltage (one side)
10501000850VLAMPLamp Voltage (one side)
87.53ILAMPLamp Current (one side)
VS0
VS25
1200
1000
RMS
RMS
KHz806540f LAMPLamp Frequency
°C130TLAMPLamp Temperature
RMS
Note : The design of the inverter must have specifications for the lamp in LCD Assembly.
The electrical characteristics of inverter are based on High-High Driving type.
The performance of the lamps in LCM, for example life time or brightness, is extremely influenced by
the characteristics of the DC-AC inverter. So, all the parameters of an inverter should be carefully
designed so as not to produce too much leakage current from high-voltage output of the inverter.
When you design or order the inverter, please make sure unwanted lighting caused by the mismatch
of the lamp and the inverter (no lighting, flicker, etc) has never been occurred. When you confirm it,
the LCD– Assembly should be operated in the same condition as installed in your instrument.
Do not attach a conductive tape to lamp connecting wire.
If you attach conductive tape to the lamp wire, not only luminance level can be lower than typical one but also inverter operate abnormally on account of leakage current which is generated between lamp wire and conductive tape.
1. Specified values are defined for a Backlight Assembly.( IBL : 18 lamp, 7.5mA/Lamp)
2. Operating voltage is measured at 25 ± 2°C(after 2hr.aging). The variance range for operating voltage is ± 10%.
3. The established starting voltage [ VS ] should be applied to the lamps for more than Striking time (S TIME) for start-up. Inverter open voltage must be more than established starting voltage. Otherwise, the lamps may not be turned on. The used lamp current is typical value.
Ver. 1.0
7 / 37
LC420WXE
Product Specification
Vpk-pk
S TIME
Vs = (Vpk-pk) / [ 2*root(2)]
4. Lamp frequency may produce interference with horizontal synchronous frequency.As a result this may cause beat on the display. Therefore, lamp frequency shall be away as much as possible from the horizontal
synchronous frequency and its harmonics range in order to prevent interference.
There is no reliability problem of lamp, if use out of range of operation frequency (40 kHz~80 kHz) on CAS
5. The brightness of the lamp after lighted for 5minutes is defined as 100%.
TSis the time required for the brightness of the center of the lamp to be not less than 95% at typical current.
The screen of LCD module may be partially dark by the time the brightness of lamp is stable after turn on.
6. Maximum level of power consumption is measured at initial turn on. Typical level of power consumption is measured after 2hrs aging at 25 ± 2°C.
7. The life time is determined as the time at which brightness of the lamp is 50% compared to that of initial
value at the typical lamp current on condition of continuous operating at 25 ± 2°C, based on duty 100%.
8.The output of the inverter must have symmetrical(negative and positive) voltage and current waveform
(Unsymmetrical ratio is less than 10%). Please do not use the inverter which has not only unsymmetrical
voltage and current but also spike wave. Requirements for a system inverter design, which is intended to achieve better display performance,
power efficiency and more reliable lamp characteristics. It can help increase the lamp lifetime and reduce leakage current.
a. The asymmetry rate of the inverter waveform should be less than 10%. b. The distortion rate of the waveform should be within 2 ±10%.
* Inverter output waveform had better be more similar to ideal sine wave.
Ver. 1.0
I p
I -p
* Asymmetry rate:
| I p– I –p| / Iopx 100%
* Distortion rate
I p(or I –p) / I
op
8 / 37
Product Specification
9. The reference method of burst dimming duty ratio. It is recommended to use synchronous V-sync frequency to prevent waterfall (Vsync x 2 =Burst Frequency) Though PWM frequency is over 182Hz (max252Hz), function of backlight is not affected.
T
A
PWM
Output of Inverter to Lamp
90%
LC420WXE
+3.3V TTL
I-out
PWM duty={ A/T } * 100
Point A : rising time 90% of Iout point . Point B : falling starting point . I out duty = { a/T } * 100 PWM Frequency = 1/T
We recommend not to be much different between PWM duty and Iout duty .Dimming current output rising and falling time may produce humming and inverter trans’ sound noise.Burst dimming duty should be 100% for more than 1second after turn on.Equipment
Oscilloscope :TDS3054B(Tektronix) Current Probe : P6022 AC (Tektronix) High Voltage Probe: P5100(Tektronix)
11. The operating current must be measured as near as backlight assembly input.
Point A
a
Point B
12. The operating current unbalance between left and right must be under 10% of Typical current
Left(Master) current – Right(Slave) Current│ 〈 10% of typical current
Ver. 1.0
9 / 37
LC420WXE
Product Specification
3-2. Interface Connections
This LCD module employs two kinds of interface connection, a 30-pin connector is used for the module electronics and 14-pin connector is used for the integral backlight system.
3-2-1. LCD Module
- LCD Connector(CN5) : FI-X30SSL-HF (Manufactured by JAE) or IS100-L30B-C23(Manufactured by UJU)
- Mating Connector : FI-X30C2L (Manufactured by JAE) or Equivalent
Table 4. MODULE CONNECTOR(CN5) PIN CONFIGURATION
NoteDescriptionSymbolPin No.
Power Supply +12.0V
Power Supply +12.0V Power Supply +12.0V Power Supply +12.0V
GroundGND
GroundGND GroundGND GroundGND
‘H’ =JEIDA , ‘L’ or NC = VESA LVDS Select
‘H’ = Enable , ‘L’ = Disable GroundGND LVDS Receiver Signal(-)RA­LVDS Receiver Signal(+)RA+ GroundGND LVDS Receiver Signal(-)RB­LVDS Receiver Signal(+)RB+ GroundGND LVDS Receiver Signal(-)RC­LVDS Receiver Signal(+)RC+ GroundGND LVDS Receiver Clock Signal(-)RCLK­LVDS Receiver Clock Signal(+)RCLK+ GroundGND LVDS Receiver Signal(-)RD­LVDS Receiver Signal(+)RD+
GroundGND
OPC output (From LCM)OPC OUT
External VBR (From System)
GroundGND GroundGND
Appendix V, VII
Appendix V
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
26
27
28
29 30
1
2 3 4
5
6 7 8
9
VLCD VLCD VLCD VLCD
OPC_Enable
Ext VBR-B
Notes :
Ver. 1.0
1. All GND(ground) pins should be connected together to the LCD module’s metal frame.
2. All VLCD (power input) pins should be connected together.
3. All Input levels of LVDS signals are based on the EIA 644 Standard.
4. Specific pins(pin No. #10, #27~#28) are used for OPC function of the LCD module.
If not used, these pins are no connection. (Please see the Appendix V for more information.)
5. Specific pin No. #30 is used for “No signal detection” of system signal interface.
It should be GND for NSB(No Signal Black) during the system interface signal is not.
If this pin is “H”, LCD Module displays AGP(Auto Generation Pattern).
10 / 37
3-2-2. Backlight Module
LC420WXE
Product Specification
[ Master ]
1) Balance Connector
: 65002WS-03 (manufactured by YEONHO)or equivalent
2) Mating Connector
: 65002HS-03 (manufactured by YEONHO) or equivalent.
[ Slave ]
1) Balance Connector
: 65002WS-03 (manufactured by YEONHO)or equivalent
2) Mating Connector
: 65002HS-03 (manufactured by YEONHO) or equivalent.
Table 5. BACKLIGHT CONNECTOR PIN CONFIGURATION(CN2,CN3)
SymbolNo
H_Input
H_Input
FB
Master
High_Input2
NC3
Slave
High_InputHigh_Input 1
High_Input
NC
◆◆◆◆ Rear view of LCM
123
1
2 3
Master
Slave
Note
[ Note ]
1. LGD recommends that Inverter Burst dimming frequency (PWM Frequency) should be synchronized with Sync signal.
2. LGD recommends that Inverter Burst dimming frequency (PWM Frequency) should be 100Hz or 120Hz
in terms of waterfall noise.
Ver. 1.0
11 / 37
LC420WXE
Product Specification
3-3. Signal Timing Specifications
Table 6-1& 6-2 show the signal timing required at the input of the LVDS transmitter. All of the interface signal timings should be satisfied with the following specification for normal operation.
Table 6-1. TIMING TABLE for NTSC
DCLK Period
DCLK Frequency
Frequency
Valid
Vertical
Blank
Total
Frequency
Valid
Horizontal
Blank
Total
Table 6-2. TIMING TABLE for PAL
DCLK Period
DCLK Frequency
Frequency
Valid
Vertical
Blank
Total
Frequency
Valid
Horizontal
Blank
Total
t
CLK
f
CLK
f
V
t
VV
tVT- t
t
VT
f
H
t
HV
tHT- t
t
HT
t
CLK
f
CLK
f
V
t
VV
tVT- t
t
VT
f
H
t
HV
tHT- t
t
HT
VV
HV
VV
HV
Min. NotesUnitSymbolItem
90
1456
Min. NotesUnitSymbolItem
90
1456
Typ.
162
1528
Typ.
162
1528
Max.
15.813.812.5
80.072.463.0
636057
-768-
295228
1063790776
5047.445
-1366-
410
1776
Max.
15.813.812.5
80.072.463.0
535047
-768-
2951808
1063948776
5047.445
-1366-
410
1776
[ DE (Data Enable) Only ]
nsec
MHz
Hz
Line
Line
Line
KHz
t
CLK
t
CLK
t
CLK
nsec
MHz
Hz
Line
Line
Line
KHz
t
CLK
t
CLK
t
CLK
Note : 1. The input of HSYNC & VSYNC signal does not have an effect on normal operation(DE Only Mode).
If you use spread spectrum of EMI, add some additional clock to minimum value for clock margin.
2. The performance of the electro-optical characteristics may be influenced by variance of the vertical
refresh rate and the horizontal frequency
3. Timing should be set based on clock frequency.
Ver. 1.0
12 / 37
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