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LC420WUN
Product Specification
CONTENTS
CONTENTS
GENERAL DESCRIPTION1
ABSOLUTE MAXIMUM RATINGS2
ELECTRICAL SPECIFICATIONS3
ELECTRICAL CHARACTERISTICS3-1
INTERFACE CONNECTIONS3-2
SIGNAL TIMING SPECIFICATIONS3-3
LVDS SIGNAL SPECIFICATIONS3-4
COLOR DATA REFERENCE3-5
POWER SEQUENCE3-6
OPTICAL SPECIFICATIONS4
MECHANICAL CHARACTERISTICS5
ITEMNumber
Page
1COVER
2
3RECORD OF REVISIONS
4
5
6
6
8
10
11
14
15
17
21
RELIABILITY6
INTERNATIONAL STANDARDS7
SAFETY7-1
EMC7-2
Environment7-3
PACKING8
INFORMATION OF LCM LABEL8-1
PACKING FORM8-2
MOUNTING PRECAUTIONS9-1
OPERATING PRECAUTIONS9-2
ELECTROSTATIC DISCHARGE CONTROL9-3
24
25
25
25
25
26
26
26
27PRECAUTIONS9
27
27
28
28PRECAUTIONS FOR STRONG LIGHT EXPOSURE9-4
28STORAGE9-5
28HANDLING PRECAUTIONS FOR PROTECTION FILM9-6
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Revision No.Revision DatePageDescription
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LC420WUN
Product Specification
RECORD OF REVISIONS
Final Specification-May. 07. 20101.0
Ver. 1.0
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Product Specification
1. General Description
The LC420WUN is a Color Active Matrix Liquid Crystal Display with an integral External Electrode Fluorescent
Lamp(EEFL) backlight system. The matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive display type which is operating in the normally black mode. It has a 42.02 inch diagonally
measured active display area with WUXGA resolution (1080 vertica l by 1920 horizontal pixel array).
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arrayed in vertical stripes.
Gray scale or the luminance of the sub-pixel color is determined with a 10-bit gray scale signal for each dot.
Therefore, it can present a palette of more than 1.06Bilion (FRC) colors.
It has been designed to apply the 10-bit 2-port LVDS interface.
It is intended to support LCD TV, PCTV where high brightness, super wide viewing angle, high color gamut,
high color depth and fast response time are important.
Total 156.8 W (Typ.) (Logic=7.8W, Inverter=149W ) Power Consumption
9.1 Kg (Typ.) Weight
Transmissive mode, Normally blackDisplay Mode
Hard coating(3H), Anti-glare treatment of the front polarizer (Haze 10%)Surface Treatment
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2. Absolute Maximum Ratings
The following items are maximum values which, if exceeded, may cause faulty operation or damage to the
LCD module.
Table 1. ABSOLUTE MAXIMUM RATINGS
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LC420WUN
Product Specification
Value
ParameterNote
Symbol
Unit
MaxMin
LCD Circuit
V
LCD
+14.0-0.3
V
DC
Power Input Voltage
V
Inverter
ON/OFF
V
OFF
BL
/ V
ON
+ 27.0-0.3V
+5.5-0.3
DC
V
DC
Inverter Control Voltage
Brightness
T-Con Option Selection Voltage
Operating Temperature
Storage Temperature
Panel Front Temperature
Operating Ambient Humidity
Storage Humidity
1. Ambient temperature condition (Ta =
Note
BR
LOGIC
T
OP
ST
SUR
OP
ST
25 ± 2 ¶C )
+5.00.0V
+4.0-0.3V
+500
V
DC
V
DC
¶C
¶C+60-20T
¶C+68-T
%RH9010H
%RH9010H
2. Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be Max 39¶C, and no condensation of water.
3. Gravity mura can be guaranteed below 40¶C condition.
4. The maximum operating temperatures is based on the test condition that the surface temperature
of display area is less than or equal to 68¶C with LCD module alone in a temperature controlled chamber.
Thermal management should be considered in final product design to prevent the surface temperature of
display area from being over 68. The range of operating temperature may degraded in case of
improper thermal management in final product design.
90%
1
2,3
4
2,3
60
60%
Wet Bulb
Temperature [
10
0
10203040506070800-20
Dry Bulb Temperature [
¶C
20
50
]
30
40
¶C
40%
Humidity [(%)RH]
10%
]
Storage
Operation
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3. Electrical Specifications
3-1. Electrical Characteristics
It requires two power inputs. One is employed to power for the LCD circuit. The other Is used for the EEFL
backlight and inverter circuit.
Table 2. ELECTRICAL CHARACTERISTICS
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LC420WUN
Product Specification
ParameterSymbol
Circuit :
Power Input Voltage
Power Input Current
Power Consumption
Rush current
Note
1. The specified current and power consumption are under the V
LCD
I
LCD
LCD
RUSH
condition whereas mosaic pattern(8 x 6) is displayed and f
Value
MaxTypMin
13.212.010.8V
=12.0V, Ta=25 ± 2¶C, fV=60Hz
LCD
is the frame frequency.
V
2. The current is specified at the maximum current pattern.
3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).
White : 1023 Gray
Black : 0 Gray
NoteUnit
V
DC
1mA845650455
2mA1240955668
1Watt9.27.8P
3A5.0--I
Mosaic Pattern(8 x 6)
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Product Specification
Table 3. ELECTRICAL CHARACTERISTICS (Continue)
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LC420WUN
ParameterSymbol
Inverter :
Power Supply Input Voltage
Power Supply
Input Current
After Aging
Before Aging
Power Supply Input Current (In-Rush)
Power Consumption
On/Off
Input Voltage for
Control System
Signals
Brightness Adjust
PWM Frequency for
NTSC & PAL
Pulse Duty
Level (PWM)
(Burst mode)
Lamp:
Values
MaxTypMin
BL
BL_A
I
I
BL_B
RUSH
BL
OnV
Off
ON
OFF
BR-B
-P
6.2-
6.7-
25.224.022.8V
6.8
7.3
164149
5.0-2.5V
0.80.0-0.3V
5.0-2.5High Level
0.8-0.0Low Level
NoteUnit
V
DC
1
1A
2A
BL
= 22.8V
V
EXTV
BR-B
A11--I
= 100%
6
1W
DC
V
DC
%100-30EXTV
On Duty
7
5Hz100PAL
5Hz120NTSC
V
DC
High: Lamp on
V
Low : Lamp off
DC
TsDischarge Stabilization Time
Note
1. Electrical characteristics are determined after the unit has been ‘ON’ and stable for approximately 120
minutes at 25·2¶C. The specified current and power consumption are under the typical supply Input voltage
24Vand V
BR
(
EXTV
BR-B
: 100%), it is total power consumption.
2. Electrical characteristics are determined within 30 minutes at 25·2¶C.
The specified currents are under the typical supply Input voltage 24V.
3. The brightness of the lamp after lighted for 5minutes is defined as 100%.
TS is the time required for the brightness of the center of the lamp to be not less than 95% at typical current.
The screen of LCD module may be partially dark by the time the brightness of lamp is stable after turn on.
4. Specified Values are for a single lamp which is aligned horizontally.
The life time is determined as the time which luminance of the lamp is 50% compared to that of initial value
at the typical lamp current (
EXTV
BR-B
:100%), on condition of continuous operating at 25· 2¶C
5. LGD recommend that the PWM freq. is synchronized with Two times harmonic of Vsync signal of system.
6. The duration of rush current is about 10ms.
7.
EXTV
BR-B
is based on input PWM duty of the inverter.
Ver. 1.0
3min3
4Hrs60,00050,000Life Time
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3-2. Interface Connections
This LCD module employs two kinds of interface connection, 51-pin connector is used for the module
electronics and 14-pin connector is used for the integral backlight system.
3-2-1. LCD Module
- LCD Connector : FI-R51S-HF(manufactured by JAE) or KN25-51P-0.5SH(manufactured by Hirose)
(CN1) Refer to below table
- Mating Connector : FI-R51HL(JAE) or compatible
Table 4. MODULE CONNECTOR(CN1) PIN CONFIGURATION
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LC420WUN
Product Specification
1
2
3
4
5
6
7
8
9
10
15
20
26
GNDGround
LVDS Select
BR-B
GND11
R1AN12
R1AP13
R1BN14
R1BP
R1CN16
R1CP17
GND18
R1CLKN19
R1CLKP
GND21
R1DN22
R1DP23
R1EN24
R1EP25
NC
DescriptionSymbolNo
No ConnectionNC
No ConnectionNC
No Connection (Reserved for LGD)NC
No Connection (Reserved for LGD)NC
No Connection (Reserved for LGD)NC
‘H’ =JEIDA , ‘L’ or NC = VESA
External VBR (From System)EXTV
OPC output (From LCM)VBR-B out
‘H’ = Enable , ‘L’ or NC = Disable OPC Enable
Ground
FIRST LVDS Receiver Signal (A-)
FIRST LVDS Receiver Signal (A+)
FIRST LVDS Receiver Signal (B-)
FIRST LVDS Receiver Signal (B+)
FIRST LVDS Receiver Signal (C-)
FIRST LVDS Receiver Signal (C+)
Ground
FIRST LVDS Receiver Clock Signal(-)
FIRST LVDS Receiver Clock Signal(+)
Ground
FIRST LVDS Receiver Signal (D-)
FIRST LVDS Receiver Signal (D+)
FIRST LVDS Receiver Signal (E-)
FIRST LVDS Receiver Signal (E+)
No Connection
No
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
-
Symbol
Bit Select
R2AN
R2AP
R2BN
R2BP
R2CN
R2CP
GND
R2CLKN
R2CLKP
GND
R2DN
R2DP
R2EN
R2EP
NC
NC
GND
GND
GND
NC
VLCD
VLCD
VLCD
VLCD
-
Description
‘H’ or NC= 10bit(D) , ‘L’ = 8bit
SECOND LVDS Receiver Signal (A-)
SECOND LVDS Receiver Signal (A+)
SECOND LVDS Receiver Signal (B-)
SECOND LVDS Receiver Signal (B+)
SECOND LVDS Receiver Signal (C-)
SECOND LVDS Receiver Signal (C+)
Ground
SECOND LVDS Receiver Clock Signal(-)
SECOND LVDS Receiver Clock Signal(+)
Ground
SECOND LVDS Receiver Signal (D-)
SECOND LVDS Receiver Signal (D+)
SECOND LVDS Receiver Signal (E-)
SECOND LVDS Receiver Signal (E+)
No Connection
No Connection
Ground
Ground
Ground
No connection
Power Supply +12.0V
Power Supply +12.0V
Power Supply +12.0V
Power Supply +12.0V
-
Note
1. All GND(ground) pins should be connected together to the LCD module’s metal frame.
2. All V
LCD
(power input) pins should be connected together.
3. All Input levels of LVDS signals are based on the EIA 644 Standard.
4. Specific pins(pin No. #2~#6) are used for internal data process of the LCD module.
These pins should be no connection.
5. Specific pins(pin No. # 8~#10) are used for OPC function of the LCD module.
If not used, these pins are no connection. (Please see the Appendix III-4 for more information.)
6. LVDS pin (pin No. #24,25,40,41) are used for 10Bit(D) of the LCD module.
If used for 8Bit(R), these pins are no connection.
7. Specific pin No. #44 is used for “No signal detection” of system signal interface.
It should be GND for NSB(No Signal Black) during the system interface signal is not.
If this pin is “H”, LCD Module displays AGP(Auto Generation Pattern).
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ଝ
ଝ
3-2-2. Backlight Module
[ Master ]
-Inverter Connector : 20022WR-14B1(Yeonho)
or Equivalent
- Mating Connector : 20022HS-14 or Equivalent
Table 5. INVERTER CONNECTOR PIN CONFIGULATION
Pin NoSymbolDescriptionMasterNote
V
1
BL
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Product Specification
Power Supply +24.0VV
LC420WUN
BL
Note
V
10
11
12
13
14
2
3
4
5
6
7
8
9
BL
V
BL
V
BL
V
BL
GNDBacklight GroundGND
GNDBacklight GroundGND
GNDBacklight GroundGND
GNDBacklight GroundGND
GNDBacklight GroundGND
NC
ON/OFF
V
EXTV
BR-B
Status
Power Supply +24.0VV
Power Supply +24.0VV
Power Supply +24.0VV
Power Supply +24.0VV
No Connection
Backlight ON/OFF control
External PWM
Lamp Status
ON/OFF
V
EXTV
Status2
BL
BL
BL
BL
NC
BR-B
1. GND should be connected to the LCD module’s metal frame.
2. Normal : Low (under 0.7V) / Abnormal : High (upper 3.0V)
Please see Appendix IV-1 for more information.
3. The impedance of pin #12 is over 100[K˟] & the impedance of Pin #13 is over 50[K˟].
1
3
3
Rear view of LCM
Rear view of LCM
14
…
PCB
…
PCB
1
…
…
1
<Master>
Ver. 1.0
12
<Slave>
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3-3. Signal Timing Specifications
Table 6 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal
timings should be satisfied with the following specification for normal operation.
Table 6-1. TIMING TABLE for NTSC (DE Only Mode)
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LC420WUN
Product Specification
Symbol
Display Period
Horizontal
Blank
Total
Display Period
Verticalt
Blank
Total
DCLK
Frequency
Horizontal
Vertical
t
t
t
f
CLK
HV
HB
HP
VV
VB
VP
f
f
-1080-t
694511t
114911251091t
H
V
Table 6-2. TIMING TABLE for PAL (DE Only Mode)
Symbol
Display Period
t
HV
NoteUnitMaxTypMinITEM
tclk-960-
tclk240140100
2200/2tclk120011001060
t
HP
HP
HP
t
148.5/2MHz7774.2570
KHz7067.565
Hz636057
NoteUnitMaxTypMinITEM
tclk-960-
Horizontal
Verticalt
Frequency
Note
The Input of HSYNC & VSYNC signal does not have an effect on normal operation(DE Only Mode).
Blank
Total
Display Period
Blank
Total
DCLK
Horizontal
Vertical
t
t
f
HB
HP
VV
VB
VP
CLK
f
H
f
V
-1080-t
300270228t
138013501308t
The performance of the electro-optical characteristics may be influenced by variance of the vertical
refresh rate.
Ver. 1.0
tclk240140100
2200/2tclk120011001060
t
HP
HP
t
HP
148.5/2MHz7774.2570
KHz7067.565
Hz535047
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3-4. LVDS Signal Specification
3-4-1. LVDS Input Signal Timing Diagram
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LC420WUN
Product Specification
DE, Data
DCLK
First data
Second data
0.7VDD
0.3VDD
tCLK
DE(Data Enable)
0.5 VDD
Invalid data
Invalid data
Pixel 0,0
Valid data
Pixel 1,0
t
Valid data
Pixel 2,0
Pixel 3,0
HP
Invalid data
Invalid data
t
HV
DE(Data Enable)
Ver. 1.0
11080
t
VV
t
VP
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3-4-2. LVDS Input Signal Characteristics
1) DC Specification
LVDS -
LVDS +
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LC420WUN
Product Specification
0V
LVDS Common mode Voltage
LVDS Input Voltage Range
2) AC Specification
LVDS Clock
LVDS Data
LVDS 1’st Clock
LVDS 2nd/ 3rd/ 4thClock
t
SKEW _mintSKEW _max
# VCM= {(LVDS +) + ( LVDS -)} /2
CM
A
(F
t
SKEW
t
SKEW
clk
T
clk
IN
= 1 /T
V
CM
V
IN _MAXVIN _MIN
NoteUnitMaxMinSymbolDescription
-V1.51.0V
-V1.80.7V
-mV250ȟVCMChange in common mode Voltage
T
clk
clk
)
A
80%
20%
t
RF
LVDS Differential Voltage
High Threshold
Low Threshold
LVDS Clock to Data Skew Margin
LVDS Clock/DATA Rising/Falling time
Effective time of LVDS
LVDS Clock to Clock Skew Margin (Even to Odd)
Note
1. All Input levels of LVDS signals are based on the EIA 644 Standard.
2. If t
isn’t enough, t
RF
should be meet the range.
eff
3. LVDS Differential Voltage is defined within t
TH
TL
SKEW
RF
eff
t
SKEW_EO
260ps(0.3*T
eff
1/7* T
clk
clk
clk
mV300100V
mV-100-300V
)/7|t
)/7t
T
clk
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NoteUnitMaxMinSymbolDescription
3
-ps|(0.25*T
2
-ps·360t
-
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