LG Display LC420EUD-SDM1 Specification

( ) Preliminary Specification

(●) Final Specification

Title 42.0” WUXGA TFT LCD

LC420EUD

Product Specification

SPECIFICATION

FOR

APPROVAL

BUYER TOSHIBA

MODEL V33A00042500

APPROVED BY

SIGNATURE

DATE

SUPPLIER LG Display Co., Ltd.

*MODEL LC420EUD

SUFFIX SDM1(RoHS Verified)

*When you obtain standard approval,

please use the above model name without suffix

APPROVED BY

P.Y. Kim / Team Leader

REVIEWED BY

Y.J. Heo / Project Leader

PREPARED BY

Y.M.Cho / Engineer

SIGNATURE

DATE

Please return 1 copy for your confirmation with

your signature and comments.

Ver. 1.0

TV Product Development Dept.

LG Display Co., Ltd.

0 /40

Product Specification

CONTENTS

LC420EUD

Number ITEM

COVER 1

CONTENTS

RECORD OF REVISIONS

1 GENERAL DESCRIPTION

2 ABSOLUTE MAXIMUM RATINGS

3 ELECTRICAL SPECIFICATIONS

3-1 ELECTRICAL CHARACTERISTICS

3-2 INTERFACE CONNECTIONS

3-3 SIGNAL TIMING SPECIFICATIONS

3-4 LVDS SIGNAL SPECIFICATIONS

3-5 COLOR DATA REFERENCE

3-6 POWER SEQUENCE

4 OPTICAL SPECIFICATIONS

5 MECHANICAL CHARACTERISTICS

Page

6 RELIABILITY

7 INTERNATIONAL STANDARDS

7-1 SAFETY

7-2 EMC

7-3 Environment

8 PACKING

8-1 INFORMATION OF LCM LABEL

8-2 PACKING FORM

9 PRECAUTIONS

9-1 MOUNTING PRECAUTIONS

9-2 OPERATING PRECAUTIONS

9-3 ELECTROSTATIC DISCHARGE CONTROL

9-4 PRECAUTIONS FOR STRONG LIGHT EXPOSURE

9-5 STORAGE

9-6 HANDLING PRECAUTIONS FOR PROTECTION FILM

Ver. 1.0

1 /40

Product Specification

RECORD OF REVISIONS

Revision No. Revision Date Page Description

0.1 Sep. 16.2010 - Preliminary Specification(First Draft)

0.2 Dec. 08.2010 7, 29 Update Electrical and Pallet ass’y specification

17 Change Optical specification

1.0 Feb. 07.2011 15, 39, 40 Update electrical power sequence and Response time

6 Update electrical specification

22, 23 Update mechanical drawing

CAS Version 1.0 Release

Final Specification

LC420EUD

Ver. 1.0

2 /40

LC420EUD

Product Specification

1. General Description

The LC420EUD is a Color Active Matrix Liquid Crystal Display with an integral Light Emitting Diode (LED) bac k li ght s y st em. T h e m a tr i x em plo ys a - Si T h in Fi l m T ra n s is t or as th e a c tiv e e lem e nt. It is a transmissive display type which is operating in the normally black mode. It has a 42.02 inch diagonally measured active display area with WUXGA resolution (1080 vertical by 1920 horizontal pixel array). Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arrayed in vertical stripes. Gray scale or the luminance of the sub-pixel color is determined with a 10-bit gray scale signal for each dot. Therefore, it can present a palette of more than 1.06Bilion colors. It has been designed to apply the 10-bit 4-port LVDS interface. It is intended to support LCD TV, PCTV where high brightness, super wide viewing angle, high color gamut, high color depth and fast response time are important.

Mini-LVDS(RGB)

Control Signals

Power Signals

Source Driver Circuit

S1 S

TFT - LCD Panel

(

1920 × RGB × 1080 pixels)

[Gate In Panel]

G1080

LVDS

2Port

LVDS

2Port

LVDS Select

L-DIM Enable

Bit Select

+12.0V

CN2

(41pin)

CN1

(51pin)

LVDS 3,4

LVDS 1,2

Option signal

I2C

EEPROM

SCL

SDA

Timing Controller

LVDS Rx + L/D + DGA + ODC

Integrated

Power Circuit

Block

SIN, SCLK, V_Sync

+24.0V, GND, On/Off

ExtVBR-B

LED Driver

V : 8Block

Local Dimming :

General Features

Active Screen Size 42.02 inches(1067.31mm) diagonal

Outline Dimension 968.4(H) × 564.0(V) X 10.8(B)/18.3 mm(D) (Typ.)

Pixel Pitch 0.4845 mm x 0.4845 mm

Pixel Format 1920 horiz. by 1080 vert. Pixels, RGB stripe arrangement

Color Depth 10bit(D), 1.06Billon colors

Luminance, White 450 cd/m2 (Center 1point ,Typ.)

1920

H : 2Block

16 Block

Viewing Angle (CR>10) Viewing angle free ( R/L 178 (Min.), U/D 178 (Min.))

Power Consumption Total 94.1W (TBD) [Logic= 8.6W, LED Driver=85.5W (ExtVbr_B=100% )]

Weight 8.8 Kg (Typ.)

Display Mode Transmissive mode, Normally black

Surface Treatment

Hard coating(3H), Anti-reflection treatment of the front polarizer (Reflectance〈 2%)

Ver. 1.0

3 /40

LC420EUD

Product Specification

2. Absolute Maximum Ratings

The following items are maximum values which, if exceeded, may cause faulty operation or permanent damage to the LCD module.

Table 1. ABSOLUTE MAXIMUM RATINGS

Parameter Symbol

Power Input Voltage

Driver Control Voltage

T-Con Option Selection Voltage VLOGIC -0.3 +4.0 VDC

Operating Temperature TOP 0 +50 °C

Storage Temperature TST -20 +60 °C

Panel Front Temperature TSUR - +68 °C 4

Operating Ambient Humidity HOP 10 90 %RH

Storage Humidity HST 10 90 %RH

Note

1. Ambient temperature condition (Ta = 25 ± 2 °C )

LCD Circuit VLCD -0.3 +14.0 VDC

Driver VBL -0.3 + 27.0 VDC

ON/OFF VOFF / VON -0.3 +5.5 VDC

Brightness EXTVBR-B 0.0 +5.5 VDC

Value

Unit Note

Min Max

2. Temperature and relative humidity range are shown in the figure below.

Wet bulb temperature should be Max 39°C, and no condensation of water.

3. Gravity mura can be guaranteed below 40°C condition.

4. The maximum operating temperatures is based on the test condition that the surface temperature

of display area is less than or equal to 68°C with LCD module alone in a temperature controlled chamber. Thermal management should be considered in final product design to prevent the surface temperature of display area from being over 68℃. The range of operating temperature may be degraded in case of improper thermal management in final product design.

90%

2,3

Ver. 1.0

Wet Bulb Temperature [°C]

10 20 30 40 50 60 70 800-20 Dry Bulb Temperature [°C]

60%

40%

10%

Storage

Operation

Humidity [(%)RH]

4 /40

LC420EUD

Product Specification

3. Electrical Specifications

3-1. Electrical Characteristics

It requires two power inputs. One is employed to power for the LCD circuit. The other Is used for the LED backlight and LED Driver circuit.

Table 2. ELECTRICAL CHARACTERISTICS

Parameter Symbol

Min Typ Max

Circuit :

Power Input Voltage VLCD 10.8 12.0 13.2 VDC

Power Input Current ILCD

Power Consumption PLCD 8.6 11.54 Watt 1

Rush current IRUSH - - 5.0 A 3

Note

1. The specified current and power consumption are under the V

- 715 929 mA 1

- 1030 1339 mA 2

Value

Unit Note

=12.0V, Ta=25 ± 2°C, fV=120Hz

LCD

condition, and mosaic pattern(8 x 6) is displayed and fVis the frame frequency.

2. The current is specified at the maximum current pattern.

3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).

White : 1023 Gray Black : 0 Gray

Ver. 1.0

Mosaic Pattern(8 x 6)

5 /40

Product Specification

Table 3. ELECTRICAL CHARACTERISTICS (Continue)

LC420EUD

Parameter Symbol

LED Driver :

Power Supply Input Voltage VBL 22.8 24.0 25.2 Vdc 1

Power Supply Input Current IBL

Power Supply Input Current (In-Rush) In-rush - - 5.93 A

Power Consumption PBL

On/Off

Input Voltage for

Control System

Signals

LED :

Life Time 30,000 50,000 Hrs 2

Brightness Adjust ExtVBR-B 1 - 100 % On Duty , 6

PWM Frequency for NTSC & PAL

Pulse Duty Level (PWM)

On V on 2.5 - 5.0 Vdc

Off V off -0.3 0.0 0.7 Vdc

PAL 97 100 103 Hz 3

NTSC 117 120 123 Hz 3

High Level 2.5 - 5.0

Low Level 0.0 - 0.7

Min Typ Max

Values

3.6

4.3

85.5 93.6

3.9

4.7

89.481.9

Unit Notes

W Scanning Off , 1

Vdc

Scanning Off , 1

Scanning On , 1 (PWM On Duty)

VBL = 22.8V

Ext VBR-B = 100%, 4

Scanning On , 1

HIGH : on duty

LOW : off duty

Notes :

1. Electrical characteristics are determined after the unit has been ‘ON’ and stable for approximately 60

minutes at 25±2°C. The specified current and power consumption are under the typical supply Input voltage 24Vand VBR (ExtVBR-B : 100%), it is total power consumption.

2. The life time (MTTF) is determined as the time which luminance of the LED is 50% compared to that of initial value at the typical LED current (ExtVBR-B :100%) on condition of continuous operating in LCM state at 25±2°C.

3. LGD recommend that the PWM freq. is synchronized with One time harmonic of V_sync signal of system. Though PWM frequency is over 120Hz (max 252Hz), function of LED Driver is not affected.

4. The duration of rush current is about 200ms. This duration is applied to LED on time.

5. Even though inrush current is over the specified value, there is no problem if I2T spec of fuse is satisfied.

6. Ext_PWM Signal have to input available duty range. Between 99% and 100% ExtVBR-B duty have to be avoided. ( 99% < ExtVBR-B < 100%) But ExtVBR-B 0% and 100% are available.

High

Available duty range

Low

Ver. 1.0

99% 100%Ext_PWM Input Duty

6 /40

LC420EUD

Product Specification

3-2. Interface Connections

This LCD module employs two kinds of interface connection, 51-pin connector and 41-pin connector are used for the module electronics and 14-pin connector is used for the integral backlight system.

3-2-1. LCD Module

- LCD Connector(CN1): FI-R51S-HF(manufactured by JAE) Refer to below and next Page table

- Mating Connector : FI-R51HL(JAE) or compatible

Table 4-1. MODULE CONNECTOR(CN1) PIN CONFIGURATION

No Symbol Description No Symbol Description

10 11

20 21 22

24 25 26

Note

SDA SDA

SCL SCL

WP WP (Write Protection)

LVDS Select

L-DIM Enable ‘H’ = Enable , ‘L’ or NC = Disable

GND

R1AN

R1AP

R1BN

R1BP

R1CN

R1CP

GND

R1CLKN

R1CLKP

GND R1DN

R1DP

R1EN R1EP

NC or GND

No Connection (Note 4)

‘H’ =JEIDA , ‘L’ or NC = VESA

No Connection (Note 4)

Ground

FIRST LVDS Receiver Signal (A-)

FIRST LVDS Receiver Signal (A+)

FIRST LVDS Receiver Signal (B-)

FIRST LVDS Receiver Signal (B+)

FIRST LVDS Receiver Signal (C-)

FIRST LVDS Receiver Signal (C+) Ground

FIRST LVDS Receiver Clock Signal(-)

FIRST LVDS Receiver Clock Signal(+) Ground

FIRST LVDS Receiver Signal (D-)

FIRST LVDS Receiver Signal (D+)

FIRST LVDS Receiver Signal (E-) FIRST LVDS Receiver Signal (E+)

No Connection or Ground

1. All GND (ground) pins should be connected together to the LCD module’s metal frame.

2. All VLCD (power input) pins should be connected together.

3. All Input levels of LVDS signals are based on the EIA 644 Standard.

4. #1~#3 & #8~#9 NC (No Connection): These pins are used only for LGD (Do not connect)

5. Specific pin (#10) is used for Local Dimming function of the LCD module.

If not used, these pins are no connection. (Please see the Appendix ⅤⅤⅤⅤ for more information.)

6. LVDS pin (pin No. #24,25,40,41) are used for 10Bit(D) of the LCD module. If used for 8Bit(R), these pins are no connection.

7. Specific pin No. #44 is used for “No signal detection” of system signal interface. It should be GND for NSB (No Signal Black) while the system interface signal is not. If this pin is “H”, LCD Module displays AGP (Auto Generation Pattern).

8. Specific pin (pin No. #4, #5) is used for Controlling Local Dimming’s register in the LCM Module.

Bit Select

39 40

46 47 48

50 51

- - -

R2AN

R2AP

R2BN

R2BP

R2CN

R2CP

GND

R2CLKN

R2CLKP

GND

R2DN

R2DP

R2EN

R2EP

NC or GND

GND Ground

NC No connection VLCD Power Supply +12.0V

VLCD Power Supply +12.0V

VLCD Power Supply +12.0V VLCD Power Supply +12.0V

‘H’ or NC= 10bit(D) , ‘L’ = 8bit

SECOND LVDS Receiver Signal (A-)

SECOND LVDS Receiver Signal (A+)

SECOND LVDS Receiver Signal (B-)

SECOND LVDS Receiver Signal (B+)

SECOND LVDS Receiver Signal (C-)

SECOND LVDS Receiver Signal (C+) Ground

SECOND LVDS Receiver Clock Signal(-)

SECOND LVDS Receiver Clock Signal(+) Ground

SECOND LVDS Receiver Signal (D-)

SECOND LVDS Receiver Signal (D+)

SECOND LVDS Receiver Signal (E-)

SECOND LVDS Receiver Signal (E+)

No Connection or Ground

Ver. 1.0

7 /40

Product Specification

- LCD Connector (CN2) : FI-RE41S-HF (manufactured by JAE)

- Mating Connector : FI-RE41HL

Table 4-2. MODULE CONNECTOR(CN2) PIN CONFIGURATION

No Symbol Description No Symbol Description

4 NC

13 RB3P

18 RCLK3P

NC NC

GND

RA3N

RA3P

RB3N

RC3N

RC3P

GND

RCLK3N

GND

RD3N

RD3P

No connection 22

No connection 23

No connection 24 GND Ground No connection

No connection

No connection 27

No connection 28

No connection 29 RB4P Ground

THIRD LVDS Receiver Signal (A-)

THIRD LVDS Receiver Signal (A+)

THIRD LVDS Receiver Signal (B-)

THIRD LVDS Receiver Signal (B+)

THIRD LVDS Receiver Signal (C-)

THIRD LVDS Receiver Signal (C+) Ground

THIRD LVDS Receiver Clock Signal(-)

THIRD LVDS Receiver Clock Signal(+) Ground

THIRD LVDS Receiver Signal (D-)

THIRD LVDS Receiver Signal (D+)

25 GND Ground

34 RCLK4P

40 GND Ground

41 GND Ground

RE3N

RE3P

RA4N

RA4P

RB4N

RC4N

RC4P

GND

RCLK4N

GND

RD4N

RD4P

RE4N

RE4P

THIRD LVDS Receiver Signal (E-)

THIRD LVDS Receiver Signal (E+)

FORTH LVDS Receiver Signal (A-)

FORTH LVDS Receiver Signal (A+)

FORTH LVDS Receiver Signal (B-)

FORTH LVDS Receiver Signal (B+)

FORTH LVDS Receiver Signal (C-)

FORTH LVDS Receiver Signal (C+) Ground

FORTH LVDS Receiver Clock Signal(-)

FORTH LVDS Receiver Clock Signal(+) Ground

FORTH LVDS Receiver Signal (D-)

FORTH LVDS Receiver Signal (D+)

FORTH LVDS Receiver Signal (E-)

FORTH LVDS Receiver Signal (E+)

LC420EUD

Note : 1. All GND(ground) pins should be connected together to the LCD module’s metal frame.

2. LVDS pin (pin No. #22,23,38,39) are used for 10Bit(D) of the LCD module. If used for 8Bit(R), these pins are no connection.

CN3

#1 #8

CN1 CN2

#1 #51

#51 #1 #41

#1 #41

Rear view of LCM

Ver. 1.0

8 /40

Product Specification

3-2-2. Backlight Module

Master

-LED Driver Connector : 20022WR - H14B1(Yeonho) or Equivalent

- Mating Connector : 20022HS - 14B2 or Equivalent

Table 5. LED DRIVER CONNECTOR PIN CONFIGURATION

Pin No Symbol Description Note

LC420EUD

VBL Power Supply +24.0V

GND Backlight Ground

Status Back Light Status

ON/OFF

NC Don’t care

EXTVBR-B External PWM 3

Backlight ON/OFF control

Notes :1. GND should be connected to the LCD module’s metal frame.

2. Normal : Low (under 0.7V) / Abnormal : High (upper 3.0V)

3. High : on duty / Low : off duty, Pin#14 can be opened. ( if Pin #14 is open , EXTVBR-B is 100% )

4. Each impedance of pin #12 and 14 is over 50 [KΩ] .

◆ Rear view of LCM

Ver. 1.0

…

PCB

…

9 /40

LC420EUD

Product Specification

3-3. Signal Timing Specifications

Table 6 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal timings should be satisfied with the following specification for normal operation.

Table 6. TIMING TABLE (DE Only Mode)

ITEM Symbol Min Typ Max Unit Note

Horizontal

Vertical

Frequency

Display

Period

Blank tHB 40 70 200 tCLK 1

Total tHP 520 550 680 tCLK

Display

Period

Blank tVB

Total tVP

ITEM Symbol Min Typ Max Unit Note

DCLK fCLK 66.97 74.25 78.00 MHz

Horizontal fH 121.8 135 140 KHz 2

Vertical fV

tHV 480 480 480 tCLK 1920 / 4

tVV 1080 1080 1080 Lines

(228)

1096

(1308)

108

(95)

(270)

1125

(1350)

120

(100)

(300)

1166

(1380)

122

(104)

Lines 1

Lines

NTSC :

108~122Hz

(PAL : 95~104Hz)

Note: 1. The input of HSYNC & VSYNC signal does not have an effect on normal operation (DE Only Mode).

If you use spread spectrum of EMI, add some additional clock to minimum value for clock margin.

2. The performance of the electro-optical characteristics may be influenced by variance of the vertical refresh rate and the horizontal frequency

※ Timing should be set based on clock frequency.

Ver. 1.0

10 /40

3-4. LVDS Signal Specification

3-4-1. LVDS Input Signal Timing Diagram

LC420EUD

Product Specification

DCLK

First data

Second data

Third data

Forth data

DE(Data Enable)

tCLK

0.5 VDD

Invalid data

DE, Data

Valid data

Pixel 0

Valid data

Pixel 1

Valid data

Pixel 2

Valid data

Pixel 3

Pixel 4

Pixel 5

Pixel 6

Pixel 7

0.7VDD

0.3VDD

Invalid data

DE(Data Enable)

Ver. 1.0

* tHB = tHFP + tWH +tHBP

* tVB = tVFP + tWV +tVBP

1 1080

tVV

tVP

11 /40

3-4-2. LVDS Input Signal Characteristics

1) DC Specification

LVDS -

LVDS +

LC420EUD

Product Specification

# VCM= {(LVDS +) + ( LVDS -)} /2

IN _ MAXVIN _MIN

Description Symbol Min Max Unit Note

LVDS Common mode Voltage V

LVDS Input Voltage Range V

1.0 1.5 V -

0.7 1.8 V -

Change in common mode Voltage ΔVCM 250 mV -

2) AC Specification

clk

LVDS Clock

LVDS Data

= 1/T

)

clk

LVDS 1’st Clock

LVDS 2nd/ 3rd/ 4thClock

tSKEW

clk

SKEW_mintSKEW_max

Description Symbol Min Max Unit Note

High Threshold

LVDS Differential Voltage

Low Threshold

LVDS Clock to Data Skew Margin t

LVDS Clock/DATA Rising/Falling time t

Effective time of LVDS t

LVDS Clock to Clock Skew Margin (Even to Odd) t

Note

1. All Input levels of LVDS signals are based on the EIA 644 Standard.

2. If tRFisn’t enough, t

should be meet the range.

eff

3. LVDS Differential Voltage is defined within t

Ver. 1.0

SKEW

eff

SKEW_EO

100 300 mV

-300 -100 mV

|(0.25*T

260 (0.3*T

)/7| ps -

clk

)/7 ps 2

clk

|±360| - ps -

1/7* T

clk

eff

clk

12 /40

+ 28 hidden pages

LG Display LC420EUD-SDM1 Specification

Specifications and Main Features

Frequently Asked Questions

User Manual

RECORD OF REVISIONS

1. General Description

2. Absolute Maximum Ratings