- Change the Power Consumption
Update the Drawings.22, 23
0.3Feb, 26, 201010Update the Color Coordinates (R, G, B)
25Class 1 à Class 1M
LC260EUN
Ver. 0.3
3 / 35
LC260EUN
Product Specification
1. General Description
The LC260EUN is a Color Active Matrix Liquid Crystal Display with an integral Light Emitting Diode (LED)
backlight system. The matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive display type which is operating in the normally black mode. It has a 26.02 inch diagonally
measured active display area with WUXGA resolution (1080 vertical by 1920 horizontal pixel array).
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arrayed in vertical stripes.
Gray scale or the luminance of the sub-pixel color is determined with a 8-bit gray scale signal for each dot.
Therefore, it can present a palette of more than 16.7M (true) colors.
It has been designed to apply the 8-bit 2-port LVDS interface.
It is intended to support LCD TV, PCTV where high brightness, super wide viewing angle, high color gamut,
high color depth and fast response time are important.
Control
Signals
RGB
Source Driver Circuit
S1S1920
G1
TFT - LCD Panel
+12.0V
LVDS 2Port
LVDS S elect
#9
CN1
(51pin)
EEPROM
SCL
SDA
Timing Controller
[LVDS Rx
Integrated]
(1920 × RGB pixels X 1080)
[Gate In Panel]
G1080
Back light Assembly
+24.0V, GND, On/off
Ext VBR-B
Power Circuit
Block
LED Driver
Power Signals
General Features
Active Screen Size26.01 inches(660.6mm) diagonal
Outline Dimension613 mm(H) x 361.0 mm(V) x 14.9 mm(D)[16.2 mm(User CNT)] (Typ.)
Pixel Pitch0.3 mm x 0.3 mm
Pixel Format1920 horiz. by 1080 vert. pixels RGB stripe arrangement
Color Depth8bit, 16,7 M colors
2. Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be Max 39°C, and no condensation of water.
3. Gravity mura can be guaranteed below 40°C condition.
4. The maximum operating temperatures is based on the test condition that the surface temperature
of display area is less than or equal to 68°C with LCD module alone in a temperature controlled chamber.
Thermal management should be considered in final product design to prevent the surface temperature of
display area from being over 68℃. The range of operating temperature may degraded in case of
improper thermal management in final product design.
1
2,3
4
2,3
Ver. 0.3
Wet Bulb
Temperature [°C]
20
10
0
10203040506070800-20
Dry Bulb Temperature [°C]
30
40
50
60
90%
60%
40%
Humidity [(%)RH]
10%
Storage
Operation
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LC260EUN
Product Specification
3. Electrical Specifications
3-1. Electrical Characteristics
It requires two power inputs. One is employed to power for the LCD circuit. The other Is used for the LED
backlight and LED Driver circuit.
Table 2. ELECTRICAL CHARACTERISTICS
ParameterSymbol
Value
MinTypMax
Circuit :
Power Input VoltageV
LCD
10.812.013.2V
-546709mA1
Power Input CurrentI
Power ConsumptionP
Rush currentI
LCD
LCD
RUSH
-762990mA2
-6.558.51Watt1
--4.0A3
Notes : 1. The specified current and power consumption are under the V
condition whereas mosaic pattern(8 x 6) is displayed and fVis the frame frequency.
2. The current is specified at maximum current pattern.
3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).
White : 255 Gray
Black : 0 Gray
UnitNote
DC
=12.0V, 25 ± 2°C, fV=60Hz
LCD
Ver. 0.3
Mosaic Pattern(8 x 6)
6 / 35
Product Specification
Table 3. ELECTRICAL CHARACTERISTICS (Continue)
LC260EUN
ParameterSymbol
LED Driver :
Power Supply Input VoltageVBL22.824.025.2Vdc1
Power Supply Input Current IBL_A
Power Supply Input Current (In-Rush)Irush--2.2A
Power ConsumptionPBL-
On/Off
Input Voltage for
Control System
Signals
LED :
Life Time30,000Hrs3
Notes :
Brightness AdjustExtVBR-B10-100%On Duty
PWM Frequency for
NTSC & PAL
Pulse Duty Level
(PWM)
OnV on2.5-5.0Vdc
OffV off-0.30.00.7Vdc
PAL100Hz4
NTSC120Hz4
High Level2.5-5.0
Low Level0.0-0.7
MinTypMax
Values
-
1.35
32.534.8
1.45
UnitNotes
A1
VBL = 22.8V
Ext VBR-B = 100%
W1
Vdc
Vdc
HIGH : on duty
LOW : off duty
1. Electrical characteristics are determined after the unit has been ‘ON’ and stable for approximately 60
minutes at 25±2°C. The specified current and power consumption are under the typical supply Input voltage
24Vand VBR (ExtVBR-B : 100%), it is total power consumption.
2. The life time(MTTF) is determined as the time which luminance of the LED is 50% compared to that of initial
value at the typical LED current (ExtVBR-B :100%) on condition of continuous operating in LCM state at
25±2°C.
3. LGD recommend that the PWM freq. is synchronized with Two time harmonic of Vsync signal of system.
Though PWM frequency is over 120Hz (max 252Hz), function of LED Driver is not affected.
4. The duration of rush current is about 10ms.
Ver. 0.3
7 / 35
7 / 28
LC260EUN
Product Specification
3-2. Interface Co nnections
This LCD module employs two kinds of interface connection, a 51-pin connector is used for the module
electronics and 14-pin connector is used for the integral backlight system.
3-2-1. LCD Module
-LCD Connector(CN1): IS050-C51B-C39-A(manufactured by UJU) or compatible
- Mating Connector : FI-RE51HL(JAE) or compatible
Table 4. MODULE CONNECTOR(CN1) PIN CONFIGURATION
NoSymbolDescriptionNoSymbolDescription
1NCNo Connection27NCNo Connection
2NCNo Connection28
3NCNo Connection29
4NCNo Connection30
5NCNo Connection31R2BPSECOND LVDS Receiver Signal (B+)
6NCNo Connection32
7LVDS Select‘H’ =JEIDA , ‘L’ or NC = VESA 33
8NCNo Connection34GNDGround
25NCNo Connection51VLCDPower Supply +12.0V
26Reserved No connection or GND---
GND
R1AN
R1AP
R1BN
R1CN
R1CP
GND
R1CLKN
GND
R1DN
R1DP
Ground37
FIRST LVDS Receiver Signal (A-)38
FIRST LVDS Receiver Signal (A+)39
FIRST LVDS Receiver Signal (B-)40NCNo Connection
FIRST LVDS Receiver Signal (C-)42Reserved No connection or GND
FIRST LVDS Receiver Signal (C+)43Reserved No connection or GND
Ground44GNDGround
FIRST LVDS Receiver Clock Signal(-)45GNDGround
Ground47NCNo connection
FIRST LVDS Receiver Signal (D-)48VLCDPower Supply +12.0V
FIRST LVDS Receiver Signal (D+)49VLCDPower Supply +12.0V
R2AN
R2AP
R2BN
R2CN
R2CP
R2CLKN
R2CLKP
GND
R2DN
R2DP
SECOND LVDS Receiver Signal (A-)
SECOND LVDS Receiver Signal (A+)
SECOND LVDS Receiver Signal (B-)
SECOND LVDS Receiver Signal (C-)
SECOND LVDS Receiver Signal (C+)
SECOND LVDS Receiver Clock Signal(-)
SECOND LVDS Receiver Clock Signal(+)
Ground
SECOND LVDS Receiver Signal (D-)
SECOND LVDS Receiver Signal (D+)
Notes :
Ver. 0.3
1. All GND(ground) pins should be connected together to the LCD module’s metal frame.
2. All V
LCD
(power input) pins should be connected together.
3. All Input levels of LVDS signals are based on the EIA 644 Standard.
4. Specific pins(pin No. #2~#6) are used for internal data process of the LCD module.
If not used, these pins are no connection.
5. Specific pin No. #44 is used for “No signal detection” of system signal interface.
It should be GND for NSB(No Signal Black) during the system interface signal is not.
If this pin is “H”, LCD Module displays AGP(Auto Generation Pattern).
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LC260EUN
Product Specification
3-2-2. Backlight Inverter
- LED Connector : SM14B-SRSS-TB(Manufactured by JST)
- Mating Connector : SHR-14V-S-B(With protrusions) or SHR-14V-S(Without protrusions) ; (Manufacture by JST)
Table 5. INVERTER CONNECTOR PIN CONFIGURATION
Pin NoSymbolDescriptionNote
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Notes :
1. GND should be connected to the LCD module’s metal frame.
2. High : on duty / Low : off duty, Pin#13 can be opened.
3. Normal : Low (under 0.7V) / Abnormal : High (upper 3.0V)
4. Each impedance of 12 and 13 is over 5 [MΩ] and over 200[KΩ].
Table 6 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal timing
should be satisfied with the following specification for normal operation.
Table 6. TIMING TABLE for NTSC (DE Only Mode)
Horizontal
Vertical
Frequency
Display Period
Blank
Total
DCLK
Horizontal
Vertical
Symbol
tHV
tHB
tHP
Symbol
fCLK
fH
fV
tclk-960tclk240140100
Lines-1080-tVVDisplay Period
Lines694511tVBBlank
Lines114911251091tVPTotal
KHz7067.565
Hz636057
NoteUnitMaxTypMinITEM
2200/2tclk120011001060
NoteUnitMaxTypMinITEM
148.5/2MHz7774.2570
Table 7 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal timing
should be satisfied with the following specification for normal operation.
Table 7. TIMING TABLE for PAL (DE Only Mode)
Symbol
NoteUnitMaxTypMinITEM
Display Period
Horizontal
VerticalLines300270228tVBBlank
Frequency
Blank
Total
DCLK
Horizontal
Vertical
tHV
tHB
tHP
Symbol
fCLK
fH
fV
tclk-960tclk240140100
2200/2tclk120011001060
Lines-1080-tVVDisplay Period
Lines138013501308tVPTotal
NoteUnitMaxTypMinITEM
148.5/2MHz7774.2570
KHz7067.565
Hz535047
Note : The Input of HSYNC & VSYNC signal does not have an effect on normal operation(DE Only Mode).
The performance of the electro-optical characteristics may be influenced by variance of the vertical refresh rate.
Ver. 0.3
10 / 35
3-4. Signal Timing Waveforms
3-4-1. LVDS Input Signal Timing Diagram
LC260EUN
Product Specification
DCLK
First data
Second data
t
CLK
Invalid data
Invalid data
DE(Data Enable)
DE, Data
0.5 VDD
Valid data
Pixel 0,0
Valid data
Pixel 1,0
t
0.7VDD
0.3VDD
Pixel 2,0
Pixel 3,0
t
HV
HT
Invalid data
Invalid data
* Reference : Sync. Relation
HSync
DE(Data Enable)
VSync
DE(Data Enable)
Ver. 0.3
t
WH
t
HBP
t
WV
t
VBP
* tHP= t
* tVP= t
t
HP
t
t
HFP
VFP
t
HV
t
VP
t
VV
HFP
VFP
+ tWH+t
+ tWV+t
HBP
VBP
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