5
4
3
2
1
http://hobi-elektronika.net
1
01
P19
of
of
of
1A
1A
1A
QL1 BLOCK DIAGRAM
PCB STACK UP
D D
LAYER 1 : TOP
LAYER 2 : GND
CLOCK
CK505 (QFN-64)
LAYER 3 : IN1
6L HDI
LAYER 4 : IN2
LAYER 5 : VCC
FAN & THERMAL
LAYER 6 : BOT
CPU
Penryn SFF ULV DC/SC
Micro-FCBGA956/10W
800/1066 MHz FSB
NORTH BRIDGE
C C
DDR2-SODIMM
2.5HDD
P20
On Board USB0
P20
MINI CARD 1
B B
P21
MINI CARD 2
P21
CCD
P17
Bule Tooth
P24
USB2 on daughter
board
P22
USB3 on daughter
board
A A
5
P22
667/800MHZ DDR II
P16
SATA0
Port 6
Port 8
Port 2
Port 4
Port 10
Port 0
Port 1
Cantiga SFF GS45
PG 6,7,8,9,10,11
DMI x 4
SOUTH BRIDGE
ICH9-M SFF
USB
PG 12,13,14,15
LPC
EC
ENE KB3926-D2
SPI
FLASH
2Mbytes
P23
4
P4,5
P23
PS/2
TouchPAD
Connector
P23
LVDS LED Panel
VGA
TMDS HDMI Level Shifter
PCIE1 MINI CARD 1
PCIE4 PCIE
PCIE2
CODEC + AMP
IHDA
Realtek
ALC272
8x16
Keyboard
Connector
3
P18
P19
P24
Connector
CRT
Connector
HDMI
Connector
Connector
MINI CARD 2
Connector
LAN on daughter
board
MIC/HP/SPDIF
AMP
Digital MIC LED Panel
2
P02
P25
P17
P18
P18
P21
P21
P22
Speaker
1%
1%
1%
POWER
CPU Core
RT8152D
P29
VCCP 1.05V
RT8209
P27
DDR Power
RT8207 P28
SYSTEM 5V/3V
RT8206
P26
Charger
ISL6251A
P30
Discharge
P31
1.5V
RT9025
P27
SIM CARD
Connector
P21
Audio Jacks on
daughter board
P22
Speaker Connector
Connector
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
P17
352-(&74/
352-(&74/
352-(&74/
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Schematic Block Diagram
Schematic Block Diagram
Schematic Block Diagram
Wednesday, August 26, 2009 1 31
Wednesday, August 26, 2009 1 31
Wednesday, August 26, 2009 1 31
5
Table of Contents
PAGE DESCRIPTION
Block Diagram
01
02
Front page
03
Clock Generator (SLG8SP513)
Penryn SFF CULV Processor
04-05
Cantiga North Bridge
06-11
D D
12-15
ICH9-M South Bridge
16
DDR2 SO-DIMM
17
LED Panel/CCD
18
CRT / HDMI
19
Azalia ALC272
20
USB/ HDD
21
MINI PCIE(WLAN/WIMAX/3G)
22
LED/B2B conn/ HOLE
23
KB3926/ROM
KB/BT/TPD
24
25
FAN/THERMAL
26
SYSTEM 5V/3V (RT8206)
27
1.05V (RT8209)/1.5V
28
C C
DDR 1.8VSUS(RT8207)
29
VCore( RT8152D)
30
CHARGER (ISL6251A)
Discharge/LAN/S5
31
32
MODIFY LIST
4
3
2
1
http://hobi-elektronika.net
02
B B
A A
352-(&74/
352-(&74/
352-(&74/
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Front Page
Front Page
1%
1%
1%
5
4
3
2
Front Page
Wednesday, August 26, 2009 2 31
Date: Sheet
Wednesday, August 26, 2009 2 31
Date: Sheet
Wednesday, August 26, 2009 2 31
Date: Sheet
1
1A
1A
1A
of
of
of
5
Clock Generator (CLK)
4
+1.05V +1.05V_VDD_CLK +3V +3V_VDD_CLK
L27 HCB1608KF-181T15 L27 HCB1608KF-181T15
C394
C394
C308
C308
10U/10V_8
10U/10V_8
0.1U/10V_4
0.1U/10V_4
pin19 pin27 pin33 pin43 pin52Ε ΕΕΕ56 pin4ΕΕΕΕ9p i n 1 6Ε ΕΕΕ23 pin46 pin62
http://hobi-elektronika.net
C305
C305
C364
C364
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
C373
C373
0.1U/10V_4
0.1U/10V_4
3
C393
C393
0.1U/10V_4
0.1U/10V_4
2
L30 HCB1608KF-181T15 L30 HCB1608KF-181T15
C400
C400
10U/10V_8
10U/10V_8
C371
C371
0.1U/10V_4
0.1U/10V_4
C307
C307
0.1U/10V_4
0.1U/10V_4
C395
C395
0.1U/10V_4
0.1U/10V_4
C384
C384
0.1U/10V_4
0.1U/10V_4
1
03
QFN64 CK505
CG_XIN
Y3
Y3
14.318MHZ
14.318MHZ
1 2
BG614318F33
BG614318F33
R261 475/F_4 R261 475/F_4
R250 475/F_4 R250 475/F_4
R248 33/J_4 R248 33/J_4
R245 33/J_4 R245 33/J_4
R238 33/J_4 R238 33/J_4
R237 33/J_4 R237 33/J_4
R236 2.2K/4 R236 2.2K/4
R299 *0_4/S R299 *0_4/S
R277 33/J_4 R277 33/J_4
R283 10K/J_4 R283 10K/J_4
+1.05V_VDD_CLK
CLK_WWAN_OE#_R
CLK_MCH_OE#_R
TME
CLK_LPC_KB3920_R
CLK_PCI_ICH_R
FSA
FSC
ALPRS355000
AL8SP513000
AL000875000
+3V_VDD_CLK
27M_SEL
CG_XIN
CG_XOUT
U18
U18
9
VDD_PCI
16
VDD_48
23
VDD_PLL3
4
VDD_REF
46
VDD_SRC
62
VDD_CPU
19
VDD_96_IO
27
VDD_PLL3_IO
33
VDD_SRC_IO_1
52
VDD_SRC_IO_3
43
VDD_SRC_IO_2
56
VDD_CPU_IO
8
PCI0/CR#_A
10
PCI1/CR#_B
11
PCI2/TME
12
PCI3
13
PCI4/LCDCLK_SEL
14
PCIF5/ITP_EN
3
XTAL_IN
2
XTAL_OUT
17
USB_48/FSA
64
FSB/TEST/MODE
5
REF0/FSC/TESTSEL
65
VSS_BODY
15
VSS_PCI
18
VSS_48
22
VSS_IO
26
VSS_PLL3
59
VSS_CPU
30
VSS_SRC1
36
VSS_SRC2
49
VSS_SRC3
1
VSS_REF
CK505
CK505
QFN
QFN
SRC5/PCI_STOP#
SRC5#/CPU_STOP#
SRC11#/CR#_G
SRC0#/DOT96#
CKPWRGD/PWRDW N#
55
NC
CGCLK_SMB
7
SCLK
SDA
CPU0
CPU0#
CPU1
CPU1#
SRC8/ITP
SRC8#/ITP#
SRC10
SRC10#
SRC11/CR#_H
SRC9
SRC9#
SRC7/CR#_F
SRC7#/CR#_E
SRC6
SRC6#
SRC4
SRC4#
SRC3/CR#_C
SRC3#/CR#_D
SRC2/SATA
SRC2#/SATA#
SRC1/SE1
SRC1#/SE2
SRC0/DOT96
SLG8SP513
SLG8SP513
CGDAT_SMB CG_XOUT
6
45
44
61
60
58
57
54
53
41
42
CLK_WLAN_OE#_R
40
CLK_SATA_OE#_R
39
37
38
51
50
48
47
34
35
31
32
28
29
24
25
20
21
63
R254 475/F_4 R254 475/F_4
R249 475/F_4 R249 475/F_4
Change U18 footprint 8/20
PM_STPPCI# [14]
PM_STPCPU# [14]
CLK_CPU_BCLKP [4]
CLK_CPU_BCLKN [4]
CLK_MCH_BCLKP [6]
CLK_MCH_BCLKN [6]
CLK_CPU_ITPP [4]
CLK_CPU_ITPN [4]
CLK_PCIE_WLANP [21]
CLK_PCIE_WLANN [21]
CLK_PCIE_SATAP [12]
CLK_PCIE_SATAN [12]
CLK_PCIE_LANP [22]
CLK_PCIE_LANN [22]
CLK_PCIE_ICHP [13]
CLK_PCIE_ICHN [13]
CLK_PCIE_3GPLLP [7]
CLK_PCIE_3GPLLN [7]
CLK_DREFSSCLKP [7]
CLK_DREFSSCLKN [7]
CLK_PCIE_WWANP [21]
CLK_PCIE_WWANN [21]
CLK_DREFCLKP [7]
CLK_DREFCLKN [7]
CK_PWG [14]
CLK_WLAN_OE# [21]
CLK_SATA_OE# [14]
DB-ADD BOM R249 475ohm
+3V
R255
R255
10K/F_4
10K/F_4
1 2
TME
+3V
R240 10K/J_4 R240 10K/J_4
R244 10K/J_4 R244 10K/J_4
ITP_EN Pin 53/54
0
1
R239 10K/J_4 R239 10K/J_4
LCDCLK_SEL Pin 20/21 Pin 24/25
0
DOT_96/DOT96# LCDCLK/LCDCLK#
1
SRC_0/SRC_0# 27M/27M_SS
0=overclocking
of CPU and
SRC Allowed
1 = overclocking
of CPU and SRC
not Allowed
CLK_PCI_ICH_R
CLK_LPC_KB3920_R
SRC_8/SRC_8#
ITP/ITP#
27M_SEL
D D
C C
C387 33P/50V_4 C387 33P/50V_4
C386 33P/50V_4 C386 33P/50V_4
CLK_WWAN_OE# [21]
CLK_MCH_OE# [7]
CLK_LPC_DEBUG [21]
CLK_LPC_KB3920 [23]
CLK_PCI_ICH [13]
CLK_ICH_48M [14]
CPU_BSEL0
CPU_BSEL1 FSB
CLK_ICH_14M [14]
CPU_BSEL2
ICS ICS9LPRS355BKLF
SLG8SP513VTR Silego
Realtek
B B
RTM875N-606-VD-GR
REF
DOT96
SRC
FSC
FSB FSA CPU
0
0
0
0
1
1
1
1R e s e r v e d
CPU Clock select
CPU_BSEL0 [4]
A A
+1.05V
CPU_BSEL2 [4]
+1.05V
5
(MHz)
0
0 266.6
1
133.3
0
0
200.0
1
1
166.6
1
0
0
333.3
1
0
100.0
0
1
400.0
1
1
6/27
CPU_BSEL0
R198 1K/F_4 R198 1K/F_4
CPU_BSEL1
R202 1K/F_4 R202 1K/F_4
CPU_BSEL2
R201 1K/F_4 R201 1K/F_4
(MHz)
100.0
PCI
(MHz)
33.3 14.318
(MHz)
R199 *0_4/S R199 *0_4/S
R203 1K/F_4 R203 1K/F_4
R200 *0_4/S R200 *0_4/S
1K to NB only when
XDP is implement.No
XDP can use 0 ohm
(MHz)
96.0 48.0
96.0 48.0 100.0 33.3 14.318
96.0 48.0 100.0 33.3 14.318
96.0 48.0 100.0 33.3 14.318
96.0 48.0 100.0 33.3 14.318
96.0 48.0 100.0 33.3 14.318
96.0 48.0 100.0 33.3 14.318
USB
(MHz)
MCH_BSEL0 [7]
MCH_BSEL1 [7] CPU_BSEL1 [4]
MCH_BSEL2 [7]
4
+3V
CLK_WLAN_OE#
CLK_WWAN_OE#
CLK_SATA_OE#_R
+3V
Change to 2.2K ohm 8/14
R233
R279
R279
Q14
Q14
2.2K/4
2.2K/4
2
2N7002
2N7002
2N7002
2N7002
3
3
+3V
Q13
Q13
2
3
PDAT_SMB [14]
R233
2.2K/4
2.2K/4
CGDAT_SMB
1
CGCLK_SMB
1
CGDAT_SMB [16,21]
CGCLK_SMB [16,21] PCLK_SMB [14]
2
1%
1%
1%
CLK_MCH_OE#
PM_STPPCI#
PM_STPCPU#
CLK_LPC_DEBUG
CLK_LPC_KB3920
CLK_PCI_ICH
CLK_ICH_48M
CLK_ICH_14M
For EMI reserve
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Wednesday, August 26, 2009 3 31
Date: Sheet
Wednesday, August 26, 2009 3 31
Date: Sheet
Wednesday, August 26, 2009 3 31
Date: Sheet
R253 10K/J_4 R253 10K/J_4
R263 10K/J_4 R263 10K/J_4
R247 10K/J_4 R247 10K/J_4
R259 10K/J_4 R259 10K/J_4
+3V
R280 *2.2K/J_4 R280 *2.2K/J_4
R264 *2.2K/J_4 R264 *2.2K/J_4
C362 10P/50V_4 C362 10P/50V_4
C365 10P/50V_4 C365 10P/50V_4
C361 10P/50V_4 C361 10P/50V_4
C358 *33P/50V_4 C358 *33P/50V_4
C385 *33P/50V_4 C385 *33P/50V_4
352-(&74/
352-(&74/
352-(&74/
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
CLOCK GENERATOR
CLOCK GENERATOR
CLOCK GENERATOR
1
1A
1A
1A
of
of
of
1
2
3
4
5
6
7
8
Penryn SFF - Host Bus (CPU)
http://hobi-elektronika.net
04
H_A#[3..16] [6]
A A
H_ADSTB#0 [6]
H_REQ#[0..4] [6]
H_A#[17..35] [6]
B B
H_A20M# [12]
H_FERR# [12]
H_IGNNE# [12]
H_STPCLK# [12]
H_INTR [12]
H_NMI [12]
H_SMI# [12]
H_A#[3..16]
H_REQ#[0..4]
H_A#[17..35]
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33 H_D#29
H_A#34
H_A#35
AA1
AB4
AC5
AD2
AD4
AA5
AE5
AB2
AC1
AN1
AK4
AG1
AT4
AK2
AT2
AH2
AF4
AJ5
AH4
AM4
AP4
AR5
AJ1
AL1
AM2
AU5
AP2
AR1
AN5
F10
AG5
AL5
W1
R1
R5
U1
W5
C7
D4
C9
C5
H8
P2
V4
T4
T2
Y4
P4
F8
E5
V2
Y2
J9
F4
U13A
U13A
A[3]#
A[4]#
A[5]#
A[6]#
A[7]#
A[8]#
A[9]#
A[10]#
A[11]#
A[12]#
A[13]#
A[14]#
A[15]#
A[16]#
ADSTB[0]#
REQ[0]#
REQ[1]#
REQ[2]#
REQ[3]#
REQ[4]#
A[17]#
A[18]#
A[19]#
A[20]#
A[21]#
A[22]#
A[23]#
A[24]#
A[25]#
A[26]#
A[27]#
A[28]#
A[29]#
A[30]#
A[31]#
A[32]#
A[33]#
A[34]#
A[35]#
ADSTB[1]#
A20M#
FERR#
IGNNE#
STPCLK#
LINT0
LINT1
SMI#
RSVD01
RSVD02
RSVD03
RSVD04
RSVD05
RSVD06
RSVD07
ADDR GROUP 0 ADDR GROUP 1
ADDR GROUP 0 ADDR GROUP 1
CONTROL
CONTROL
XDP/ITP SIGNALS
XDP/ITP SIGNALS
THERMAL
THERMAL
PROCHOT#
THERMDA
THERMDC
ICH
ICH
THERMTRIP#
H CLK
H CLK
ADS#
BNR#
BPRI#
DEFER#
DRDY#
DBSY#
BR0#
IERR#
INIT#
LOCK#
RESET#
RS[0]#
RS[1]#
RS[2]#
TRDY#
HIT#
HITM#
BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
DBR#
BCLK[0]
BCLK[1]
RESERVED
RESERVED
M4
J5
L5
N5
F38
J1
M2
B40
D8
N1
G5
K2
H4
K4
L1
H2
F2
AY8
BA7
BA5
AY2
AV10
AV2
AV4
AW7
AU1
AW5
AV8
J7
D38
BB34
BD34
B10
A35
C35
H_IERR#
ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_BPM#4
ITP_BPM#5
ITP_TCK
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
SYS_RST#
H_PROCHOT#_D
H_THERMDA
H_THERMDC
PM_THRMTRIP#
CLK_CPU_BCLKP
CLK_CPU_BCLKN
H_ADS# [6]
H_BNR# [6]
H_BPRI# [6]
H_DEFER# [6]
H_DRDY# [6]
H_DBSY# [6]
H_BR0# [6]
H_INIT# [12]
H_LOCK# [6]
H_RESET# [6]
H_RS#0 [6]
H_RS#1 [6]
H_RS#2 [6]
H_TRDY# [6]
H_HIT# [6]
H_HITM# [6]
SYS_RST# [14]
H_THERMDA [25]
H_THERMDC [25]
PM_THRMTRIP# [7,12]
CLK_CPU_BCLKP [3]
CLK_CPU_BCLKN [3]
H_D#[0..15] [6]
H_DSTBN#0 [6]
H_DSTBP#0 [6]
H_DINV#0 [6]
H_D#[16..31] [6]
+1.05V
R62
R62
1K/F_4
1K/F_4
R65
R65
2K/F_4
2K/F_4
>ĂLJŽƵƚEŽƚĞ
WůĂĐĞǀŽůƚĂŐĞĚŝǀŝĚĞƌ
ǁŝƚŚŝŶϬϱΗŽĨ'd>Z&ƉŝŶ
H_D#[0..15] H_D#[32..47]
H_D#[16..31]
H_DSTBN#1 [6] H_ADSTB#1 [6]
H_DSTBP#1 [6]
H_DINV#1 [6]
CPU_BSEL0 [3]
CPU_BSEL1 [3]
CPU_BSEL2 [3]
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#30
H_D#31
V_CPU_GTLREF
G43
E43
H40
H44
G39
E41
K44
N41
M40
G41
M44
K40
P40
P44
V40
V44
AB44
R41
W41
N43
U41
AA41
AB40
AD40
AC41
AA43
U43
W43
R43
AW43
E37
D40
C43
AE41
AY10
AC43
A37
C37
B38
F40
J43
L41
T40
L43
J41
Y40
Y44
T44
U13B
U13B
D[0]#
D[1]#
D[2]#
D[3]#
D[4]#
D[5]#
D[6]#
D[7]#
D[8]#
D[9]#
D[10]#
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#
D[16]#
D[17]#
D[18]#
D[19]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#
GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
BSEL[0]
BSEL[1]
BSEL[2]
Penryn_SFF_1p0
Penryn_SFF_1p0
DATA GROUP 0 DATA GROUP 1
DATA GROUP 0 DATA GROUP 1
MISC
MISC
D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
DATA GROUP 2 DATA GROUP 3
DATA GROUP 2 DATA GROUP 3
D[45]#
D[46]#
D[47]#
DSTBN[2]#
DSTBP[2]#
DINV[2]#
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#
DSTBN[3]#
DSTBP[3]#
DINV[3]#
COMP[0]
COMP[1]
COMP[2]
COMP[3]
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#
AP44
AR43
AH40
AF40
AJ43
AG41
AF44
AH44
AM44
AN43
AM40
AK40
AG43
AP40
AN41
AL41
AK44
AL43
AJ41
AV38
AT44
AV40
AU41
AW41
AR41
BA37
BB38
AY36
AT40
BC35
BC39
BA41
BB40
BA35
AU43
AY40
AY38
BC37
AE43
AD44
AE1
AF2
G7
B8
C41
E7
D10
BD10
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
COMP0
R58 27.4/F_4 R58 27.4/F_4
COMP1
R59 54.9/F_4 R59 54.9/F_4
COMP2
R223 27.4/F_4 R223 27.4/F_4
COMP3
R224 54.9/F_4 R224 54.9/F_4
H_DPRSTP# [7,12]
H_DPSLP# [12]
H_DPWR# [6]
H_PWRGOOD [12]
H_CPUSLP# [6]
H_D#[48..63]
H_DSTBN#3 [6]
H_DSTBP#3 [6]
H_DINV#3 [6]
>ĂLJŽƵƚŶŽƚĞ
ĐŽŵƉϬϮŽсϮϳϰŽŚŵ>фϬϱΗ
ĐŽŵƉϭϯŽсϱϱŽŚŵ>фϬϱΗ
H_D#[32..47] [6]
H_DSTBN#2 [6]
H_DSTBP#2 [6]
H_DINV#2 [6]
H_D#[48..63] [6]
Penryn_SFF_1p0
2
Penryn_SFF_1p0
VTT0
VTT1
VTAP
DBR#
DBA#
BPM0#
BPM1#
BPM2#
BPM3#
BPM4#
BPM5#
GND_0
GND_1
*CONN_ITP700Flex
*CONN_ITP700Flex
NC0
NC1
+1.05V
+1.05V
C344 *0.1U/10V_4 C344 *0.1U/10V_4 R53 *0/J_4 R53 *0/J_4
27
28
C343 *0.1U/10V_4 C343 *0.1U/10V_4
26
SYS_RST# H_RESET#
25
24
ITP_BPM#0
23
ITP_BPM#1
21
ITP_BPM#2
19
ITP_BPM#3
17
ITP_BPM#4
15
ITP_BPM#5
13
4
6
29
30
3
4
H_PROCHOT#_D
+1.05V
R66 56/J_4 R66 56/J_4
+1.05V
R122 51/J_4 R122 51/J_4
R120 51/J_4 R120 51/J_4
R121 51/J_4 R121 51/J_4
R194 *51/J_4 R194 *51/J_4
R117 51/J_4 R117 51/J_4
R112 51/J_4 R112 51/J_4
R42
R42
56/J_4
56/J_4
H_PROCHOT# [29]
H_IERR#
ITP_BPM#5
ITP_TDI
ITP_TMS
ITP_TDO
ITP_TCK
ITP_TRST#
5
Layout Note:
Place Resistor close to CPU
with Stub length <200mils.
6
1%
1%
1%
352-(&74/
352-(&74/
352-(&74/
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Penryn SFF (Host Bus)
Penryn SFF (Host Bus)
Penryn SFF (Host Bus)
Wednesday, August 26, 2009 4 31
Date: Sheet
Wednesday, August 26, 2009 4 31
Date: Sheet
Wednesday, August 26, 2009 4 31
Date: Sheet
7
of
of
of
8
1A
1A
1A
C C
Populate ITP700Flex for bringup
ITP_TDI
ITP_TMS
ITP_TCK
ITP_TDO
ITP_TRST#
ITP_TCK
CLK_CPU_ITPN [3]
CLK_CPU_ITPP [3]
D D
Layout Note:
Place couple 0.1uF
Decoupling caps with in
0.1" ITP connector.
R193 *0_4 R193 *0_4
R192 *1K/F_4 R192 *1K/F_4
1
CN12
CN12
1
TDI
2
TMS
5
TCK
7
TDO
3
TRST#
12
RESET#
11
FBO
8
BCLKN
9
BCLKP
10
GND0
14
GND1
16
GND2
18
GND3
20
GND4
22
GND5
1
Penryn SFF - Power (CPU)
+VCC_CORE
U13C
U13C
F32
VCC[001]
VCC[002]
VCC[003]
VCC[004]
VCC[005]
VCC[006]
VCC[007]
VCC[008]
VCC[009]
VCC[010]
VCC[011]
VCC[012]
VCC[013]
VCC[014]
VCC[015]
VCC[016]
VCC[017]
VCC[018]
VCC[019]
VCC[020]
VCC[021]
VCC[022]
VCC[023]
VCC[024]
VCC[025]
VCC[026]
VCC[027]
VCC[028]
VCC[029]
VCC[030]
VCC[031]
VCC[032]
VCC[033]
VCC[034]
VCC[035]
VCC[036]
VCC[037]
VCC[038]
VCC[039]
VCC[040]
VCC[041]
VCC[042]
VCC[043]
VCC[044]
VCC[045]
VCC[046]
VCC[047]
VCC[048]
VCC[049]
VCC[050]
VCC[051]
VCC[052]
VCC[053]
VCC[054]
VCC[055]
VCC[056]
VCC[057]
VCC[058]
VCC[059]
VCC[060]
VCC[061]
VCC[062]
VCC[063]
VCC[064]
VCC[065]
VCC[066]
VCC[067]
Penryn_SFF_1p0
Penryn_SFF_1p0
C141
C141
10U/6.3V_6
10U/6.3V_6
C189
C189
10U/6.3V_6
10U/6.3V_6
C216
C216
10U/6.3V_6
10U/6.3V_6
C229
C229
1U/6.3V_4
1U/6.3V_4
C207
C207
1U/6.3V_4
1U/6.3V_4
C173
C173
1U/6.3V_4
1U/6.3V_4
VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]
VCCP_001
VCCP_002
VCCP_003
VCCP_004
VCCP_005
VCCP_006
VCCP_007
VCCP_008
VCCP_009
VCCP_010
VCCP_011
VCCP_012
VCCP_013
VCCP_014
VCCP_015
VCCP_016
VCCA[01]
VCCA[02]
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
VCCSENSE
VSSSENSE
C188
C188
10U/6.3V_6
10U/6.3V_6
C218
C218
10U/6.3V_6
10U/6.3V_6
C146
C146
10U/6.3V_6
10U/6.3V_6
C211
C211
1U/6.3V_4
1U/6.3V_4
C179
C179
1U/6.3V_4
1U/6.3V_4
C223
C223
1U/6.3V_4
1U/6.3V_4
G33
H32
J33
K32
L33
M32
N33
+VCC_CORE
C191
C191
10U/6.3V_6
10U/6.3V_6
+VCC_CORE
C140
C140
10U/6.3V_6
10U/6.3V_6
+VCC_CORE
C219
C219
10U/6.3V_6
10U/6.3V_6
+VCC_CORE
C210
C210
1U/6.3V_4
1U/6.3V_4
+VCC_CORE
C186
C186
1U/6.3V_4
1U/6.3V_4
+VCC_CORE
C224
C224
1U/6.3V_4
1U/6.3V_4
1
AA33
AB32
AC33
AD32
AE33
AF32
AG33
AH32
AJ33
AK32
AL33
AM32
AN33
AP32
AR33
AT34
AT32
AU33
AV32
AY32
BB32
BD32
AB30
R33
U33
W33
D28
D30
H30
H28
D26
H26
M30
M28
M26
P32
T32
V32
Y32
B28
B30
B26
F30
F28
F26
K30
K28
K26
P30
P28
T30
T28
V30
V28
P26
T26
V26
Y30
Y28
A A
B B
C C
D D
AB28
AD30
AD28
Y26
AB26
AD26
AF30
AF28
AH30
AH28
AF26
AH26
AK30
AK28
AM30
AM28
AP30
AP28
AK26
AM26
AP26
AT30
AT28
AV30
AV28
AY30
AY28
AT26
AV26
AY26
BB30
BB28
BD30
J11
E11
G11
J37
K38
L37
N37
P38
R37
U37
V38
W37
AA37
AB38
AC37
AE37
B34
D34
BD8
BC7
BB10
BB8
BC5
BB4
AY4
BD12
BC13
+VCC_CORE
C217
C217
10U/6.3V_6
10U/6.3V_6
C187
C187
10U/6.3V_6
10U/6.3V_6
C204
C204
10U/6.3V_6
10U/6.3V_6
C208
C208
1U/6.3V_4
1U/6.3V_4
C230
C230
1U/6.3V_4
1U/6.3V_4
C222
C222
1U/6.3V_4
1U/6.3V_4
2
+1.05V
+
+
C348
C348
220U/2.5V_3528_H1.1
220U/2.5V_3528_H1.1
VID0 [29]
VID1 [29]
VID2 [29]
VID3 [29]
VID4 [29]
VID5 [29]
VID6 [29]
R108 100/F_4 R108 100/F_4
R107 100/F_4 R107 100/F_4
C215
C215
10U/6.3V_6
10U/6.3V_6
C199
C199
10U/6.3V_6
10U/6.3V_6
C145
C145
10U/6.3V_6
10U/6.3V_6
C209
C209
1U/6.3V_4
1U/6.3V_4
C181
C181
1U/6.3V_4
1U/6.3V_4
C205
C205
1U/6.3V_4
1U/6.3V_4
2
C346
C346
0.01U/25V_4
0.01U/25V_4
+VCC_CORE
C142
C142
10U/6.3V_6
10U/6.3V_6
C221
C221
10U/6.3V_6
10U/6.3V_6
C137
C137
10U/6.3V_6
10U/6.3V_6
C174
C174
1U/6.3V_4
1U/6.3V_4
C206
C206
1U/6.3V_4
1U/6.3V_4
C183
C183
1U/6.3V_4
1U/6.3V_4
+1.05V
C123
C123
1U/6.3V_4
1U/6.3V_4
+1.05V
C238
C238
1U/6.3V_4
1U/6.3V_4
+1.05V
C232
C232
1U/6.3V_4
1U/6.3V_4
+1.5V
C345
C345
10U/6.3V_6
10U/6.3V_6
VCC_SENSE [29]
VSS_SENSE [29]
C143
C143
10U/6.3V_6
10U/6.3V_6
C138
C138
10U/6.3V_6
10U/6.3V_6
C147
C147
10U/6.3V_6
10U/6.3V_6
C182
C182
1U/6.3V_4
1U/6.3V_4
C180
C180
1U/6.3V_4
1U/6.3V_4
C228
C228
1U/6.3V_4
1U/6.3V_4
3
C190
C190
10U/6.3V_6
10U/6.3V_6
C139
C139
10U/6.3V_6
10U/6.3V_6
C144
C144
10U/6.3V_6
10U/6.3V_6
C212
C212
1U/6.3V_4
1U/6.3V_4
C184
C184
1U/6.3V_4
1U/6.3V_4
C175
C175
1U/6.3V_4
1U/6.3V_4
3
C121
C121
1U/6.3V_4
1U/6.3V_4
C234
C234
1U/6.3V_4
1U/6.3V_4
C237
C237
1U/6.3V_4
1U/6.3V_4
C236
C236
1U/6.3V_4
1U/6.3V_4
C233
C233
1U/6.3V_4
1U/6.3V_4
C122
C122
1U/6.3V_4
1U/6.3V_4
4
+VCC_CORE
http://hobi-elektronika.net
C235
C235
1U/6.3V_4
1U/6.3V_4
C240
C240
1U/6.3V_4
1U/6.3V_4
C124
C124
1U/6.3V_4
1U/6.3V_4
+1.05V
4
BD28
BB26
BD26
AB24
AB22
AD24
AD22
AF24
AF22
AH24
AH22
AK24
AK22
AM24
AM22
AP24
AP22
AT24
AT22
AV24
AV22
AY24
AY22
BB24
BB22
BD24
BD22
AB18
AB16
AD18
AD16
AB20
AD20
AF18
AF16
AH18
AH16
AF20
AH20
AK18
AK16
AM18
AM16
AP18
AP16
AK20
AM20
AP20
AT18
AT16
AV18
AV16
AY18
AY16
AT20
AV20
AY20
BB18
BB16
BD18
BD16
BB20
BD20
AM14
AP14
AT14
AV14
AY14
BB14
BD14
AF38
AG37
AJ37
AK38
B22
B24
D22
D24
F24
F22
H24
H22
K24
K22
M24
M22
P24
P22
T24
T22
V24
V22
Y24
Y22
B16
B18
B20
D16
D18
F18
F16
H18
H16
D20
F20
H20
K18
K16
M18
M16
K20
M20
P18
P16
T18
T16
V18
V16
P20
T20
V20
Y18
Y16
Y20
U13F
U13F
VCC_101
VCC_102
VCC_103
VCC_104
VCC_105
VCC_106
VCC_107
VCC_108
VCC_109
VCC_110
VCC_111
VCC_112
VCC_113
VCC_114
VCC_115
VCC_116
VCC_117
VCC_118
VCC_119
VCC_120
VCC_121
VCC_122
VCC_123
VCC_124
VCC_125
VCC_126
VCC_127
VCC_128
VCC_129
VCC_130
VCC_131
VCC_132
VCC_133
VCC_134
VCC_135
VCC_136
VCC_137
VCC_138
VCC_139
VCC_140
VCC_141
VCC_142
VCC_143
VCC_144
VCC_145
VCC_146
VCC_147
VCC_148
VCC_149
VCC_150
VCC_151
VCC_152
VCC_153
VCC_154
VCC_155
VCC_156
VCC_157
VCC_158
VCC_159
VCC_160
VCC_161
VCC_162
VCC_163
VCC_164
VCC_165
VCC_166
VCC_167
VCC_168
VCC_169
VCC_170
VCC_171
VCC_172
VCC_173
VCC_174
VCC_175
VCC_176
VCC_177
VCC_178
VCC_179
VCC_180
VCC_181
VCC_182
VCC_183
VCC_184
VCC_185
VCC_186
VCC_187
VCC_188
VCC_189
VCC_190
VCC_191
VCC_192
VCC_193
VCC_194
VCC_195
VCC_196
VCC_197
VCC_198
VCC_199
VCC_200
VCC_201
VCC_202
VCC_203
VCC_204
VCC_205
VCC_206
VCC_207
VCC_208
VCC_209
VCC_210
VCC_211
VCC_212
VCC_213
VCC_214
VCC_215
VCC_216
VCC_217
VCC_218
VCC_219
VCC_220
VCCP_017
VCCP_018
VCCP_019
VCCP_020
Penryn_SFF_1p0
Penryn_SFF_1p0
VCCP_021
VCCP_022
VCCP_023
VCCP_024
VCCP_025
VCCP_026
VCCP_027
VCCP_028
VCCP_029
VCCP_030
VCCP_031
VCCP_032
VCCP_033
VCCP_034
VCCP_035
VCCP_036
VCCP_037
VCCP_038
VCCP_039
VCCP_040
VCCP_041
VCCP_042
VCCP_043
VCCP_044
VCCP_045
VCCP_046
VCCP_047
VCCP_048
VCCP_049
VCCP_050
VCCP_051
VCCP_052
VCCP_053
VCCP_054
VCCP_055
VCCP_056
VCCP_057
VCCP_058
VCCP_059
VCCP_060
VCCP_061
VCCP_062
VCCP_063
VCCP_064
VCCP_065
VCCP_066
VCCP_067
VCCP_068
VCCP_069
VCCP_070
VCCP_071
VCCP_072
VCCP_073
VCCP_074
VCCP_075
VCCP_076
VCCP_077
VCCP_078
VCCP_079
VCCP_080
VCCP_081
VCCP_082
VCCP_083
VCCP_084
VCCP_085
VCCP_086
VCCP_087
VCCP_088
VCCP_089
VCCP_090
VCCP_091
VCCP_092
VCCP_093
VCCP_094
VCCP_095
VCCP_096
VCCP_097
VCCP_098
VCCP_099
VCCP_100
VCCP_101
VCCP_102
VCCP_103
VCCP_104
VCCP_105
VCCP_106
VCCP_107
VCCP_108
VCCP_109
VCCP_110
VCCP_111
VCCP_112
VCCP_113
VCCP_114
VCCP_115
VCCP_116
VCCP_117
VCCP_118
VCCP_119
VCCP_120
VCCP_121
VCCP_122
VCCP_123
VCCP_124
VCCP_125
VCCP_126
VCCP_127
VCCP_128
VCCP_129
VCCP_130
VCCP_131
VCCP_132
VCCP_133
VCCP_134
VCCP_135
VCCP_136
VCCP_137
VCCP_138
VCCP_139
VCCP_140
VCCP_141
VCCP_142
VCCP_143
VCCP_144
VCCP_145
5
5
AL37
AN37
AP38
B32
C33
D32
E35
E33
F34
G35
F36
H36
J35
L35
N35
K36
R35
U35
P36
V36
W35
AA35
AC35
AB36
AE35
AG35
AJ35
AF36
AL35
AN35
AK36
AP36
B12
B14
C13
D12
D14
E13
F14
F12
G13
H14
H12
J13
K14
K12
L13
L11
M14
N13
N11
K10
P14
P12
R13
R11
T14
U13
U11
V14
V12
W13
W11
P10
V10
Y14
AA13
AA11
AB14
AB12
AC13
AC11
AD14
AB10
AE13
AE11
AF14
AF12
AG13
AG11
AH14
AJ13
AJ11
AF10
AK14
AK12
AL13
AL11
AN13
AN11
AP12
AR13
AR11
AK10
AP10
AU13
AU11
L9
L7
N9
N7
R9
R7
U9
U7
W9
W7
AA9
AA7
AC9
AC7
AE9
AE7
AG9
AG7
AJ9
AJ7
AL9
AL7
AN9
AN7
AR9
AR7
A33
A13
+1.05V
AA25
AA23
AA21
AC25
AC23
AC21
AE25
AE23
AE21
AG25
AG23
AG21
AJ25
AJ23
AJ21
AL25
AL23
AL21
AN25
AN23
AN21
AR25
AR23
AR21
AU25
AU23
AU21
AW25
AW23
AW21
BA25
BA23
BA21
BC25
BC23
BC21
AA19
AA17
AC19
AC17
AE19
AE17
AG19
AG17
AJ19
AJ17
AL19
AL17
AN19
AN17
AR19
AR17
AU19
AU17
AW19
AW17
BA19
BA17
BC19
BC17
AD12
W25
W23
W21
W19
W17
M12
M10
W15
G25
G23
G21
J25
J23
J21
L25
L23
L21
N25
N23
N21
R25
R23
R21
U25
U23
U21
C17
C19
E19
E17
G19
G17
J19
J17
L19
L17
N19
N17
R19
R17
U19
U17
C11
C15
E15
G15
H10
J15
L15
N15
T12
R15
U15
T10
Y12
6
U13E
U13E
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
Penryn_SFF_1p0
Penryn_SFF_1p0
6
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325
VSS_326
VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350
VSS_351
VSS_352
VSS_353
VSS_354
VSS_355
VSS_356
VSS_357
VSS_358
VSS_359
VSS_360
VSS_361
VSS_362
VSS_363
VSS_364
VSS_365
VSS_366
VSS_367
VSS_368
VSS_369
VSS_370
VSS_371
VSS_372
VSS_373
VSS_374
VSS_375
VSS_376
VSS_377
VSS_378
VSS_379
VSS_380
VSS_381
VSS_382
VSS_383
VSS_384
VSS_385
VSS_386
VSS_387
VSS_388
VSS_389
VSS_390
VSS_391
VSS_392
VSS_393
VSS_394
VSS_395
AA15
AC15
Y10
AD10
AH12
AE15
AG15
AJ15
AH10
AM12
AL15
AN15
AR15
AM10
AT12
AV12
AW13
AW11
AY12
AU15
AW15
AT10
BA13
BA11
BB12
BC11
BA15
BC15
B6
D6
E9
F6
G9
H6
K8
K6
M8
M6
P8
P6
T8
T6
V8
V6
U5
Y8
Y6
AB8
AB6
AD8
AD6
AF8
AF6
AH8
AH6
AK8
AK6
AM8
AM6
AP8
AP6
AT8
AT6
AU9
AV6
AU7
AW9
AY6
BA9
BB6
BC9
BD6
B4
C3
E3
G3
J3
L3
N3
R3
U3
W3
AA3
AC3
AE3
AG3
AJ3
AL3
AN3
AR3
AU3
AW3
BA3
BC3
D2
E1
G1
AW1
BA1
BB2
A41
A39
A29
A27
A31
A25
A23
A21
A19
A17
A11
A15
A7
A5
A9
BD4
7
U13D
U13D
B42
F44
D44
D42
F42
H42
K42
M42
P42
T42
V42
Y42
AB42
AD42
AF42
AH42
AK42
AM42
AP42
AY44
AV44
AT42
AV42
AY42
BA43
BB42
C39
E39
G37
H38
J39
L39
M38
N39
R39
T38
U39
W39
Y38
AA39
AC39
AD38
AE39
AG39
AH38
AJ39
AL39
AM38
AN39
AR39
AR37
AT38
AU39
AU37
AW39
AW37
BA39
BC41
BD40
BD38
B36
H34
D36
K34
M34
M36
P34
T34
V34
T36
Y34
AB34
AD34
Y36
AD36
AF34
AH34
AH36
AK34
AM34
AP34
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
1%
1%
1%
Date: Sheet
Date: Sheet
Date: Sheet
7
VSS[082]
VSS[001]
VSS[002]
VSS[083]
VSS[003]
VSS[084]
VSS[004]
VSS[085]
VSS[005]
VSS[086]
VSS[006]
VSS[087]
VSS[007]
VSS[088]
VSS[008]
VSS[089]
VSS[009]
VSS[090]
VSS[010]
VSS[091]
VSS[011]
VSS[092]
VSS[012]
VSS[093]
VSS[013]
VSS[094]
VSS[014]
VSS[095]
VSS[015]
VSS[096]
VSS[016]
VSS[097]
VSS[017]
VSS[098]
VSS[018]
VSS[099]
VSS[019]
VSS[100]
VSS[020]
VSS[101]
VSS[021]
VSS[102]
VSS[022]
VSS[103]
VSS[023]
VSS[104]
VSS[024]
VSS[105]
VSS[025]
VSS[106]
VSS[026]
VSS[107]
VSS[027]
VSS[108]
VSS[028]
VSS[109]
VSS[029]
VSS[110]
VSS[030]
VSS[111]
VSS[031]
VSS[112]
VSS[032]
VSS[113]
VSS[033]
VSS[114]
VSS[034]
VSS[115]
VSS[035]
VSS[116]
VSS[036]
VSS[117]
VSS[037]
VSS[118]
VSS[038]
VSS[119]
VSS[039]
VSS[120]
VSS[040]
VSS[121]
VSS[041]
VSS[122]
VSS[042]
VSS[123]
VSS[043]
VSS[124]
VSS[044]
VSS[125]
VSS[045]
VSS[126]
VSS[046]
VSS[127]
VSS[047]
VSS[128]
VSS[048]
VSS[129]
VSS[049]
VSS[130]
VSS[050]
VSS[131]
VSS[051]
VSS[132]
VSS[052]
VSS[133]
VSS[053]
VSS[134]
VSS[054]
VSS[135]
VSS[055]
VSS[136]
VSS[056]
VSS[137]
VSS[057]
VSS[138]
VSS[058]
VSS[139]
VSS[059]
VSS[140]
VSS[060]
VSS[141]
VSS[061]
VSS[142]
VSS[062]
VSS[143]
VSS[063]
VSS[144]
VSS[064]
VSS[145]
VSS[065]
VSS[146]
VSS[066]
VSS[147]
VSS[148]
VSS[067]
VSS[068]
VSS[149]
VSS[069]
VSS[150]
VSS[070]
VSS[151]
VSS[071]
VSS[152]
VSS[072]
VSS[153]
VSS[073]
VSS[154]
VSS[074]
VSS[155]
VSS[075]
VSS[156]
VSS[076]
VSS[157]
VSS[077]
VSS[158]
VSS[078]
VSS[159]
VSS[079]
VSS[160]
VSS[080]
VSS[161]
VSS[081]
VSS[162]
VSS[163]
Penryn_SFF_1p0
Penryn_SFF_1p0
352-(&74/
352-(&74/
352-(&74/
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Penryn SFF (Power)
Penryn SFF (Power)
Penryn SFF (Power)
Wednesday, August 26, 2009 5 31
Wednesday, August 26, 2009 5 31
Wednesday, August 26, 2009 5 31
AM36
AR35
AU35
AV34
AW35
AW33
AY34
AT36
AV36
BA33
BC33
BB36
BD36
C27
C29
C31
E29
E27
G29
G27
E31
G31
J29
J27
L29
L27
N29
N27
J31
L31
N31
R29
R27
U29
U27
R31
U31
W29
W27
W31
AA29
AA27
AC29
AC27
AA31
AC31
AE29
AE27
AG29
AG27
AJ29
AJ27
AE31
AG31
AJ31
AL29
AL27
AN29
AN27
AL31
AN31
AR29
AR27
AR31
AU29
AU27
AW29
AW27
AU31
AW31
BA29
BA27
BC29
BC27
BA31
BC31
C21
C23
C25
E25
E23
E21
8
05
of
of
of
8
1A
1A
1A
1
2
3
4
5
6
7
8
Cantiga SFF - Host Bus (CLG)
http://hobi-elektronika.net
06
U12A
L11
K10
K12
M10
N11
W9
P10
W7
W3
V10
W11
U11
AC11
AC9
Y10
AB6
AA9
AB10
AA1
AC3
AC7
AD12
AB4
AD10
AA11
AB2
AD4
AE7
AD2
AD6
AE3
AG9
AG7
AE11
AK6
AF6
AJ9
AH6
AF12
AH4
AJ7
AE9
J11
L17
K18
J7
H6
J3
H4
G3
L1
M6
L7
K6
M4
K4
P6
V6
V2
N9
P4
U9
V4
U1
U7
Y4
Y6
B6
D4
G9
U12A
H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63
H_SWING
H_RCOMP
H_CPURST#
H_CPUSLP#
H_AVREF
H_DVREF
CANTIGASFF_1p0
CANTIGASFF_1p0
H_ADSTB#_0
H_ADSTB#_1
HOST
HOST
H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35
H_ADS#
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
H_RS#_0
H_RS#_1
H_RS#_2
L15
B14
C15
D12
F14
G17
B12
J15
D16
C17
D14
K16
F16
B16
C21
D18
J19
J21
B18
D22
G19
J17
L21
L19
G21
D20
K22
F18
K20
F20
F22
B20
A19
F10
A15
C19
C9
B8
C11
E5
D6
AH10
AJ11
G11
H2
C7
F8
A11
D8
L9
N7
AA7
AG3
K2
N3
AA3
AF4
L3
M2
Y2
AF2
J13
L13
C13
G13
G15
F4
F2
G7
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_RESET# [4]
H_CPUSLP# [4]
H_D#[0..63]
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_SWING
H_RCOMP
H_AVREF
+1.05V
C194
C194
0.1U/10V_4
0.1U/10V_4
R72
R72
1K/F_4
1K/F_4
R67
R67
2K/F_4
2K/F_4
H_D#[0..63] [4]
H_SWING
H_RCOMP
A A
+1.05V
R89
R89
221/F_4
B B
C C
221/F_4
R92
R92
100/F_4
100/F_4
Layout Note:
H_RCOMP trace should be
10-mil wide with 20-mil spacing.
R77
R77
24.9/F_4
24.9/F_4
H_A#[3..35]
H_A#[3..35] [4]
H_ADS# [4]
H_ADSTB#0 [4]
H_ADSTB#1 [4]
H_BNR# [4]
H_BPRI# [4]
H_BR0# [4]
H_DEFER# [4]
H_DBSY# [4]
CLK_MCH_BCLKP [3]
CLK_MCH_BCLKN [3]
H_DPWR# [4]
H_DRDY# [4]
H_HIT# [4]
H_HITM# [4]
H_LOCK# [4]
H_TRDY# [4]
H_DINV#0 [4]
H_DINV#1 [4]
H_DINV#2 [4]
H_DINV#3 [4]
H_DSTBN#0 [4]
H_DSTBN#1 [4]
H_DSTBN#2 [4]
H_DSTBN#3 [4]
H_DSTBP#0 [4]
H_DSTBP#1 [4]
H_DSTBP#2 [4]
H_DSTBP#3 [4]
H_REQ#0 [4]
H_REQ#1 [4]
H_REQ#2 [4]
H_REQ#3 [4]
H_REQ#4 [4]
H_RS#0 [4]
H_RS#1 [4]
H_RS#2 [4]
D D
352-(&74/
352-(&74/
352-(&74/
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Cantiga SFF (Host Bus)
Cantiga SFF (Host Bus)
1%
1%
1%
1
2
3
4
5
6
Cantiga SFF (Host Bus)
Wednesday, August 26, 2009 6 31
Date: Sheet
Wednesday, August 26, 2009 6 31
Date: Sheet
Wednesday, August 26, 2009 6 31
Date: Sheet
7
8
1A
1A
1A
of
of
of
1
Cantiga SFF - DMI/VGA (CLG)
Intel GS40/GS45 Strapping Signals and Configu r ation
Pin Name Strap Description Configuration
CFG2:0 FSB Frequency
CFG4:3
CFG5
CFG6
CFG7 Intel Management
A A
CFG8
CFG9
CFG10
CFG11 Reserved
CFG12 ALLZ 1 = Disabled
CFG13 XOR 1 = Disabled
CFG14 Reserved
CFG15 Reserved
CFG16 FSB Dynamic ODT
CFG17 Reserved
CFG18 Reserved
CFG19 DMI Lane Reversal 1 = Reverse Lanes
CFG20
SDVO_C TRLDATA
L_DDC_DATA
DDPC_CTRLDATA
The recommended pu ll-u p r esistor value is 4.02 kȍ ±1%
ΘΘΘΘ
The recommended pull-down resistor value is 2.21 kȍ ±1%.
ΘΘΘΘ
B B
C C
DMI x2 Select
ITPM Ho st Inte rface
Engine Crypto Strap
PCIE Graphics Lane
PCIE Loopback
enable
Digital Displ ayPort
(SDVO/DP/iHDMI)
Concurrent with
PCIE
SDVO Present
Local Flat Panel
(LFP) Present
Digital Display
Present
Check list note : CL_REF=0.35V
(15mils)
MCH_CLVREF
R31 1K/F_4 R31 1K/F_4
+1.8VSUS
D D
000 = FSB1066
010 = FSB800
011 = FSB667
Other = Reserved
Reserved
1 = DMI x 4
0 = DMI x2
1 = ITPM disabled
0 = ITPM ena bled
1 = Intel Mana gement Engine Crypto TLS
cipher suite with confidentiality
0 = Intel Mana gement Engine Crypto Transport
Layer Security (TLS) cip her suite with no
confidentiality
Reserved
1 = Normal operation : Lane Numbered in Order
0 = Reverse Lanes
1 = Disabled
0 = Enabled
0 = ALLZ mode enabled
0 = XOR mode enabled
1 = Dynamic ODT enabled
0 = Dynamic ODT disabled
0 = Normal operation : Lane Numbered in Order
1 = Digital DisplayPort (SDVO/DP/iHDMI) and
PCIE are operating simu ltaneously via the
PEG port
0 = Digital DisplayPort (SDVO/DP/iHDMI) or
PCIE are operational
1 = SDVO/HDMI/DP interface enabled
0 = No SDVO/HDMI/DP interface disabled
1 = LFP Card Present; PC IE disabled
0 = LFP Disable
1 = Digital display (iHDMI/DP) devide present
0 = Digital display (iHDMI/DP) interface absent
MCH_BSEL0 [3]
MCH_BSEL1 [3]
MCH_BSEL2 [3]
PM_SYNC# [14]
H_DPRSTP# [4,12]
PM_EXTTS#0 [16]
DELAY_VR_PWRGOOD [14,29]
PCI_PLTRST# [13]
PM_THRMTRIP# [4,12]
DPRSLPVR [14,29]
C103
C103
0.1U/10V_4
0.1U/10V_4
SM_RCOMP_VOH
C67
C67
R34
R34
0.01U/25V_4
0.01U/25V_4
3.01K/F_4
3.01K/F_4
SM_RCOMP_VOL
C68
C68
R29
R29
0.01U/25V_4
0.01U/25V_4
1K/F_4
1K/F_4
R39 100/J_4 R39 100/J_4
R195 *0_4/S R195 *0_4/S
+1.05V
R44
R44
1K/F_4
1K/F_4
R46
R46
499/F_4
499/F_4
2
T19T19
T37T37
T38T38
T39T39
T36T36
T18T18
T17T17
C78
C78
2.2U/6.3V_6
2.2U/6.3V_6
C77
C77
2.2U/6.3V_6
2.2U/6.3V_6
T14T14
T16T16
T15T15
T13T13
MCH_CFG5
MCH_CFG7
MCH_CFG12
MCH_CFG13
MCH_CFG16
MCH_CFG19
MCH_CFG20
PM_EXTTS#0
PM_EXTTS#1
RSTIN#_MCH
AN11
AM10
AK10
AL11
AW42
BB20
BE19
BF20
BF18
AN45
AP44
AT44
AN47
AY39
BB18
BE55
BH55
BK55
BK54
BL54
BL52
BL49
J43
L43
J41
L41
F12
C27
D30
J9
K26
G23
G25
J25
L25
L27
F24
D24
D26
J23
B26
A23
C23
B24
B22
K24
C25
L23
L33
K32
K34
J35
F6
J39
L39
K28
K36
A7
A49
A52
A54
B54
D55
G55
BL7
BL4
BL2
BK2
BK1
BH1
BE1
G1
U12B
U12B
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD14
RSVD15
RSVD17
RSVD20
RSVD22
RSVD23
RSVD24
RSVD25
ME_JTAG_TCK
ME_JTAG_TDI
ME_JTAG_TDO
ME_JTAG_TMS
CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20
PM_SYNC#
PM_DPRSTP#
PM_EXT_TS#_0
PM_EXT_TS#_1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20
NC_21
NC_22
CANTIGASFF_1p0
CANTIGASFF_1p0
3
4
http://hobi-elektronika.net
BB32
SA_CK_0
BA25
SA_CK_1
BA33
SB_CK_0
BA23
SB_CK_1
BA31
SA_CK#_0
BC25
SA_CK#_1
BC33
SB_CK#_0
BB24
SB_CK#_1
BC35
SA_CKE_0
BE33
SA_CKE_1
BE37
SB_CKE_0
BC37
SB_CKE_1
BK18
SA_CS#_0
BK16
SA_CS#_1
BE23
SB_CS#_0
BC19
SB_CS#_1
BJ17
SA_ODT_0
BJ19
SA_ODT_1
BC17
SB_ODT_0
BE17
SB_ODT_1
SM_RCOMP
SM_RCOMP#
SM_RCOMP_VOH
SM_RCOMP_VOL
SM_VREF
SM_PWROK
SM_REXT
SM_DRAMRST#
DPLL_REF_CLK
DDR CLK/ CONTROL/COMPENSATION
DDR CLK/ CONTROL/COMPENSATION
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
PEG_CLK
PEG_CLK#
CLK
CLK
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI
DMI
GRAPHICS VID ME
GRAPHICS VID ME
DDPC_CTRLCLK
DDPC_CTRLDATA
SDVO_CTRLCLK
SDVO_CTRLDATA
MISC
MISC
HDA
HDA
DMI_TXN_3
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VID_4
GFX_VR_E N
CL_CLK
CL_DATA
CL_PWROK
CL_RST#
CL_VREF
CLKREQ#
ICH_SYNC#
TSATN#
HDA_BCLK
HDA_RST#
HDA_SDI
HDA_SDO
HDA_SYNC
CFG RSVD
CFG RSVD
PM
PM
NC
NC
BL25
BK26
BK32
BL31
BC51
AY37
BH20
BA37
B42
D42
B50
D50
R49
P50
AG55
AL49
AH54
AL47
AG53
AK50
AH52
AL45
AG49
AJ49
AJ47
AG47
AF50
AH50
AJ45
AG45
G33
G37
F38
F36
G35
G39
AK52
AK54
AW40
AL53
AL55
F34
F32
B38
A37
C31
K42
D10
C29
B30
D28
A27
B28
SMRCOMPP
R30 80.6/F_4 R30 80.6/F_4
SMRCOMPN
R32 80.6/F_4 R32 80.6/F_4
SM_RCOMP_VOH
SM_RCOMP_VOL
+SMDDR_VREF_NB
SM_PWROK
SM_REXT
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
GPU_VID0
GPU_VID1
GPU_VID2
GPU_VID3
GPU_VID4
GFX_VR_EN
MCH_CLVREF
DDPC_CTRLCLK
DDPC_CTRLDATA
SDVO_CTRLCLK
SDVO_CTRLDATA
CLK_MCH_OE#
TSATN#
ACZ_BITCLK_HDMI
ACZ_RST#_HDMI
ACZ_SDIN1_HDMI
ACZ_SDOUT_HDMI
ACZ_SYNC_HDMI
R41 10K/F_4 R41 10K/F_4
M_A_CLKP0 [16]
M_A_CLKP1 [16]
M_A_CLKN0 [16]
M_A_CLKN1 [16]
M_A_CKE0 [16]
M_A_CKE1 [16]
M_A_CS#0 [16]
M_A_CS#1 [16]
M_A_ODT0 [16]
M_A_ODT1 [16]
+1.8VSUS
CLK_DREFCLKP [3]
CLK_DREFCLKN [3]
CLK_DREFSSCLKP [3]
CLK_DREFSSCLKN [3]
CLK_PCIE_3GPLLP [3]
CLK_PCIE_3GPLLN [3]
DMI_TXN[3:0] [13]
DMI_TXP[3:0] [13]
DMI_RXN[3:0] [13]
DMI_RXP[3:0] [13]
T24T24
T35T35
T20T20
T21T21
T22T22
T23T23
CL_CLK0 [14]
CL_DATA0 [14]
ECPWROK [14,23,25]
ICH_CL_RST0# [14]
SDVO_CTRLCLK [18]
SDVO_CTRLDATA [18]
CLK_MCH_OE# [3]
MCH_ICH_SYNC# [14]
ACZ_BITCLK_HDMI [12]
ACZ_RST#_HDMI [12]
ACZ_SDIN1_HDMI [12]
ACZ_SDOUT_HDMI [12]
ACZ_SYNC_HDMI [12]
5
DPST_PWM [17]
LVDS_BLON [17]
EDIDCLK [17]
EDIDDATA [17]
DISP_ON [17]
TXLCLKN [17]
TXLCLKP [17]
TXLOUTN0 [17]
TXLOUTN1 [17]
TXLOUTN2 [17]
TXLOUTP0 [17]
TXLOUTP1 [17]
TXLOUTP2 [17]
CRT_BLU [18]
CRT_GRE [18]
CRT_RED [18]
DDCCLK [18]
DDCDATA [18]
CRT_HSYNC [18]
CRT_VSYNC [18]
R101 30.1/F_4 R101 30.1/F_4
R82 1.02K/F_4 R82 1.02K/F_4
R100 30.1/F_4 R100 30.1/F_4
DDPC_CTRLCLK
DDPC_CTRLDATA
SDVO_CTRLCLK
SDVO_CTRLDATA
L_CTRL_CLK
L_CTRL_DATA
EDIDDATA
EDIDCLK
L_CTRL_CLK
L_CTRL_DATA
EDIDCLK
EDIDDATA
R71 2.4K/F_4 R71 2.4K/F_4
TXLCLKN
TXLCLKP
TXLOUTN0
TXLOUTN1
TXLOUTN2
TXLOUTP0
TXLOUTP1
TXLOUTP2
R94 75/F_4 R94 75/F_4
R95 75/F_4 R95 75/F_4
R76 75/F_4 R76 75/F_4
R97 150/F_4 R97 150/F_4
R98 150/F_4 R98 150/F_4
R99 150/F_4 R99 150/F_4
R197 *2.2K/J_4 R197 *2.2K/J_4
R205 *2.2K/J_4 R205 *2.2K/J_4
R88 2.2K/J_4 R88 2.2K/J_4
R83 2.2K/J_4 R83 2.2K/J_4
R90 10K/J_4 R90 10K/J_4
R91 10K/J_4 R91 10K/J_4
R69 2.2K/J_4 R69 2.2K/J_4
R70 2.2K/J_4 R70 2.2K/J_4
(20mils)
+SMDDR_VREF_NB
<Checklist ver0.8>
If TSATN# is not used, then it must be terminated
with a 56-ȍ pull-up resistor to VCCP.
TSATN#
PM_EXTTS#0
PM_EXTTS#1
SM_REXT
R191 *0_6/S R191 *0_6/S
R85 56/J_4 R85 56/J_4
R79 10K/J_4 R79 10K/J_4
R68 10K/J_4 R68 10K/J_4
R33 499/F_4 R33 499/F_4
LVDS_IBG
INT_TV_COMP
INT_TV_Y/G
INT_TV_C/R
CRT_HSYNC_R
CRT_IREF
CRT_VSYNC_R
+0.9VSMVREF
+1.05V
+3V
6
D38
C37
K38
L37
J37
L35
B36
F50
H46
P44
K46
D46
B46
D44
B44
G45
F46
G41
C45
F44
G47
F40
A45
B40
A41
F42
D48
D40
C41
G43
B48
J27
E27
G27
F26
B34
D34
J29
G29
F30
E29
D36
C35
J33
D32
G31
+3V
U12C
U12C
L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK
L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA
L_VDD_EN
LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK
LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2
LVDSA_DATA#_3
LVDSA_DATA_0
LVDSA_DATA_1
LVDSA_DATA_2
LVDSA_DATA_3
LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2
LVDSB_DATA#_3
LVDSB_DATA_0
LVDSB_DATA_1
LVDSB_DATA_2
LVDSB_DATA_3
TVA_DAC
TVB_DAC
TVC_DAC
TVA_RTN
TV_DCONSEL_0
TV_DCONSEL_1
CRT_BLUE
CRT_GREEN
CRT_RED
CRT_IRTN
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_TVO_IREF
CRT_VSYNC
CANTIGASFF_1p0
CANTIGASFF_1p0
+0.9VSMVREF [16,28]
7
PEG_COMP
R64
R64
*0_4
*0_4
R57
R57
PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
2
R61 49.9/F_4 R61 49.9/F_4
C168 0.1U/10V_4 C168 0.1U/10V_4
C178 0.1U/10V_4 C178 0.1U/10V_4
C162 0.1U/10V_4 C162 0.1U/10V_4
C200 0.1U/10V_4 C200 0.1U/10V_4
C170 0.1U/10V_4 C170 0.1U/10V_4
C171 0.1U/10V_4 C171 0.1U/10V_4
C158 0.1U/10V_4 C158 0.1U/10V_4
C193 0.1U/10V_4 C193 0.1U/10V_4
3
1
U45
PEG_COMPI
T44
PEG_COMPO
D52
PEG_RX#_0
G49
PEG_RX#_1
K54
PEG_RX#_2
H50
PEG_RX#_3
M52
PEG_RX#_4
N49
PEG_RX#_5
P54
PEG_RX#_6
V46
PEG_RX#_7
Y50
PEG_RX#_8
V52
PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15
PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8
PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15
PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9
PEG_TX#_10
PEG_TX#_11
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15
PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15
R63 20K/F_4 R63 20K/F_4
W49
AB54
AD46
AC55
AE49
AF54
E51
F48
J55
J49
M54
M50
P52
U47
AA49
V54
V50
AB52
AC47
AC53
AD50
AF52
L47
F52
P46
H54
L55
T46
R53
U49
T54
Y46
AB46
W53
Y54
AC49
AF46
AD54
J47
F54
N47
H52
L53
R47
R55
T50
T52
W47
AA47
W55
Y52
AB50
AE47
AD52
100K/F_4
100K/F_4
LVDS
LVDS
TV
TV
PCI-EXPRESS GRAPHICS
PCI-EXPRESS GRAPHICS
VGA
VGA
+3V
HDMI_HPD_CON [18]
HDMI_HPD#
Q3
2N7002Q32N7002
8
07
+1.05V
HDMI_HPD#
HDMI Port B
HDMI_TXDN2 [18]
HDMI_TXDN1 [18]
HDMI_TXDN0 [18]
HDMI_TXCN [18]
HDMI_TXDP2 [18]
HDMI_TXDP1 [18]
HDMI_TXDP0 [18]
HDMI_TXCP [18]
Level: 0.9V
R56
R56
7.5K/F_4
7.5K/F_4
352-(&74/
352-(&74/
352-(&74/
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Cantiga SFF (DMI/VGA)
Cantiga SFF (DMI/VGA)
1%
1%
1
2
3
4
5
6
1%
7
Cantiga SFF (DMI/VGA)
Wednesday, August 26, 2009 7 31
Date: Sheet
Wednesday, August 26, 2009 7 31
Date: Sheet
Wednesday, August 26, 2009 7 31
Date: Sheet
8
1A
1A
1A
of
of
of
1
2
3
4
5
6
7
8
Cantiga SFF - DDRII (CLG)
http://hobi-elektronika.net
08
A A
M_A_DQ[63:0] [16]
B B
C C
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
AP46
AU47
AT46
AU49
AR45
AN49
AV50
AP50
AW47
BD50
AW49
BA49
BC49
AV46
BA47
AY50
BF46
BC47
BF50
BF48
BC43
BE49
BA43
BE47
BF42
BC39
BF44
BF40
BB40
BE43
BF38
BE41
BA15
BE11
BE15
BF14
BB14
BC15
BE13
BF16
BF10
BC11
BF8
BG7
BC7
BC9
BD6
BF12
AV6
BB6
AW7
AY6
AT10
AW11
AU11
AW9
AR11
AT6
AP6
AL7
AR7
AT12
AM6
AU7
U12D
U12D
SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63
CANTIGASFF_1p0
CANTIGASFF_1p0
M_A_BS#0
BC21
SA_BS_0
SA_BS_1
SA_BS_2
SA_RAS#
SA_CAS#
SA_WE#
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_MA_14
BJ21
BJ41
BH22
BK20
BL15
AT50
BB50
BB46
BE39
BB12
BE7
AV10
AR9
AR47
BA45
BE45
BC41
BC13
BB10
BA7
AN7
AR49
AW45
BC45
BA41
BA13
BA11
BA9
AN9
BC23
BF22
BE31
BC31
BH26
BJ35
BB34
BH32
BB26
BF32
BA21
BG25
BH34
BH18
BE25
M_A_BS#1
M_A_BS#2
M_A_RAS#
M_A_CAS#
M_A_WE#
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_BS#0 [16]
M_A_BS#1 [16]
M_A_BS#2 [16]
M_A_RAS# [16]
M_A_CAS# [16]
M_A_WE# [16]
M_A_DM[7:0] [16]
M_A_DQSP[7:0] [16]
M_A_DQSN[7:0] [16]
M_A_A[14:0] [16]
AP54
AM52
AR55
AV54
AM54
AN53
AT52
AU53
AW53
AY52
BB52
BC53
AV52
AW55
BD52
BC55
BF54
BE51
BH48
BK48
BE53
BH52
BK46
BJ47
BL45
BJ45
BL41
BH44
BH46
BK44
BK40
BJ39
BK10
BH10
BH6
BL11
BG5
BG3
BF4
BD4
BA3
BE5
BF2
BB4
AY4
BA1
AP2
AU1
AT2
AT4
AV4
AU3
AR3
AN1
AP4
AK4
AM4
AH2
AK2
BK6
BJ9
BJ5
AL3
AJ1
U12E
U12E
SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63
CANTIGASFF_1p0
CANTIGASFF_1p0
BJ13
SB_BS_0
BK12
SB_BS_1
BK38
SB_BS_2
BE21
SB_RAS#
BH14
SB_CAS#
BK14
SB_WE#
AP52
SB_DM_0
AY54
SB_DM_1
BJ49
SB_DM_2
BJ43
SB_DM_3
BH12
SB_DM_4
BD2
SB_DM_5
AY2
SB_DM_6
AJ3
SB_DM_7
AR53
SB_DQS_0
BA53
SB_DQS_1
BH50
SB_DQS_2
BK42
SB_DQS_3
BH8
SB_DQS_4
BB2
SB_DQS_5
AV2
SB_DQS_6
AM2
SB_DQS_7
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_MA_14
AT54
BB54
BJ51
BH42
BK8
BC3
AW3
AN3
BJ15
BJ33
BH24
BA17
BF36
BH36
BF34
BK34
BJ37
BH40
BH16
BK36
BH38
BJ11
BL37
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
D D
352-(&74/
352-(&74/
352-(&74/
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Cantiga SFF (DDRII)
Cantiga SFF (DDRII)
1%
1%
1%
1
2
3
4
5
6
Cantiga SFF (DDRII)
Wednesday, August 26, 2009 8 31
Date: Sheet
Wednesday, August 26, 2009 8 31
Date: Sheet
Wednesday, August 26, 2009 8 31
Date: Sheet
7
8
1A
1A
1A
of
of
of
5
Cantiga SFF - VCC/NCTF (CLG)
Ivcc internal VGA 2.4A
(Shape or 140mils)
D D
VCC 2200mA
+1.05V
C C
B B
A A
AT41
AR41
AN41
AJ41
AH41
AD41
AC41
W41
AT40
AM40
AL40
AJ40
AH40
AG40
AE40
AD40
AC40
AA40
AN35
AM35
AJ35
AH35
AD35
AC35
W35
AM34
AL34
AJ34
AH34
AG34
AE34
AD34
AC34
AA34
W34
AM32
AL32
AJ32
AH32
AE32
AD32
AA32
AM31
AL31
AJ31
AH31
AM29
AL29
AM28
AL28
AJ28
AM27
AL27
AM25
AL25
AJ25
AM24
Y41
Y40
Y34
N36
U12F
U12F
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_60
VCC_61
CANTIGASFF_1p0
CANTIGASFF_1p0
5
VCC CORE
VCC CORE
POWER
POWER
VCC NCTF
VCC NCTF
VCC_NCTF_1
VCC_NCTF_2
VCC_NCTF_3
VCC_NCTF_4
VCC_NCTF_5
VCC_NCTF_6
VCC_NCTF_7
VCC_NCTF_8
VCC_NCTF_9
VCC_NCTF_10
VCC_NCTF_11
VCC_NCTF_12
VCC_NCTF_13
VCC_NCTF_14
VCC_NCTF_15
VCC_NCTF_16
VCC_NCTF_17
VCC_NCTF_18
VCC_NCTF_19
VCC_NCTF_20
VCC_NCTF_21
VCC_NCTF_22
VCC_NCTF_23
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_NCTF_29
VCC_NCTF_30
VCC_NCTF_31
VCC_NCTF_32
VCC_NCTF_33
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
VCC_NCTF_37
VCC_NCTF_38
1. Route VCC_AXG_SENSE and VSS_AXG_SENSE differentially
2. VCC_AXG_SENSE PU to +VGFX_CORE_INT with 10ohm
and VSS_AXG_SENSE PD with 10ohm for Intel suggest
AT38
AR38
AN38
AM38
AL38
AG38
AE38
AA38
Y38
W38
U38
T38
R38
AT37
AR37
AN37
AM37
AL37
AJ37
AH37
AG37
AE37
AD37
AC37
AA37
Y37
W37
U37
T37
R37
AT35
AR35
U35
AT34
AR34
U34
T34
R34
+1.05V
4
http://hobi-elektronika.net
DDR2-667 2.6A
DDR2-800 3A
(Shape or 140mils)
+VCC_SM_BB36
+VCC_SM_BE35
C95
C95
0.1U/10V_4
0.1U/10V_4
C90
C90
0.1U/10V_4
0.1U/10V_4
VCC_SM :3000mA
+VCC_SM_BC29
C94
C94
0.1U/10V_4
0.1U/10V_4
+VCC_SM_BF24
+VCC_SM_BL19
+VCC_SM_BB16
+1.05V
C92
C91
C91
0.1U/10V_4
0.1U/10V_4
C69
C69
0.1U/10V_4
0.1U/10V_4
C92
0.1U/10V_4
0.1U/10V_4
VCC_AXG 7700mA
+1.05V
R49
R49
10/F_4
10/F_4
+VCC_AXG_SENSE
+VSS_AXG_SENSE
R51
R51
10/F_4
10/F_4
4
BB36
BE35
AW34
AW32
BK30
BH30
BF30
BD30
BB30
AW30
BL29
BJ29
BG29
BE29
BC29
BA29
AY29
BK28
BH28
BF28
BD28
BB28
BL27
BJ27
BG27
BE27
BC27
BA27
AY27
AW26
BF24
BL19
BB16
W32
AG31
AE31
AD31
AC31
AA31
W31
AH29
AG29
AE29
AD29
AC29
AA29
W29
AH28
AG28
AE28
AA28
AH27
AG27
AE27
AD27
AC27
AA27
W27
AH25
AD25
AC25
W25
AJ24
AH24
AG24
AE24
AD24
AC24
AA24
W24
AM22
AL22
AJ22
AH22
AG22
AE22
AD22
AC22
AA22
AM21
AL21
AJ21
AH21
AD21
AC21
AA21
W21
AM16
AL16
AG13
AE13
3
Y31
Y29
Y27
Y24
Y21
3
U12G
U12G
VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34
VCC_AXG_35
VCC_AXG_36
VCC_AXG_37
VCC_AXG_38
VCC_AXG_39
VCC_AXG_40
VCC_AXG_41
VCC_AXG_42
VCC_AXG_43
VCC_AXG_44
VCC_AXG_45
VCC_AXG_46
VCC_AXG_47
VCC_AXG_48
VCC_AXG_49
VCC_AXG_50
VCC_AXG_51
VCC_AXG_52
VCC_AXG_53
VCC_AXG_54
VCC_AXG_55
VCC_AXG_56
VCC_AXG_57
VCC_AXG_58
VCC_AXG_59
VCC_AXG_60
VCC_AXG_61
VCC_AXG_SENSE
VSS_AXG_SENSE
CANTIGASFF_1p0
CANTIGASFF_1p0
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
POWER
POWER
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC SM VCC GFX
VCC SM VCC GFX
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC GFX NCTF
VCC GFX NCTF
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC GFX
VCC GFX
VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8
VCC_AXG_NCTF_9
VCC_AXG_62
VCC_AXG_63
VCC_AXG_64
VCC_AXG_65
VCC_AXG_66
VCC_AXG_67
VCC_AXG_68
VCC_AXG_69
VCC_AXG_70
VCC_AXG_71
VCC_AXG_72
VCC_AXG_73
VCC_AXG_74
VCC_AXG_75
VCC_AXG_76
VCC_AXG_77
VCC_AXG_78
VCC_AXG_79
VCC_AXG_80
VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7
VCC SM LF
VCC SM LF
T32
U31
T31
R31
U29
T29
R29
U28
U27
T27
R27
U25
T25
R25
U24
U22
T22
R22
U21
T21
R21
AM19
AL19
AH19
AG19
AE19
AD19
AC19
W19
U19
AM18
AL18
AJ18
AH18
AG18
AE18
AD18
AC18
AA18
Y18
W18
U18
T18
R18
AJ16
AH16
AD16
AC16
AA16
U16
T16
R16
AM15
AL15
AJ15
AH15
AG15
AE15
AA15
Y15
W15
U15
T15
AU45
BF52
BB38
BA19
BE9
AU9
AL9
2
+1.05V +1.8VSUS
VCCSM_LF1
VCCSM_LF2
VCCSM_LF3
VCCSM_LF4
VCCSM_LF5
VCCSM_LF6
VCCSM_LF7
2
UMA 9.6A(GM45)
(Plane or shape)
C101
C101
0.1U/10V_4
0.1U/10V_4
C87
C87
0.1U/10V_4
0.1U/10V_4
C136
C136
0.47U/6.3V_4
0.47U/6.3V_4
C106
C106
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
C133
C133
0.22U/6.3V_4
0.22U/6.3V_4
0.22U/6.3V_4
0.22U/6.3V_4
Layout Note:
Inside GMCH cavity.
C85
C85
10U/6.3V_6
10U/6.3V_6
C109
C109
1U/16V_6
1U/16V_6
C100
C100
C86
C86
0.22U/6.3V_4
0.22U/6.3V_4
1%
1%
1%
1
+1.05V
+
C116
C116
+1.8VSUS
C108
C108
10U/6.3V_6
10U/6.3V_6
C97
C97
10U/6.3V_6
10U/6.3V_6
C83
C83
10U/6.3V_6
10U/6.3V_6
C126
C126
10U/6.3V_6
10U/6.3V_6
+
C89
C89
220U/2.5V_3528_H1.1
220U/2.5V_3528_H1.1
C132
C132
0.1U/10V_4
0.1U/10V_4
+1.05V
C134
C134
0.1U/10V_4
0.1U/10V_4
+
+
C167
C167
220U/2.5V_3528_H1.1
220U/2.5V_3528_H1.1
10mil
C71
C71
C342
C342
C105
C93
C93
0.47U/6.3V_4
0.47U/6.3V_4
0.22U/6.3V_4
0.22U/6.3V_4
352-(&74/
352-(&74/
352-(&74/
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Cantiga SFF (VCC/NCTF)
Cantiga SFF (VCC/NCTF)
Cantiga SFF (VCC/NCTF)
Wednesday, August 26, 2009 9 31
Date: Sheet
Wednesday, August 26, 2009 9 31
Date: Sheet
Wednesday, August 26, 2009 9 31
Date: Sheet of
1
1U/6.3V_4
1U/6.3V_4
C105
1U/6.3V_4
1U/6.3V_4
09
of
of
1A
1A
1A
5
4
3
2
1
Cantiga SFF - Power (CLG)
+3V
L13 HCB1608KF-181T15 L13 HCB1608KF-181T15
+1.05V
D D
C C
B B
A A
L17 10uH_8 L17 10uH_8
+1.05V
L18 10uH_8 L18 10uH_8
+1.05V
R54 *0/short_6 R54 *0/short_6
L8 HCB1608KF-181T15 L8 HCB1608KF-181T15
C112
C112
+1.05VM_MPLL_RC
10U/6.3V_6
10U/6.3V_6
+1.05V
L7 HCB1608KF-181T15 L7 HCB1608KF-181T15
+1.05V
L9 HCB1608KF-181T15 L9 HCB1608KF-181T15
C120 10U/6.3V_6 C120 10U/6.3V_6
+
+
C353
C353
*220U/2.5V_3528_H1.1
*220U/2.5V_3528_H1.1
+
+
C351
C351
*220U/2.5V_3528_H1.1
*220U/2.5V_3528_H1.1
+1.05VM_PEGPLL_RC
+1.05VM_DPLLA
+1.05VM_DPLLB
C118
C118
4.7U/6.3V_6
4.7U/6.3V_6
R47
R47
0.5/F_6
0.5/F_6
+3V_A_CRT_BG
C161
C161
0.1U/10V_4
0.1U/10V_4
C163
C163
0.1U/10V_4
0.1U/10V_4
+1.05VM_HPLL
C117
C117
0.1U/10V_4
0.1U/10V_4
+1.05VM_MPLL
C115
C115
0.1U/10V_4
0.1U/10V_4
R52
R52
1/F_4
1/F_4
+1.05V
+
+
C81
C81
*220U/2.5V_3528_H1.1
*220U/2.5V_3528_H1.1
+1.05V
+1.05VM_PEGPLL
C130 1000P/50V_4 C130 1000P/50V_4
+1.5V
C82
C82
10U/6.3V_6
10U/6.3V_6
+1.05VM_MCH_PLL2
C110
C110
0.1U/10V_4
0.1U/10V_4
C113
C113
0.1U/10V_4
0.1U/10V_4
C164
C164
10U/6.3V_6
10U/6.3V_6
C107
C107
0.1U/10V_4
0.1U/10V_4
C104
C104
10U/6.3V_6
10U/6.3V_6
C98
C98
2.2U/6.3V_6
2.2U/6.3V_6
+1.8VSUS
+3V
L11
L11
BLM18PG181SN1D_6
BLM18PG181SN1D_6
+3V_A_CRT_DAC
C156
C156
0.1U/10V_4
0.1U/10V_4
5mA(10mils)
C169
C169
0.1U/10V_4
0.1U/10V_4
64mA(20mils)
64mA(20mils)
24mA(20mils)
139.2mA(20mils)
10mA(20mils)
414uA(10mils)
720mA(40mils)
26mA(20mils)
157.2mA(20mils)
50mA(20mils)
30mA(20mils)
C155
C155
1U/6.3V_4
1U/6.3V_4
73mA(20mils)
C154
C154
0.01U/25V_4
0.01U/25V_4
C160
C160
0.01U/25V_4
0.01U/25V_4
+1.8VSUS_TXLVDS
50mA(10mils)
C96
C96
4.7U/6.3V_6
4.7U/6.3V_6
C99
C99
0.1U/10V_4
0.1U/10V_4
+1.05VM_PEGPLL
C111
C111
1U/6.3V_4
1U/6.3V_4
http://hobi-elektronika.net
852mA(50mils)
79mA(20mils)
U12H
U12H
J31
VCCA_CRT_DAC
L31
VCCA_DAC_BG
M33
VSSA_DAC_BG
J45
VCCA_DPLLA
L49
VCCA_DPLLB
AF10
VCCA_HPLL
AE1
VCCA_MPLL
U43
VCCA_LVDS1
U41
VCCA_LVDS2
V44
VSSA_LVDS
AJ43
VCCA_PEG_BG
AG43
VCCA_PEG_PLL
AW24
VCCA_SM_1
AU24
VCCA_SM_2
AW22
VCCA_SM_3
AU22
VCCA_SM_4
AU21
VCCA_SM_5
AW20
VCCA_SM_6
AU19
VCCA_SM_7
AW18
VCCA_SM_8
AU18
VCCA_SM_9
AW16
VCCA_SM_10
AU16
VCCA_SM_11
AT16
VCCA_SM_12
AR16
VCCA_SM_13
AU15
VCCA_SM_14
AT15
VCCA_SM_15
AR15
VCCA_SM_16
AW14
VCCA_SM_17
AT24
VCCA_SM_NCTF_1
AR24
VCCA_SM_NCTF_2
AT22
VCCA_SM_NCTF_3
AR22
VCCA_SM_NCTF_4
AT21
VCCA_SM_NCTF_5
AR21
VCCA_SM_NCTF_6
AT19
VCCA_SM_NCTF_7
AR19
VCCA_SM_NCTF_8
AT18
VCCA_SM_NCTF_9
AR18
VCCA_SM_NCTF_10
AU27
VCCA_SM_CK_4
AU28
VCCA_SM_CK_3
AU29
VCCA_SM_CK_2
AU31
VCCA_SM_CK_1
AT31
VCCA_SM_CK_NCTF_1
AR31
VCCA_SM_CK_NCTF_2
AT29
VCCA_SM_CK_NCTF_3
AR29
VCCA_SM_CK_NCTF_4
AT28
VCCA_SM_CK_NCTF_5
AR28
VCCA_SM_CK_NCTF_6
AT27
VCCA_SM_CK_NCTF_7
AR27
VCCA_SM_CK_NCTF_8
AH12
VCCD_HPLL
AE43
VCCD_PEG_PLL
M46
VCCD_LVDS_1
L45
VCCD_LVDS_2
CANTIGASFF_1p0
CANTIGASFF_1p0
CRT PLL A PEG A SM
CRT PLL A PEG A SM
A LVDS
A LVDS
POWER
POWER
LVDS
LVDS
VCCA_TV_DAC
TV D TV/CRT
TV D TV/CRT
HDA
HDA
VCCD_TVDAC
AXF
AXF
VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4
SM CK
SM CK
VCC_TX_LVDS
HV
HV
PEG
PEG
DMI
DMI
VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT
VTT
VCC_HDA
VCCD_QDAC
VCC_AXF_1
VCC_AXF_2
VCC_AXF_3
VCC_HV_1
VCC_HV_2
VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4
VCC_DMI_1
VCC_DMI_2
VCC_DMI_3
VTTLF1
VTTLF2
VTTLF3
VTTLF
VTTLF
R13
T12
R11
T10
R9
T8
R7
T6
R5
T4
R3
T2
R1
K30
A31
N34
N32
M25
N24
M23
BK24
BL23
BJ23
BK22
T41
C33
A33
AB44
Y44
AC43
AA43
AM44
AN43
AL43
K14
Y12
P2
50mA(15mils)
2.7mA(15mils)
35mA(15mils)
440mA(30mils)
DDR2-800 124mA(20mils)
80mA(20mils)
105.3mA(20mils)
1.782A(100mils)
456mA(30mils)
+VTTLF_CAP1
+VTTLF_CAP2
+VTTLF_CAP3
10mil
C128
C128
0.47U/6.3V_4
0.47U/6.3V_4
C195
C195
0.01U/25V_4
0.01U/25V_4
C352
C352
0.1U/10V_4
0.1U/10V_4
C176
C176
0.01U/25V_4
0.01U/25V_4
C350
C350
0.01U/25V_4
0.01U/25V_4
C149
C149
1U/6.3V_4
1U/6.3V_4
C80
C80
0.1U/10V_4
0.1U/10V_4
C135
C135
1000P/50V_4
1000P/50V_4
C172
C172
0.1U/10V_4
0.1U/10V_4
C102
C102
4.7U/6.3V_6
4.7U/6.3V_6
C125
C125
0.1U/10V_4
0.1U/10V_4
C131
C131
0.47U/6.3V_4
0.47U/6.3V_4
C151
C151
2.2U/6.3V_6
2.2U/6.3V_6
C185
C185
0.1U/10V_4
0.1U/10V_4
C150
C150
0.1U/10V_4
0.1U/10V_4
C349
C349
0.1U/10V_4
0.1U/10V_4
C157
C157
10U/6.3V_6
10U/6.3V_6
C127
C127
10U/6.3V_6
10U/6.3V_6
C231
C231
10U/6.3V_6
10U/6.3V_6
C129
C129
0.47U/6.3V_4
0.47U/6.3V_4
C152
C152
4.7U/6.3V_6
4.7U/6.3V_6
+3V_TV_DAC
+1.5V_VCC_HDA
+1.5V_QDAC
+1.5V_TVDAC
+1.8VSUS_VCC_SM_CK
R35
R35
1/F_4
1/F_4
+1.8VSUS_SMCK_RC
+1.8VSUS_TXLVDS
R78 10/J_4 R78 1 0/J_4
+
+
C88
C88
220U/2.5V_3528_H1.1
220U/2.5V_3528_H1.1
C159
C159
0.47U/6.3V_4
0.47U/6.3V_4
C153
C153
4.7U/6.3V_6
4.7U/6.3V_6
+1.05V_SD
+
+
C148
C148
*220U/2.5V_3528_H1.1
*220U/2.5V_3528_H1.1
R87 *0/short_6 R87 *0/short_6
R204 *0/short_6 R204 *0/short_6
L19 HCB1608KF-181T15 L19 HCB1608KF-181T15
R196 *0/short_6 R196 *0/short_6
L6 1uH/300MA_8 L6 1uH/300MA_8
C79 10U/6.3V_6 C79 10U/6.3V_6
L10 0.1uH/250MA_8 L10 0.1uH/250MA_8
D15 CH751H-40PT D15 CH751H-40PT
2 1
+1.05V
+3V
+1.5V
+1.5V
+1.05V
+1.8VSUS
+1.8VSUS
+1.05V
+3V
+1.05V
+1.05V
10
352-(&74/
352-(&74/
352-(&74/
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Cantiga SFF (Power)
Cantiga SFF (Power)
1%
1%
5
4
3
2
1%
Cantiga SFF (Power)
Date: Sheet
Wednesday, August 26, 2009 10 31
Date: Sheet
Wednesday, August 26, 2009 10 31
Date: Sheet
Wednesday, August 26, 2009 10 31
1
1A
1A
1A
of
of
of