LG LP-097X02-SLQA Service manual

( ) Preliminary Specification ( ) Final Specification
LP097X02
Liquid Crystal Display
Product Specification
SPECIFICATION
FOR
APPROVAL
Customer
MODEL
www.jxlcd.com
www.jxlcd.com
APPROVED BY SIGNATURE
/
/
/
SUPPLIER LG Display Co., Ltd.
*MODEL LP097X02
Suffix SLQA
*When you obtain standard approval,
please use the above model name without suffix
APPROVED BY SIGNATURE
J. K. Kim / S.Manager
REVIEWED BY
K. T. Moon / Manager
PREPARED BY
H. H. Lee / Engineer
Please return 1 copy for your confirmation with your signature and comments.
Ver. 0.1 10. Mar. 2011
Product Engineering Dept.
LG Display Co., Ltd
1 / 28
Product Specification
Contents
LP097X02
Liquid Crystal Display
No ITEM
COVER CONTENTS
RECORD OF REVISIONS 1 GENERAL DESCRIPTION 2 ABSOLUTE MAXIMUM RATINGS
3 ELECTRICAL SPECIFICATIONS
3-1 ELECTRICAL CHARACTREISTICS 3-2 INTERFACE CONNECTIONS 3-3 LVDS SIGNAL TIMING SPECIFICATIONS 3-4 SIGNAL TIMING SPECIFICATIONS 3-5 SIGNAL TIMING WAVEFORMS
www.jxlcd.com
www.jxlcd.com
3-6 COLOR INPUT DATA REFERNECE 3-7 POWER SEQUENCE
4 OPTICAL SFECIFICATIONS
Page
1 2 3 4 5
6 7
8 10 10 11
13
5 MECHANICAL CHARACTERISTICS 6 RELIABLITY 7 INTERNATIONAL STANDARDS
7-1 SAFETY 7-2 EMC
8 PACKING
8-1 DESIGNATION OF LOT MARK 8-2 PACKING FORM
9 PRECAUTIONS
A APPENDIX. Enhanced Extended Display Identification Data
Ver. 0.1 10. Mar. 2011
17 21
22 22
23 23 24 26
2 / 28
Product Specification
RECORD OF REVISIONS
LP097X02
Liquid Crystal Display
Revision No Revision Date Page Description
0.1 2011.3.10 First draft 0.1
www.jxlcd.com
www.jxlcd.com
EDID
ver
Ver. 0.1 10. Mar. 2011
3 / 28
LP097X02
Liquid Crystal Display
Product Specification
1. General Description
The LP097X02 is a Color Active Matrix Liquid Crystal Display with an integral LED backlight system. The matrix employs a-Si Thin Film Transistor as the active element. It is a transmissive type display operating in the normally Black mode. This TFT-LCD has 9.7 inches diagonally measured active display area with XGA
resolution(1024 horizontal by 768 vertical pixel array). Each pixel is divided into Red, Green and Blue sub-
pixels or dots which are arranged in vertical stripes. Gray scale or the brightness of the sub-pixel color is determinedwith a 6-bit gray scale signal for each dot, thus, presenting a palette of more than262,144 colors.
The LP097X02 has been designedto apply theinterfacemethod that enables low power, high speed, low EMI.
The LP097X02 is intended to support applications where thin thickness, low power are critical factors and graphic displays are important. In combination with the vertical arrangement of the sub-pixels, the LP097X02
characteristicsprovidean excellent flatdisplayfor officeautomationproducts such as NotebookPC.
768
1
Gate Driver
(LOG_B type)
1
CN
1 User connector
30
Pin
LVDS &
Timing
Control
Block
POWER
BLOCK
www.jxlcd.com
www.jxlcd.com
EDID
BLOCK
Control & Data Power EDID signal & Power
General Features
Active Screen Size 9.7 inches diagonal Outline Dimension Pixel Pitch
Pixel Format 1024 horiz. by 768 vert. Pixels RGB strip arrangement Color Depth 6-bit, 262,144 colors Luminance, White 300 cd/m2(Typ., @I Power Consumption Logic : 0.8W(typ.@Mosaic), Back Light : 2.9W (typ.@ I
Weight 160g (Max.) Display Operating Mode Transmissive mode, normally Black Surface Treatment Glare, hard coating treatment of the front polarizer, 3H
210.35 (H) × 166.25 (V) × 3.4(D, Max.) mm PCB area : 5.45(Max.)
0.192 mm × 0.192 mm
=25mA)
LED
TFT-LCD Panel
(1024 x 768)
Source Driver Circuit
LED Backlight Assy
6LEDs X 6 strings
= 25mA)
LED
1024
Ver. 0.1 10. Mar. 2011
4 / 28
LP097X02
Liquid Crystal Display
Product Specification
2. Absolute Maximum Ratings
The following are maximum values which, if exceeded, may cause faulty operation or damage to the unit.
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameter Symbol
Power Input Voltage Operating Temperature
Storage Temperature
Operating Ambient Humidity Storage Humidity
Note : 1. Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be 39C Max, and no condensation of water.
www.jxlcd.com
www.jxlcd.com
Wet Bulb Temperature[]
20
10
0
VCC -0.3 4.0 Vdc
TOP 0 50
HST -20 60
HOP 10 90 %RH 1 HST 10 90 %RH 1
50
40
30
Values
Min Max
90% 80%
60
Units Notes
C
C
60%
Humidity[(%)RH]
Storage
40%
Operation
20%
10%
at 25 5C
1
1
-20
Ver. 0.1 10. Mar. 2011
10
20 30 40 50
Dry Bulb Temperature[]
60 70 800
5 / 28
LP097X02
Liquid Crystal Display
Product Specification
3. Electrical Specifications 3-1. Electrical Characteristics
The LP097X02 requires two power inputs. One is employed to power the LCD electronics and to drive the TFT array and liquid crystal. The second input which powers the LED BL.
Table 2. ELECTRICAL CHARACTERISTICS
Parameter Symbol
MODULE :
Power Supply Input Voltage VCC 3.0 3.3 3.6 V Power Supply Input Current I Power Consumption Pc - 0.8 0.92 Watt 1 Differential Impedance Zm 90 100 110 Ohm 2
LED Backlight :
(Without LED Driver)
LED Driver input Voltage (on system)
Operating Current per string I Power Consumption P Life Time 10,000 - - Hrs 6
www.jxlcd.com
www.jxlcd.com
CC
Mosaic - 240 280 mA 1
VLED 12 V 3
LED
BL
Min Typ Max
24.5 25 25.5 mA 4
Values
2.9 3.2 Watt 5
Unit Notes
DC
Note)
1. The specifiedcurrent and power consumption are under the Vcc = 3.3V , 25, fv= 60Hz condition whereas Mosaic pattern is displayed and fv is the frame frequency.
2. This impedance value is needed to proper display and measured form LVDS Tx to the mating connector.
3. LED input voltage must be input below than 12V to operate normally for LED Driver.
4. The typical operating current is for the typical surface luminance (LWH) in optical characteristics.
5. The LED power consumption shown above does not include power of external LED driver circuit for typical current condition.
6. The life time is determined as the time at which brightness of lamp is 50% compare to that of initial value
at the typical lamp current.
Ver. 0.1 10. Mar. 2011
6 / 28
LP097X02
Liquid Crystal Display
Product Specification
3-2. Interface Connections
This LCD employs two interface connections, a 30 pin connector is used for the module electronics interface and the other connector is used for the integral backlight system.
The electronics interface connector is a model 20474-030E-12 manufactured by I-PEX.
Table 3. MODULE CONNECTOR PIN CONFIGURATION (CN1)
Pin Symbol Description
1 GND Ground
2 VCC Power Supply, 3.3V Typ.
3 VCC Power Supply, 3.3V Typ. 4 V EEDID DDC 3.3V power 5 GSP 6 Clk EEDID DDC Clock 7 DATA EEDID DDC Data 8 RIN 0- Negative LVDS differential data input
9 RIN 0+ Positive LVDS differential data input 10 GND Ground 11 RIN 1- Negative LVDS differential data input 12 RIN 1+ Positive LVDS differential data input 13 GND Ground 14 RIN 2- Negative LVDS differential data input
15 RIN 2+ Positive LVDS differential data input
16 GND Ground 17 CLKIN- Negative LVDS differential clock input 18 CLKIN+ Positive LVDS differential clock input 19 GND Ground 20 NC 21 Vdc LED Anode (Positive) 22 Vdc LED Anode (Positive) 23 NC 24 Vdc1 LED Cathode (Negative) 25 Vdc2 LED Cathode (Negative) 26 Vdc3 LED Cathode (Negative) 27 Vdc4 LED Cathode (Negative)
28 Vdc5 LED Cathode (Negative)
29 Vdc6 LED Cathode (Negative) 30 NC
www.jxlcd.com
www.jxlcd.com
GSP
No Connection
No Connection
No Connection
Notes
[LVDS Receiver]
SiliconWorks, SW0627B
[Connector]
I-PEX 20474-030E–1#
[Mating Connector]
I-PEX 20472-030T-10 series
or equivalent (micro-coax type)
[Connector pin arrangement]
LCD front view
1
30
Ver. 0.1 10. Mar. 2011
7 / 28
Product Specification
LVDS +
LVDS -
0V
V
CM
# |VID| = |(LVDS+) – (LVDS-)| # VCM = {(LVDS+) + (LVDS-)}/2
|VID|
V
IN_MAXVIN_MIN
LVDS Data
t
SKEW
LVDS Clock
T
clk
t
SKEW (Fclk
= 1/T
clk
)
1) 85MHz > Fclk 65MHz : -400 ~ +400
2) 65MHz > Fclk 25MHz : -600 ~ +600
3-3. LVDS Signal Timing Specifications
3-3-1. DC Specification
LP097X02
Liquid Crystal Display
Description
Symb
ol
Min Max Unit Notes
LVDS Differential Voltage |VID| 100 600 mV ­LVDS Common mode Voltage V LVDS Input Voltage Range V
3-3-2. AC Specification
www.jxlcd.com
www.jxlcd.com
CM
IN
0.6 1.8 V -
0.3 2.1 V -
Description Symbol Min Max Unit Notes
t
SKEW
- 240 + 240 ps
95MHz > Fclk
105MHz
LVDS Clock to Data Skew Margin
t
SKEW
- 400 + 400 ps
85MHz > Fclk
65MHz
LVDS Clock to Clock Skew Margin (Even
to Odd)
Maximum deviation
of input clock frequency during SSC
Maximum modulation frequency
of input clock during SSC
Ver. 0.1 10. Mar. 2011
t
SKEW_EO
F
DEV
F
MOD
- 1/7 + 1/7 T
clk
- ± 3 % -
- 200 KHz -
-
8 / 28
Loading...
+ 18 hidden pages