LG KE600 Service Manual

Date: October, 2006 / Issue 1.0

Service Manual

Service Manual

KE600

Model : KE600

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* The information in this manual is subject to change without notice and should not be construed as a

commitment by LGE Inc. Furthermore, LGE Inc. reserves the right, without notice, to make changes
to equipment design as advances in engineering and manufacturing methods warrant.

* This manual provides the information necessary to install, program, operate and maintain the

KE600/KE608.

REVISED HISTORY

Editor Date Issue Contents of Changes S/W Version

S. H. RYU 2006/07/06 0.1 Initial Release

S. H. RYU 2006/08/24 0.2 The second Release

S. H. RYU 2006/10/16 1.0 Final Release

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1. INTRODUCTION ...............................7

1.1 Purpose .................................................. 7

1.2 Regulatory Information............................ 7

1.3 ABBREVIATION ..................................... 9

2. PERFORMANCE .............................11

2.1 H/W Features.........................................11

2.2 Technical specification...........................12

3. TECHNICAL BRIEF ........................19

3.1 KE600 / KE608 Component

Block diagram. .......................................19

3.2 Baseband Processor (BBP)

Introduction ............................................21

3.3 Power management IC ..........................33

3.4 Power ON/OFF ......................................39

3.5 SIM interface..........................................40

3.6 Memory..................................................41

3.7 LCD Display...........................................42

3.8 Keypad Switching & Scanning...............43

3.9 Keypad back-light illumination ...............44

3.10 LCD back light illumination...................46

3.11 Battery current consumption monitor...48

3.12 JTAG & ETM interface connector ........48

3.13 Audio....................................................49

3.14 USB charging circuit ............................52

3.15 FM radio with RDS function .................53

3.16 BLUETOOTH.......................................54

3.17 Micro SD external memory card slot....58

3.18 12pin Multi Media Interface connector.60

3.19 General Description .............................62

3.20 Receiver part........................................64

3.21 Transmitter part....................................64

3.22 RF synthesizer.....................................66

3.23 VCTCXO..............................................66

3.24 Front End Module control.....................67

3.25 Power Amplifier Module.......................67

3.26 Dual Mode Operation...........................68

4. PCB layout......................................69

4.1 Main & Sub PCB component

placement ..............................................69

5. Trouble shooting............................76

5.1 Trouble shooting test setup....................76

5.2 Power on Trouble...................................76

5.3 Charging trouble ....................................80

5.4 LCD display trouble................................82

5.5 Camera Trouble.....................................83

5.6 Speaker trouble......................................86

5.7 Receiver trouble.....................................88

5.8 Microphone trouble ................................90

5.9 Vibrator trouble ......................................92

5.10 Keypad back light trouble.....................94

5.11 SIM card trouble...................................96

5.12 MicroSD trouble ...................................98

5.13 Bluetooth trouble..................................99

5.14 FM Radio trouble ...............................101

5.13 RF PART TROUBLESHOOTING ......103

6. Download & S/W upgrade...............116

6.1 S/W download setup............................116

6.2 Download program user guide.............117

7. CIRCUIT DIAGRAM ......................121

8. PCB LAYOUT ................................127

9. RF Calibration ..............................133

9.1 Test Equipment Setup .........................133

9.2 Calibration Steps..................................133

10. Stand-alone Test ........................139

11. ENGINEERING MODE ................143

12. EXPLODED VIEW &

REPLACEMENT PART LIST ..... 145

12.1 Exploded View .................................. 145

12.2 Replacement Parts ............................147

12.3 Accessory ......................................... 167

Table Of Contents

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1. INTRODUCTION

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1.1 Purpose

This manual provides the information necessary to repair, calibration, description and download the
features of the KE600/KE608.

1.2. Regulatory Information

A. Security

Toll fraud, the unauthorized use of telecommunications system by an unauthorized part (for example,
persons other than your company’s employees, agents, subcontractors, or person working on your
company’s behalf) can result in substantial additional charges you’re your telecommunications
services. System users are responsible for the security of own system. There are may be risks of toll
fraud associated with your telecommunications system. System users are responsible for
programming and configuring the equipment to prevent unauthorized use. LGE does not warrant that
this product is immune from the above case but will prevent unauthorized use of common-carrier
telecommunication service of facilities accessed through or connected to it. LGE will not be
responsible for any charges that result from such unauthorized use.

B. Incidence of Harm

If a telephone company determines that the equipment provided to customer is faulty and possibly
causing harm or interruption in service to the telephone network, it should disconnect telephone
service until repair can be done. A telephone company may temporarily disconnect service as long as
repair is not done.

C. Changes in Service

A local telephone company may make changes in its communications facilities or procedure. If these
changes could reasonably be expected to affect the use of the KE600/KE608 or compatibility with the
network, the telephone company is required to give advanced written notice to the user, allowing the
user to take appropriate steps to maintain telephone service.

D. Maintenance Limitations

Maintenance limitations on the KE600/KE608 must be performed only at the LGE or its authorized
agents. The user may not make any changes and/or repairs expect as specifically noted in this
manual. Therefore, note that unauthorized alternations or repair may affect the regulatory status of the
system and may void any remaining warranty.

1. INTRODUCTION

1. INTRODUCTION

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E. Notice of Radiated Emissions

The KE600/KE608 complies with rules regarding radiation and radio frequency emission as defined by
local regulatory agencies. In accordance with these agencies, you may be required to provide
information such as the following to the end user.

F. Pictures

The pictures in this manual are for illustrative purposes only; your actual hardware may look slightly
different.

G. Interference and Attenuation

An KE600/KE608 may interfere with sensitive laboratory equipment, medical equipment, etc.
Interference from unsuppressed engines or electric motors may cause problems.

H. Electrostatic Sensitive Devices

ATTENTION

Boards, which contains Electrostatic Sensitive Device(ESD), are indicated by the sign.
Following information is ESD handling: Service personnel should ground themselves by using a wrist
strap when exchange system boards.
When repairs are made to a system board, they should spread the floor with anti-static mat which is
also grounded. Use a suitable, grounded soldering iron. Keep sensitive parts in these protective
packages until these are used. When returning system boards or parts such as EEPROM to the
factory, use the protective package as described.

1. INTRODUCTION

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1.3 ABBREVIATION

For the purposes of this manual, following abbreviations apply:

APC Automatic Power Control

BB Baseband

BER Bit Error Ratio

CC-CV Constant Current - Constant Voltage

CLA Cigar Lighter Adapter

DAC Digital to Analog Converter

DCS Digital Communication System

dBm dB relative to 1 milli-watt

DSP Digital Signal Processing

EEPROM Electrical Erasable Programmable Read-Only Memory

EGPRS Enhanced General Packet Radio Service

EL Electroluminescence

ESD Electrostatic Discharge

FPCB Flexible Printed Circuit Board

GMSK Gaussian Minimum Shift Keying

GPIB General Purpose Interface Bus

GPRS General Packet Radio Service

GSM Global System for Mobile Communications

IPUI International Portable User Identity

IF Intermediate Frequency

LCD Liquid Crystal Display

LDO Low Drop Output

LED Light Emitting Diode

1. INTRODUCTION

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LGE LG Electronics

OPLL Offset Phase Locked Loop

PAM Power Amplifier Module

PCB Printed Circuit Board

PGA Programmable Gain Amplifier

PLL Phase Locked Loop

PSTN Public Switched Telephone Network

RF Radio Frequency

RLR Receiving Loudness Rating

RMS Root Mean Square

RTC Real Time Clock

SAW Surface Acoustic Wave

SIM Subscriber Identity Module

SLR Sending Loudness Rating

SRAM Static Random Access Memory

STMR Side Tone Masking Rating

TA Travel Adapter

TDD Time Division Duplex

TDMA Time Division Multiple Access

UART Universal Asynchronous Receiver/Transmitter

VCO Voltage Controlled Oscillator

VCTCXO Voltage Control Temperature Compensated Crystal Oscillator

WAP Wireless Application Protocol

8PSK 8 Phase Shift Keying

2. PERFORMANCE

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2.1 H/W Feature

2. PERFORMANCE

Item Feature Comment

Li-Poly, 950mAh

Standard Battery Battery

Size :36.50(W)x58.50(H)x3.65(T)[mm]

AVG TCVR Current 280mA PL5

Standby Current <2.7 mA @PP9

Talk time Up to 3 hours (GSM900,TX Level :5)

Standby time Up to 220 hours (Paging period :9, RSSI: -85dBm )

Charging time Under 3 hours

RX Sensitivity GSM900 : -105dBm, DCS/PCS : -105dBm

TX output power

GSM900: 32.5dBm (Level 5)
DCS/PCS: 29.8dBm (Level 0)

GPRS compatibility Class 10

SIM card type 3V Plug in Type

Display 240 x 320 pixels, 2 inch wide, 262K color, TFT

Soft icons
Key Pad

Status Indicator 0 ~ 9, #, *, Navigation wheel type Key,

Up/Down Side Key, Camera Side key,
END/PWR Key, MP3 Key,

ANT Internal Type

EAR Phone Jack 12pin multi port Headset jack with Remote controller

PC Synchronization Yes

Speech coding HR/EFR/FR/AMR

Data and Fax Yes

Vibrator Yes

Buzzer No

Voice Recoding Yes

C-Mic Yes

Receiver Yes

Travel Adapter Yes

Options Bluetooth hands-free kit, Data Kit

2. PERFORMANCE

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2.2 Technical specification

Item Description Specification

GSM900

TX: 890 + 0.2 x n MHz
RX: 935 + 0.2 x n MHz ( n = 1 ~ 124 )

EGSM

1Frequency Band TX: 890 + 0.2 x (n-1024) MHz

RX: 935 + 0.2 x (n-1024) MHz ( n = 975 ~ 1023 )

DCS1800

TX: 1710 + ( n-511 ) x 0.2 MHz (n = 512 ~ 885)
RX: TX + 95 MHz

PCS1900

TX: 1850.2 + ( n-512 ) x 0.2 MHz (n = 512 ~ 810)
RX: TX + 80MHz

2 Phase Error

RMS < 5 degrees
Peak < 20 degrees

3 Frequency Error < 0.1ppm

GSM900/EGSM

Level Power Toler. Level Power Toler.

5 33 dBm 2dB 13 17 dBm 3dB
6 31 dBm 3dB 14 15 dBm 3dB
7 29 dBm 3dB 15 13 dBm 3dB
8 27 dBm 3dB 16 11 dBm 5dB

9 25 dBm 3dB 17 9 dBm 5dB
10 23 dBm 3dB 18 7 dBm 5dB
11 21 dBm 3dB 19 5 dBm 5dB

4 Power Level 12 19 dBm 3dB

DCS1800/PCS1900

Level Power Toler. Level Power Toler.

0 30 dBm 2dB 8 14 dBm 3dB

1 28 dBm 3dB 9 12 dBm 4dB

2 26 dBm 3dB 10 10 dBm 4dB

3 24 dBm 3dB 11 8 dBm 4dB

4 22 dBm 3dB 12 6 dBm 4dB

5 20 dBm 3dB 13 4 dBm 4dB

6 18 dBm 3dB 14 2 dBm 5dB

7 16 dBm 3dB 15 0 dBm 5dB

2. PERFORMANCE

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Item Description Specification

GSM900/EGSM

Offset from Carrier (kHz). Max. dBc

100 +0.5

200 -30

250 -33

400 -60

600~ <1,200 -60

1,200~ <1,800 -60

1,800~ <3,000 -63

3,000~ <6,000 -65

5

Output RF Spectrum 6,000 -71

(due to modulation) DCS1800/PCS1900

Offset from Carrier (kHz). Max. dBc

100 +0.5

200 -30

250 -33

400 -60

600~ <1,200 -60

1,200~ <1,800 -60

1,800~ <3,000 -65

3,000~ <6,000 -65

6,000 -73

GSM900/EGSM

Offset from Carrier (kHz) Max. (dBm)

Output RF Spectrum 400 -19

6

(due to switching transient) 600 -21

1,200 -21

1,800 -24

2. PERFORMANCE

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Item Description Specification

DCS1800/PCS1900

Offset from Carrier (kHz). Max. (dBm)

Output RF Spectrum 400 -22

6

(due to switching transient) 600 -24

1,200 -24
1,800 -27

7 Spurious Emissions Conduction, Emission Status

GSM900/EGSM

8 Bit Error Ratio

BER (Class II) < 2.439% @-102dBm

DCS1800/PCS1900

BER (Class II) < 2.439% @-100dBm

9 Rx Level Report accuracy 3 dB

10 SLR 8 3 dB

Frequency (Hz) Max.(dB) Min.(dB)

100 -12 ­200 0 ­300 0 -12

11 Sending Response 1,000 0 -6

2,000 4 -6
3,000 4 -6
3,400 4 -9
4,000 0 -

12 RLR 2 3 dB

Frequency (Hz) Max.(dB) Min.(dB)

100 -12 ­200 0 ­300 2 -7
500

*

-5

13 Receiving Response 1,000 0 -5

3,000 2 -5
3,400 2 -10
4,000 2

*

Mean that Adopt a straight line in between 300 Hz

and 1,000 Hz to be Max. level in the range.

2. PERFORMANCE

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Item Description Specification

14 STMR 13 5 dB

15 Stability Margin > 6 dB

dB to ARL (dB) Level Ratio (dB)

-35 17.5

-30 22.5

-20 30.7

16 Distortion

-10 33.3

0 33.7

7 31.7

10 25.5

17 Side tone Distortion Three stage distortion < 10%

18

<Change> System frequency

2.5ppm

(26 MHz) tolerance

19 <Change>32.768KHz tolerance 30ppm

Standby

20 Power consumption

- Normal 3 mA(@PP9)

21 Talk Time

GSM900/Lvl 5 (Battery Capacity 950mA):240 min
GSM900/Lvl 12(Battery Capacity 950 mA):420 min
Under conditions, at least 200 hours:

1. Brand new and full 950mAh battery

22 Standby Time

2. Full charge, no receive/send and keep GSM in idle mode.

3. Broadcast set off.

4. Signal strength display set at 3 level above.

5. Backlight of phone set off.
At least 65 dB under below conditions:

23 Ringer Volume 1. Ringer set as ringer.

2. Test distance set as 50 cm

24 Charge Current

Fast Charge : < 600 mA
Slow Charge: < 120 mA

Antenna Bar Number Power

5 -85 dBm ~

4 -90 dBm ~ -86 dBm

25 Antenna Display 3 -95 dBm ~ -91 dBm

2 -100 dBm ~ -96 dBm

1 -105 dBm ~ -101 dBm

0~ -105 dBm

2. PERFORMANCE

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Item Description Specification

Battery Bar Number Voltage( 0.05V)

4 3.86V~4.2V

26 Battery Indicator 3 3.75V~3.85V

2 3.75V~3.69V

1 3.69V~3.58V

0 3.58V~

27 Low Voltage Warning

3.58V↓ 0.05V (Call)

3.50V↓ 0.05V (Standby)

28 Forced shut down Voltage 3.35 0.05 V

Li-ion Battery

29 Battery Type

Standard Voltage = 3.7 V
Battery full charge voltage = 4.2 V
Capacity: 950mAh

Switching-mode charger

30 Travel Charger Input: 100 ~ 240 V, 50/60Hz

Out put: 5.2, 0.8A

* EDGE RF Specification (Option: KE608 is not serviced for “EDGE mode”)

2. PERFORMANCE

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Item Description Specification

1 RMS EVM

9%
2 Peak EVM 30%
395thPercentile EVM 15%
4Origin Offset Suppression ≥ 30dB

GSM900/EGSM

Level Power Toler. Level Power Toler.

5 27dBm 3dB 13 17dBm 3dB
6 27dBm 3dB 14 15dBm 3dB
7 27dBm 3dB 15 13dBm 3dB
8 27dBm 3dB 16 11dBm 5dB

9 25dBm 3dB 17 9dBm 5dB
10 23dBm 3dB 18 7dBm 5dB
11 21dBm 3dB 19 5dBm 5dB

5 Power Level 12 19dBm 3dB

DCS1800, PCS1900

Level Power Toler. Level Power Toler.

0 26dBm 3dB 8 14 dBm 3dB

1 26dBm 3dB 9 12 dBm 4dB

2 26dBm 3dB 10 10 dBm 4dB

3 24 dBm 3dB 11 8 dBm 4dB

4 22 dBm 3dB 12 6 dBm 4dB

5 20 dBm 3dB 13 4 dBm 4dB

6 18 dBm 3dB 14 2 dBm 5dB

7 16 dBm 3dB 15 0 dBm 5dB

6 Output RF Spectrum GSM900/EGSM

(due to modulation) Offset from carrier(kHz) Max. dBc

100 +0.5
200 -30
250 -33
400 -54

600~<1,200 -60
1,200~<1,800 -60
1,800~<3,000 -63
3,000~<6,000 -65

6,000 -71

2. PERFORMANCE

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Item Description Specification

6 Output RF Spectrum DCS1800, PCS1900

(due to modulation) Offset from carrier(kHz) Max. dBc

100 +0.5

200 -30

250 -33

400 -54

600~<1,200 -60

1,200~<1,800 -60

1,800~<3,000 -63

3,000~<6,000 -65

6,000 -71

7 Output RF Spectrum GSM900/EGSM

(due to switching transient) Offset from carrier(kHz) Max. dBm

400 -23

600 -26

1,200 -27

1,800 --30

DCS1800, PCS1900

Offset from carrier(kHz) Max. dBm

400 -23

600 -26

1,200 -27

1,800 -30

3. TECHNICAL BRIEF

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Baseband circuit

3.1 KE600 / KE608 Component Block diagram.

KE600/KE608 is composed with 3 different PCB part such as main PCB, sub PCB and FPCB.

3. TECHNICAL BRIEF

Figure 1 KE600/KE608 Hardware architecture

3. TECHNICAL BRIEF

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The functional component arrangement is mentioned below diagram.

Figure 2 KE600/KE608 Functional block diagram

3. TECHNICAL BRIEF

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3.2. Baseband Processor (BBP) Introduction

3.2.1 General Description

S-GOLD2TMis a GSM/EDGE single chip mixed signal Baseband IC containing all analog and digital
functionality of a cellular radio. Additionally S-GOLD2TMProvides multimedia extensions such as
camera, software MIDI, MP3 sound. It is designed as a single chip solution, integrating the digital and
mixed signal portions of the base band in 0.13um, 1.5V technology.
The chip will fully support the FR, EFR, HR and AMR-NB vocoding.S-GOLD2TMsupport multi-slot
operation modes HSCSD (up to class 10), GPRS for high speed data application (up to class 12) and
EGPRS (up to class 12) without additional external hardware.

Figure 3. Top level block diagram of the S-GOLD2TM(PMB8876)

3. TECHNICAL BRIEF

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3.2.2. Block Description

• Processing core
ARM926EJ-S 32 bit processor core for controller functions. The ARM926EJ-S includes an MMU,
and the Jazelle Java extension for Java acceleration.

- TEAKLite DSP core

• ARM-Memory

- 32k Byte Boot ROM on the AHB

- 96k Byte SRAM on the AHB, flexibly usable as program or data RAM

- 16k Byte Cache for Program (internal)

- 8k Byte tightly coupled memory for Program(internal)

- 8k Byte Cache for Data(internal)

- 8k Byte tightly coupled memory for Data(internal)

• DSP-Memory

- 104K x 16bit Program ROM

- 8k x 16bit Program RAM

- 60k x 16bit Data ROM

- 37k x 16bit Data RAM

- Incremental Redundancy(IR) Memory of 35904 words of 16bit

• Shared Memory Block

1.5K x 32bit Shared RAM(dual ported) between controller system and TEAKLite.

• Controller Bus system
The processor cores and their peripherals are connected by powerful buses. Multi-layer AHB for
connecting the ARM and the other master capable building blocks with the internal and external
memories and with the peripheral buses.

• Clock system
The clock system allows widely independent selection of frequencies for the essential parts of the
S-GOLD2. Thus power consumption and performance can be optimized for each application.

• Functional Hardware block

- CPU and DSP Timers

- MOVE coprocessor performing motion estimation for video encoding algorithms

(H.263, MPEG-4)

- Programmable PLL with additional phase shifters for system clock generation

- GSM Timer Module that off-loads the CPU from radio channel timing

- GMSK / 8-PSK Modulator according to GSM-standard 05.04 (5/2000)

- GMSK Modulator: gauss-filter with B*T=0.3

- EDGE Modulator: 8PSK-modulation with linearized GMSK-Pulse-Filter

- Hardware accelerators for equalizer and channel decoding.

- Incremental Redundancy memory for EDGE class 12 support

- A5/1, A5/2, A5/3 Cipher unit

- GEA1, GEA2, GEA3 Cipher Unit to support GPRS data transmission

3. TECHNICAL BRIEF

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- Advanced static and dynamic power management features including TDMA-Frame synchronous
low power mode and enhanced CPU modes(idle and sleep modes)

- Pulse Number Modulation output for Automatic Frequency Correction(AFC)

- Serial RF Control interface: support of direct conversion RF

- A Universal Serial Interface(USIF) enabling asynchronous (UART) of synchronous (SPI) serial
data transmission

- 1 Serial Synchronous SPI compatible interfaces in the controller domain

- 1 Serial Synchronous SPI compatible interface in the TEAKLite domain

- 2 USART with autobaud detection, hardware flow control and integrated IrDA controller
supporting IrDA’s SIR standard (up to 115.2Kbps)

- A dedicated Fas IfDA Controller supporting IrDA’s SIR,MIR and FIR standards (up to 4Mbps)

- I2C-bus interface (e.g. connection to S/M power)

- A fast display interface supporting serial and parallel interconnection

- An ITU-R BT.656 compatible Camera interface.

- Programmable clock output for a camera

- An multimedia/Secure Digital Card Interface (MMCI/SD:SDIO capable)

3.2.3. External Devices connected to memory interface

Table 1 Memory interface

3.2.4. RF Interface (T_OUT)

S-Gold2 uses this interface to control RF IC and Peripherals. 13 signals are provided switch on/off RF
ICs Periodically each TDMA frame.

Table 2 RF Interface Spec.

Device Name Maker Remark

FLASH PF38F5570MMY0B0 Intel Synchronous / A synchronous

SDRAM PF38F5570MMY0B0 Intel Synchronous 104MHz

LCD IL200DBN1A LPL 8bit access 3times transmission

Melody IC Not Used S/W Infineon Software CODEC

T_OUT

Resource Interconnection Description
T_OUT0 TXON_PA PAM Power on
T_OUT1 Other function ­T_OUT2 PA_BAND TX RF band select
T_OUT3 ANT_SW1 FEM control
T_OUT4 ANT_SW2 FEM control
T_OUT5 ANT_SW3 FEM control
T_OUT6 MODE PAM Mode select

3. TECHNICAL BRIEF

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3.2.5. USART Interface

KE600/KE608 have two UART Drivers as follow :

- USART1 : Hardware Flow Control / SW upgrade / Calibration

- USART2 : SW debug trace.

Table 3 USART Interface Spec.

3.2.6. ADC channel

BBP ADC block is composed of 7 external ADC channel. This block operates charging process and
other related process by reading battery voltage and other analog values.

Table 4 S-Gold2 ADC channel usage

USART_0(USART1)

Resource Name Remark
USART0_TXD TXD_0 Transmit Data
USART0_RXD RXD_0 Receive Data
USART0_CTS CTS_0 Clear To Send
USART0_RTS RTS_0 Request To Send

DSR N.C.
USART_1(USART2)
USART1_TXD TX_DEBUG Trace data tx
USART1_RXD RX_DEBUG Trace data rx
USART1_CTS N.C. N.C.
USART1_RTS N.C. N.C.

ADC channel

Resource Interconnection Description
M0 BATT_TEMP Battery temperature measure
M1 RF_TEMP RF block temperature measure
M7 H/W VERSION S-Gold2 H/W version detect
M8 VSUPPLY Battery supply voltage measure
M9 I_MONITOR Current consumption measure
M10 REMOTE_ADC Remote control key detect

3. TECHNICAL BRIEF

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3.2.7. GPIO map

Over a hundred allowable resources, KE600/KE608 is using as follows except dedicated to SIM and
Memory. KE600/KE608 GPIO(General Purpose Input/Output) Map, describing application, I/O state,
and enable level, is shown in below table.

Table 5 S-Gold2 GPIO pin Map

Port function KE820 Net Name Description

KEY MATRIX
KP_IN0 KP_IN0 Refer to Key Matrix
KP_IN1 KP_IN1 Refer to Key Matrix
KP_IN2 KP_IN2 Refer to Key Matrix
KP_IN3 KP_IN3 Refer to Key Matrix
KP_IN4 KP_IN4 Refer to Key Matrix
KP_IN5 KP_IN5 Refer to Key Matrix
KP_OUT5 KP_OUT5 Refer to Key Matrix
KP_OUT0 KP_OUT0 Refer to Key Matrix
KP_OUT1 KP_OUT1 Refer to Key Matrix
KP_OUT2 KP_OUT2 Refer to Key Matrix
KP_OUT3 KP_OUT3 Refer to Key Matrix
USART_0
USART0_RXD RXD_0 UARTO, RS232 Data
USART0_TXD TXD_0 UARTO, RS232 Data
USART0_RTS_N CTS_0 UARTO, RS232 RTS
USART0_CTS_N RTS_0 UARTO, RS232 CTS
CC1CC6IO FM_INT For FM Radio Interrupt
USART_1
USART1_RXD TX_DEBUG For debugging
USART1_TXD RX_DEBUG For debugging
USART1_RTS_N Not Use
USART1_CTS_N Not Use
USB
USB_DPLUS USB_DP USB data
USB_DMINUS USB_DM USB data

3. TECHNICAL BRIEF

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MEMORY &CLK
GPIO_20 F_DPD For INTEL Memory
CLK32K CLK32K For FM Radio & BLUETOOTH
GPIO_22 Not Use
CAMERA I/F
CIF_D0 CIF_D(0) Camera DATA[0]
CIF_D1 CIF_D(1) Camera DATA[1]
CIF_D2 CIF_D(2) Camera DATA[2]
CIF_D3 CIF_D(3) Camera DATA[3]
CIF_D4 CIF_D(4) Camera DATA[4]
CIF_D5 CIF_D(5) Camera DATA[5]
CIF_D6 CIF_D(6) Camera DATA[6]
CIF_D7 CIF_D(7) Camera DATA[7]
CIF_PCLK CIF_PCLK Camera pixel clock
CIF_HSYNC CIF_HS Camera H sync
CIF_VSYNC CIF_VS Camera V sync
CLKOUT CIF_MCLK Camera main clock
CIF_PD CIF_PD Camera power down( active high)
CIF_RESET CIF_RESET Camera reset
LCD IF/
DIF_D0 DIF_D(0) LCD data[0]
DIF_D1 DIF_D(1) LCD data[1]
DIF_D2 DIF_D(2) LCD data[2]
DIF_D3 DIF_D(3) LCD data[3]
DIF_D4 DIF_D(4) LCD data[4]
DIF_D5 DIF_D(5) LCD data[5]
DIF_D6 DIF_D(6) LCD data[6]
DIF_D7 DIF_D(7) LCD data[7]
DIF_CS1 DIF_CS LCD chip select

GPIO_96 FM_BBP_SEL

Audio amp inuput select(High:

FM sound, Low: BBP sound)
DIF_CD DIF_CD Command Data switch
DIF_WR MM_WR LCD Write
DIF_RD MM_RD LCD Read

3. TECHNICAL BRIEF

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GPIO_99 CHG_LED_CTRL Charging indicator LED control
GPIO_100 TF_PWR_EN

TransFlash card power enable(active High)
DIF_RESET1_GPIO DIF_RESET1 LCD Reset
EINT6 REMOTE_INT For Remote Control Headset
I2c
I2C_SCL SCL For SM-Power, FM Radio, Audio AMP
I2C_SDA SDA "
PM_INT (EINT) PM_INT SM-Power interrupt
SIM CARD
CC_IO SIM_IO SIM CARD I/O SIM CARD I/O
CC_CLK SIM_CLK SIM CARD CLOCK
CC_RST SIM_RST SIM CARD RESET
I2S
I2S2_CLK0 Not Use
GPIO_102 _WP Not Connected
I2S2_RX Not Use
I2S2_TX Not Use
I2S2_WA0 Not Use
I2S2_WA1 Not Use
EXTERNAL MEMORY
MMCI_CMD TF_CMD For T-Flash
MMCI_DAT[0] TF_DAT0 "
MMCI_CLK TF_CLK "
BT I/F
USIF_TXD_MTSR USIF_TXD For Bluetooth
USIF_RXD_MRST USIF_RXD "

GPIO_109 _USB_EOC

USB End of charging detect(High:

EOC, Low: charging)

GPIO_110 RPWRON

Remote power on detect (High:

Remote , Low: Normal

GPIO_111 SPK_RCV_SEL

Audio pass select( high:

Speaker, Low: Receiver)
I2S
I2S1_CLK0 I2S1_CLK For Bluetooth
GPTU0_0 FLASH_EN For Camera Flash LED

3. TECHNICAL BRIEF

- 28 -

I2S1_RX I2S1_RX For Bluetooth
I2S1_TX I2S1_TX "
I2S1_WA0 I2S1_WA0 "
MMC
MMCI_DAT[1] TF_DAT1 For T-Flash
MMCI_DAT[2] TF_DAT2 "
MMCI_DAT[3] TF_DAT3 "
AUDIO I/F
EPN1 RCV_N For Receiver
EPP1 RCV_P "
EPPA1 BBP_SND_L For Speaker
EPPA2 BBP_SND_R For Speaker
MICN1 MIC1_N For Mic
MICP1 MIC1_P "
MICN2 MIC2_N For Headset Mic
MICP2 MIC2_P "
VMICP VMICP For Mic
VMICN VMICN "
ADC
M_0 BAT_TEMP Battery temperature detect

M_1 RF_TEMP

RF Power amp reference temperature

detect
M_2 JACK_TYPE For 18Pin Cable Type Detect
M_7 HW revision indication
M_8 Battery voltage measurement
M_9 I_MONITOR Current consumption measurement

M_10 REMOTE_ADC

For Remote Control Headset Key detect

with REMOTE_INT
JTAG
TDO TDO For JTAG & ETM Interface
TDI TDI "
TMS TMS "
TCK TCK "
TRST_n TRSTn "
RTCK RTCK "

3. TECHNICAL BRIEF

- 29 -

ETM
TRIG_IN TRIG_IN "
MON1 MON1 "
MON2 MON2 "
TRACESYNC TRACESYNC "
TRACECLK TRACECLK "
PIPESTAT[2] PIPESTAT[2] "
PIPESTAT[1] PIPESTAT[1] "
PIPESTAT[0] PIPESTAT[0] "
TRACEPKT[0] TRACEPKT[0] "
TRACEPKT[1] TRACEPKT[1] "
TRACEPKT[2] TRACEPKT[2] "
TRACEPKT[3] TRACEPKT[3] "
TRACEPKT[4] TRACEPKT[4] "
TRACEPKT[5] TRACEPKT[5] "
TRACEPKT[6] TRACEPKT[6] "
TRACEPKT[7] TRACEPKT[7] "
Data bus
EBU_AD[0] D(0) Data bus[0]
EBU_AD[1] D(1) Data bus[1]
EBU_AD[2] D(2) Data bus[2]
EBU_AD[3] D(3) Data bus[3]
EBU_AD[4] D(4) Data bus[4]
EBU_AD[5] D(5) Data bus[5]
EBU_AD[6] D(6) Data bus[6]
EBU_AD[7] D(7) Data bus[7]
EBU_AD[8] D(8) Data bus[8]
EBU_AD[9] D(9) Data bus[9]
EBU_AD[10] D(10) Data bus[10]
EBU_AD[11] D(11) Data bus[11]
EBU_AD[12] D(12) Data bus[12]
EBU_AD[13] D(13) Data bus[13]
EBU_AD[14] D(14) Data bus[14]
EBU_AD[15] D(15) Data bus[15]
EBU_WR_n _WR Write strobe

3. TECHNICAL BRIEF

- 30 -

EBU_RD_n _RD Read strobe
EBU_BC0_n _BC0
EBU_BC1_n _BC1
EBU_A[0] A(0) Address bus[0]
EBU_A[1] A(1) Address bus[1]
EBU_A[2] A(2) Address bus[2]
EBU_A[3] A(3) Address bus[3]
EBU_A[4] A(4) Address bus[4]
EBU_A[5] A(5) Address bus[5]
EBU_A[6] A(6) Address bus[6]
EBU_A[7] A(7) Address bus[7]
EBU_A[8] A(8) Address bus[8]
EBU_A[9] A(9) Address bus[9]
EBU_A[10] A(10) Address bus[10]
EBU_A[11] A(11) Address bus[11]
EBU_A[12] A(12) Address bus[12]
EBU_A[13] A(13) Address bus[13]
EBU_A[14] A(14) Address bus[14]
EBU_A[15] A(15) Address bus[15]
EBU_A[16] A(16) Address bus[16]
EBU_A[17] A(17) Address bus[17]
EBU_A[18] A(18) Address bus[18]
EBU_A[19] A(19) Address bus[19]
EBU_A[20] A(20) Address bus[20]
EBU_A[21] A(21) Address bus[21]
EBU_A[22] A(22) Address bus[22]
EBU_A[23] A(23) Address bus[23]
EBU_A[24] A(24) Address bus[24]
EBU_CS0_n _FLASH1_CS Flash ROM chip select
EBU_CS1_n _RAM_CS SDRAM Chip select
EBU_CS2_n _FLASH2_CS Not used
EBU_CS3_n _CS3 Not used
EBU_ADV_n _ADV
EBU_RAS_n _RAS
EBU_CAS_n _CAS

3. TECHNICAL BRIEF

- 31 -

EBU_WAIT_n _WAIT
EBU_SDCLKO SDCLKO
EBU_SDCLKI SDCLKI
EBU_BFCLKO BFCLKO
EBU_BFCLKI BFCLKI
EBU_CKE CKE
SSC1_SCLK F_DPD

T_OUT0 TXON_PA RF Power amp turn on
GPIO_44 VIBRATOR_EN

Vibrator enable(High: enable, Low:disable)
T_OUT2 PA_BAND RF band select
T_OUT3 ANT_SW1 RF FEM control signal 1
T_OUT4 ANT_SW2 RF FEM control signal 2
EINT3 ANT_SW3 RF FEM control signal 3
T_OUT6 MODE For RF
GPIO_50 KP_OUT(4) Key pad
GPIO_51 AU_PWR_EN Audio amp power enable( active high)
CC1CC3IO LCD BACKLIGHT LCD Backlight Control

GPIO_53 JACK_DETECT

For Headset Detect(High:

unplugged, Low: plugged)
GPIO_54 _FM_RESET FM Radio chip reset
GPIO_55 AF_PWR_EN Auto focus power enable( active high)

RF_STR0 EN RF Transceiver chip enable

GPIO_57 TF_DETECT

Micro SD card detect (High:

inserted, Low: ejected)
RF_DATA DA RF Transceiver chip data
RF_CLK CLK RF Transceiver chip clock
System port

AFC AFC

Automatic Frequency control DAC

output for 26MHz VCTCXO

CLKOUT0 [<=26MHz] Not Use

F26M 26MHZ_MCLK

Baseband processor PLL

input Main clock

3. TECHNICAL BRIEF

- 32 -

F32K Sleep crystal 32.768KHz
OSC32K Sleep crystal 32.768KHz
RESET_n _RESET Baseband processor reset
CC1CC1IO TRIG_OUT For JTAG & ETM Interface

RTC_OUT RTC_OUT

Wake up signal to alarm (High;

wake up, Low: Power off)
VCXO_EN VCXO_EN 26MHz clock enable
DSP
DSPIN0 _BT_RESET Bluetooth chip reset
GPIO_62 Not Use
GPIO_63 _SIM_EN SIM card power enable

3. TECHNICAL BRIEF

- 33 -

3.3. Power management IC

3.3.1. General Description

SM-POWER is a highly integrated Power and Battery Management IC for mobile handsets. It has
been specially designed for usage with S-Gold2. Although optimized for usage with the Infineon S­GOLD baseband device it is suitable for the S-GOLDlite and the E-GOLD+ baseband devices as
well. It also supports the cellular RF devices like SMARTi-DC, SMARTi-DC+, SMARTi-SD and the
Bluemoon Single, Infineon’s single chip solution for Bluetooth. If used with S-GOLD2 it provides all
power supply functions (except for the RF PA) for a complete advanced GSM Edge smart phone
minimizing external device count.

Block Description

• Highly efficient step-down converter for main digital baseband supply including Core, DSP and
memory interface (External Bus Unit).

• Support of S-GOLD standby power-down concept

• Low-drop-out (LDO) regulators for Flash and mobile RAM memory devices

• Voltage independent switching of two SIM cards

• LDO regulators for baseband I/O supply

• LDO regulator for analog mixed-signal section of S-GOLD

• Low-noise LDO regulators for RF devices

• Supply for Bluemoon Single, Infineon’s single chip solution for Bluetooth

• Audio amplifier 8 Ohms for handsfree operation and ringing

• Charge Control for charging Li-Ion/Polymer batteries under software control

• Pre-charge current generator with selectable current level

• RTC regulator with ultra-low quiescent current

• USB interface support for peripheral and mini-host mode

• Backlight LEDs driver with current selection and PWM dimming function

• Two single LED driver outputs for signaling

• Vibrator driver with adjustable voltage

• Fully controlable by software via I2C - Bus

• Temperature and battery voltage sensors

• Interrupt channels for peripherals

• System debug mode

• VQFN 48 package with heat sink and non-protruding leads

• Compatible with the Infineon E-GOLD+ V2 and V3

3. TECHNICAL BRIEF

- 34 -

SM-POWER is a further step on the successful E-Power product line with enhanced and optimized
functionality. SM-POWER features a baseband supply concept with a DC/DC step-down converter
(SDBB) cascaded by two linear regulators (LBB1/2)

- SM-POWER’s DC/DC converter makes up to 40 % reduction of battery current for smart phone
functions (e.g. organizer functions, games, MP3 decoding) possible.

- SDBB has high efficiency up to 95% and also a power save mode.

- Memory Interface is directly supported by the SDBB

- SDBB can also act as main supply voltage for E-GOLD+ or S-GOLDlite baseband devices.

- For S-GOLD two linear regulators for DSP and Core are cascaded after the SDBB.

Figure 4 Top level block diagram of the SM-Power(PMB6812)

3. TECHNICAL BRIEF

- 35 -

SM-POWER supports the standby power-down concept of S-GOLD by temporarily switching off the
linear regulator LBB1 for the DSP during mobile standby whenever this subsystem is not used. In this
phase the ARM controller and most peripherals including parts of the on-chip SRAM are kept
powered-up with power being supplied by the other linear regulator LBB2.
SM-POWER includes a fully differential audio amplifier able to drive loads down to a nominal value of
8 Ohm for usage in hands-free phones and for ringing

- 400 mW maximum output power

- adjustable gain

- mute switch

- click and pop - protection

SM-POWER also integrates a charging function for Li-Ion, Li-Polymer batteries

- Pre-charge current source with two current levels

- Constant current / constant voltage charging with 3 different termination voltages

- Programmable charge current limitation for use with different batteries

- Freely programmable pulse charging to reduce the thermal power dissipation in the constant
voltage charging phase

- Top-off charge current sensing

SM-POWER completes the USB interface of S-GOLD

- Regulated voltage for S-GOLD USB interface including reverse current and over-voltage protection

- Switch to supply USB pull-up resistor

- Mini-host pull down resistor functionality

- Charge pump with internal switching capacitor for USB host VBUS supply voltage

SM-POWER fully supports LED and Vibra Motor functionality

- no external components needed

- driver for backlight LEDs adjustable in steps up to 140mA and with soft turn on and off by PWM
dimming

- two driver outputs for single LEDs for pre-charge indication and signaling with i.e. change of color

- driver for Vibrator Motor with adjustable voltages, soft startup / shutdown and current limitation

SM-POWER offers several control functions

- Power-on Reset Generator with logic state machine

- I2C bus interface

- I2C bus configurable mode control logic with ON (push-button or RTC), VCXOEN and LRF3EN
(wake-up by Bluetooth) inputs

- Programmable interrupt channels to handle peripherals like SIM, MMC and USB

- Monitoring of charging functions

- Under-voltage Shut-Down

- Error flags (volatile or non-volatile) from many power-supply functions and thermal sensor in order
to debug system

- Over--temperature Shut-Down

- Over-temperature Warning

- Support of S-GOLD standby power-down concept

- Support of S-GOLD Power-Down Pad Tristate Function

3. TECHNICAL BRIEF

- 36 -

Table 6 LDO Output Table of SM-Power

LDO Net name Output Voltage Output Current Usage

SDBB 1V8_MEM 1.8V 850mA Memory & for LDO
LRFC 1V5_RF 1.5V 120mA RF transceiver
LBB1 1V5_DSP 1.5V 170mA DSP in BBP
LBB2 1V5_CORE 1.5V 300mA ARM core in BBP
LINT 2V72_IO 2.72V 135mA Peripherals
LSIM 2V85_SIM 2.85V 22mA SIM card
LSIM2 2V85_IO2 2.85V 200mA Peripherals
LMMC 2V85_CARD 2.85V 135mA SD card
LANA 2V65_ANA 2.65V 220mA Analog block in BBP
LRTC 2V11_RTC 2.11V 0.3mA RTC block & Backup battery
LRF1 2V85_RF 2.85V 250mA RF IC
LRF2 2V7_RF 2.7V 10mA RF IC
LRF3 2V65_BT 2.65V 150mA BT IC(Blue moon
LUSB 3V1_USB 3.1V 45mA USB I/F

Figure 5 Power domain block diagram of KE600/KE608

3. TECHNICAL BRIEF

- 37 -

2.2u

C231

C204

2.2u

2V85_MMC

C206

2.2u

VBAT

TP212

2V85_RF

VBAT

VBAT

CRS08

D201

R209

100K

2V65_ANA

C207

2.2u

C228

47n

VBAT1V8_MEM

2V65_BT

3V1_USB

2V85_IO2

5

D1

D2

2

1

D3

3

G

4

S1

6

S2

C203

2.2u

NDC652P

Q201

2.2u

C211

22u

C214

2.2u

C232

2.2u

C212

2.2u

C233

0.1uC210

82K

VCHG

2V72_IO

R208

2.2u

C216

4.7KR203

C227

FB201

10u

C205

2.2u 2.2u

2V7_VCXO

C208

C235

0.1u

2V85_SIM

1V5_DSP

1V5_RF

2V11_RTC

C237

100u

2.2u

C218

22u

C215

VBAT

VBAT

R202 220K

470K

R204

TP214

TP211

L201 10uH

0

R220

TP604

C217

2.2u

TP213

2.2u

C209

C213

1V5_CORE

0.1u

R212

0.15

C234

2.2u

VCHG

VMMC

20

VRF140VRF2

38

37

VRF3

VRFC

3

VRTC

42

18

VSIM119VSIM2

27

VSSAU

8

VSSFB

7

VSSPW

VSSR

33

VUPU

10

VUSB

11

VBATS

2

12

VBUS

VCHC

44

1

VCHS

36

VCXOEN

VDDA

35

VDDAU

30

VDDB

17

VDDC

46

VDDCH

43

VDDPW

5

39

VDDRF

VIB

13

VINT

21

45

VLBB147VLBB2

29

AUOP

BYP

31

9

FB

GND

49

41

INTOUT

32

IREF

LED

16

22

LRF3EN

4

ON

RESETQ

48

23

SCL

SDA

24

15

SLED114SLED2

6

SW

34

VANA

PMB6812

U201

25

AUIN

AUIP

26

AUON

28

SPOWER_INT

VCH_CTL

PMRSTn

RTC_OUT VBACKUPPWRON

VCH_CTL

VCHS

VCHS

PWRON

VBUS_USB

USB_PU

KEY_BACKLIGHT

BT_VCXO_EN

SCL

SDA

VCXO_EN

VIBRATOR

Figure 6 SM-Power circuit diagram with charging part

3. TECHNICAL BRIEF

- 38 -

3.3.2. Charging

SM-POWER provides together with an external p-channel FET Siliconix Si3455 an external AC­adapter a complete charge control function for charging of Li-Ion or Li-Ion-Polymer batteries. Either
a 1-cell Li-Ion or Li-Ion-Polymer battery with 4.1, 4.2 or 4.4 Volts may be used.

1. Charging method : CC-CV

2. Charger detect voltage : 4.0V

3. Charging time : 3h

4. Charging current : 600mA

5. CV voltage : 4.2V

6. Cutoff current : 100mA

7. Full charge indication current (icon stop current) : 100mA

8. Recharge voltage : 4.15V

9. Low battery alarm
a. Idle : 3.50V~3.35V
b. Dedicated : 3.58V~3.35V

10. Low battery alarm interval
a. Idle : 2min
b. Dedicated:2min

11. Switch-off voltage : 3.35V

12. Charging temperature adc range
a. ~ -20˚C : low charging voltage operation (3.6V ~ 4.2V) .
b. -20˚C ~ 60˚C : standard charging (up to 4.2 V)
c. 60˚C ~ : low charging voltage operation (3.6V ~ 4.2V)

Figure 7 Battery Block Indication

3. TECHNICAL BRIEF

- 39 -

3.4. Power ON/OFF

KE600/KE608 Power State : Defined 3cases as follow

] Power-ON : Power key detect ( SM-Power’s ON port
] Power-ON-charging : Charger detect.
] Power-ON-remote : remote power on detect (Factory use only)

Input ON is a power-on input for SM-POWER with 2 active high levels (see Figure 8). It might be
triggered by a push button or by the RTCOUT output of the S-GOLD device as well. To detect if the
push-button is pressed during system operation the logical level at pin ON or its change (if Bit 1 EION
in INTCTRL2 is asserted) is recorded in bit LON of the ISF register. If the high level of voltage at pin
ON does not reach V

IHdet

(Vbat-0.8 ~ Vbat-0.3) the above-mentioned bit won’t be set.
To support Remote power on function for factory mass production, applied an analog switch as
following figure. As monitoring the RPWRON(GPIO_110) and Key matrix KP_OUT(1) & KP_IN(5),
KE600/KE608 system recognize whether remote power on or End-key pushed

Figure 8 Power on application.

3. TECHNICAL BRIEF

- 40 -

3.5. SIM interface

KE600/KE608 supports 1.8V & 3V plug in SIM, SIM interface scheme is shown in (Figure 10).
SIM_IO, SIM_CLK, SIM_RST ports are used to communicate with BBP(S-Gold2) and the SIM power
supply enabled by BBP (_SIM_EN).

SIM Interface

SIM_CLK : SIM card reference clock
SIM_RST : SIM card Async /sync reset
SIM_IO : SIM card bidirectional reset

Figure9 Remote power on and End-key power on circuit

Figure 10 SIM CARD Interface

2V85_SIM

22p

C340

C341

22p

0.1u

C339

CLK

3

4

GND1

GND2

7
8

GND3GND4

9

10

GND5

IO

6

2

RST

1

VCC

VPP

5

J301

D

G

S

SI1305-E3

Q301

4.7KR339

NAR340

SIM_CLK

SIM_RST

SIM_IO

SIM_ENn

1

Q401

2SC5585

2

3

1M

R402

10K

R401

KP_IN5

KP_OUT1

END_KEY

END

PRSB6.8C

D106

END

VBAT

END_KEY

C240

1uF

0R213

U203

NLAST4599DFT2G

5COM

GND

3

1

IN

NC4

6NO

2

VCC

100K

R217

VBAT

R215 0

1K

R252

100p

C244

VBAT

100K

R253

4

NC

VDD

13

VOUT

R1114D281D-TR-FU206

CE

6

2

GND1

5

GND2

1000p

C245

RPWRON_EN

RPWRON

RPWRON

PWRON

END_KEY

3. TECHNICAL BRIEF

- 41 -

3.6. Memory

1Gbit Flash & 512Mbit SDRAM employed on KE600/KE608 with 16 bit parallel data bus thru ADD(0) ~
ADD(24). The 256Mbit Sibley Wireless Flash memory with LPSDRAM stacked device family offers
multiple high-performance solutions. The Sibley flash die is manufactured on 90 nm process
technology.
It delivers 108 MHz synchronous burst and page-mode read rates with supports multi-partitioning with
Read-While-Write (RWW) or Read-While-Erase (RWE) dual operations. The LPSDRAM is a high­performance volatile memory operating at speeds up to 104 MHz with configurable burst lengths.

Figure 11 Flash memory & SDRAM MCP circuit diagram

PF38F5570MMY0B0U304

NAR312

R314 22

R317 22

0R322

NAR334

TP302TP301

D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15

ADVn

TP305

CS_Flash1n

TP306

CS_Flash2n

TP307

TP308

TP309

TP313
TP314
TP315
TP316

TP317
TP318

BFCLKI
BFCLKO
SDCLKO
SDCLKI
RDn

WAITn
WRn

WPn

F_DPD

CKE
A13
A14
RASn
CASn
CS_RAMn

BC0n
BC1n

1V8_MEM

R319
100K

R318

15K

RESETn

22R315
22R316

1V8_MEM

A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24

D1

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9

C327

C328

0.1u

0.1u

C331

C330

0.1u

0.1u

C333

C334

0.1u

0.1u

A0

C1

A1

B1

A2

B2

A3

A2

A4

B3

A5

A3

A6

A4

A7

G8

A8

F8

A9

E8

A10

G9

A11

F9

A12

E9

A13

D9

A14

C9

A15

B9

A16

B4

A17

B5

A18

A5

A19

F7

A20

E7

A21

B7

A22

A6

A23

A7

A24

A8

A25

B8

A26

J1

F_VPP

D4

F_VCC1

D6

F_VCC2

J4

F_VCC3

J6

F_VCC4

C5

D_VCC1

D3

D_VCC2

D7

D_VCC3

D2

S_VCC

J2

VCCQ1

J3

VCCQ2

J7

VCCQ3

J8

VCCQ4

C2

VSS1

C3

VSS2

C4

VSS3

C6

VSS4

C7

VSS5

C8

VSS6

K2

VSS7

K3

VSS8

K4

VSS9

K6

VSS10

K7

VSS11

K8

VSS12

_F4_CE_A27

D_DM0__S_LB

D_DM1__S_UB

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

_F_ADV

_F1_CE
_F2_CE
_F3_CE

F_CLK
D_CLK

_D_CLK

_OE
_F_RST
F_WAIT

_WE

_D_WE
_F_WP1
_F_WP2

F_DPD

N_CLE

N_ALE

N_RY__BY

D_CKE

D_BA0

D_BA1
_D_RAS
_D_CAS

_D1_CS
_D2_CS

D_UDQS
D_LDQS

_S_CS1

S_CS2

DU1
DU2
DU3
DU4

RFU

M2
L1
K1
L2
M4
L3
L4
L5
M5
L6
M6
L7
L8
K9
L9
M8

D5
G3
G2
H3
E6
K5
J5
H5
H7
G7
J9
E2
H6
E1
F1
B6
E5
D8

H1

G6
G4
H4
F4
F3
F2
E3
H9
H8
M7
M3
F6
H2

A1
A9
M1
M9
G1

R321 NA

R335 NA

3. TECHNICAL BRIEF

- 42 -

3.7. LCD Display

LCD module include:

- LCD : 240 x 320 262K Colors TFT LCD

- Backlight : 3 piece of white LED illumination
LCD module is connected to sub board thru 35 pins connector.
LCD FPC Interface Spec:
Table 7 LCD FPC Interface Spec.

Pin No. Pin Name I/O Description
1 MLED I White LED common Anode
2 MLED1 O White LED1 Cathode
3 MLED2 O White LED2 Cathode
4 MLED3 O White LED3 Cathode
5 2V85_MMC I LCD power supply
6 2V72_IO I LCD power supply
7 LCD_ID O LCD maker Identification
8 NC
9 NC
10 NC
11 NC
12 NC
13 NC
14 NC
15 NC
16 DIF_D7 I/O Data[7] for LCD
17 DIF_D6 I/O Data[6] for LCD
18 DIF_D5 I/O Data[5] for LCD
19 DIF_D4 I/O Data[4] for LCD
20 DIF_D3 I/O Data[3] for LCD
21 DIF_D2 I/O Data[2] for LCD
22 DIF_D1 I/O Data[1] for LCD
23 DIF_D0 I/O Data[0] for LCD
24 GND GROUND
25 GND GROUND
26 DIF_RD I Read strobe
27 DIF_WR I Write strobe
28 DIF_RS I Data/command selection
29 DIF_CS I LCD chip selection
30 DIF_VSYNC O Vertical sync
31 IF2 I CPU interface bus width selection
32 IF1 I CPU interface bus width selection
33 DIF_RESET I LCD reset
34 GND GROUND
35 GND GROUND

3. TECHNICAL BRIEF

- 43 -

3.8. Keypad Switching & Scanning

The keypad interface is a peripheral which can be used for scanning keypads up to 8 rows (outputs
from Port Control Logic) and 8 columns (inputs to PCL). The number of rows and columns depend on
settings of the PCL.

Figure 12 SUB PCB part Jog-key matrix

9

0

#

*

NEO_RIGHT_SIDEKEY_PAD

5

7

KEYPAD

1

6

4

3

28

NEO_LEFT_SIDEKEY_PAD

680R405

KB407KB405

3

CN402

1
2

KB_shapKB409

KB406

680R407

R404 680

KB408

UCLAMP0501H_TCT

INSTPAR

ZD402

NAC402

KB402

KB403

INSTPAR

ZD401

UCLAMP0501H_TCT

1

2

3

4

CN401

680R423

KB401

R427 680

680R403

C401 NA

KB_star

KB404

KB410

R406 680

C403 NA

R422 680

KP_OUT2

KP_OUT0

KP_OUT1

KP_IN0

KP_IN4

KP_IN1

KP_IN2

KP_IN3

Figure 13 MAIN PCB part numeric key matrix

2V72_IO

KP_IN0

KP_IN1

JOG_DISK_B

JOG_PWDN

JOG_LED_ANODE

JOG_LED_CATHODE

CN101

G1 G2

20

1

192
18

3

17

R108 0

0R110

R113 0

KEY-JOG MODULE 20 PIN CONNECTOR

4

16

5
6

15

7

14

8

13

9

12

10 11

G4

G3

AXK7L20227G(0.9T)

SOCKET

ENBY0016601

D101

D102

PG05DBTFC

0R106

D103

PG05DBTFC

D104

PG05DBTFC

D105

PG05DBTFC

KP_IN0
KP_IN1JOG_DISK_A
KP_IN2
KP_IN3
KP_IN4
KP_OUT3
KP_OUT4

PG05DBTFC

END_KEY

C101

VBAT

END

END

D106

PRSB6.8C

R102

NA

0

OK

C102

R103

NA

0

SENDMP3

SNED

R112

KP_OUT3

0
C103
NA

SLIDE KEYPAD ARRAY

3. TECHNICAL BRIEF

- 44 -

Numeric keys, Camera key and volume up & down keys are located on the MAIN PCB, Jog key for
menu navigation, Power on (End key), MP3 hot key and Send key is on the SUB PCB, are connected
via 50pin board to board connector between main PCB and FPCB.

3.9. Keypad back-light illumination

There are 9 snow white color LEDs on the sub PCB for keypad illumination. Keypad Back-light is
controlled by SM-Power LED port which has constant current control function.
The whole configuration of the SM-POWER LED drivers is shown in below Figure14. (SLED1, SLED2
port are not used in the KE600.KE608)

Figure 14 Keypad Back-light LEDs

3. TECHNICAL BRIEF

- 45 -

05.09.05 JOG LED ANODE AND CATHODE FOR 4 LEDs

Figure 15 SUB Keypad Back-light LEDs

Figure 16 Keypad Back-light LEDs

VBAT

47R413

LD407

47R416

LD409

LD411

LD408

EVL5M02200

VA402

47

R417

R419 47

LD412

0R421

LD406

EVL5M02200

VA401

47R412

0

LD410

R420

R411 47

47

LD405

R414

VA403

EVL5M02200

LD404

TWH104-HS

R418 47

47R415

KEY_BACKLIGHT

SLIDE_KEY_BACKLIGHT

R123 2.7K

R124

12

R131

12

VBAT

JOG_LED_ANODE

JOG_LED_CATHODE

Q101

31

2

EMX18

4

56

R132

36

LD101

150

R125

TWH104-HS

LD103

150

R127

LD104

TWH104-HS

150

R128

TWH104-HS

C107

0.1u

KEYPAD BACKLIGHT DRIVER

KEYPAD BACKLIGHT BLUE LED

3. TECHNICAL BRIEF

- 46 -

3.10. LCD back light illumination

Employed the AAT2807 is a dual charge pump designed to support both the white LED backlight and
flash applications for systems operating with lithium-ion/polymer batteries. The backlight charge pump
is capable of driving up to three LEDs at a total of 60mA. The current sinks may be operated
individually or in parallel for driving higher current LEDs. To maximize power efficiency, the charge
pump operates in 1X, 1.5X, or 2X mode, where the mode of operation is automatically selected by
comparing the forward voltage of each LED with the input voltage.

The interface relies on the number of rising edges of the EN/SET pin to address and load the registers.
S2Cwire latches data or address after the EN/SET pin has been held high for time TLAT. The interface
records rising edges of the EN/SET pin and decodes them into 16 different states, as indicated in table

Figure 18 LCD Back light unit and Flash LED charge pump IC

FLASH_EN

LCD_BACKLIGHT

R362 0

4

9

16

10

C346

1u

11

C1+

VIN

GND
PGND

EN_FLSH

EN_SET

12

VBAT

C352

1u

0R350

R357

R356

100K

100K

C1-

14

C347

1u

C2+

AAT2807AIXN-4.5U306

15

2

C2-

VOUT_FL

VOUT_BL

C348

1u

C3+

ISINK1
ISINK2
ISINK3

C354
1u

R344 62

R346 62

R347 62

1

C3-

3

13

C353

1u

817

NC

5
6
7

62R343

FLASH_LED

MLED

MLED1
MLED2
MLED3

3. TECHNICAL BRIEF

- 47 -

Figure 19 S2Cwire EN/SET port control method

Table 8. Charge pump IC LCD part current setting table

3. TECHNICAL BRIEF

- 48 -

3.11 Battery current consumption monitor

KE600/KE608 use a current monitoring function to calculate the battery capacity and the remaining
time, as monitoring current flow from the battery thru 47mohm resistor.

3.12 JTAG & ETM interface connector

In case of KE600/KE608 mass production, the JTAG & ETM interface connector will not be mount on
board. That is only for developing and software debugging purpose.( It will not be mounted on mass
production PCB)

Figure 20 Current monitor circuit

Figure 21 JTAG & ETM(Embedded Trace Module) interface connector

VSUPPLY

CN404

1

5

2

4

3

C408

1u

C409

56p

C410

18p

C418
10p

C419
3p

VBAT

R465

47mohm

ZXCT1010E5TA

C414
56p

IOUT

VIN

LOAD

GND

U403

3
2

NC

4

51

C411

1u

R466

2.2K

R462 1K

C412

18p

BATT_TEMP

I_MONITOR

C413

56p

1V8_MEM2V72_IO

TRSTn

TDI
TMS
TCK

RTCK

TDO

EXTRSTn

TRIG_IN

TRIG_OUT

R105

R106

R111

NA

0

0

CN101

G1 G2

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15

G3 G4

30
29
28
27
26
25
24
23
22
21
20
19
18
17
16

TRACECLK
TRACEPKT7
TRACEPKT6
TRACEPKT5
TRACEPKT4
TRACEPKT3
TRACEPKT2
TRACEPKT1
TRACEPKT0
PIPESTAT2
PIPESTAT1
PIPESTAT0
TRACESYNC

3. TECHNICAL BRIEF

- 49 -

3.13. Audio

KE600/KE608 Audio signal flow diagram as following diagram.

Figure 22 Audio signal flow diagram

3. TECHNICAL BRIEF

- 50 -

3.13.1. Audio amplifier sub system IC with 3D effect

Audio amplifier sub system IC is an audio power amplifier capable of delivering 540mW of
continuous average power into a mono 8ߟ bridged-tied load(BTL) with 1% THD+N, 35mW per
channel of continuous average power into stereo 32ߟ single-ended (SE) loads with 1% THD+N
from a 3.3V Power supply. The LM4946 features a 32-step digital volume control and eight distinct
output modes. The digital volume control, 3D enhancement, and output modes (mono/SE/OCL) are
programmed through a two-wire I2C interface that allows flexibility in routing and mixing audio
channels.

Figure 23 Audio amplifier Sub-system IC

0R327

10

1A

91

1B0

2

1B1

8

1S

6

2A

2B0

3

2B1

4

7

2S

GND

5

VCC

FSA2267L10X

U302

100K

R331

2V85_IO2

0R330

0.01u

C329

AMP_IN_L

AMP_IN_R

SNDOUT_L

SNDOUT_R

FM_LFM_MAIN

FM_R

Figure 24 Audio signal distribute analog switch

VBAT

2V85_IO2

4

20

3

16

VDD1

GND212GND3

U301

LM4946SQX

LHP3D1

LHP3D29LIN

1

18

C323

0.068u

VDD2

6

220n C313

AMP_IN_L

TP304

SCL

TP303

SDA

R309 100K

C369

0.1u

11

10

13

2

7

14

SCL

SDA

ID_ENB

VOC

I2CSPI_VDD

I2CSPI_SEL

C320

0.01u

C358

GND1

CBYPASS

21

2.2u

LOUT

25

PGND

C306

0.1u

MONO_IN+

MONO_IN-

MONO+

MONO-

RHP3D1

RHP3D2

ROUT

C357

4.7u

1u

C304

C361 220n

23

C362 220n

22

15

17

0.068u

19

C324

24

C312 220n

8

RIN

5

FB309

FB310

C310

C317

47p

AMP_IN_R

AMP_OUT_R

AMP_OUT_L

C311

22p22p

C316

47p

D309

SNDOUT_L

SNDOUT_R

PG05DBTFC

D310

OUT301

OUT302

PG05DBTFC

3. TECHNICAL BRIEF

- 51 -

3.13.2. Microphone

The microphone is a omni-directional microphone condenser microphone with -42 3dB sensitivity.

Figure 25 Microphone with Gain switching circuit

D311

PG05DBTFC

0R364

R348 1.2K

0R365

PG05DBTFC

D312

1.2KR345

C344 0.1u

C342

27p

0.1uC345

C349

27p

27p

C343

1000p

C351

OB4-15L42-C33L

MIC301

1
2

27p

C350

C367
10u

VMICN

VMICP

MIC1_P

MIC1_N

3. TECHNICAL BRIEF

- 52 -

3.14. USB charging circuit

The USB charging circuit is a fully integrated USB VBUS voltage single-cell Li-ion battery charger
circuit. The charger uses a CC/CV charge profile required by Li-ion batteries. CC charging current and
End of charging current is programmable I

REF

& IMIN resistors.

I

REF

resistor between this pin and the GND pin to set the charge current limit determined by the
following equation:
I

CC

= 12089/33K = 366mA

The End Of Charging current is set by I

MIN

That can be programmed by the as following equation:

I

EOC

= 11000/220K = 50mA

Figure 26 USB charging circuit

2V72_IO

U205 ISL6294

VBAT

USB_EOCn

R250
10K

USB_CHG_ENn

1

VBUS_USB

0R221

TP217

0R216

C242

R251

1u

NA

VIN

2

_PPR

3

_CHG

4

_EN

9

PGND

BAT

IREF

IMIN

GND

8

7

6

5

C243
1u

R218 220K

R219 33K

3. TECHNICAL BRIEF

- 53 -

3.15 FM radio with RDS function

The FM receiver uses a digital low-IF architecture which allows for the elimination of external
components and factory adjustments. The receive (RX) section integrates a low noise amplifier (LNA)
supporting the worldwide FM broadcast band (87.5 to 108 MHz). An automatic gain control (AGC)
circuit controls the gain of the LNA to optimize sensitivity and rejection of strong interferers.

Figure 27 FM Radio circuit

-> MC74VHC1GT50DF1G

2V72_IO

C332100p

TP311

A

GND

VCC

Y

U305

MC74VHC1GT50DFT2

NA

R329

0R337

TP310

R336

10K

0

R328

PG05DBTFC

D308

C337

220n

0.1u

C338

24p

C326

TP312

GPIO3

19

16

LOUT

22

NC1

NC2

23

PGND

25

RCLK

11

RF_GND

3

ROUT

15

SCLK

9

10

SDIO

18

VA

VD

13

12

VIO

_RST

7

8

_SEN

U303

SI4701

4

FMIN

2

FMIP

GND1

1

GND2

5
6

GND3

14

GND4

GND5

17

24

GND6

GPIO1

21

20

GPIO2

4.7u

C335

L303
100nH

2V85_IO2

2V72_IO

VBAT

NA

C368

22n

2V72_IO

C336

CLK32K

FM_INTn

FM_L
FM_R

SCL

SDA

FM_RESETn

3. TECHNICAL BRIEF

- 54 -

3.16. BLUETOOTH

Figure 28 BLUETOOTH Functional block diagram.

3. TECHNICAL BRIEF

- 55 -

3.16.1. General Features

• Single Chip Bluetooth device for cellular applications integrating radio, baseband and memory

• Fabricated in advanced low power 0.13•Ïm CMOS technology

• Very low component count (6 external components)

• Ultra low power design

- Peak current 40mA for basic data rate

- Peak current 45mA for enhanced data rate

- Bluetooth low power mode typ. 25µA

• Multiple input clock signals supported (10-40MHz)

• Supply from external voltage regulator 1.8V..3.6V 1)

• Autonomous power down scenarios of Bluetooth and cellular system supported

• Packages:

- P-VQFN-48 package

- P-WFLGA-56 package

• Temperature range from -40°C up to 85°C

• Boundary scan for interface lines via JTAG

3.16.2 Micro-Controller-Section

• ARM7TDMI-STM ARM® Processor for protocol and application software

• Timers + Watchdog + Interrupt Module

3.16.3 Micro-Controller Memory

• 32 KByte RAM

• 256 KByte read only Program Memory

• 8 KByte Patch RAM

3.16.4 Interfaces

• UART (Bluetooth - Interface, support for HCI UART and Three-Wire UART transport layers
with/without hardware handshaking) up to 3.25MBaud

• Two channel PCM Audio interface with I2S mode

• I2C Interface

• Three channel full duplex CVSD trans coder

• General Purpose I/Os

- External interrupt

- Port output levels available during low-power mode (VDD supplied)

• Separate voltage domains for GPIO, UART and PCM interfaces

• Control signal for requesting external (cellular) system clock

• Multi frequency (e.g. 32.768 kHz) low power clock input

3. TECHNICAL BRIEF

- 56 -

3.16.5. RF-Section

• Integrated antenna switch to minimize external components count

• Programmable RF transmit power between -55dBm...+6dBm

- Fine tuning in 2dB programmable steps also supported

• 20dBm power class 1 supported with external power amplifier

- Separate TX output interface to PA (bypass of internal T/R switch)

- Digital power step control

• Receiver sensitivity typ. -90dBm

• High performance integrated LNA with excellent blocking and inter modulation performance

• Low-IF receiver topology eliminates external IF filters

• Digital demodulation for optimum sensitivity and co- / adjacent channel performance

- Digital offset compensation, symbol and frame synchronization

• RSSI information for power control

3. TECHNICAL BRIEF

- 57 -

3.16.6 System Integration

The UART (serial interface) is used for the software interface between S-Gold2 baseband and the
Bluetooth chip. For the HCI UART transport layer four interface lines are needed, two for data
(UARTTXD and UARTRXD) and two for hardware flow control (UARTRTS and UARTCTS). For the
HCI Three-Wire UART transport layer two interface lines (UARTTXD and UARTRXD) are needed. The
hardware flow control lines (UARTRTS and UARTCTS) are supported but the use is optional. In
KE600/KE608 used three-wire UART communication.
The UART interface has its own supply voltage (VDDUART) to ensure compatibility with the I/O
voltages used by the S-Gold2.
The PCM/I2S interface is used as audio interface and can handle up to two voice channels. The PCM
interface also has its own supply voltage (VDDPCM) to ensure compatibility with the I/O voltages used
by the S-Gold2 baseband processor.

Figure 29 Mobile system integration

3. TECHNICAL BRIEF

- 58 -

3.17. Micro SD external memory card slot

The MicroSD Memory Module has eight exposed contacts on one side. The S-Gold2 is connected to
the module using a dedicated eight-pin connector

Figure 30 Bluetooth circuit

Figure 32 Micro SD pin assignment

2V65_BT

C220

0.1u

1V5_CORE

C221

0.1u

BLUETOOTH

USIF_TXD
USIF_RXD

1V8_MEM

VBALUN

0.1u
C223

C222

0.1u

C219

1.5p

BT_CLK

TP203

TP204
TP205
TP206
TP207
TP208
TP209

C224

0.1u

ACS2450HBAM6

NC1

NC2

R205 0

C225

0.01u

BT201

2V72_IO

1V8_MEM

R201

0

C202

C201

0.1u

0.1u

L202

2.2nH

L203

2.2nH

G15G2

C9
C8

F8

C2

B1
B2
D1
H5

A4
A3
B8

A2

F2
F4
E5
F5
E4

B2

B1

DBF71B601

6

R207 0

4

3

I2S1_CLK
I2S1_WA
I2S1_RX

I2S1_TX

BT_VCXO_EN
CLK32K

TP210

BT_RESETn

C229

2.2p

0R206

TP201

TP202

J8

J7

H8

H9

G9

E8

D9

D8

UARTRTS

UARTTXD

VSS5

UARTRXD

PMB8753

CLKIN_XTAL

G1

PCMIN

PCMFR1

PCMCLK

PCMOUT

VDDUART

PCMFR2_SDA0_P0_12

SLEEPX_P0_15

WAKEUP_HOST_P1_8

WAKEUP_BT_P1_7

U202

TX_CONF_RXON

TXA1

TXA2

TX_CONF_P0_14

LOAD

P1_6

J3

H3

H7

H2

C1

C230

100p

E9

J1

VDDPCM

SCL0_P0_13

CLK32_P1_5

RESET_

RFOUT

PAON
PSEL0
PSEL1

VSSVCO

VSSRF1
VSSRF2
VSSRF3
VSSRF4

TXAX

RFIOX

J2

J4

J5

1

2

NC3

RFIO

FL201

J9

NC4

UB

DC

G8

A1

A9

NC1

NC2

B6

TDO

UARTCTS

A7

TDI

B4

TMS

B7

TCK

A6

TRST_

B9

RTCK

A5

JTAG_

F1

VDDSUP

D2

VDDCREG

A8

VDD_1

B3

VDD_2

F9

VDDC1

B5

VDDC2

G2

VDDPMREG

H4

VDDRF

E1

VDDRFREG1

E2

VDDRFREG2

H1

VDDPLL

J6

VCOCAP1

H6

VCOCAP2

C226

VSS1

VSS2

VSS3

1000p

FEED

VSS4

F6

E6

D4

D5

D6

VBALUN

3. TECHNICAL BRIEF

- 59 -

Table 9 Micro SD memory pad assign.

Table 10 Micro SD memory card detect truth table.

Figure 32 Micro SD memory card detection scheme

SD mode

Pin No. Name Type Description
1 DAT2 I/O Data bit [2]
2 CD/DAT3 I/O Data bit [3]
3 CMD I/O Command response
4 VDD Power Power supply
5 CLK I Clock
6 VSS Ground Power ground
7 DAT0 I/O Data bit [0]
8 DAT1 I/O Data bit [1]

Micro SD card status

it is removed it is inserted

TF_DETECT High Low

3. TECHNICAL BRIEF

- 60 -

3.18. 12pin Multi Media Interface connector

Table 11 Multi media interface pin assign

Figure 35 Micro SD socket circuit with power control

KE600/KE608 MMI

Pin Function Description

1 FM_ANT FM radio antenna / Audio ground

2 HS_MIC_P / HS_ VMICP

Headset microphone positive signal /
HS_ Mic positive source

3 HS_MIC_N / HS_ VMICN

Headset microphone negative signal /

HS_ Mic negative source
4 HS_OUT_L Headset left sound
5 HS_OUT_R Headset Right sound
6 HS_DETECT Headset detect (active low)
7 REMOTE_ADC Remote control Key ADC
8 HOOK_DETECT Hook detect (active low)
9 REMOTE_INT Remote control interrupt

10 V_HS Head_set source (2.72_IO)
11 IDEL Idle pin
12 IDEL Idle pin

3. TECHNICAL BRIEF

- 61 -

Figure 34 MMI 12pin connector circuit

27p

47p

C308

C322

C307
27p

FB307

PG05DBTFC

D306

PG05DBTFC

D302

FB302

FB308

0

R302

27p

47p

C321

C302

6
7

8
9

1

10
11
12

13

14

15

16

17

18

2
3
4
5

CN302

D303

PG05DBTFC

PG05DBTFC

D305

FB306

PG05DBTFC

D304

0

R301

NAC371

NA

C303

C370

0.1u

100K

R320

27p

C301

100uC314

1u

C366

FB303
FB304

R304

1.2K

1u

C365

R313
100K

100uC318

R366 33

33R367

C305

0.1u

PG05DBTFC

D310

C309

1000p

FB301

2V72_IO

D307

PG05DBTFC

C364

2V72_IO

10u

FB305

2V72_IO

100K

R306

PG05DBTFC

D301

OUT302

R305

1.2K

D309

PG05DBTFC

OUT301

HOOK_DETECT

HEADSET_DETECT

REMOTE_ADC

REMOTE_INT

SNDOUT_R

SNDOUT_L

AMP_OUT_R

AMP_OUT_L

VMICN

VMICP

MIC2_P

MIC2_N

3. TECHNICAL BRIEF

- 62 -

RF circuit

3.19. General Description

The RF transceiver (PMB 6272 SMARTi-PM) is an integrated single chip, quad-band transceiver for
GSM850/GSM900/GSM1800/GSM1900 designed for voice and data transfer applications. The
transceiver provides an analog I/Q baseband interface and consists of a direct conversion receiver and
a quad-band polar transmitter for GSM and EDGE with integrated PGA functionality. Further on a
completely integrated SD-synthesizer with HSCSD and GPRS/EDGE capability, a digitally controlled
reference oscillator with three outputs, a fully integrated quad-band RF oscillator and a three wire bus
interface with all necessary control circuits complete the transceiver.

RF Block Diagram

3. TECHNICAL BRIEF

- 63 -

Figure 35 RF transceiver PMB7262 SMARTi-PM functional block diagram

Figure 36 RF transceiver PMB7262 SMARTi-PM schematic

C641
NA

1000pC629

C614

2V85_RF

2.5p

0.1u

C626

0.1u

C630

C634
22p

0.1u

C624

1V5_RF

1V5_RF

2V85_RF

2.5p

L603

6.8nH

C615

8

VDDDIG2V8

5

VDDLNA1V5

21

VDDMIX2V8

39

19

VDDRX1V5

20

VDDRX2V8

35

VDDTX1V5

38

VDDTX2V8 VDDVCO2V8

17

VDDXO2V8

15

11

XO

XOX

12

GND2

GND3

40

41

GND4

RX1

29

30

RX1X

RX2

27

28

RX2X

24

RX3

RX3X

25

22

RX4

RX4X

23

TX1

36
37

TX2

VBIAS

34

VCO_RC

18

31

VDDBIAS2V8

VDDDIG1V5

1

A

AX

2

3

B

BX

4

7

CLK

DA

6

EN

16

32

FE1

33

FE2

FSYS1

14

FSYS2

10

9

FSYS3

13

GND1

26

PMB6272

U602

2V7_VCXO

C632

1u

C633 100p

0.1u

C622

0.1u

C631

C637

0.1u

C635 1000p

1.2p

C618

18nH

L602

R615

0

R622 10

0.1u

C623

0.1u

C636

2V85_RF

R619 680

6.8nH

L604

C617

1.5p

C625
47n

2V85_RF

2V7_VCXO

0.1u

C628

R617 10

1.5p

C616

0R620

GND

2

OUT

3

4

VCC

1

VCONT

1V5_CORE

0.1u

X601

26MHz

C627

1.2p

C619

R616 820

HBAND_PAM_IN

LBAND_PAM_IN

AFC

RF_DA

QX

Q

IX

I

RF_CLK

RF_EN

26MHZ_MCLK

BT_CLK

3. TECHNICAL BRIEF

- 64 -

3.20. Receiver part

The constant gain direct conversion receiver contains all active circuits for a complete receiver chain
for GSM/GPRS/EDGE (see Figure 37). The GSM850/900/DCS1800/ PCS1900 LNAs with balanced
inputs are fully integrated. No inter-stage filtering is needed. The orthogonal LO signals are generated
by a divider-by-four for GSM850/900 band and a divider-by-two for the DCS1800/PCS1900 band.
Down conversion to baseband domain is performed by low/high band quadrature direct down
conversion mixers. The baseband chain contains a LNB (low noise buffer), channel filter, output buffer
and DC-offset compensation. The 3rd order low pass filter is fully integrated and provides sufficient
suppression of blocking signals as well as adjacent channel interferers and avoids anti-aliasing
through the baseband ADC. The receive path is fully differential to suppress on-chip interferences.
Several gain steps are implemented to cope with the dynamic range of the input signals. Depending
on the baseband ADC dynamic range, single- or multiple gain step switching schemes are applicable.
Furthermore an automatic DC-offset compensation can be used (depending on the gain setting) to
reduce the DC-offset at baseband-output. A programmable gain correction can be applied to correct
for front end- and receiver gain tolerances.

3.21. Transmitter part

The GMSK transmitter supports power class 4 for GSM850 and GSM900 as well as power class 1 for
DCS1800 and PCS1900. The digital transmitter architecture is based on a very low power fractional-N
Sigma-Delta synthesizer without any external components (see Figure39). The analog I/Q modulation
data from the baseband is converted to digital, filtered and transformed to polar coordinates. The
phase/frequency signal is further on processed by the Sigma-Delta modulation loop. The output of its
associated VCO is divided by four or two, respectively, and connected via an output buffer to the
appropriate single ended output pin. This configuration ensures minimum noise level. The 8PSK
transmitter supports power class E2 for GSM850 and GSM900 as well as for DCS1800 and PCS1900.

Figure 37 Receiver part block diagram

3. TECHNICAL BRIEF

- 65 -

The digital transmitter architecture is based on a polar modulation architecture, where the analog
modulation data (rectangular I/Q coordinates) is converted to digital data stream and is subsequently
transformed to polar coordinates by means of a CORDIC algorithm. The resulting amplitude
information is fed into a digital multiplier for power ramping and level control. The ready processed
amplitude signal is applied to a DAC followed by a low pass filter which reconstructs the analog
amplitude information. The phase signal from the CORDIC is applied to the Sigma-Delta fractional-N
modulation loop.
The divided output of its associated VCO is fed to a highly linear amplitude modulator, recombining
amplitude and phase information. The output of the amplitude modulator is connected to a single
ended output RF PGA for digitally setting the wanted transmit power. The PA interface of SMARTi-PM
supports direct control of standard dual mode power amplifiers (PA’s) which usually have a power
control input VAPC and an optional bias control pin VBIAS for efficiency enhancement. In GMSK
mode, the PA is in saturated high efficiency mode and is controlled via its VAPC pin directly by the
baseband ramping DAC. In this way both up- / down-ramping and output power level are set. In 8PSK
mode, the ramping functionality is assured by an on-chip ramping generator, whereas output power is
controlled by the PGA’s as described above.

Figure 38 Transmitter part block diagram

3. TECHNICAL BRIEF

- 66 -

3.22. RF synthesizer

The transceiver contains a fractional-N sigma-delta synthesizer for the frequency synthesis in the RX
operation mode. For TX operation mode the fractional-N sigma-delta synthesizer is used as Sigma­Delta modulation loop to process the phase/frequency signal. The 26MHz reference signal is provided
by the internal crystal oscillator. This frequency serves as comparison frequency of the phase detector
and as clock frequency for all digital circuitry.The divider in the feedback path of the synthesizer is
carried out as a multi-modulus divider (MMD). The loop filter is fully integrated and the loop bandwidth
is about 100 kHz to allow the transfer of the phase modulation. The loop bandwidth is automatically
adjusted prior to each slot (OLGA2). To overcome the statistical spread of the loop filter element values
an automatic loop filter adjustment (ALFA) is performed before each synthesizer startup. The fully
integrated quad-band VCO is designed for the four GSM bands (850, 900, 1800, 1900 MHz) and
operates at double or four times transmit or receive frequency. To cover the wide frequency range the
VCO is automatically aligned by a binary automatic band selection (BABS) before each synthesizer
startup.

3.23. VCTCXO

The VCTCXO (X601) supply 26MHz reference clock and controlled by AFC input to generate a strict
system clock. The 26MHz clock is used to Transceiver(U602), Bluetooth chip(U202) and S-Gold2
(U101).

Figure39 VCTCXO Schematic

C641
NA

C634
22p

2V7_VCXO

C632

1u

R619 680

GND

2

OUT

3

4

VCC

1

VCONT

X601

26MHz

AFC

3. TECHNICAL BRIEF

- 67 -

3.24. Front End Module control

Implemented in the S-Gold2 (U101) are three outputs which are ANT_SW1, ANT_SW2 and ANT_SW3
for direct control of front end modules with three logic input pins to select RX and TX mode as well as
low and high band operation.

3.25. Power Amplifier Module

The RF3158 (U601) is a high-power, dual-mode amplifier (PA) with integrated power control. This PA
is designed to operate both in a saturated mode for GMSK signaling and in a linear mode for 8PSK
modulation. Featuring input and output terminals that are internally matched to 50 ohms, the PAM is
designed to be the final amplification stage in a dual-mode GSM/EDGE mobile transmit lineup
operating in the 824 MHz to 915 MHz (low) and 1710 MHz to 1910 MHz (high) bands.

MODE Tx 1GHz Tx 2GHz Rx EGSM Rx DCS TX PCS

VDD ON ON ON ON ON
VCTRL1 ON ON OFF OFF OFF
VCTRL2 OFF ON ON OFF OFF
VCTRL3 OFF OFF OFF ON OFF

Figure 40 FEM schematic

C605
56p

C606

0.1u

R601 100ohm

100ohmR602

R603 100ohm2V85_RF

C601

39p

22

20

3

ANT

1

18

VDD

NC1

19

VCTRL1

VCTRL221VCTRL3

NC2

EGSM_RX-

17

16

4

2

GND1

DCS_RX+

DCS_RX-

EGSM_RX+

12

15

14

5

7

GND2

GND3

GND11
GND10

PCS_RX+

PCS_RX-

13

GND4

GND9
GND8
GND7

9

GND5

TX1G8TX2G

6

10

FL601
YGHF-S006T

GND6

26
25
24
23
11

C603C602

39p

39p

ANT_SW1
ANT_SW2
ANT_SW3

Table 13 PAM pin description

3.26. Dual Mode Operation

When VMODE is low, the voltage on VRAMP is used to regulate the PA collector voltage which
directly controls the output power. When VMODE is high, the PA collector voltage is regulated to

3.6V, and the supply for the PA base bias can be adjusted via the VRAMP pin to optimize current
drain for low or high power ranges. In addition, in 8PSK mode, the first stage of the low band PA is
bypassed to decrease gain, but in high band, the PA operates with all stages.

3.26.1 PAM Schematic

- 68 -

3. TECHNICAL BRIEF

PIN Function Description

1 HB_RFIN RF input to the High-band PA
2 BAND_SEL Logic low=low band, Logic high=high band select
3 TX_EN PA Enable
4 VBATT Main supply
5 VMODE Logic low=GMSK mode, Logic high=8PSK mode select
6 VRAMP Ramped burst pin
7 LB_RFIN RF input to the Low-band PA
8,9,10,11 GND Ground
12 LB_ RFOUT RF output from the low-band PA
13,14,15,16,17 GND
18 HB_RFOUT RF output from the high-band PA
19,20,21,22,23 GND

MODE VMODE RF INPUT VRAMP TX ENABLE

GSM Low Fixed Ramp Burst Control High
EDGE High Ramp Burst Control Control amp bias current High

Table 13 PAM pin description

Figure 42 PAM schematic

C613

68u

R612
100K

R611 15K

18p

C621

L605
15nH

C611

0.5p

3p

C638

10p

C639

56p

C620

L606
22nH

100K

R613

100K

R614

C612

0.5p

GND9

21

HB_RFIN

118

HB_RFOUT

LB_RFIN

7

12

LB_RFOUT

10

NC1

NC2

15

20

NC3

TX_EN

3

4

VBATT

VMODE

5

6

VRAMP

VSUPPLY

2

BAND_SEL

8

GND1

22

GND10

GND11

23

GND29GND311GND4

13

14

GND516GND6

GND717GND8

19

L601

3.9nH

U601RF3158

4.7pC640

PA_BAND

PA_LEVEL
MODE

TXON_PA

HBAND_PAM_IN

LBAND_PAM_IN

4. PCB layout

- 69 -

4. PCB layout

4.1 Main & Sub PCB component placement

Figure 43 Main PCB top Figure 44 Main PCB top placement

4. PCB layout

- 70 -

Figure 45 Main PCB bottom Figure 46 Main PCB bottom placement

4. PCB layout

- 71 -

Figure 47 Sub PCB top

Figure 48 Sub PCB top placement

4. PCB layout

- 72 -

Figure 49 Sub PCB bottom

Figure 50 Sub PCB bottom placement

4. PCB layout

- 73 -

80pin socket

r

r

r

r

FEM

FEM

RF Transceive

BBP

RF Transceive

BBP

Mobile SW

Mobile SW

Antenna feeding

-

+

Antenna feeding

RF PAM

Audio Amp

RF PAM

26MHz Main clock

Sleep crystal

26MHz Main clock

Sleep crystal

Memory

Power on block

Speaker PAD

Flash LE

D socket

FM radio p rt

FM radio part

attery contactB

Amp

Audio A
Battery contact

PMI

PMIC

Hole effect switch

Hole effect switch

a

50pin FPCB connecto

Charge Pump

C

50pin FPCB connecto

Charge Pump

ETM JTAG I/F

ETM JTAG I/F

SIM so

SIM socket

cket

Microphone

Microphone

Memory

Power on block

USB charging IC

USB charging IC

Micro SD socket

Micro SD socket

Bluetooth part

4. PCB layout

- 74 -

r

Key light LED

LCD connecto

Back_up battery

FPCB connector

Jog wheel
connector

4. PCB layout

- 75 -

r

40pin FPCB connector connected in Main Pcb

50pin FPCB connector connected in Main Pcb

Receive

Vibrator

5. Trouble shooting

- 76 -

5.1 Trouble shooting test setup

Power on all of test equipment

- Connect PIF-UNION JIG or dummy battery to the DUT for power up.

- Connect mobile switch cable between Communication test set and DUT when you need to make a
phone call.

- Follow trouble shooting procedure

5.2 Power on Trouble

Check Points

-Battery Voltage( Need to over 3.35V)

-Power-On Key detection (PWRON signal)

-Outputs of LDOs from PMIC

5. Trouble shooting

Figure 51 Equipment setup

4.000V 0.0000A

5. Trouble shooting

- 77 -

RPWRON_EN

100p

C244

VBAT

13

VDD

4

NC

6

CE

C245
1000p

100K

R253

R1114D281D-TR-FU206

VOUT

GND1
GND2

VBAT

0R213

U203

NLAST4599DFT2G

2

VCC

6NO

R252

1K

2
5

RPWRON

END_KEY

RPWRON

R217

100K

C240

1uF

NC4

GND

3

VBAT

R215 0

5COM

IN

1

PWRON

END_KEY

D106

END

END

PRSB6.8C

END_KEY

End key

RESETn

R401

10K

R402

1M

KP_OUT1

1

2SC5585

2

Q401

3

KP_IN5

5. Trouble shooting

- 78 -

2V72_IO

R202 220K

R204
470K

C213

0.1u

C231

2.2u

VBAT

FB201

C214

22u

2V85_MMC

2V85_IO2

C232

2.2u

RTC_OUT VBACKUPPWRON

VCHS

PWRON

USB_PU

VBUS_USB

C215

22u

C233

2.2u

3V1_USB

2V85_SIM

C216

2.2u

C234

2.2u

SPOWER_INT

1V5_RF

C217

2.2u

VBAT

VCH_CTL

PMRSTn

L201 10uH

C235

0.1u

2V65_BT

C206

2.2u

D201

CRS08

R212

0.15

6

4

1

2

5

VBAT

Q201

S2

S1

D3

D2

D1

NDC652P

C207

2.2u

VBAT

2V7_VCXO

2V65_ANA

G

C209

C208

2.2u

VBAT

C211

C212

2.2u

2.2u

C228

47n

3

VCH_CTL

VCHS

VCHG

4.7KR203

VBAT1V8_MEM

C218

2.2u

46

43

44

42

48

49

GND

1

RESETQ

VCHS

2

VBATS

3

VRFC

4

ON

5

VDDPW

6

SW

7

VSSPW

8

VSSFB

9

FB

10

VUPU

11

VUSB

12

VBUS

VIB

13

VIBRATOR

45

47

VDDC

VLBB1

VLBB2

U201

PMB6812

LED

SLED114SLED2

17

16

15

0

R220

KEY_BACKLIGHT

VCHC

VDDB

18

VRTC

VDDCH

VSIM119VSIM2

41

INTOUT

VMMC

20

39

VRF140VRF2

VDDRF

LRF3EN

VINT

22

21

BT_VCXO_EN

1V5_CORE

2V11_RTC

C203

2.2u

38

37

VRF3

36

VCXOEN

35

VDDA

34

VANA

33

VSSR

32

IREF

31

BYP

30

VDDAU

29

AUOP

28

AUON

27

VSSAU

26

AUIP

25

AUIN

SCL

SDA

23

24

SCL

SDA

2V85_RF

1V5_DSP

C204

C205

2.2u

2.2u 2.2u

TP604

82K

R208

0.1uC210

TP211
TP212

TP213
TP214

VCHG

R209

C227

100K

10u

VCXO_EN

C237

100u

5. Trouble shooting

- 79 -

START

Y

Y

Y

U206

Connect power

supply to the

DUT

Vbat = over 3.35V

es

"PWRON"

signal

Yes

"RESETn"

signal

Yes

Check the all

's output

es

Is the 26MHz

es

Replace main PCB

No

No

No

No

Check the

RPWRON,

replace U203

Check solder

U206 or replace it

Check solder

U201 or replace it

Check solder

X601, U602

or replace it

U602

U201

X601

5. Trouble shooting

- 80 -

5.3 Charging trouble

Check Points

-Connection of TA (check TA voltage 4.8V)

-Charging Current Path component voltage drop

-Battery voltage

• Charging method : CC-CV • Switch-off voltage : 3.35V

• Charger detect voltage : about 4.0V • Charging temperature ADC range

• ChCharging time : 3h under - ~ -20°C : small charging operation.

• Charging current : 600mA - -20°C ~ 60°C : charging.

• Cutoff current : 100mA - 60°C ~ : not charging operation small

• Low battery alarm charging operation.

- Idle : 3.50V

-. Dedicated : 3.58V

R209

100K

C227

10u

VCHG

D201

CRS08

R212

0.15

6

S2

4

S1

1

D3

2

D2

5

D1

Q201

NDC652P

VBAT

G

C237

100u

C228

47n

3

VCH_CTL

VCHS

5. Trouble shooting

- 81 -

START

24pin

MMI(CN403)

Yes

Source pin

of Q201=

Yes

Drain pin

of Q201 =

Yes

D201 voltage

drop

Yes

Battery voltage

is over 3.4V?

Yes

No

No

No

No

No

Resolder the

CN403

The TA can be

broken

Change other TA

Check solder

Q201 or replace it

Replace it

Waiting until

battery

Voltage goes up

to 3.4V

Battery

thermistor

Yes

Charge is operating

No

Change the

Battery

retest

5. Trouble shooting

- 82 -

5.4 LCD display trouble

Check Points

-LCD assembly status ( FPCB)

-EMI filter soldering

-Connector combination

ccking Point

LCD CONNECTOR

Check signal line disconnection
of the LCD FPCB

At first check the LCD back light
enable signal

Check signal flow

via EMI filter

2V85_MMC

2V72_IO

VBAT

JOG_PWDN
JOG_DISK_B
JOG_DISK_A

DIF_D0
DIF_D1
DIF_D2
DIF_D3

DIF_D4
DIF_D5
DIF_D6
DIF_D7

RCV_N
RCV_P

FL506 ICVE21184E150R101FR

1

9

INOUT_A1

INOUT_B1

2

8

INOUT_A2

INOUT_B2

3

7

INOUT_A3

INOUT_B3

4

6

INOUT_A4

INOUT_B4

G15G2

10

ICVE21184E150R101FRFL507

1

9

INOUT_A1

INOUT_B1

2

8

INOUT_A2

INOUT_B2

3

7

INOUT_A3

INOUT_B3

4

6

INOUT_A4

INOUT_B4

G110G2

5

MLED1
MLED2
MLED3

0R504

CN503

R505 0

MLED

C512

C511

0.1u

56p

1

49502
48

3

47

4

46

5

45

6

44

7

43

8

42

9

41

10

40

11

39

12

38

13

37

14

36

15

35

16

34

17

33

18

32

19
20

31

21

30

22

29

23

28

24

27

25

26

C514

56p

0.1u

VBACKUP

C516C513

C515

56p

0.1u

FL505 ICVE21184E150R101FR

1

9

INOUT_A1

INOUT_B1

2

8

INOUT_A2

INOUT_B2

3

7

INOUT_A3

INOUT_B3

4

6

INOUT_A4

INOUT_B4

G15G2

10

DIF_CD
DIF_WR
DIF_VSYNC
DIF_CS

IF_MODE1
DIF_RESET

VIBRATOR­SLIDE_KEY_BACKLIGHT
KP_IN0
KP_IN1
KP_IN2
KP_IN3
KP_IN4
KP_OUT3
KP_OUT4
END_KEY
LCD_ID

5. Trouble shooting

- 83 -

5.5 Camera Trouble

Check Points

-Connectors combination

-EMI filter soldering

-FPCB status

START

Check LCD connector

combination then LCD test

with New LCD

Signal is normal on
FL305, FL306,

Is LCD FPCB

normal?

Yes

Yes

Assemble

L307

No

Replace LCD

module

No

Check solder and

repair

Damaged filter

CIF_PCLK

CIF_RESET

SDA

AF_PWR_EN

2V8_CAM

FL502 ICVE10184E150R500FR

1

INOUT_A1

2

INOUT_A2

3

INOUT_A3

4

SCL

INOUT_A4

R506 0

INOUT_B1

INOUT_B2

INOUT_B3

INOUT_B4

G15G2

10

9

8

7

6

C505
56p

2V8_AF

FB501 FB502

C504

0.1u

C522
1u

C517
56p

CN502

G1 G2

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17 18

G3 G4

34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19

1V8_CAM

C506
56p

C507

0.1u

2V8_AF

C518

0.1u

ICVE10184E150R500FRFL501

1

INOUT_A1

2

INOUT_A2

3

INOUT_A3

4

INOUT_A4

FL503 ICVE10184E150R500FR

1

INOUT_A1

2

INOUT_A2

3

INOUT_A3

4

INOUT_A4

1

INOUT_A1

2

INOUT_A2

3

INOUT_A3

4

INOUT_A4

G110G2

5

G15G2

G110G2

5

INOUT_B1

INOUT_B2

INOUT_B3

INOUT_B4

INOUT_B1

INOUT_B2

INOUT_B3

INOUT_B4

10

ICVE10184E150R500FRFL504

INOUT_B1

INOUT_B2

INOUT_B3

INOUT_B4

9

8

7

6

9

8

7

6

9

8

7

6

CIF_D7
CIF_D6
CIF_D5
CIF_D4

CIF_D3
CIF_D2
CIF_D1
CIF_D0

CIF_MCLK

CIF_VS
CIF_HS

5. Trouble shooting

- 84 -

Checking Point

50pin main
PCB connector

Check the connector
combination

Check signal

flow via EMI

filter

FL502

FL501 FL503 FL504

5. Trouble shooting

- 85 -

START

Check camera connector,
35pin main PCB connector
combination then Camera
test
with equipped camera

FL501,FL502,

FL503,FL504

Yes

Replace New

Camera

Yes

Replace Camera module

Yes

Assemble

No

No

Resolder

Replace New

FPCB module

Yes

Replace FPCB module

Yes

Assemble

No

Replace

Main PCB

5. Trouble shooting

- 86 -

5.6 Speaker trouble

Check Points

-Speaker spring contact

-Audio amp soldering

-analog switch soldering

Checking Point

VBAT

2V85_IO2

TP304

TP303

11

SCL

10

SDA

13

ID_ENB

2

VOC

7

R309 100K

I2CSPI_VDD

14

I2CSPI_SEL

C369

0.1u

SCL

SDA

FB309

C357

C306

1u

0.1u

C304

4

20

3

16

25

LOUT

PGND

MONO_IN+

MONO_IN-

MONO+

MONO-

RHP3D1

RHP3D2

ROUT

C361 220n

23

C362 220n

22

15

17

0.068u

19

C324

24

C312 220n

8

RIN

5

VDD1

GND212GND3

LM4946SQX

LHP3D1

CBYPASS

18

21

C323

U301

0.068u

1

LHP3D29LIN

VDD2

6

220n C313

AMP_IN_L

GND1

C358

C320

0.01u

2.2u

FB310

4.7u

C310

C311

22p22p

SNDOUT_L

SNDOUT_R

C317

C316

47p

47p

AMP_IN_R

AMP_OUT_R

AMP_OUT_L

D309

PG05DBTFC

D310

PG05DBTFC

OUT301

OUT302

AMP_IN_L

AMP_IN_R

FB309

2V85_IO2

C329

0.01u

U302

10

91

1A

1B0

VCC

2

8

1B1

1S

3

7

2B0

2S

4

6

2B1

2A

GND

R331

5
FSA2267L10X

100K

FB310

0R327

SNDOUT_L
FM_LFM_MAIN

0R330

SNDOUT_R
FM_R

Check Audio

amp, In output

signal

U301

Check the contact spring
tension and dust on the
contact point

Check the

analog switchs

U302

R327

C313

C312

R330

5. Trouble shooting

- 87 -

START

Check Speaker tension and

Contacts are clear.

Check signals

from FB309,

FB310 is
correct?

No

Check signal

from C312, C313

is flowed

Check signal

from R327, R330

is flowed

Replace Main PCB

Assemble

?

No

?

Yes

Yes

Yes

No

Resolder

FB309, FB310 or

Replace them

then retest

Replace U301

then retest

Replace U302

Then retest

5. Trouble shooting

- 88 -

5.7 Receiver trouble

Check Points

-Receiver soldering

-FPCB Assembled status

R118

R120

5. Trouble shooting

- 89 -

5.8 Microphone trouble

Check Points

-Microphone hole

-Mic. Bias & signal come from

Checking Point

D311

PG05DBTFC

0R364

R348 1.2K

0R365

PG05DBTFC

D312

1.2KR345

C344 0.1u

C342

27p

0.1uC345

C349

27p

27p

C343

1000p

C351

OB4-15L42-C33L

MIC301

1
2

27p

C350

C367
10u

VMICN

VMICP

MIC1_P

MIC1_N

Check solder

related

microphone

path

C367

5. Trouble shooting

- 90 -

5. Trouble shooting

- 91 -

5.9 Vibrator trouble

Check Points

-Vibrator contact

-IC is working correct

Checking Point

R428

100K

C404
NA

NAR424

R426

12

SUY98005LT1G

U401

GND

2

1

VIN

VOUT

3

R425

10K

100nH

L401

VIBRATOR-

VIBRATOR

VIBRATOR_EN

Check the contact is clear, if there is some

obstacles then remove them

Check the driver IC

Enable signal goes to high then

vibration

U401

5. Trouble shooting

- 92 -

START

Check Vibrator contact

Pin1 of U401 is

high ?

Yes

Pin3 of U401 is

low?

Yes

Replace Vibrator

Assemble

No

No

Check U401 or

replace it

Check U401 or

replace it

5. Trouble shooting

- 93 -

5.10 Keypad back light trouble

Check Points

-Signal path is connected well

-Control IC is working properly

Checking Point

VBAT

47R413

LD407

47R416

LD409

LD411

LD408

EVL5M02200

VA402

47

R417

R419 47

LD412

0R421

LD406

EVL5M02200

VA401

47R412

0

LD410

R420

R411 47

47

LD405

R414

VA403

EVL5M02200

LD404

TWH104-HS

R418 47

47R415

KEY_BACKLIGHT

Check R420

resistor

5. Trouble shooting

- 94 -

Check All of LEDs solder

START

R420

's voltages

goes down

Assemble

Yes

No

Check U201's pin16
or replace it

5. Trouble shooting

- 95 -

5.11 SIM card trouble

Check Points

-Power control FET is working

-Socket soldering

-Proper SIM is used

Checking Point

2V85_SIM

22p

C340

C341

22p

0.1u

C339

CLK

3

4

GND1

GND2

7
8

GND3GND4

9

10

GND5

IO

6

2

RST

1

VCC

VPP

5

J301

D

G

S

SI1305-E3

Q301

4.7KR339

NAR340

SIM_CLK

SIM_RST

SIM_IO

SIM_ENn

Pin 5 /

2V85_SIM

Pin 3 /

SIM_CLK

Check

soldering all

pin of socket

1 2 3

4

5

6

Q301

5. Trouble shooting

- 96 -

Check All of SIM card voltage

START

KE600/KE608 support

1.8V & 3V SIM only

6 pins are

soldered well?

Yes

Q301 is

working?

Assemble

No

No

Repair it

Replace the

damaged part

5. Trouble shooting

- 97 -

5.12 MicroSD trouble

Check Points

-Power control FET is working

-Socket soldering

-Card detect is working

Tflash Connector

R358 0

2.2u

C360

NAR352

1u

C356

R355 51K

GND2

10

GND3

11
12

GND4

4

VDD

6

VSS

J302

5

CLK

3

CMD

7

DAT0

DAT1

8

DAT2

1

DAT3

2

GND1

9

51KR353

0

R363

51KR354

2V9_TF

2V9_TF

R359
470K

C359

1u

VBAT

BGND

6

GND

2

5

NC

1

STBY

VIN

34

VOUT

U307 BH29FB1WHFV

NA

C355

R351 51K

TF_PWR_EN

TFLASH_DETECT

TFLASH_DAT3

TFLASH_DAT2

TFLASH_CMD

TFLASH_CLK

TFLASH_DAT0

TFLASH_DAT1

5. Trouble shooting

- 98 -

p

TFlash_DETECT

Q1_Point

START

Check the Card detect signal

if it operate as above picture

TF_DETECT pins

are soldered

well?

Yes

Q1 is working

properly?

Assemble

No

No

Repair it

Replace the

damaged

art

5. Trouble shooting

- 99 -

5.13 Bluetooth trouble

Check Points

-A condition of Bluetooth Antenna soldering

-Balun filter is correctly working

-Bluetooth data is perfectly flowed

-Power and clock signals are supplied in U202

Checking Points

BLUETOOTH

TP207

2.2nH

L202

TP204

0R206

BT201

ACS2450HBAM6

FEED

NC1

NC2

R205 0

2.2p

TP201

C229

1V8_MEM

TP202

VBALUN

R201

0

TP206

2V65_BT

TP210

0.1u

C222

TP205

TP209

C202

0.1u

1000p

C226

C223

1.5p

C230

100p

0.1u

C221

L203

2.2nH

2V72_IO

TP203

C220

0.1u

C224

0.1u

0.1u

C219

VBALUN

TP208

0.1u

C201

0.01u

R207 0

C225

1V8_MEM

B1

3

B2

4

2

DC

G15G2

6

UB

1

FL201

DBF71B601

1V5_CORE

VDD_1

A8
B3

VDD_2

D4

VSS1

VSS2

D5

D6

VSS3

VSS4

E6

F6

VSS5

VSSRF1

F4
E5

VSSRF2
VSSRF3

F5
E4

VSSRF4

F2

VSSVCO

B2

WAKEUP_BT_P1_7

WAKEUP_HOST_P1_8

B1

UARTRTS

J8

J7

UARTRXD

UARTTXD

H8

J6

VCOCAP1

H6

VCOCAP2

VDDC1

F9
B5

VDDC2

D2

VDDCREG

E9

VDDPCM

VDDPLL

H1

VDDPMREG

G2
H4

VDDRF
VDDRFREG1

E1
E2

VDDRFREG2

F1

VDDSUP

VDDUART

H9

J5

RFIOX

H5

RFOUT

RTCK

B9

SCL0_P0_13

C9

SLEEPX_P0_15

F8

TCK

B7

TDI

A7

B6

TDO

B4

TMS

A6

TRST_

TXA1

J3

H3

TXA2

TXAX

J2

TX_CONF_P0_14

H7

TX_CONF_RXON

A2

G8

UARTCTS

H2

LOAD

NC1

A1

A9

NC2

J1

NC3

NC4

J9

C1

P1_6

PAON

A4

PCMCLK

D9

D8

PCMFR1

C8

PCMFR2_SDA0_P0_12

PCMIN

G9

E8

PCMOUT

A3

PSEL0
PSEL1

B8

D1

RESET_

RFIO

J4

U202

PMB8753

C2

CLK32_P1_5

G1

CLKIN_XTAL

A5

JTAG_

CLK32K

USIF_TXD
USIF_RXD

BT_CLK

I2S1_CLK
I2S1_WA

I2S1_TX

I2S1_RX

BT_RESETn

BT_VCXO_EN

BT201

FL201

U202

C220 C221

C202

C222

C230

C201

R207

C635

Figure 30 Bluetooth circuit

Figure 20. Bluetooth Part

Checking Flow

5. Trouble shooting

- 100 -

Check a condition of Balun filter

output(FL201) power by using Spectrum

More than 0dBm

No

Check a condition of power supply

(C220-2.85V, C221-1.5V, C222-1.8V, C230-1.8V

C201-2.72V, C202-2.8V)

condition is

good?

Yes

Check a condition of Clock

(R207-32k, C635-26M)

condition is

good?

Yes

Yes

No

No

No

Replace Bluetooth antenna

(BT201)

Bluetooth

Working is good?

Yes

Replace U202

Replace Main PCB Board

Yes

Yes

Check a condition of

U202 soldering

condition is

good?

Yes

Replace Main PCB Board

Finish

No

No

Replace U202

Bluetooth

Working is good?

Yes

5. Trouble shooting

- 101 -

5.14 FM Radio trouble

Check Points

-Ear_mic_set is correctly operated as FM radio antenna
(When user uses the FM radio function, Ear_mic_set must be connected in phone)

-A condition of FM_Radio module soldering

-FM_Radio signal is flowed correctly

-Power and clock signals are supplied in U303

Checking Points

-> MC74VHC1GT50DF1G

2V72_IO

C332100p

TP311

A

GND

VCC

Y

U305

MC74VHC1GT50DFT2

NA

R329

0R337

TP310

R336
10K

0

R328

PG05DBTFC

D308

C337

220n

0.1u

C338

24p

C326

TP312

GPIO3

19

16

LOUT

22

NC1

NC2

23

PGND

25

RCLK

11

RF_GND

3

ROUT

15

SCLK

9

10

SDIO

18

VA

VD

13

12

VIO

_RST

7

8

_SEN

U303

SI4701

4

FMIN

2

FMIP

GND1

1

GND2

5
6

GND3

14

GND4

GND5

17

24

GND6

GPIO1

21

20

GPIO2

4.7u

C335

L303
100nH

2V85_IO2

2V72_IO

VBAT

NA

C368

22n

2V72_IO

C336

CLK32K

FM_INTn

FM_L
FM_R

SCL

SDA

FM_RESETn

CN302

C332

U303

C326

L303

R337

D308

C328

C337

U305

Figure 30 Bluetooth circuit

Figure 20. FM_Radio Part