LG 84LA980V-ZD User Manual

Internal Use Only

North/Latin America http://aic.lgservice.com
Europe/Africa http://eic.lgservice.com
Asia/Oceania http://biz.lgservice.com

LED TV

SERVICE MANUAL

CHASSIS : LD34E

MODEL: 84LA980V 84LA980V-ZD

CAUTION

BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

Printed in KoreaP/NO : MFL678022302 (1309-REV00)

CONTENTS

CONTENTS .............................................................................................. 2

SAFETY PRECAUTIONS ........................................................................ 3

SERVICING PRECAUTIONS .................................................................... 4

SPECIFICATION ....................................................................................... 6

ADJUSTMENT INSTRUCTION .............................................................. 13

EXPLODED VIEW .................................................................................. 23

SCHEMATIC CIRCUIT DIAGRAM ..............................................................

Only for training and service purposes

- 2 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

SAFETY PRECAUTIONS

IMPORTANT SAFETY NOTICE

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

General Guidance

An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.

It will also protect the receiver and it's components from being
damaged by accidental shorts of th e cir cuitry that may be
inadvertently introduced during the service operation.

If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.

When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1 W), keep the resistor 10 mm away from PCB.

Keep wires away from high voltage or high temperature parts.

Before returning the receiver to the customer,

always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.

Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩ and 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.

Leakage Current Hot Check (See below Figure)

Plug the AC cord directly into the AC outlet.

Do not use a line Isolation Transformer during this check.
Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exp ose d metallic par t. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to

0.5 mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.

Leakage Current Hot Check circuit

Only for training and service purposes

- 3 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

SERVICING PRECAUTIONS

CAUTION: Before servicing receivers covered by this service
manual and its supplements and addenda, read and follow the

SAFETY PRECAUTIONS on page 3 of this publication.
NOTE: If unforeseen circumstances create conict between the

following servicing precautions and any of the safety precautions
on page 3 of this publication, always follow the safety precau­tions. Remember: Safety First.

General Servicing Precautions

1. Always unplug the receiver AC power cord from the AC power
source before;

a. Removing or reinstalling any component, circuit board

module or any other receiver assembly.

b. Disconnecting or reconnecting any receiver electrical plug

or other electrical connection.

c. Connecting a test substitute in parallel with an electrolytic

capacitor in the receiver.
CAUTION: A wrong part substitution or incorrect polarity
installation of electrolytic capacitors may result in an explo­sion hazard.

2. Test high voltage only by measuring it with an appropriate
high voltage meter or other voltage measuring device (DVM,
FETVOM, etc) equipped with a suitable high voltage probe.
Do not test high voltage by "drawing an arc".

3. Do not spray chemicals on or near this receiver or any of its
assemblies.

4. Unless specied otherwise in this service manual, clean
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable
non-abrasive applicator; 10 % (by volume) Acetone and 90 %
(by volume) isopropyl alcohol (90 % - 99 % strength)
CAUTION: This is a ammable mixture.
Unless specied otherwise in this service manual, lubrication
of contacts in not required.

5. Do not defeat any plug/socket B+ voltage interlocks with which
receivers covered by this service manual might be equipped.

6. Do not apply AC power to this instrument and/or any of its
electrical assemblies unless all solid-state device heat sinks
are correctly installed.

7. Always connect the test receiver ground lead to the receiver
chassis ground before connecting the test receiver positive
lead.
Always remove the test receiver ground lead last.

8. Use with this receiver only the test xtures specied in this
service manual.
CAUTION: Do not connect the test xture ground strap to any
heat sink in this receiver.

Electrostatically Sensitive (ES) Devices

Some semiconductor (solid-state) devices can be damaged eas­ily by static electricity. Such components commonly are called
Electrostatically Sensitive (ES) Devices. Examples of typical ES
devices are integrated circuits and some eld-effect transistors
and semiconductor “chip” components. The following techniques
should be used to help reduce the incidence of component dam­age caused by static by static electricity.

1. Immediately before handling any semiconductor component or
semiconductor-equipped assembly, drain off any electrostatic
charge on your body by touching a known earth ground. Alter­natively, obtain and wear a commercially available discharg­ing wrist strap device, which should be removed to prevent
potential shock reasons prior to applying power to the unit
under test.

2. After removing an electrical assembly equipped with ES
devices, place the assembly on a conductive surface such as
aluminum foil, to prevent electrostatic charge buildup or expo­sure of the assembly.

3. Use only a grounded-tip soldering iron to solder or unsolder
ES devices.

4. Use only an anti-static type solder removal device. Some sol­der removal devices not classied as “anti-static” can generate
electrical charges sufcient to damage ES devices.

5. Do not use freon-propelled chemicals. These can generate
electrical charges sufcient to damage ES devices.

6. Do not remove a replacement ES device from its protective
package until immediately before you are ready to install it.
(Most replacement ES devices are packaged with leads elec­trically shorted together by conductive foam, aluminum foil or
comparable conductive material).

7. Immediately before removing the protective material from the
leads of a replacement ES device, touch the protective mate­rial to the chassis or circuit assembly into which the device will
be installed.
CAUTION: Be sure no power is applied to the chassis or cir­cuit, and observe all other safety precautions.

8. Minimize bodily motions when handling unpackaged replace­ment ES devices. (Otherwise harmless motion such as the
brushing together of your clothes fabric or the lifting of your
foot from a carpeted oor can generate static electricity suf­cient to damage an ES device.)

General Soldering Guidelines

1. Use a grounded-tip, low-wattage soldering iron and appropri­ate tip size and shape that will maintain tip temperature within
the range or 500 °F to 600 °F.

2. Use an appropriate gauge of RMA resin-core solder composed
of 60 parts tin/40 parts lead.

3. Keep the soldering iron tip clean and well tinned.

4. Thoroughly clean the surfaces to be soldered. Use a mall wire­bristle (0.5 inch, or 1.25 cm) brush with a metal handle.
Do not use freon-propelled spray-on cleaners.

5. Use the following unsoldering technique

a. Allow the soldering iron tip to reach normal temperature.

(500 °F to 600 °F)
b. Heat the component lead until the solder melts.
c. Quickly draw the melted solder with an anti-static, suction-

type solder removal device or with solder braid.

CAUTION: Work quickly to avoid overheating the circuit

board printed foil.

6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature

(500 °F to 600 °F)

b. First, hold the soldering iron tip and solder the strand

against the component lead until the solder melts.

c. Quickly move the soldering iron tip to the junction of the

component lead and the printed circuit foil, and hold it there
only until the solder ows onto and around both the compo­nent lead and the foil.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.

d. Closely inspect the solder area and remove any excess or

splashed solder with a small wire-bristle brush.

Only for training and service purposes

- 4 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

IC Remove/Replacement

Some chassis circuit boards have slotted holes (oblong) through
which the IC leads are inserted and then bent at against the cir­cuit foil. When holes are the slotted type, the following technique
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique
as outlined in paragraphs 5 and 6 above.

Removal

1. Desolder and straighten each IC lead in one operation by
gently prying up on the lead with the soldering iron tip as the
solder melts.

2. Draw away the melted solder with an anti-static suction-type
solder removal device (or with solder braid) before removing
the IC.

Replacement

1. Carefully insert the replacement IC in the circuit board.

2. Carefully bend each IC lead against the circuit foil pad and
solder it.

3. Clean the soldered areas with a small wire-bristle brush.
(It is not necessary to reapply acrylic coating to the areas).

"Small-Signal" Discrete Transistor
Removal/Replacement

1. Remove the defective transistor by clipping its leads as close
as possible to the component body.

2. Bend into a "U" shape the end of each of three leads remain­ing on the circuit board.

3. Bend into a "U" shape the replacement transistor leads.

4. Connect the replacement transistor leads to the corresponding
leads extending from the circuit board and crimp the "U" with
long nose pliers to insure metal to metal contact then solder
each connection.

Power Output, Transistor Device
Removal/Replacement

1. Heat and remove all solder from around the transistor leads.

2. Remove the heat sink mounting screw (if so equipped).

3. Carefully remove the transistor from the heat sink of the circuit
board.

4. Insert new transistor in the circuit board.

5. Solder each transistor lead, and clip off excess lead.

6. Replace heat sink.

Diode Removal/Replacement

1. Remove defective diode by clipping its leads as close as pos­sible to diode body.

2. Bend the two remaining leads perpendicular y to the circuit
board.

3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.

4. Securely crimp each connection and solder it.

5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and
if necessary, apply additional solder.

3. Solder the connections.
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.

Circuit Board Foil Repair

Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
board causing the foil to separate from or "lift-off" the board. The
following guidelines and procedures should be followed when­ever this condition is encountered.

At IC Connections

To repair a defective copper pattern at IC connections use the
following procedure to install a jumper wire on the copper pattern
side of the circuit board. (Use this technique only on IC connec­tions).

1. Carefully remove the damaged copper pattern with a sharp
knife. (Remove only as much copper as absolutely necessary).

2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.

3. Bend a small "U" in one end of a small gauge jumper wire and
carefully crimp it around the IC pin. Solder the IC connection.

4. Route the jumper wire along the path of the out-away copper
pattern and let it overlap the previously scraped end of the
good copper pattern. Solder the overlapped area and clip off
any excess jumper wire.

At Other Connections

Use the following technique to repair the defective copper pattern
at connections other than IC Pins. This technique involves the
installation of a jumper wire on the component side of the circuit
board.

1. Remove the defective copper pattern with a sharp knife.
Remove at least 1/4 inch of copper, to ensure that a hazardous
condition will not exist if the jumper wire opens.

2. Trace along the copper pattern from both sides of the pattern
break and locate the nearest component that is directly con­nected to the affected copper pattern.

3. Connect insulated 20-gauge jumper wire from the lead of the
nearest component on one side of the pattern break to the
lead of the nearest component on the other side.
Carefully crimp and solder the connections.
CAUTION: Be sure the insulated jumper wire is dressed so the
it does not touch components or sharp edges.

Fuse and Conventional Resistor
Removal/Replacement

1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.

2. Securely crimp the leads of replacement component around
notch at stake top.

Only for training and service purposes

- 5 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

SPECIFICATION

NOTE : Specifications and others are subject to change without notice for improvement

.

1. Application range

This specification is applied to the LED TV used LD34E
chassis.

2. Requirement for Test

Each part is tested as below without special appointment.

1) Temperature: 25 °C ± 5 °C(77 °F ± 9 °F), CST: 40 °C ± 5 °C

2) Relative Humidity: 65 % ± 10 %

3) Power Voltage
: Standard input voltage (AC 100-240 V~, 50/60 Hz)
* Standard Voltage of each products is marked by models.

4) Specification and performance of each parts are followed

ea ch drawing and s pe cificatio n b y p art number in
accordance with BOM.

5) The receiver must be operated for about 20 minutes prior to

the adjustment.

3. Test method

1) Performance: LGE TV test method followed

2) Demanded other specification

- Safety : CE, IEC specification

- EMC : CE, IEC

- Wireless : Wireless HD Specification (Option)

4. Model General Specification

No. Item Specication Remarks

DTV & Analog (Total 37 countries)

DTV (MPEG2/4, DVB-T) : 30 countries

Germany, Netherland, Switzerland, Hungary, Austria, Slovenia, Bul­garia, France, Spain, Italy, Belgium, Russia, Luxemburg, Greece,
Czech, Croatia, Turkey, Moroco, Ireland, Latvia, Estonia, Lithuania,
Poland, Portugal, Romania, Albania, Bosnia, Serbia, Slovakia, Be­ralus

1 Market

EU(PAL Market-36Countries)/CIS
+ Morocoo(Africa)

DTV (MPEG2/4, DVB-T2) : 8 countries

UK(Ireland), Sweden, Denmark, Finland, Norway, Ukraine, Kaza­khstan, Russia

DTV (MPEG2/4, DVB-C) : 37 countries

Germany, Netherland, Switzerland, Hungary, Austria, Slovenia, Bul­garia, France, Spain, Italy, Belgium, Russia, Luxemburg, Greece,
Czech, Croatia, Turkey, Moroco, Ireland, Latvia, Estonia, Lithuania,
Poland, Portugal, Romania, Albania, Bosnia, Serbia, Slovakia, Be­ralus, UK, Sweden, Denmark, Finland, Norway, Ukraine, Kazakhstan

DTV (MPEG2/4, DVB-S/S2) : 30 countries

Germany, Netherland, Switzerland, Hungary, Austria, Slovenia, Bul­garia, France, Spain, Italy, Belgium, Russia, Luxemburg, Greece,
Czech, Croatia, Turkey, Moroco, Ireland, Latvia, Estonia, Lithuania,
Poland, Portugal, Romania, Albania, Bosnia, Serbia, Slovakia, Be­ralus, UK, Sweden, Denmark, Finland, Norway, Ukraine, Kazakhstan

Supported satellite : 29 satellites

ABS1 75.0E/ AMOS 4.0W/ ASIASATS 105.5E/ ASTRA1LHMKR

19.2E/ ASTRA2ABD 28.2E/ ASTRA3AB 23.5E/ ASTRA4A 4.8E/
ATLANTICBIRD2 8.0W/ ATLANTICBIRD3 5.0W/ BADR 26.0E/ EU­ROBIRD3 33.0E/ EUROBIRD9A 9.0E/ EUTELSATW2A 10.E/ EU­TELSATW3A 7.0E/ EUTELSATW4W7 36.0E/ EUTELSESAT 16.0E/
EXPRESSAM1 40.0E/ EXPRESAM3 140.0E/ EXPRESSAM33

96.5E/ HELLASAT2 39.0E/ HISPASAT1CDE 30.0W/ HOTBIRD

13.0E/ INTELSAT10&7 68.5E/ INTELSAT15 85.2E/ INTELSAT904

60.0E/ NILESAT 7.0W/ THOR 0.8W/ TURKSAT 42.0E/ YAMAL201

90.0E

Only for training and service purposes

- 6 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

No. Item Specication Remarks

2 Broadcasting system 1) PAL-BG/DK/I/I’

2) SECAM L/L’, DK, BG, I

3) DVB-T/T2, C, S/S2

1 ) Digital TV

- VHF, UHF

- C-Band, Ku-Band

3 Program coverage

4 Receiving system

2) Analogue TV

-VHF : E2 to E12

-UHF : E21 to E69

-CATV : S1 to S20

-HYPER : S21 to S47

Analog : Upper Heterodyne
Digital : COFDM, QAM

► DVB-T

- Guard Interval(Bitrate_Mbit/s)
1/4, 1/8, 1/16, 1/32

- Modulation : Code Rate
QPSK : 1/2, 2/3, 3/4, 5/6, 7/8
16-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
64-QAM : 1/2, 2/3, 3/4, 5/6, 7/8

► DVB-T2

- Guard Interval(Bitrate_Mbit/s)
1/4, 1/8, 1/16, 1/32, 1/128, 19/128, 19/256,

- Modulation : Code Rate
QPSK : 1/2, 2/5, 2/3, 3/4, 5/6
16-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
64-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
256-QAM : 1/2, 2/5, 2/3, 3/4, 5/6

5 Input Voltage AC 100 ~ 240 V, 50/60 Hz

► DVB-C

- Symbolrate : 4.0Msymbols/s to 7.2 Msymbols/s

- Modulation : 16QAM, 64-QAM, 128-QAM and 256-QAM

► DVB-S/S2

- symbolrate :
DVB-S2 (8PSK / QPSK) : 2 ~ 45 Msymbol/s
DVB-S (QPSK) : 2 ~ 45 Msymbol/s

- viterbi
DVB-S mode : 1/2, 2/3, 3/4, 5/6, 7/8
DVB-S2 mode : 1/2, 2/3, 3/4, 3/5, 4/5, 5/6, 8/9, 9/10

Only for training and service purposes

- 7 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

5. External input format

5.1. 2D Mode

(1) Component input(Y, CB/PB, CR/PR)

No. Resolution H-freq(kHz) V-freq(Hz)

1. 720×480 15.73 60.00 SDTV, DVD 480i

2. 720×480 15.63 59.94 SDTV, DVD 480i

3. 720×480 31.47 59.94 480p

4. 720×480 31.50 60.00 480p

5. 720×576 15.625 50.00 SDTV 576i

6. 720×576 31.25 50.00 SDTV 576p

7. 1280×720 45.00 50.00 HDTV 720p

8. 1280×720 44.96 59.94 HDTV 720p

9. 1280×720 45.00 60.00 HDTV 720p

10. 1920×1080 31.25 50.00 HDTV 1080i

11. 1920×1080 33.75 60.00 HDTV 1080i

12. 1920×1080 33.72 59.94 HDTV 1080i

13. 1920×1080 56.250 50 HDTV 1080p

14. 1920×1080 67.5 60 HDTV 1080p

(2) HDMI Input (PC/DTV)

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed

HDMI-PC DDC

1 640*350 31.468 70.09 25.17 EGA Х
2 720*400 31.469 70.08 28.32 DOS O
3 640*480 31.469 59.94 25.17 VESA(VGA) O
4 800*600 37.879 60.31 40.00 VESA(SVGA) O
5 1024*768 48.363 60.00 65.00 VESA(XGA) O
6 1152*864 54.348 60.053 80 VESA O
7 1280*1024 63.981 60.020 108 VESA(SXGA) O
8 1360*768 47.712 60.015 85.5 VESA(WXGA) O

9 1920*1080 67.5 60.00 148.5 WUXGA(Reduced Blanking) O
10 3840*2160 67.5 30.00 297.00 UD
11 3840*2160 56.25 25.00 297.00 UD
12 3840*2160 54.0 24.00 297.00 UD

HDMI-DTV

1 720*480 31.47 60 27.027 SDTV 480P

2 720*480 31.47 59.94 27.00 SDTV 480P

3 1280*720 45.00 60.00 74.25 HDTV 720P

4 1280*720 44.96 59.94 74.176 HDTV 720P

5 1920*1080 33.75 60.00 74.25 HDTV 1080I

6 1920*1080 33.72 59.94 74.176 HDTV 1080I

7 1920*1080 67.500 60 148.50 HDTV 1080P

8 1920*1080 67.432 59.939 148.352 HDTV 1080P

9 1920*1080 27.000 24.000 74.25 HDTV 1080P
10 1920*1080 26.97 23.976 74.176 HDTV 1080P
11 1920*1080 33.75 30.000 74.25 HDTV 1080P
12 1920*1080 33.71 29.97 74.176 HDTV 1080P

13 3840*2160 67.5 30.00 297.00 UDTV 2160P

14 3840*2160 56.25 25.00 297.00 UDTV 2160P

15 3840*2160 54.0 24.00 297.00 UDTV 2160P

Only for training and service purposes

- 8 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

5.2. 3D Mode

(1) RF Input(3D supported mode manually)

No. Resolution Proposed 3D input proposed mode

1 HD - DTV

2 SD - DTV

3 SD - ATV(CVBS/SCART)

(2) RF Input(3D supported mode automatically)

No. Signal 3D input proposed mode

1 Frame Compatible

(3) HDMI 1.3 (3D supported mode manually)

No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed 3D input proposed mode

1 720*480 31.5 60 27.03 SDTV 480P

2 720*576 31.25 50 27 SDTV 576P

3 1280*720 45.00 60.00 74.25 HDTV 720P

4 1280*720 37.500 50 74.25 HDTV 720P

5 1920*1080 33.75 60.00 74.25 HDTV 1080I

6 1920*1080 28.125 50.00 74.25 HDTV 1080I

7 1920*1080 27.00 24.00 74.25 HDTV 1080P

8 1920*1080 28.12 25 74.25 HDTV 1080P

9 1920*1080 33.75 30.00 74.25 HDTV 1080P

10 1920*1080 67.50 60.00 148.5 HDTV 1080P 2D to 3D, Side by Side(Half), Top & Bottom,

11 1920*1080 56.250 50 148.5 HDTV 1080P

53.95 23.976 297.00

54 24.00 296.703

12 3840*2160

56.25 25.00 297.00

61.43 29.970 297.00

67.5 30.00 296.703

1080I

720P

576P

576I

Side by Side(Half),
Top & Bottom

2D to 3D
Side by Side(Half)
Top & Bottom

HDTV 2160P

2D to 3D, Side by Side(Half), Top & Bottom,
Checker Board, Frame Sequential, Row
Interleaving, Column Interleaving

2D to 3D, Side by Side(Half), Top & Bottom

2D to 3D, Side by Side(Half), Top & Bottom,
Checker Board, Row Interleaving, Column
Interleaving

Checker Board, Single Frame Sequential,
Row Interleaving, Column Interleaving

2D to 3D,
Top & Bottom(half), Side by Side(half)

Only for training and service purposes

- 9 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

(4) HDMI 1.4b (3D supported mode automatically)

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) VIC 3D input proposed mode Proposed

1

640*480

2 62.938/63 59.94/ 60 50.35/50.4 1

3 31.469 / 31.5 59.94/ 60 50.35/50.4 1 Side-by-side(Full) (SDTV 480P)

4

720*480

5 62.938/63 59.94 / 60 54/54.06 2,3

6 31.469 / 31.5 59.94 / 60 54/54.06 2,3 Side-by-side(Full) (SDTV 480P)

7

720*576

8 62.5 50 54 17,18

9 31.25 50 54 17,18 Side-by-side(Full) (SDTV 576P)

10

11 75 50 148.5 19

12 37.500 50 148.5 19 Side-by-side(Full) (HDTV 720P)

1280*720

13 44.96 / 45 59.94 / 60 74.18/74.25 4

14 89.91/90 59.94 / 60 148.35/148.5 4

15 44.96 / 45 59.94 / 60 148.35/148.5 4 Side-by-side(Full) (HDTV 720P)

16

17 67.432/67.50 59.94 / 60 148.35/148.5 5

18 33.72 / 33.75 59.94 / 60 148.35/148.5 5 Side-by-side(Full) (HDTV 1080I)

19 28.125 50.00 74.25 20

20 56.25 50.00 148.5 20

21 28.125 50.00 148.5 20 Side-by-side(Full) (HDTV 1080I)

22 26.97 / 27 23.97 / 24 74.18/74.25 32

23 43.94/54 23.97 / 24 148.35/148.5 32

24 26.97 / 27 23.97 / 24 148.35/148.5 32 Side-by-side(Full) (HDTV 1080P)

1920*1080

25 28.12 25 74.25 33

26 56.24 25 148.5 33

27 28.12 25 148.5 33 Side-by-side(Full) (HDTV 1080P)

28 33.716 / 33.75 29.976 / 30.00 74.18/74.25 34

29 67.432 / 67.5 29.976 / 30.00 148.35/148.5 34

30 33.716 / 33.75 29.976 / 30.00 148.35/148.5 34 Side-by-side(Full) (HDTV 1080P)

31 56.250 50 148.5 31

32 67.43 / 67.5 59.94 / 60 148.35/148.50 16

31.469 / 31.5 59.94/ 60 25.125/25.2 1

31.469 / 31.5 59.94 / 60 27.00/27.03 2,3

31.25 50 27 17,18

37.500 50 74.25 19

33.72 / 33.75 59.94 / 60 74.18/74.25 5

Top-and-Bottom
Side-by-side(half)

Frame packing
Line alternative

Top-and-Bottom
Side-by-side(half)

Frame packing
Line alternative

Top-and-Bottom
Side-by-side(half)

Frame packing
Line alternative

Top-and-Bottom
Side-by-side(half)

Frame packing
Field alternative

Top-and-Bottom
Side-by-side(half)

Frame packing
Line alternative

Top-and-Bottom
Side-by-side(half)

Frame packing
Line alternative

Top-and-Bottom
Side-by-side(half)

Frame packing
Field alternative

Top-and-Bottom
Side-by-side(half)

Frame packing
Field alternative

Top-and-Bottom
Side-by-side(half)

Frame packing
Line alternative

Top-and-Bottom
Side-by-side(half)

Frame packing
Line alternative

Top-and-Bottom
Side-by-side(half)

Top-and-Bottom
Side-by-side(half)

Secondary(SDTV 480P)
Secondary(SDTV 480P)

Secondary(SDTV 480P)
(SDTV 480P)

Secondary(SDTV 480P)
Secondary(SDTV 480P)

Secondary(SDTV 480P)
(SDTV 480P)

Secondary(SDTV 576P)
Secondary(SDTV 576P)

Secondary(SDTV 576P)
(SDTV 576P)

Primary(HDTV 720P)
Primary(HDTV 720P)

Primary(HDTV 720P)
(HDTV 720P)

Primary(HDTV 720P)
Primary(HDTV 720P)

Primary(HDTV 720P)
(HDTV 720P)

Secondary(HDTV 1080I)
Primary(HDTV 1080I)

Primary(HDTV 1080I)
(HDTV 1080I)

Secondary(HDTV 1080I)
Primary(HDTV 1080I)

Primary(HDTV 1080I)
(HDTV 1080I)

Primary(HDTV 1080P)
Primary(HDTV 1080P)

Primary(HDTV 1080P)
(HDTV 1080P)

Primary(HDTV 1080P)
Primary(HDTV 1080P)

Primary(HDTV 1080P)
(HDTV 1080P)

Secondary(HDTV 1080P)
Secondary(HDTV 1080P)

Secondary(HDTV 1080P)
(HDTV 1080P)

Primary(HDTV 1080P)
Secondary(HDTV 1080P)

Primary(HDTV 1080P)
Secondary(HDTV 1080P)

Only for training and service purposes

- 10 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

(5) HDMI-PC Input (3D) (3D supported mode manually)

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode Proposed

1 1024*768 48.36 60 65

2 1360*768 47.71 60 85.5

3 1920*1080 67.500 60 148.50

54

4 3840*2160

5 3840*2160 - - 297 2D to 3D

(6) Component Input ( 3D) (3D supported mode manually)

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock 3D input proposed mode Proposed

1 1280*720 37.5 50 74.25 2D to 3D, Side by Side(half), Top & Bottom HDTV 720P

2 1280*720 45.00 60.00 74.25 2D to 3D, Side by Side(half), Top & Bottom HDTV 720P

3 1280*720 44.96 59.94 74.176 2D to 3D, Side by Side(half), Top & Bottom HDTV 720P

4 1920*1080 33.75 60.00 74.25 2D to 3D, Side by Side(half), Top & Bottom HDTV 1080I

5 1920*1080 33.72 59.94 74.176 2D to 3D, Side by Side(half), Top & Bottom HDTV 1080I

6 1920*1080 28.12 50 74.25 2D to 3D, Side by Side(half), Top & Bottom HDTV 1080I

7 1920*1080 67.500 60 148.50 2D to 3D, Side by Side(half), Top & Bottom HDTV 1080P

8 1920*1080 67.432 59.94 148.352 2D to 3D, Side by Side(half), Top & Bottom HDTV 1080P

9 1920*1080 27.000 24.000 74.25 2D to 3D, Side by Side(half), Top & Bottom HDTV 1080P

10 1920*1080 28.12 25 74.25 2D to 3D, Side by Side(half), Top & Bottom HDTV 1080P

11 1920*1080 56.25 50 74.25 2D to 3D, Side by Side(half), Top & Bottom HDTV 1080P

12 1920*1080 26.97 23.976 74.176 2D to 3D, Side by Side(half), Top & Bottom HDTV 1080P

13 1920*1080 33.75 30.000 74.25 2D to 3D, Side by Side(half), Top & Bottom HDTV 1080P

14 1920*1080 33.71 29.97 74.176 2D to 3D, Side by Side(half), Top & Bottom HDTV 1080P

56.25

67.5

24
25
30

296.703
297

296.703

2D to 3D, Side by Side(half)
Top & Bottom

2D to 3D, Side by Side(half)
Top & Bottom

2D to 3D, Side by Side(half)
Top & Bottom, Checker Board,
Single Frame Sequential,
Row Interleaving,
Column Interleaving

HDTV 2160P

HDTV 768P

HDTV 768P

HDTV 1080P

2D to 3D,
Top & Bottom(half),
Side by Side(half),

640*350
720*400
640*480
800*600
1152*864

(7) USB, DLNA - Movie (3D) (3D supported mode manually)

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode

1 Under 704x480 - - - 2D to 3D

Over 704x480

2

interlaced

3

Over 704x480
progressive

4 - others -

- - - 2D to 3D, Side by Side(Half), Top & Bottom

- 50 / 60 -

2D to 3D, Side by Side(Half), Top & Bottom, Checker Board,
Row Interleaving, Column Interleaving, Frame Sequential

2D to 3D, Side by Side(Half), Top & Bottom, Checker Board,
Row Interleaving, Column Interleaving

- 11 -

Only for training and service purposes

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

(8) USB, DLNA -Photo (3D) (3D supported mode manually)

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode

1 Under 320x240 - - - 2D to 3D

2 Over 320x240 - - - 2D to 3D, Side by Side(Half), Top & Bottom

(9) USB, DLNA (3D) (3D supported mode automatically)

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode

1 1080p 33.75 30 74.25

Side by Side(Half), Top & Bottom, Checker Board,
MPO(Photo), JPS(Photo)

(10) Miracast, Widi (3D supported mode manually)

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode

1 1024x768p - 30 / 60 -

2D to 3D, Side by Side(Half), Top & Bottom2. 1280x720p - 30 / 60 -

3 1920x1080p 30 / 60

4 Others - 2D to 3D

■ Remark: 3D Input mode

No. Side by Side Top & Bottom Checker board

Single Frame

Sequential

Frame

Packing

Line

Interleaving

Column

Interleaving

2D to 3D

1

ii.

iii.

iv.

v.

vi.

Only for training and service purposes

- 12 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

ADJUSTMENT INSTRUCTION

1. Application Range

This specification sheet is applied to all of the LED TV with
LD34E chassis.

2. Designation

(1) Because this is not a hot chassis, it is not necessary to

use an isolation transformer. However, the use of isolation

transformer will help protect test instrument.
(2) Adjustment must be done in the correct order.
(3) The adjustment must be performed in the circumstance of

25 °C ± 5 °C of temperature and 65 % ± 10 % of relative

humidity if there is no specific designation.
(4) The input voltage of the receiver must keep AC 100-240

V~, 50/60 Hz.
(5) The receiver must be operated for about 5 minutes prior to

the adjustment when module is in the circumstance of over

15.

In case of keeping module is in the circumstance of 0 °C, it
should be placed in the circumstance of above 15 °C for 2
hours.

In case of keeping module is in the circumstance of below

-20 °C, it should be placed in the circumstance of above 15
°C for 3 hours.

[Caution]
When still image is displayed for a period of 20 minutes or
longer (Especially where W/B scale is strong. Digital pattern
13ch and/or Cross hatch pattern 09ch), there can some
afterimage in the black level area.

3. Automatic Adjustment

3.1. ADC Adjustment

3.1.1. Overview

ADC adjustment is needed to find the optimum black level
and gain in Analog-to-Digital device and to compensate RGB
deviation.

3.1.3. Adjustment

(1) Adjustment method

- Using RS- 232, ad just items in the other shown in
"3.1.3.3)"

(2) Adj. protocol

Protocol Command Set ACK

Enter adj. mode aa 00 00 a 00 OK00x

Source change

Begin adj. ad 00 10

Return adj. result

Read adj. data

Conrm adj. ad 00 99

End adj. aa 00 90 a 00 OK90x

xb 00 04
xb 00 06

(main)
ad 00 20

(sub )
ad 00 21

b 00 OK04x (Adjust 480i, 1080p Comp1 )
b 00 OK06x (Adjust 1920*1080 SCART RGB)

OKx (Case of Success)
NGx (Case of Fail)

(main)
000000000000000000000000007c007b006dx

(Sub)
000000070000000000000000007c00830077x

NG 03 00x (Fail)
NG 03 01x (Fail)
NG 03 02x (Fail)
OK 03 03x (Success)

Ref.) ADC Adj. RS232C Protocol_Ver1.0

(3) Adj. order

- aa 00 00 [Enter ADC adj. mode]

- xb 00 04 [Change input source to Component1 (480i&
1080p)]

- ad 00 10 [Adjust 480i&1080p Comp1]

- xb 00 06 [Change input source to RGB(1024*768)]

- ad 00 10 [Adjust 1920*1080 SCART RGB]

- ad 00 90 End adj.

3.2. MAC address D/L, CI+ key D/L, Widevine
key D/L, ESN key D/L, HDCP key D/L,
DTCP key D/L

Connect: PCBA Jig → RS-232C Port== PC → RS-232C Port
Communication Prot connection

3.1.2. Equipment & Condition

(1) USB to RS-232C Jig
(2) MSPG-925 Series Pattern Gen erator (MSPG-925FA,

pattern - 65)

- Resolution : 480i Comp1
1080P Comp1
1920*1080P SCART RGB

- Pattern : Horizontal 100% Color Bar Pattern

- Pattern level : 0.7 ± 0.1 Vp-p

- Image

Only for training and service purposes

- 13 -

▪ Com 1,2,3,4 and 115200(Baudrate)
Mode check: Online Only
▪ Check the test process: DETECT → MAC → CI → Widevine

→ ESN → HDCP → DTCP
▪ Play: START
▪ Result: Ready, Test, OK or NG
▪ Printer Out (MAC Address Label)

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

3.3. LAN Inspection

3.3.1. Equipment & Condition

▪ Each other connection to LAN Port of IP Hub and Jig

3.3.2. LAN inspection solution

▪ LAN Port connection with PCB
▪ Network setting at MENU Mode of TV
▪ Setting automatic IP
▪ Setting state confirmation

→ If automatic setting is finished, you confirm IP and MAC

Address.

3.4. LAN PORT INSPECTION(PING TEST)

Connect SET → LAN port == PC → LAN Port

SET PC

3.4.1. Equipment setting

(1) Play the LAN Port Test PROGRAM.
(2) Input IP set up for an inspection to Test Program.

*IP Number : 12.12.2.2

3.4.2. LAN PORT inspection(PING TEST)

(1) Play the LAN Port Test Program.
(2) Connect each other LAN Port Jack.
(3) Play Test (F9) button and confirm OK Message.
(4) Remove LAN cable.

3.3.3. WIDEVINE key Inspection

- Confirm key input data at the "IN START" MENU Mode.

3.3.4. DTCP Inspection

- Confirm Key input at the “IN START” MENU Mode

- Below DTCP check on “IN START” MENU is enabled only
for Models which “DTCP key” tool option is “ON”

- Only EU suffix mod els DT CP key option is on. (ex .
47LA790V-ZA.KEUYLJG)

Only for training and service purposes

- 14 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

3.5. Model name & Serial number Download

3.5.1. Model name & Serial number D/L

▪ Press "Power on" key of service remote control.

(Baud rate : 115200 bps)

▪ Connect RS-232C Signal to USB Cable to USB.
▪ Write Serial number by use USB port.
▪ Must check the serial number at Instart menu.

3.5.2. Method & notice

(1) Serial number D/L is using of scan equipment.
(2) Setting of scan equipment operated by Manufacturing

Technology Group.

(3) Serial number D/L must be conformed when it is produced

in production line, because serial number D/L is mandatory
by D-book 4.0.

* Manual Download (Model Name and Serial Number)

If the TV set is downloaded by OTA or service man, sometimes
model name or serial number is initialized.(Not always)
It is impossible to download by bar code scan, so It need
Manual download.

1) Press the "Instart" key of Adjustment remote control.

2) Go to the menu "7.Model Number D/L" like below photo.

3) Input the Factory model name(ex 47LM960V-ZB) or Serial

number like photo.

2) Check the key download for transmitted command
(RS232: ci 00 10)

CMD 1 CMD 2 Data 0

C I 1 0

3) Result value

- Normally status for download : OKx

- Abnormally status for download : NGx

3.6.2. Check the method of CI+ key value(RS232)

1) Into the main ass’y mode(RS232: aa 00 00)

CMD 1 CMD 2 Data 0

A A 0 0

2) Check the mothed of CI+ key by command
(RS232: ci 00 20)

CMD 1 CMD 2 Data 0

C I 2 0

3) Result value
i 01 OK 1d1852d21c1ed5dcx

CI+ Key Value

3.7. WIFI MAC ADDRESS CHECK

(1) Using RS232 Command

H-freq(kHz) V-freq.(Hz)

Transmission [A][I][][Set ID][][20][Cr] [O][K][X] or [NG]

4) Check the model name Instart menu. → Factory name
displayed. (ex 47LM960V-ZB)

5) Check the Diagnost ics.(DTV country only) → Buyer
model displayed. (ex 47LM960V-ZB)

3.6. CI+ Key checking method

* Check the Section 3.2
Check whether the key was downloaded or not at ‘In Start’
menu. (Refer to below).

=> Check the Download to CI+ Key value in LGset.

3.6.1. Check the method of CI+ Key value

(1) Check the method on Instart menu
(2) Check the method of RS232C Command

1) Into the main ass’y mode(RS232: aa 00 00)

CMD 1 CMD 2 Data 0

A A 0 0

(2) Check the menu on in-start

Only for training and service purposes

- 15 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

4. Manual Adjustment

* ADC adjustment is not needed because of OTP(Auto ADC

adjustment)

4.1. EDID(The Extended Display Identification
Data)/DDC(Display Data Channel) download

4.1.1. Overview

It is a VESA regulation. A PC or a MNT will display an optimal
resolution through information sharing without any necessity
of user input. It is a realization of "Plug and Play".

4.1.2. Equipment

- Since embedded EDID data is used, EDID download JIG,
HDMI cable and D-sub cable are not need.

- Adjustment remote control

4.1.3. Download method

(1) Press "ADJ" key on the Adjustment remote control then

select "12.EDID D/L", By pressing "Enter" key, enter EDID
D/L menu.

(2) Select "Start" button by pressing "Enter" key, HDMI1/

HDMI2/ HDMI3 are writing and display OK or NG.

For HDMI EDID

DVI-D to HDMI or HDMI to HDMI

ⓓ Model Name(Hex): LGTV

Cf) TV set’s model name in EDID data is below.

MODEL NAME(HEX)

LG TV 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 (LG TV)

ⓔ Checksum(LG TV): Changeable by total EDID data.

EDID C/S data

check sum (Hex)

Block 0 42

Block 1

FHD

HDMI

23 (HDMI1)

13 (HDMI2)

ⓕ Vendor Specific(HDMI)

INPUT MODEL NAME(HEX)

HDMI1 78030C001000801E

HDMI2 78030C002000801E

(1) EDID

# HDMI 1(C/S : E8 E0)
EDID Block 0, Bytes 0-127 [00H-7FH]

0 1 2 3 4 5 6 7 8 9 A B C D E F

00 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01

10 01 17 01 03 80 A0 5A 78 0A EE 91 A3 5 4 4C 99 26

20 0 F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80

30 01 01 01 01 01 01 02 3A 80 18 71 3 8 2D 40 58 2C

40 45 00 40 84 63 00 00 1E 66 21 50 B0 51 0 0 1B 30

50 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A

60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC

70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E8

4.1.4. EDID DATA

▪ HDMI

0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F

0x00 00 FF FF FF FF FF FF 00 1E 6D

ⓒ

0x10

0x20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80

0x30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C

0x40 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30

0x50 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A

0x60 3E 1E 53 10 00 0A 20 20 20 20 20 20

0x70

0x80 02 03 3A F1 4E 10 9F 04 13 05 14 03 02 12 20 21

0x90 22 15 01 29 3D 06 C0 15 07 50

0xA0

0xB0

0xC0 2D 40 58 2C 45 00 40 84 63 00 00 1E 01 1D 80 18

0xD0 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D

0xE0 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E

0xF0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26

ⓓ

ⓕ

ⓕ

E3 05 03 01 02 3A 80 18 71 38

▪ Detail EDID Options are below

- HDMI1 ~ HDMI3

- In the data of EDID, bellows may be different by S/W or

Input mode.

ⓐ Product ID

MODEL NAME HEX EDID Table DDC Function

HD/FHD Model 0001 01 00 Analog/Digital

ⓑ Serial No: Controlled on production line.
ⓒ Month, Year: Controlled on production line:

ex) Monthly : ‘01’ → ‘01’, Year : ‘2013’ → ‘17’

ⓐ ⓑ

ⓓ

01

09 57 07 ⓕ

ⓔ1

ⓔ2

EDID Block 1, Bytes 128-255 [80H-FFH]

0 1 2 3 4 5 6 7 8 9 A B C D E F

80 02 03 3E F1 4E 10 9F 04 13 05 14 03 02 12 20 21

90 22 15 01 29 3D 06 C0 15 07 50 09 57 07 7C 03 0C

A0 00 10 00 B8 3C 20 C0 8E 01 02 03 04 01 4F 3F FC

B0 08 10 18 10 06 10 16 10 28 10 E3 05 03 01 02 3A

C0 80 18 71 38 2D 40 58 2C 45 00 40 84 63 00 00 1E

D0 01 1D 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00

E0 00 9E 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84

F0 63 00 00 1E 00 00 00 00 00 00 00 00 00 00 00 E0

# HDMI 2(C/S : E8 D0)
EDID Block 0, Bytes 0-127 [00H-7FH]

0 1 2 3 4 5 6 7 8 9 A B C D E F

00 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01

10 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26

20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80

30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C

40 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30

50 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A

60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC

70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E8

EDID Block 1, Bytes 128-255 [80H-FFH]

0 0 1 2 3 4 5 6 7 8 9 A B C D E F

80 02 03 3E F1 4E 10 9F 04 13 05 14 03 02 12 20 21

90 22 15 01 29 3D 06 C0 15 07 50 09 57 07 7C 03 0C

A0 00 10 00 B8 3C 20 C0 8E 01 02 03 04 01 4F 3F FC

B0 08 10 18 10 06 10 16 10 28 10 E3 05 03 01 02 3A

C0 80 18 71 38 2D 40 58 2C 45 00 40 84 63 00 00 1E

D0 01 1D 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00

E0 00 9E 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84

F0 63 00 00 1E 00 00 00 00 00 00 00 00 00 00 00 D0

Only for training and service purposes

- 16 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

# HDMI 3(C/S : E8 C0)
EDID Block 0, Bytes 0-127 [00H-7FH]

0 0 1 2 3 4 5 6 7 8 9 A B C D E F

00 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01

10 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26

20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80

30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C

40 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30

50 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A

60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC

70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E8

EDID Block 1, Bytes 128-255 [80H-FFH]

0 0 1 2 3 4 5 6 7 8 9 A B C D E F

80 02 03 3E F1 4E 10 9F 04 13 05 14 03 02 12 20 21

90 22 15 01 29 3D 06 C0 15 07 50 09 57 07 7C 03 0C

A0 00 10 00 B8 3C 20 C0 8E 01 02 03 04 01 4F 3F FC

B0 08 10 18 10 06 10 16 10 28 10 E3 05 03 01 02 3A

C0 80 18 71 38 2D 40 58 2C 45 00 40 84 63 00 00 1E

D0 01 1D 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00

E0 00 9E 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84

F0 63 00 00 1E 00 00 00 00 00 00 00 00 00 00 00 C0

4.2. White Balance Adjustment

4.2.1. Overview

▪ W/B adj. Objective & How-it-works

(1) Objective: To reduce each Panel's W/B deviation
(2) How-it-works : When R/G/B gain in the OSD is at 192, it

means the panel is at its Full Dynamic Range. In order to
prevent saturation of Full Dynamic range and data, one
of R/G/B is fixed at 192, and the other two is lowered to
find the desired value.

(3) Adjustment condition : normal temperature

1) Surrounding Temperature : 25 °C ± 5 °C

2) Warm-up time: About 5 Min

3) Surrounding Humidity : 20 % ~ 80 %

4) Before White balance adjustment, Keep power on
status, don’t power off

4.2.2. Adj. condition and cautionary items

(1) Lighting condition in surrounding area surrounding lighting

should be lower 10 lux. Try to isolate adj. area into dark
surrounding.

(2) Probe location: Color Analyzer (CA-210) probe should be

within 10cm and perpendicular of the module surface
(80°~ 100°)

(3) Aging time

1) After Aging Start, Keep the Power ON status during 5
Minutes.

2) In case of LCD, Back-light on should be checked using
no signal or Full-white pattern.

4.2.3. Equipment

(1) Color Analyzer: CA-210 (LED Module : CH 14)
(2) Adjustment Computer(During auto adj., RS-232C protocol

is needed)
(3) Adjustment Remote control
(4) Video Signal Generator MSPG-925F 720p/216-Gray

(Model: 217, Pattern: 49)
→ Only when internal pattern is not available

▪ Color Analyzer Matrix should be calibrated using CS-100.

4.2.4. Equipment connection MAP

Co lor Anal yze r

Pro be

RS -232 C

Pattern Gen era to r

Sig nal Sou rce

* If TV internal pattern is used, not needed

RS- 232 C

Co mp ute r

RS- 232 C

4.2.5. Adj. Command (Protocol)

<Command Format>

START 6E A 50 A LEN A 03 A CMD A 00 A VAL A CS STOP

- LEN: Number of Data Byte to be sent

- CMD: Command

- VAL: FOS Data value

- CS: Checksum of sent data

- A: Acknowledge
Ex) [Send: JA_00_DD] / [Ack: A_00_okDDX]

▪ RS-232C Command used during auto-adjustment.

RS-232C COMMAND

[CMD ID DATA]

wb 00 00 Begin White Balance adjustment

wb 00 10 Gain adjustment(internal white pattern)

wb 00 1f Gain adjustment completed

wb 00 20 Offset adjustment(internal white pattern)

wb 00 2f Offset adjustment completed

wb 00 ff

End White Balance adjustment
(internal pattern disappears )

Ex) wb 00 00 -> Begin white balance auto-adj.

wb 00 10 -> Gain adj.
ja 00 ff -> Adj. data
jb 00 c0
...
...
wb 00 1f → Gain adj. completed
*(wb 00 20(Start), wb 00 2f(end)) → Off-set adj.
wb 00 ff → End white balance auto-adj.

▪ Adj. Map

Command

(lower caseASCII)
CMD1 CMD2 MIN MAX

Cool

Medium

Warm

Adj. item

R Gain j g 00 C0
G Gain j h 00 C0
B Gain j i 00 C0
R Cut
G Cut
B Cut
R Gain j a 00 C0
G Gain j b 00 C0
B Gain j c 00 C0
R Cut
G Cut
B Cut
R Gain j d 00 C0
G Gain j e 00 C0
B Gain j f 00 C0
R Cut

G Cut

Explantion

Data Range

(Hex.)

Default

(Decimal)

Only for training and service purposes

- 17 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

4.2.6. Adj. method

(1) Auto adj. method

1) Set TV in adj. mode using POWER ON key.

2) Zero calibrate probe then place it on the center of the
Display.

3) Connect Cable.(RS-232C to USB)

4) Select mode in adj. Program and begin adj.

5) When adj. is complete (OK Sign), check adj. status pre
mode. (Warm, Medium, Cool)

6) Remove probe and RS-232C cable to complete adj.

▪ W/B Adj. must begin as start command “wb 00 00” , and

finish as end command “wb 00 ff”, and Adj. offset if need.

(2) Manual adjustment method (84LA98)

1) Set TV in Adj. mode using POWER ON.

2) Zero Calibrate the probe of Color Analyzer, then place it
on the center of LCD module within 10 cm of the surface.

3) Press ADJ key → EZ adjust using adj. R/C → 7. White­Balance then press the cursor to the right(key ►). When
right key(►) is pressed 216 Gray internal pattern will be
displayed

4) One of R Gain / G Gain / B Gain should be fixed at 192,
and the rest will be lowered to meet the desired value.

5) Adj. is performed in COOL, MEDIUM, WARM 3 modes

of color temperature.

** G-fix adjustment
Adjust modes(Cool), Fix the G gain to 172(default data)

and change the others (G/B Gain).

Adjust two modes(Medium/Warm), Fix the one of R/G/B

gain to 192(default data) and decrease the others.

▪ If internal pattern is not available, use RF input. In EZ Adj.

menu 7.White Balance, you can select one of 2 Test­pattern: ON, OFF. Default is inner(ON). By selecting OFF,
you can adjust using RF signal in 216 Gray pattern

* CASE Medium / Warm

First adjust the coordinate far away from the target
value(x, y).

1. x, y > target
i) Decrease the R, G.

2. x, y < target
i) First decrease the B gain,
ii) Decrease the one of the others.

3. x > target, y < target
i) First decrease B, so make y a little more than the target.
ii) Adjust x value by decreasing the R

4. x < target, y > target
i) First decrease B, so make x a little more than the target.
ii) Adjust y value by decreasing the G

4.2.7. Reference (White balance Adj. coordinate and
color temperature)

▪ Luminance : 216 Gray
▪ Standard color coordinate and temperature using CS-1000
(over 26 inch)

Mode

Cool 0.271 0.270 13000 K 0.0000

Medium 0.285 0.293 9300 K 0.0000

Warm 0.310 0.325 6500 K 0.0000

▪ Standard color coordinate and temperature using CA-210(CH 18)

Mode

Cool 0.271 ± 0.002 0.270 ± 0.002 13000 K 0.0000

Medium 0.285 ± 0.002 0.293 ± 0.002 9300 K 0.0000

Warm 0.310 ± 0.002 0.325 ± 0.002 6500 K 0.0000

Coordinate

x y

Coordinate

x y

Temp ∆uv

Temp ∆uv

* CASE Cool

First adjust the coordinate far away from the target
value(x, y).

1. x, y > target
i) Decrease the R, G.

2. x, y < target
i) First decrease the B gain,
ii) Decrease the one of the others.

3. x > target, y < target
i) First decrease B, so make y a little more than the target.
ii) Adjust x value by decreasing the R

4. x < target, y > target
i) First decrease B, so make x a little more than the target.
ii) Adjust x value by decreasing the G

How to adjust

1. If G gain is adjusted over 172 and R gain and B gain
less than 192 , Adjust is O.K.

2. If G gain is less than 172 , increase G gain by up to
172, and then increase R gain and B gain same
amount of increasing G gain.

3. If R gain or B gain is over 255 , Readjust G gain less
than 172, Conform to R gain is 255 or B gain is 255

Only for training and service purposes

- 18 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

4.2.8. EDGE LED White balance table

(1) EDGE LED module change color coordinate because of

aging time.

(2) Apply under the color coordinate table, for compensated

aging time.

(3) Normal line(Edge, Direct)

- Gumi (Mar ~ Dec) & Global

NC4.0

Aging time

(Min)

1 0-2 281 287 295 310 320 342

2 3-5 280 285 294 308 319 340

3 6-9 278 284 292 307 317 339
4 10-19 276 281 290 304 315 336
5 20-35 275 277 289 300 314 332
6 36-49 274 274 288 297 313 329
7 50-79 273 272 287 295 312 327
8 80-119 272 271 286 294 311 326
9 Over 120 271 270 285 293 310 325

Cool Medium Warm

X y x y x y

271 270 285 293 313 329

4.3. Local Dimming Function Check

Step 1) Turn on TV.
Step 2) Press “TILT” key on the Adj. R/C
Step 3) At the Local Dimming mode, module Edge Backlight

moving left to right. Back light of IOP module moving
Step 4) confirm the Local Dimming mode.
Step 5) Press “exit” key.

(4) Aging Chamber

NC4.0

Aging time

(Min)

1 0-5 280 285 294 308 319 340

2 6-10 276 280 290 303 315 335

3 11-20 272 275 286 298 311 330
4 21-30 269 272 283 295 308 327
5 31-40 267 268 281 291 306 323
6 41-50 266 265 280 288 305 320
7 51-80 265 263 279 286 304 318
8 81-119 264 261 278 284 303 316
9 Over 120 264 260 278 283 303 315

Cool Medium Warm

X y x y x y

271 270 285 293 313 329

(5) Gumi winter table(Jan, Fab) - Gumi producing model use only

(Normal line)

NC4.0

Aging time

(Min)

1 0-2 283 292 297 315 322 347

2 3-5 282 290 296 313 321 345

3 6-9 280 288 294 311 319 343
4 10-19 277 284 291 307 316 339
5 20-35 275 279 289 302 314 334
6 36-49 274 275 288 298 313 330
7 50-79 273 272 287 295 312 327
8 80-119 272 271 286 294 311 326
9 Over 120 271 270 285 293 310 325

Cool Medium Warm

X y x y x y

271 270 285 293 313 329

4.4. Magic Motion Remote control test

(1) Equipment : RF Remote control for test, IR-KEY-Code

Remote control for test

(2) You must confirm the battery power of RF-Remote control

before test(recommend that change the battery per every lot)

(3) Sequence (test)

1) if you select the ‘start key(wheel)’ on the controller, you
can pairing with the TV SET.

2) You can check the cursor on the TV Screen, when select
the ‘Wheel Key’ on the control.

3) You must remove the pairing with the TV Set by select
‘Back + Home Key’ on the control.

4.5. 3D function test

(Pattern Generator MSHG-600, MSPG-6100[Support HDMI1.4])
* HDMI mode NO. 872 , pattern No.83
(1) Please input 3D test pattern like below.

(2) When 3D OSD appear automatically, then select green

key.

(aging chamber)

NC4.0

Aging time

(Min)

1 0-5 280 285 294 308 319 340

2 6-10 276 280 290 303 315 335

3 11-20 272 275 286 298 311 330
4 21-30 269 272 283 295 308 327
5 31-40 267 268 281 291 306 323
6 41-50 266 265 280 288 305 320
7 51-80 265 263 279 286 304 318
8 81-119 264 261 278 284 303 316
9 Over 120 264 260 278 283 303 315

Cool Medium Warm

X y x y x y

271 270 285 293 313 329

Only for training and service purposes

- 19 -

(3) Don't wear a 3D Glasses, check the picture like below.

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

4.6. Wi-Fi Test

Step 1) Turn on TV
Step 2) Select Network Connection option in Network Menu.

Step 3) Select Start Connection button in Network Connection.

Step 4) If the system finds any AP like blow PIC, it is working

well.

4.8. Inspection of light scattering

▪ Test Method

(1) Push “Power only” key.
(2) Push “HDMI” hot key.
(3) Inspect whether light scattering is occurred in internal

black pattern or not.

(4) Push “Power only” key.

4.9. Option selection per country

4.9.1. Overview

- Option selection is only done for models in Non-EU.

4.7. LNB voltage and 22KHz tone check

(only for DVB-S/S2 model)
▪ Test method

(1) Set TV in Adj. mode using POWER ON.
(2) Connect cable between satellite ANT and test JIG.
(3) Press Yellow key(ETC+SWAP) in Adj Remote control to

make LNB on.
(4) Check LED light ‘ON’ at 18 V menu.
(5) Check LED light ‘ON’ at 22 KHz tone menu.
(6) Press Blue key(ETC+PIP INPUT) in Adjustment Remote

control to make LNB off.
(7) Check LED light ‘OFF’ at 18 V menu.
(8) Check LED light ‘OFF’ at 22 KHz tone menu.

▪ Test result

(1) After press LNB On key, ‘18 V LED’ and ‘22 KHz tone

LED’ should be ON.

(2) After press LNB OFF key, ‘18 V LED’ and ‘22 KHz tone

LED’ should be OFF.

4.9.2. Method

(1) Press ADJ key on the Adjustment Remote Control, then

select Country Group Meun

(2) Depending on destination, select Country Group Code 04

or Country Group EU then on the lower Country option,
select US, CA, MX. Selection is done using +, - or ►◄
key.

4.10. MHL Test

(1) Turn on TV
(2) Select HDMI4 mode using input Menu.
(3) Set MHL Zig(M1S0D3617) using MHL input, output and

power cord.
(4) Connect HDMI cable between MHL Zig and HDMI4 port.
(5) Check LED light of Zig and Module of Set.

Result) If, the LED light is green and the Module sho ws

normal stream → OK, Else → NG

Only for training and service purposes

- 20 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

4.11. HDMI ARC Function Inspection

(1) Test equipment

- Optic Receiver Speaker

- MSHG-600 (SW: 1220 ↑)

- HDMI Cable (for 1.4 version)

4.14. GND and Internal Pressure check

4.14.1. Method

(1) GND & Internal Pressure auto-check preparation

- Check that Power cord is fully inserted to the SET.
(If loose, re-insert)

(2) Test method

1) Insert the HDMI Cable to the HDMI ARC port from the
master equipment (HDMI1)

2) Check the sound from the TV Set

3) Check the Sound from the Speaker or using AV & Optic
TEST program (It’s connected to MSHG-600)

* Remark: Inspect in Power Only Mode and check SW

version in a master equipment

(2) Perform GND & Internal Pressure auto-check

- Unit fully inserted Power cord, Antenna cable and A/V
arrive to the auto-check process.

- Connect D-terminal to AV JACK TESTER

- Auto CONTROLLER(GWS103-4) ON

- Perform GND TEST

- If NG, Buzzer will sound to inform the operator.

- If OK, changeover to I/P check automatically.
(Remove CORD, A/V form AV JACK BOX.)

- Perform I/P test

- If NG, Buzzer will sound to inform the operator.

- If OK, Good lamp will lit up and the stopper will allow the
pallet to move on to next process.

4.14.2. Checkpoint

▪ TEST voltage

- GND: 1.5 KV / min at 100 mA

- SIGNAL: 3 KV / min at 100 mA
▪ TEST time: 1 second
▪ TEST POINT

- GND TEST = POWER CORD GND & SIGNAL CABLE

METAL GND

- Internal Pressure TEST = POWER CORD GND & LIVE &

NEUTRAL

▪ LEAKAGE CURRENT: At 0.5 mArms

5. Audio

No. Item Min Typ Max Unit Remark

Audio practical
max Output, L/R

1.
(Distortion=10%

max Output)

Speaker (8 Ω

2.
Impedance)

9.0 10.0 12.0 W

8.5 8.9 9.8 Vrms

10.0 15.0 W

Measurement condition

Auto Volume :Off
Audio EQ : Off
Clear Voice : Off
Virtual Surround:Off

4.12. Ship-out mode check(In-stop)

▪ After final inspection, press "IN-STOP" key of the Adjustment

remote control and check that the unit goes to Stand-by
mode.

4.13. Tool Option selection

- Method: Press ADJ key on the Adj. R/C, then select Tool option.

Only for training and service purposes

- 21 -

Measurement condition:
(1) RF input: Mono, 1 KHz sine wave signal, 100 % Modulation
(2) CVBS, Component: 1 KHz sine wave signal 0.5 Vrms
(3) RGB PC: 1 KHz sine wave signal 0.7 Vrms

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

6. USB S/W Download(Service only)

(1) Put the USB Stick to the USB socket.
(2) Automatically detecting update file in USB Stick.

- If your downloaded program version in USB Stick is Low,
it didn't work. But your downloaded version is High, USB
data is automatically detecting.(Download Version High &
Power only mode, Set is automatically Download)

(3) Show the message "Copying files from memory".

(4) Updating is starting.

(5) Updating Completed, The TV will restart automatically.
(6) If your TV is turned on, check your updated version and

Tool option. (explain the Tool option, next stage)

* If downloading version is more high than your TV have, TV

can lost all channel data. In this case, you have to channel
recover. if all channel data is cleared, you didn’t have a DTV/
ATV test on production line.

* After downloading, have to adjust Tool Option again.

(1) Push "IN-START" key in service remote control.
(2) Select "Tool Option 1" and push "OK" key.
(3) Punch in the number. (Each model has their number)

Only for training and service purposes

- 22 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

EXPLODED VIEW

IMPORTANT SAFETY NOTICE

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essenti al that these special safet y parts shoul d be replac ed with the same compo nents as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

320

400

540

541

531

532

700

710

570

121

810

122

420

910

900

410

560

120

LV2

LV1

200

300

Only for training and service purposes

840

830

- 23 -

530

820

510

310

580

500

AT1

A10

A9

A22

A2

AG1

Set + Stand

Stand Base

+ Body

(Option)

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

System Configuration

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

Clock for LG1154D

MAIN Clock(24Mhz)

8pF

C100

8pF

C101

System Clock for Analog block(24Mhz)

PLL SET[1:0] : internal pull up
"00" : CPU(1200Mhz),M0 / M1 DDR(792,792 Mhz)
"01" : CPU(1056Mhz),M0 / M1 DDR(672,672 Mhz)
"10" : CPU(1056Mhz),M0 / M1 DDR(792,792 Mhz)
"11" : CPU( 960Mhz),M0 / M1 DDR(792,792 Mhz)

T32

0.1uF

P100

12505WS-10A00

T32

1

2

3

4

5

6

7

8

9

10

11

Model Option

HW_OPT_0
HW_OPT_1

HW_OPT_2

HW_OPT_3

HW_OPT_4

HW_OPT_5

HW_OPT_6

HW_OPT_7

HW_OPT_8

HW_OPT_9

HW_OPT_10

X-TAL_1

GND_1

1

2

24MHz

4

3

GND_2

X-TAL_2

OPT

R100 33

R101 33

OPT

+3.3V_NORMAL

INSTANT boot MODE
"1 : Instant boot
"0 : normal

3.3K

R150

(internal pull down)

OPT

INSTANT_MODE0

+3.3V_NORMAL

OPT

OPT

R160 10K

R163 10K

AREA option1

FRC option

Pannel Resol

OLED option

EPI PANEL version

reserved

CP BOX

T2 support

satellite support

AREA option2

EPI selection

X100

R166 10K

1M

R108

PLLSET1

PLLSET0

INSTANT_BOOT

OPT

R167
33

OPT

OPT

R168 10K

TAIWAN

R110 10K

NON_TAIWAN

R109 10K

+3.3V_NORMAL

10K

OPT

R112

10K

R111

XIN_MAIN

XO_MAIN

+3.3V_NORMAL

BOOT MODE
"0 : EMMC
"1 : TEST MODE

3.3K

R117

OPT

3.3K

R118

BOOT_MODE0

Jtag I/F For Main

TRST_N0
TDI0
TDO0
TMS0
TCK0
SOC_RESET

FHD

OPT

R114 10K

UD

R113 10K

R116 10K

R115 10K

OPT

V13_MODULE

R120 10K

V12_MODULE

R119 10K

R122 10K

R121 10K

OP MODE[1:0]
"00" : Normal Mode
"01/10/11" : Internal Test mode

+3.3V_NORMAL

OPT

R133 33

R134 33

OPT

BOOT_MODE

CP_BOX

R124 10K

NON_CP_BOX

R123 10K

AJ_JA

DVB_S_TUNER

R126 10K

R128 10K

DVB_T2_TUNER

R125 10K

R127 10K

NON_DVB_S_TUNER

NON_DVB_T2_TUNER

R129 10K

NON_AJ_JA

R130 10K

NVRAM

EEPROM_RENESAS

IC102

R1EX24256BSAS0A

A0

1

A1

2

A2

A0’h

3

VSS

4

OPM1

OPM0

D13

R131 10K

NON_D13

R132 10K

VCC

8

WP

7

SCL

6

SDA

5

C103

0.1uF

MODEL_OPT_0

MODEL_OPT_2

MODEL_OPT_3

MODEL_OPT_4

MODEL_OPT_5

MODEL_OPT_6

MODEL_OPT_7

MODEL_OPT_8

MODEL_OPT_9

MODEL_OPT_10

+3.3V_TU

R135

3.3K

KR_PIP_NOT

1.5K

KR_PIP

R135-*1

+3.3V_NORMAL

Write Protection

- Low : Normal Operation

- High : Write Protection

R139 33

R140 33

Area1

ReservedMODEL_OPT_1

Panel

Reserved

Module

Reserved

CP BOX

T2 Tuner

S Tuner

Area2

D13(HEVC)

+3.3V_TU

+3.3V_NORMAL

R137

3.3K

R138

3.3K

R136

3.3K

KR_PIP_NOT

1.5K

KR_PIP

R136-*1

R141

Support

Support

Support

3.3K

HIGH

Taiwan

FHD

V13

Enable

AJ_JA

R142

3.3K

I2C_SCL5

I2C_SDA5

D13_INT

EPHY_INT

non Taiwan

Not Support

Not Support

non AJ_JA

Not Support

+3.3V_NORMAL

R144

3.3K

R143

3.3K

LOW

Default

UD

Default

V12

Default

Disable

I2C PULL UP

R145

3.3K

R146

EEPROM_ST

IC102-*1

M24256-BRMN6TP

E0

1

E1

2

E2

3

VSS

4

R164331/16W

5%

I2C_SCL_MICOM_SOC
I2C_SDA_MICOM_SOC

3.3K

R148

R147

3.3K

VCC

8

WC

7

SCL

6

SDA

5

XIN_MAIN

XO_MAIN

SOC_RESET

H13A_SCL
H13A_SDA

TRST_N0

PLLSET1
PLLSET0

BOOT_MODE

R149

10K

SOC_RX

SOC_TX
M_REMOTE_RX
M_REMOTE_TX

M_REMOTE_RTS
M_REMOTE_CTS

SOC_SPI0_CS0
SOC_SPI0_MOSI
SOC_SPI0_MISO
SOC_SPI0_SCLK

I2C_SCL1
I2C_SDA1

I2C_SCL2_SOC

I2C_SDA2_SOC

I2C_SCL4
I2C_SDA4
I2C_SCL5
I2C_SDA5
I2C_SCL6
I2C_SDA6

I2C_SDA_MICOM
I2C_SCL_MICOM

I2C_SDA2
I2C_SCL2

3.3K
I2C_SDA1
I2C_SCL1
I2C_SDA_MICOM_SOC

I2C_SCL_MICOM_SOC
I2C_SDA2_SOC

I2C_SCL2_SOC
I2C_SDA4
I2C_SCL4

I2C_SDA5
I2C_SCL5

I2C_SDA6
I2C_SCL6

OPM1
OPM0

TMS0
TCK0
TDI0
TDO0

560

R152

R151 33
R174 33

R165 4.7K

HEVC

R107 33

HEVC

R156 33

HEVC

R158 33

R10533

33

R106

R10233

33

R104

I2C for tuner

I2C for tuner

A26

XIN

B26

XOUT

B27

XTAL_BYPASS

AT37

H13DA_XTAL

AU16

PORES_N

AD34

OPM1

AD33

OPM0

AT26

H13DA_SCL

AU26

H13DA_SDA

AP9

TRST_N0

AN9

TMS0

AP11

TCK0

AN11

TDI0

AN10

TDO0

AM10

TRST_N1

AM9

TMS1

AM11

TCK1

AM12

TDI1

AL11

TDO1

AL9

PLLSET1

AL10

PLLSET0

AE34

BOOT_MODE

Y33

EXT_INTR3/GPIO70

W32

EXT_INTR2/GPIO69

W33

EXT_INTR1/GPIO68

W34

EXT_INTR0/GPIO67

AU12

UART0_RXD

AT12

UART0_TXD

AU13

UART1_RXD

AT13

UART1_TXD

AP12

UART1_RTS

AR12

UART1_CTS

AE35

SPI_CS0/GPIO36

AE36

SPI_DO0/GPIO38

AF36

SPI_DI0/GPIO39

AF35

SPI_SCLK0/GPIO37

AG34

SPI_CS1

AF33

SPI_DO1

AG33

SPI_DI1

AG32

SPI_SCLK1

AR15

SCL0/GPIO66

AP15

SDA0/GPIO65

AR16

SCL1/GPIO64

AP16

SDA1/GPIO79

AP17

SCL2/GPIO78

AR17

SDA2/GPIO77

AP6

SCL3

AR6

SDA3

AH32

SCL4

AJ33

SDA4

AH34

SCL5

AH33

SDA5

I2C_SDA_MICOM_SOC
I2C_SCL_MICOM_SOC

I2C_SDA2_SOC

I2C_SCL2_SOC

+3.3V_NORMAL

CAM_CE1_N

CAM_CE2_N

CAM_CD1_N/GPIO76

F33

F34

D32

E32

/PCM_CE1

/PCM_CE2

CAM_CD1_N

CI

USB_CTL3

/USB_OCD3

/USB_OCD2

USB_CTL2

K35

K36

K37

L35

EB_CS3/GPIO93

EB_CS2/GPIO92

EB_CS1/GPIO91

EB_CS0/GPIO90

EB_WE_N

EB_BE_N1

EB_OE_N

H35

H36

J35

J36

H37

EB_WE_N/GPIO95

EB_WAIT/GPIO94

EB_OE_N/GPIO82

EB_BE_N1/GPIO81

EB_ADDR[0-14]

EB_BE_N0

EB_ADDR[13]

EB_ADDR[14]

EB_ADDR[12]

G37

G36

G35

F36

EB_BE_N0/GPIO80

EB_ADDR15/GPIO89

EB_ADDR14/GPIO88

EB_ADDR13/GPIO103

EB_ADDR12/GPIO102

EB_ADDR[8]

EB_ADDR[6]

EB_ADDR[7]

EB_ADDR[9]

EB_ADDR[11]

EB_ADDR[10]

F35

E36

E37

E35

D37

EB_ADDR9/GPIO99

EB_ADDR8/GPIO98

EB_ADDR7/GPIO97

EB_ADDR11/GPIO101

EB_ADDR10/GPIO100

EB_ADDR[4]

EB_ADDR[5]

EB_ADDR[3]

D36

D35

C36

C35

EB_ADDR6/GPIO96

EB_ADDR5/GPIO111

EB_ADDR4/GPIO110

EB_ADDR3/GPIO109

EB_ADDR[0]

EB_ADDR[1]

EB_ADDR[2]

EB_DATA[7]

B37

B36

B35

C32

EB_ADDR2/GPIO108

EB_ADDR1/GPIO107

EB_ADDR0/GPIO106

EB_DATA[0-7]

EB_DATA[5]

EB_DATA[6]

B33

A33

EB_DATA7/GPIO105

EB_DATA6/GPIO104

EB_DATA5/GPIO119

IC100

LG1154D_H13D

CAM_CD2_N/GPIO75

CAM_VS1_N/GPIO86

CAM_VS2_N/GPIO85

CAM_IREQ_N/GPIO73

CAM_RESET

CAM_INPACK/GPIO74

CAM_VCCEN_N/GPIO87

CAM_WAIT_N/GPIO84

CAM_REG_N/GPIO72

CAM_IOIS16_N/GPIO83

SC_CLK/GPIO130

SC_DETECT/GPIO133

SC_VCCEN/GPIO129

SC_VCC_SEL/GPIO128

SC_RST/GPIO131

SC_DATA/GPIO132

SD_CLK/GPIO125

SD_CMD/GPIO124

SD_CD_N/GPIO123

SD_WP_N/GPIO122

SD_DATA3/GPIO121

SD_DATA2/GPIO120

SD_DATA1/GPIO135

SD_DATA0/GPIO134

USB2_2_DP0

USB2_2_DM0

USB2_2_TXRTUNE

G32

G33

F32

G34

D33

H32

E33

D34

H33

T33

U33

T32

V32

V33

V34

A25

C25

B25

E25

D25

E24

D24

C24

L37

L36

K34

1%

200

CAM_CD2_N

R153

10K

PCM_RESET

CAM_IREQ_N

CAM_INPACK_N

CI

R154

10K

CAM_REG_N

CAM_WAIT_N

PCM_5V_CTL

R155

10K

CI

SMARTCARD_CLK/SD_EMMC_DATA[0]

SMARTCARD_DET/SD_EMMC_DATA[3]

interface

Only SMART CARD

SMARTCARD_DATA/SD_EMMC_CLK

SMARTCARD_VCC/SD_EMMC_CMD

SMARTCARD_RST/SD_EMMC_DATA[2]

SMARTCARD_PWR_SEL/SD_EMMC_DATA[1]

R157

USB2_HUB_IC_IN_DM

USB2_HUB_IC_IN_DP

EB_DATA[2]

EB_DATA[4]

EB_DATA[3]

EB_DATA[0]

EB_DATA[1]

C33

A34

B34

C34

A36

EB_DATA4/GPIO118

EB_DATA3/GPIO117

EB_DATA2/GPIO116

EB_DATA1/GPIO115

EB_DATA0/GPIO114

USB2_1_DP0

USB2_1_DM0

USB2_1_TXRTUNE

USB2_0_DP

M37

M36

K33

AU7

1%

200

R159

WIFI_DP

USB_DM2

USB_DP2

EMMC_DATA[0-7]

EMMC_CLK

EMMC_CMD

EMMC_RST

Y37

Y36

W35

EMMC_CLK

EMMC_CMD

EMMC_RESETN

USB2_0_DM

USB2_0_TXRTUNE

USB3_DP0

AT7

AP7

P37

WIFI_DM

R161 200 1%

USB3_DP

EMMC_DATA[5]

EMMC_DATA[7]

EMMC_DATA[6]

T36

W36

V35

EMMC_DATA7

EMMC_DATA6

EMMC_DATA5

USB3_DM0

USB3_RX0P

USB3_RX0M

P36

N36

N37

USB3_DM

USB3_RX0P

USB3_RX0M

EMMC_DATA[4]

EMMC_DATA[3]

EMMC_DATA[2]

V37

V36

U35

EMMC_DATA4

EMMC_DATA3

EMMC_DATA2

USB3_TX0P

USB3_TX0M

USB3_RESREF

R36

R37

N34

1%

200

R162

C105 0.1uF

C104 0.1uF

USB3_TX0M

USB3_TX0P

U36

EMMC_DATA1

USB3_REFPADCLKM

P33

EPHY_MDIO

EPHY_EN

EPHY_MDC

EPHY_REFCLK

EPHY_CRS_DV

EMMC_DATA[1]

EMMC_DATA[0]

U37

AU11

AU8

AT8

AR8

AR10

AT10

RMII_MDC

RMII_MDIO

RMII_CRS_DV

RMII_REF_CLK

NC_1

NC_2

NC_3

L32

L33

M31

AJ31

RMII_TXEN

NC_4

J32

EMMC_DATA0

USB3_REFPADCLKP

P32

AC-coupling CAP

Place near by LG1154D

EPHY_RXD1

EPHY_TXD0

EPHY_TXD1

AU10

AT11

AR11

RMII_TXD1

RMII_TXD0

RMII_RXD1

GPIO136

GPIO137

GPIO138

J33

K32

J34

EPHY_RXD0

RMII_RXD0

GPIO31
GPIO30
GPIO29
GPIO28
GPIO27
GPIO26
GPIO25

GPIO24
GPIO23/UART2_TX
GPIO22/UART2_RX

GPIO21

GPIO20

GPIO19

GPIO18

GPIO17

GPIO16

GPIO15

GPIO14

GPIO13

GPIO12

GPIO11

GPIO10

GPIO9
GPIO8
GPIO7
GPIO6
GPIO5
GPIO4
GPIO3
GPIO2
GPIO1
GPIO0

DDCD0_CK
DDCD0_DA

HPD0

PHY0_ARC_OUT_0

PHY0_RX0N_0
PHY0_RX0P_0
PHY0_RX1N_0
PHY0_RX1P_0
PHY0_RX2N_0
PHY0_RX2P_0
PHY0_RXCN_0
PHY0_RXCP_0

HUB_PORT_OVER0

HUB_VBUS_CTRL0

GPIO139

AL34
AM33
AM32
AF30
AN34
AK34
AL33
AL32
AR9
AM5
AM6
AM7
AL6
AK7
AK6
AK5
AJ5
AJ6
AJ7
AH6
AG7
AG6
AG5
AF5
AH30
AG30
AN33
AK33
AE30
AD30
AN32
AK32

AC32
AC33
AB33

AE37
AC36
AC37
AB36
AB37
AA36
AA37
AD36
AD37

R32

R33

CAM_SLIDE_DET

/RST_PHY
RF_SWITCH_CTL

AMP_RESET_N

INSTANT_BOOT

SC_DET
AV1_CVBS_DET

COMP1_DET
M_RFModule_RESET
HP_DET
PA168_RESET
/TU_RESET1
/S2_RESET
D13_RESET

FRC_FLASH_WP

/RST_HUB
FE_LNA_Ctrl2
/TU_RESET2
HDMI_S/W_RESET

FE_LNA_Ctrl1
HDMI_INT

R169 3.3K
R170 3.3K

SPDIF_OUT_ARC

HDMI_RX0­HDMI_RX0+
HDMI_RX1­HDMI_RX1+
HDMI_RX2­HDMI_RX2+
HDMI_CLK-

HDMI_CLK+

/USB_OCD1

USB_CTL1

local dimming

I2C port

+3.3V_NORMAL

100K
R172

Do not move !!!

DFT jig LVDS 120Hz

100K
R171

+3.3V_NORMAL

For ISP

R103

3.3K

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BSD-NC4_H001-HD

2012-11-14

H13 D CHIP

LG1154A

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

LG1154D

AVDD25

VDD25_LTX

VDDC10

AVDD33_CVBS

VDD25_REF

VDD25_LTX

VDD25_AUD

VDD10_XTAL

VDD10_XTAL

AVDD33_XTAL

VSS25_REF

LG1154A

H13A_NON_BRAZIL

E11

F5
F6

F11

G5
H13
J13
P12
P13

R5

R6
N16
T13
T14

N10
N11
N12
N13

U5

N7

N8

N9
F14

M6

N6
M13
F15
F16
H15
J15
J16
K15
K16

R18

G7

G8

G9

H7
H12

J7
J12

K7
K12

L7
L12

M7
M12
T17
T18

M8
G10
G11
G12

V5

C3

D3

D4
D17

E4

F4

F7

F8

F9
F10
F12
F13
F17
F18

G4

G6
G13
G14
G15
G16
G17
G18

H4

H5

H6

H8

H9
H10
H11

VDD33_1
VDD33_2
VDD33_3
VDD33_4
VDD33_5
VDD33_6
VDD33_7
VDD33_8
VDD33_9
VDD33_10
VDD33_11
VDD33_XTAL
AVDD33_CVBS_1
AVDD33_CVBS_2

VDD25_CVBS_1
VDD25_CVBS_2
VDD25_VSB_1
VDD25_VSB_2
VDD25_REF
VDD25_COMP_1
VDD25_COMP_2
VDD25_COMP_3
VDD25_APLL
VDD25_AUD_1
VDD25_AUD_2
VDD25_AAD
LTX_LVDD_1
LTX_LVDD_2
SDRAM_VDDQ_1
SDRAM_VDDQ_2
SDRAM_VDDQ_3
SDRAM_VDDQ_4
SDRAM_VDDQ_5

VDD10_XTAL
VDDC10_1
VDDC10_2
VDDC10_3
VDDC10_4
VDDC10_5
VDDC10_6
VDDC10_7
VDDC10_8
VDDC10_9
VDDC10_10
VDDC10_11
VDDC10_12
VDDC10_13
AVDD10_CVBS
AVDD10_VSB
AVDD10_LLPLL
DVDD10_APLL_1
DVDD10_APLL_2
LTX_VDD

VSS25_REF
GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29

LG1154AN_H13A

AVDD33

IC101

GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
GND_80
GND_81
GND_82
GND_83
GND_84
GND_85
GND_86
GND_87
GND_88
GND_89
GND_90
GND_91
GND_92
GND_93
GND_94
GND_95
GND_96
GND_97
GND_98

GND_99
GND_100
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112
GND_113
GND_114
GND_115
GND_116

IC100

LG1154D_H13D

A24

M0_DDR_VREF1

A4

M0_DDR_VREF2

A2

M1_DDR_VREF1

Y1

M1_DDR_VREF2

P26

XTAL_VDD

N26

XTAL_VDDP

M21

VDD33_1

Y30

VDD33_2

AA30

VDD33_3

AE8

VDD33_4

AF8

VDD33_5

AK13

VDD33_6

AK24

VDD33_7

AK25

VDD33_8

M22

AVDD33_USB_1

M23

AVDD33_USB_2

AK11

AVDD33_BT_USB_1

AK12

AVDD33_BT_USB_2

AF25

AVDD33_HDMI_1

AF26

AVDD33_HDMI_2

R31

SP_VQPS

AE23

VDD25_LVRX_1

AF23

VDD25_LVRX_2

AE14

VTXPHY_VDD25_1

AF14

VTXPHY_VDD25_2

N25

VDD25_DR3PLL

AD26

GPLL_AVDD25

H10

VDD15_M0_1

H11

VDD15_M0_2

H12

VDD15_M0_3

H13

VDD15_M0_4

H14

VDD15_M0_5

H15

VDD15_M0_6

H16

VDD15_M0_7

H17

VDD15_M0_8

H18

VDD15_M0_9

H19

VDD15_M0_10

H20

VDD15_M0_11

H21

VDD15_M0_12

H22

VDD15_M0_13

H23

VDD15_M0_14

H24

VDD15_M0_15

H25

VDD15_M0_16

H7

VDD15_M1_1

H8

VDD15_M1_2

J8

VDD15_M1_3

K8

VDD15_M1_4

L7

VDD15_M1_5

L8

VDD15_M1_6

M8

VDD15_M1_7

N7

VDD15_M1_8

N8

VDD15_M1_9

P8

VDD15_M1_10

R7

VDD15_M1_11

R8

VDD15_M1_12

T8

VDD15_M1_13

U8

VDD15_M1_14

V8

VDD15_M1_15

W8

VDD15_M1_16

LG1154AN_H13A_ISDB-T (LG1154AN-IT)

P17
P18
J17

N18
D18
M18
M17

U13
V14
V15
V13

U15
U14

U10
V12

V10
U11
V11
U12

E3

K3
K2

A8
B8

U7
V6
V7

T5
T6
U8
V8
V9
U9

H13A_BRAZIL

XIN_SUB
XO_SUB
VSB_AUX_XIN

XTAL_BYPASS
CLK_24M
XTAL_SEL0
XTAL_SEL1

PORES_N

OPM0
OPM1

H13A_SCL
H13A_SDA

CVBS_IN3
CVBS_IN2
CVBS_IN1
CVBS_VCM

BUF_OUT1
BUF_OUT2

REFT
REFB
ADC1_COM
ADC2_COM
ADC3_COM
SC1_SID
SC1_FB
PB1_IN
Y1_IN
SOY1_IN
PR1_IN
PB2_IN
Y2_IN
SOY2_IN
PR2_IN

VTXPHY_VDD11_1
VTXPHY_VDD11_2
VTXPHY_VDD11_3

AVDD11_DR3PLL

IC101-*1

AAD_ADC_SIF

AAD_ADC_SIFM

AUDA_VBG_EXT

AUDA_OUTL

AUDA_OUTR
AUD_SCART_OUTL
AUD_SCART_OUTR

AUAD_L_CH4_IN
AUAD_R_CH4_IN
AUAD_L_CH3_IN
AUAD_R_CH3_IN
AUAD_L_CH2_IN
AUAD_R_CH2_IN
AUAD_L_CH1_IN
AUAD_R_CH1_IN

AUAD_R_REF
AUAD_M_REF
AUAD_L_REF

AUAD_REF_PO

ADC_I_INCOM

ADC_I_INP

ADC_I_INN

VDDC11_1
VDDC11_2
VDDC11_3
VDDC11_4
VDDC11_5
VDDC11_6
VDDC11_7
VDDC11_8

VDDC11_9
VDDC11_10
VDDC11_11
VDDC11_12
VDDC11_13
VDDC11_14
VDDC11_15
VDDC11_16
VDDC11_17
VDDC11_18
VDDC11_19
VDDC11_20
VDDC11_21
VDDC11_22
VDDC11_23
VDDC11_24
VDDC11_25
VDDC11_26
VDDC11_27
VDDC11_28
VDDC11_29
VDDC11_30
VDDC11_31
VDDC11_32
VDDC11_33
VDDC11_34
VDDC11_35

AVDD11_DCO
GPLL_VDD11

H18
H17

P2
N1
N2
N3
P1

P3
R1
R2
T1
U2
U3
V2
V3
U1
T3
T2
R3

K17

ANTCON

K18

RFAGC

J18

IFAGC

U16
U17
V17

F3

GPIO0

F2

GPIO1

F1

GPIO2

G3

GPIO3

G2

GPIO4

G1

GPIO5

H3

GPIO6

H2

GPIO7

H1

GPIO8

J3

GPIO9

E18

GPIO10

E17

GPIO11

H16

GPIO12

J2

GPIO13

J1

GPIO14

K1

GPIO15

N21
N22
N23
P15
P16
P17
P18
R15
T15
T22
T23
T24
U15
U22
U23
U24
V15
V22
V23
V24
W22
W23
W24
AB15
AB24
AC15
AC24
AD15
AD16
AD17
AD18
AD21
AD22
AD23
AD24

AB14
AC14
AD14

P25
AA15
AC26

+1.1V

+1.1V_VDD

VDD11_VTXPHY

VDDC11_XTAL

+1.1V_VDD

VDD25_LVDS

4.7uFC378

+0.75V

+3.3V

+2.5V

+1.5V

(4)

C381 0.1uF

VREF_M1_1

VDDC11_XTAL

VDD25_XTAL

VDD33

VDD25_LVDS

VDD25_XTAL

VREF_M0_1

VREF_M1_0

VDDC15_M0

VDDC15_M1

VREF_M0_0

+3.3V_Bypass Cap

+3.3V_NORMAL

H14
J4
J5
J6
J8
J9
J10
J11
J14
K4
K5
K6
K8
K9
K10
K11
K13
K14
L1
L2
L3
L4
L5
L6
L8
L9
L10
L11
L13
L14
L15
L16
L17
L18
M1
M2
M3
M4
M5
M9
M10
M11
M14
M15
M16
N4
N5
N14
N15
N17
P4
P5
P6
P7
P8
P9
P10
P11
P14
P15
P16
R4
R7
R8
R9
R10
R11
R12
R13
R14
R15
R16
R17
T4
T7
T8
T9
T10
T11
T12
T15
T16
U4
U6
U18
V4
V16

+2.5V_Bypass Cap

AVDD33

(2)

L209
BLM18PG121SN1D

4.7uFC241

C218 0.1uF

+2.5V_Normal

L220

BLM18PG121SN1D

+2.5V_Normal

L207

BLM18PG121SN1D

+1.0V_Bypass Cap

+1.0V_VDD

L211

BLM18PG121SN1D

+1.0V_VDD

L206
BLM18PG121SN1D

4.7uFC211

VDD25_LTX

4.7uFC275

+3.3V_NORMAL

AVDD25

4.7uFC242

4.7uFC216

C223 0.1uF

VDD10_XTAL

4.7uFC239

VDDC10

4.7uFC214

AVDD33_XTAL

L216
BLM18PG121SN1D

4.7uFC255

AFE 3CH Power

BLM15BD121SN1

4.7uFC270

BLM15BD121SN1

C274 0.1uF

1005 size bead
Bottom side of chip

+2.5V_Normal

C246 0.1uF

C251 0.1uF

(1)

C259 0.1uF

VDD25_REF

L225

L226

L200

BLM18PG121SN1D

+3.3V_NORMAL

0.1uF

C288

VSS25_REF

VDD25_AUD

4.7uF

C200

AVDD33_CVBS

L222

BLM18PG121SN1D

4.7uF

C204 0.1uF

C202

4.7uFC279

(2)

C283 0.1uF

+1.1V_Bypass Cap

+1.1V_VDD

4.7uFC351

+1.1V_VDD

L227

BLM18PG121SN1D

VDDC11_XTAL

C300 0.1uF

+1.1V_VDD

VDD11_VTXPHY

L201

BLM18PG121SN1D

4.7uFC209

OPT

+3.3V_Bypass Cap

+3.3V_NORMAL

L203

BLM18PG121SN1D

+2.5V_Bypass Cap

+2.5V_Normal

L234

BLM18PG121SN1D

4.7uFC297

4.7uFC298

4.7uFC205

C301 0.1uF

C206 0.1uF

OPT

C207 0.1uF

C208 0.1uF

VDD33

4.7uFC201

VDD25_XTAL

4.7uFC364

OPT

C368 0.1uF

C203 0.1uF

+2.5V_Normal

(1)

L238

BLM18PG121SN1D

A27

B5

C5
C26
C27

D5
D26

E5

E6

E7

E8
E22
E23
E26

F7

F8
F22
F23
F24
F25
F26
F27
F31

G7

G8

G9
G10
G11
G12
G13
G14
G15
G16
G17
G18
G19
G20
G21
G22
G23
G24
G25
G26
G27
G28
G29
G30
G31

H9
H26
H27
H28
H29
H30
H31

J7
J30
J31

K7
K30
K31
L30
L31

M7
M12
M13
M14
M15
M16
M17
M18
M19
M20
M24
M25
M26
M30
M32
M33
M34
N12
N13
N14
N15
N16
N17
N18
N19
N20
N24
N30
N31
N32
N33

P7
P12
P13
P14
P19
P20
P21
P22
P23
P24
P30
P31
R12
R13
R14
R16
R17
R18
R19
R20
R21
R22
R23
R24
R25
R26
R30
R34

T7
T12
T13
T14
T16
T17
T18
T19
T20
T21
T25
T26
T30
T31
T34

U7
U12
U13
U14
U16
U17
U18
U19
U20
U21
U25
U26
U30
U31

V7
V12
V13
V14
V16
V17
V18
V19
V20
V21
V25
V26
V30
V31

W5

W6

W7
W12
W13
W14
W15
W16
W17
W18
W19
W20
W21
W25
W26
W30
W31

Y3

Y4

IC100

LG1154D_H13D

GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
GND_80
GND_81
GND_82
GND_83
GND_84
GND_85
GND_86
GND_87
GND_88
GND_89
GND_90
GND_91
GND_92
GND_93
GND_94
GND_95
GND_96
GND_97
GND_98
GND_99
GND_100
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112
GND_113
GND_114
GND_115
GND_116
GND_117
GND_118
GND_119
GND_120
GND_121
GND_122
GND_123
GND_124
GND_125
GND_126
GND_127
GND_128
GND_129
GND_130
GND_131
GND_132
GND_133
GND_134
GND_135
GND_136
GND_137
GND_138
GND_139
GND_140
GND_141
GND_142
GND_143
GND_144
GND_145
GND_146
GND_147
GND_148
GND_149
GND_150
GND_151
GND_152
GND_153
GND_154
GND_155
GND_156
GND_157
GND_158
GND_159
GND_160
GND_161
GND_162
GND_163
GND_164
GND_165
GND_166
GND_167
GND_168
GND_169
GND_170
GND_171
GND_172
GND_173
GND_174
GND_175
GND_176
GND_177
GND_178
GND_179
GND_180
GND_181
GND_182
GND_183
GND_184

GND_185
GND_186
GND_187
GND_188
GND_189
GND_190
GND_191
GND_192
GND_193
GND_194
GND_195
GND_196
GND_197
GND_198
GND_199
GND_200
GND_201
GND_202
GND_203
GND_204
GND_205
GND_206
GND_207
GND_208
GND_209
GND_210
GND_211
GND_212
GND_213
GND_214
GND_215
GND_216
GND_217
GND_218
GND_219
GND_220
GND_221
GND_222
GND_223
GND_224
GND_225
GND_226
GND_227
GND_228
GND_229
GND_230
GND_231
GND_232
GND_233
GND_234
GND_235
GND_236
GND_237
GND_238
GND_239
GND_240
GND_241
GND_242
GND_243
GND_244
GND_245
GND_246
GND_247
GND_248
GND_249
GND_250
GND_251
GND_252
GND_253
GND_254
GND_255
GND_256
GND_257
GND_258
GND_259
GND_260
GND_261
GND_262
GND_263
GND_264
GND_265
GND_266
GND_267
GND_268
GND_269
GND_270
GND_271
GND_272
GND_273
GND_274
GND_275
GND_276
GND_277
GND_278
GND_279
GND_280
GND_281
GND_282
GND_283
GND_284
GND_285
GND_286
GND_287
GND_288
GND_289
GND_290
GND_291
GND_292
GND_293
GND_294
GND_295
GND_296
GND_297
GND_298
GND_299
GND_300
GND_301
GND_302
GND_303
GND_304
GND_305
GND_306
GND_307
GND_308
GND_309
GND_310
GND_311
GND_312
GND_313
GND_314
GND_315
GND_316
GND_317
GND_318
GND_319
GND_320
GND_321
GND_322
GND_323
GND_324
GND_325
GND_326
GND_327
GND_328
GND_329
GND_330
GND_331
GND_332
GND_333
GND_334
GND_335
GND_336
GND_337
GND_338
GND_339
GND_340
GND_341
GND_342
GND_343
GND_344
GND_345
GND_346
GND_347
GND_348
GND_349
GND_350
GND_351
GND_352
GND_353
GND_354
GND_355
GND_356
GND_357
GND_358
GND_359
GND_360
GND_361
GND_362
GND_363
GND_364
GND_365
GND_366
GND_367
GND_368

Y5

Y8
Y12
Y13
Y14
Y15
Y16
Y17
Y18
Y19
Y20
Y21
Y22
Y23
Y24
Y25
Y26
Y31
Y35
AA8
AA12
AA13
AA14
AA16
AA17
AA18
AA19
AA20
AA21
AA22
AA23
AA24
AA25
AA26
AA31
AB6
AB8
AB12
AB13
AB16
AB17
AB18
AB19
AB20
AB21
AB22
AB23
AB25
AB26
AB30
AB31
AC8
AC12
AC13
AC16
AC17
AC18
AC19
AC20
AC21
AC22
AC23
AC25
AC30
AC31
AD8
AD12
AD13
AD19
AD20
AD25
AD31
AE12
AE13
AE15
AE16
AE17
AE18
AE19
AE20
AE21
AE22
AE24
AE25
AE26
AE31
AF12
AF13
AF15
AF16
AF17
AF18
AF19
AF20
AF21
AF22
AF24
AF31
AG8
AG31
AH8
AH31
AJ8
AJ30
AK8
AK9
AK10
AK14
AK15
AK16
AK17
AK18
AK19
AK20
AK21
AK22
AK23
AK26
AK27
AK28
AK29
AK30
AK31
AL8
AL12
AL13
AL14
AL15
AL16
AL17
AL18
AL19
AL20
AL21
AL22
AL23
AL24
AL25
AL26
AL27
AL28
AL29
AL30
AL31
AM8
AM13
AM14
AM15
AM16
AM17
AM18
AM19
AM20
AM21
AM22
AM23
AM24
AM25
AM26
AM27
AM28
AM29
AM30
AM31
AN6
AN12
AN13
AN15
AN16
AN17
AN18
AN19
AN20
AN21
AN22
AN23
AN24
AN25
AN26
AN27
AN28
AN29
AN30
AN31

GND JIG POINT

JP202

JP204

JP205

JP203

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

11/05/31

SMD TOP for EMI

SMD_GASKET_8.5T

GASKET_8.0X6.0X8.5H

M200

MDS62110209

SMD_GASKET_12.5T

GASKET_8.0X6.0X12.5H

M200-*1

MDS62110217

+1.5V_DDR

L230

BLM18PG121SN1D

VDDC15_M0

22uF

C303

C302

0.1uF

C306

0.1uF

C308

0.1uF

OPT

C305

0.1uF

C309

VDDC15_M1

+1.5V_Bypass Cap

OPT

OPT

OPT

OPT

0.1uF

C311

0.1uF

C312

0.1uF

C313

0.1uF

C314

OPT

0.1uF

C350

0.1uF

C352

0.1uF

C353

0.1uF

C354

0.1uF

C355

0.1uF

C356

0.1uF

C357

0.1uF

C358

0.1uF

C359

0.1uF

C360

0.1uF

C361

0.1uF

C362

0.1uF

C363

0.1uF

C365

0.1uF

C366

0.1uF

C367

0.1uF

C369

0.1uF

C370

0.1uF

C371

0.1uF

C372

0.1uF

VDDC15_M0

R200

R201

1K 1%

VREF_M0_0

1K 1%

C296

OPT

0.1uF

VDDC15_M0

R202

R203

1K 1%

VREF_M0_1

1K 1%

OPT

C344

0.1uF

+1.5V_DDR

L228

BLM18PG121SN1D

22uFC299

C307

0.1uF

VDDC15_M1

R300

R301

VREF_M1_0

1K 1%

1K 1%

C304

OPT

0.1uF

VDDC15_M1

R302

R303

1K 1%

VREF_M1_1

1K 1%

C310

OPT

0.1uF

BSD-NC4_H002-HD

2012-10-18

MAIN POWER

Place JACK Side

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

AV1_CVBS_IN

SC_CVBS_IN

SC_CVBS_IN_SOY

COMP1_Pb

COMP1_Pr

SCART_Lout

SCART_Rout

HP_LOUT_MAIN

HP_ROUT_MAIN

TU_CVBS

SC_FB

SC_ID

NON_EU
R422-*1

COMP1_Y

5.5V

D404

0

SCART_FB_DIRECT

SC_B
SC_G

SC_R

D403

D401

5.5V

5.5V

Near Place Scart AMP

C6006

1uF 25V
C6001

SC_L_IN

SC_R_IN

COMP1/AV1/DVI_L_IN

COMP1/AV1/DVI_R_IN

+12V

R430

R445

C405
150pF
50V

C408
150pF
50V

EU

C402
150pF
50V

OPT

SCART_FB_DIRECT

R423 100

10K

EU

R435

R422
75

10pF

10pF

C473

C472

50V

OPT

D406

5.5V

EU

EU

10K

1uF25V

R60 06

EU

EU

10K

R6005

EU

EU

R408

100K

R403

100K

EU

C403

2.2uF
10V

EU

EU

R404

100K

R409

100K

R6450

100

C400

0.01uF

22K

R6451

C401

0.01uF

22K

L408

L409

50V

OPT

C430

EU

C474

2.2uF

100

10pF

50V

10V

1uH

C410
150pF

1uH

C462
150pF

EU

EU

R436

2.7K

10pF

EU

50V

OPT

10pF

C431

C470

50V

SCART_AMP_R_FB

SCART_AMP_L_FB

EU

C406

+3.3V_NORMAL

R4641K1/16W

1%

R465

390

1/16W

1%

DAC_START_PULLDOWN

R466821/16W

R410
75
1%

R411
75

EU

1%

NON_EU

R436-*1

0

75

75

EU

75

1%

1%

1%

R416

R414

R412

10pF

50V

SCART_Lout_SOC

SCART_Rout_SOC

AUDA_OUTL

AUDA_OUTR

C404

0.01uF
50V

75

1%

R413

EU

75
1%

R415

CLK_54M_VTT

1%

75

1%

R417

FOR EMI

R424
R425

R427

R428
R429

1%

R418 27K

1%

R419 27K

1%

R420 27K

1%

R421 27K

SC_FB

Clock for H13A

MAIN Clock(24Mhz)

12pF

C426

12pF

C427

Place SOC Side

R434

C424 0.047uF

100

R433

C425 0.047uF

100

SC_CVBS_IN_SOY

R432

C423 0.047uF

100

C417 0.047uF

33

C418 0.047uF

33

C428 1000pF

0.047uF

C419

33

C420 0.047uF

33

C421 0.047uF

33

C429 1000pF
C422 0.047uF

33

R431

AUDIO IN

C432 4.7uF

R437 10K 1%

C433 4.7uF

R438 10K 1%

C434 4.7uF

R439 10K 1%

C435 4.7uF

R440 10K 1%

+3.3V_NORMAL

R446

4.7K

R401
470

1/16W
5%

R4061K

SCART_FB_BUFFER

SCART_FB_BUFFER

C

B

E

1/16W

1%

SCART_FB_BUFFER

GND_1

1

2

4

3

X-TAL_2

AV1_CVBS_IN_SOC

SC_CVBS_IN_SOC

TU_CVBS_SOC

SC_FB_SOC

SC_ID_SOC

COMP1_PB_IN_SOC
COMP1_Y_IN_SOC

COMP1_Y_IN_SOC_SOY

COMP1_PR_IN_SOC

COMP2_PB_IN_SOC
COMP2_Y_IN_SOC
COMP2_Y_IN_SOC_SOY

COMP2_PR_IN_SOC

SC_FB_BUF

MMBT3904(NXP)

Q400
SCART_FB_BUFFER

X-TAL_1

R441

X400

24MHz

GND_2

AUAD_L_CH3_IN

AUAD_R_CH3_IN

AUAD_L_CH2_IN

AUAD_R_CH2_IN

1M

DTV/MNT_V_OUT_SOC

R447 68
R448 68

R449 68

SC_ID_SOC
SC_FB_SOC

COMP1_PB_IN_SOC

COMP1_Y_IN_SOC

COMP1_Y_IN_SOC_SOY

COMP1_PR_IN_SOC
COMP2_PB_IN_SOC

COMP2_Y_IN_SOC

COMP2_Y_IN_SOC_SOY

COMP2_PR_IN_SOC

+3.3V_NORMAL

DTV/MNT_V_OUT

ADC_I_INN

ADC_I_INP

Tuner IF Filter

HP_OUT
L400

BLM18PG121SN1D

HP_LOUT_AMP

XIN_SUB

XOUT_SUB

R453 330

XOUT_SUB

XTAL_SEL[0]
XTAL_SEL[1]

SOC_RESET

OPM[0]
OPM[1]

H13A_SCL

H13A_SDA

AV1_CVBS_IN_SOC

SC_CVBS_IN_SOC

TU_CVBS_SOC

Placed as close as possible to SOC

REFT
REFB

To ADC

HP_OUT
C407

0.22uF
10V

R450

C439

OPT

100pF
50V

C440 0.047uF
C441 0.047uF
C442 0.047uF

MM1756DURE

VCC

6

PS

5

OUT

4

NON_TU_W_BR/TW

R443

51

NON_TU_W_BR/TW

NON_TU_W_BR/TW

R444

51

HP_LOUT

C443 0.047uF

68

IC400

1

2

3

TU_W_BR/TW

R443-*1

220

0.01uF

C436
22pF

0.01uF

Placed as close as possible to IC100

BLM18PG121SN1D

HP_ROUT_AMP

Place at JACK SIDE

OP MODE Setting
& Select XTAL Input

OP MODE[0:1] : SW[2:1]
00 => Normal Operaiton Mode
/T32 Debug Mode
01 => Internal Test Purpose
10 => Internal Test Purpose
11 => Internal Test Purpose

XTAL SEL[1:0] : SW[4:3]
00 => Xtal Input
01 => CLK 24M from H13D
10 => XTAL Bypass from H13D

IC101

IN

GND

BIAS

C437

C438

P17
P18
J17

N18
D18
M18
M17

E3

K3
K2

A8
B8

U13
V14
V15
V13

U15
U14

U7
V6

V7
U10
V12

T5

T6

U8

V8

V9

U9
V10
U11
V11
U12

EU

4.7uF

C413

TU_W_BR/TW

L406

OPT

HP_OUT

L401

XIN_SUB
XO_SUB
VSB_AUX_XIN

XTAL_BYPASS
CLK_24M
XTAL_SEL0
XTAL_SEL1

PORES_N

OPM0
OPM1

H13A_SCL
H13A_SDA

CVBS_IN3
CVBS_IN2
CVBS_IN1
CVBS_VCM

BUF_OUT1
BUF_OUT2

REFT
REFB
ADC1_COM
ADC2_COM
ADC3_COM
SC1_SID
SC1_FB
PB1_IN
Y1_IN
SOY1_IN
PR1_IN
PB2_IN
Y2_IN
SOY2_IN
PR2_IN

EU

C412

0.1uF

EU

R444-*1

LG1154AN_H13A

C414

EU

DTV/MNT_V_OUT_SOC

220

HP_OUT
C409

0.22uF
10V

0.1uF

TU_W_BR/TW

C436-*1
100pF

IF_N

IF_P

HP_ROUT

H13A_NON_BRAZIL

AAD_ADC_SIF

AAD_ADC_SIFM

AUDA_VBG_EXT

AUDA_OUTL

AUDA_OUTR
AUD_SCART_OUTL
AUD_SCART_OUTR

AUAD_L_CH4_IN
AUAD_R_CH4_IN
AUAD_L_CH3_IN
AUAD_R_CH3_IN
AUAD_L_CH2_IN
AUAD_R_CH2_IN
AUAD_L_CH1_IN
AUAD_R_CH1_IN

AUAD_R_REF
AUAD_M_REF
AUAD_L_REF

AUAD_REF_PO

ADC_I_INCOM

ADC_I_INP

ADC_I_INN

10K

10K

OPT

OPT

R481

R482

100

R459

100

R460

100

R461

100

R462

H18

C450 0.1uF

H17

C451 0.1uF

10uFC452

C453 2.2uF

P2

ANTCON

RFAGC
IFAGC

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8

GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15

N1
N2
N3
P1

P3
R1
R2
T1
U2
U3
V2
V3
U1
T3
T2
R3

K17
K18
J18

U16
U17
V17

F3
F2
F1
G3
G2
G1
H3
H2
H1
J3
E18
E17
H16
J2
J1
K1

AUDA_OUTL
AUDA_OUTR

EU

EU

AUAD_L_CH3_IN
AUAD_R_CH3_IN

AUAD_L_CH2_IN

AUAD_R_CH2_IN

AUAD_R_REF

AUAD_M_REF
AUAD_L_REF

AUAD_REF_PO

C454 0.1uF

R479100
R480100

ADC_I_INP
ADC_I_INN

HW_OPT_0
HW_OPT_1

HW_OPT_2
HW_OPT_3
HW_OPT_4
HW_OPT_5

HW_OPT_6
HW_OPT_7
HW_OPT_8
HW_OPT_9

HW_OPT_10

MHL_ON_OFF

SC_FB_BUF

Placed as close as possible to IC4300

AUAD_REF_PO

AUAD_L_REF

AUAD_R_REF

AUAD_M_REF

C447

OPT
1uF

25V

OPT

R45421/10W

AFE 3CH REF Setting

Placed as close as possible to IC4300

C444

0.1uF
C446

0.1uF

C445

0.1uF

DIMMING

PWM_DIM2

PWM_DIM

R490

R489

+3.3V_NORMAL

10K

10K

OPT

OPT

R483

R484

C457

1000pF

OPT

R426

22K

R442

22K

EU

EU

Close to IC4300

NON_TU_W_BR/TW/CO

R487

0

+2.5V_Normal

1%

R45 5

51K

C4494.7uF

R45 647K 1%

5%

C448

OPT

4.7uF
10V

REFT

Must be used

REFB

100

100

EU

C458 0.01uF

1%
R45 7
51K

1%
R45 8
47K

C460 0.01uF

OPM[0]
OPM[1]
XTAL_SEL[0]
XTAL_SEL[1]

TUNER_SIF

SCART_Lout_SOC

SCART_Rout_SOC

EU

IF_AGC

C459

0.1uF

TU_W_BR/TW/CO

TU_W_BR/TW/CO

R487-*1

10K

L407

C455

10uF

C456

4.7uF
10V

PWM1

PWM2

LG1154AN_H13A

L/DIM0_VS

L/DIM0_SCLK
L/DIM0_MOSI

IC101

INTR_GBB

INTR_AFE3CH

INTR_AGPIO

AUD_FS20CLK
AUD_FS21CLK
AUD_FS23CLK
AUD_FS24CLK
AUD_FS25CLK

AUDCLK_OUT_SUB

AUD_HDMI_MCLK

AUD_DAC1_LRCK

AUD_DAC1_SCK
AUD_DAC1_LRCH
AUD_DAC0_LRCK

AUD_DAC0_SCK
AUD_DAC0_LRCH

AUD_ADC_LRCK

AUD_ADC_SCK

AUD_ADC_LRCH

BB_SCL

BB_SDA
BB_TP_CLK
BB_TP_ERR
BB_TP_SOP
BB_TP_VAL

BB_TP_DATA7
BB_TP_DATA6
BB_TP_DATA5
BB_TP_DATA4
BB_TP_DATA3
BB_TP_DATA2
BB_TP_DATA1
BB_TP_DATA0

CLK_F54M
CVBS_GC2
CVBS_GC1
CVBS_GC0

CVBS_UP
CVBS_DN

FS00CLK

AUDCLK_OUT

DAC_START
DAC_DATA4
DAC_DATA3
DAC_DATA2
DAC_DATA1
DAC_DATA0

AAD_GC4
AAD_GC3
AAD_GC2
AAD_GC1
AAD_GC0

AAD_DATA9
AAD_DATA8
AAD_DATA7
AAD_DATA6
AAD_DATA5
AAD_DATA4
AAD_DATA3
AAD_DATA2
AAD_DATA1
AAD_DATA0

AAD_DATAEN

ADCO_OUT_CLK

HSR_AP0
HSR_AM0
HSR_BP0
HSR_BM0
HSR_CP0

HSR_CM0
HSR_CLKP0
HSR_CLKM0

HSR_DP0

HSR_DM0

HSR_EP0

HSR_EM0

R402 33
R405 33
R400 33

H13A_NON_BRAZIL

E1
E2
D1

A6
B6
A5
B5
A4
C4

C18

A2
B2
B1
C2
C1
D2
B4
A3
B3

A7
B7
E8
D8
C8
E7
D7
C7
E6
D6
C6
E5
D5
C5

CLK_54M_VTT

1/16W1%

B10
C9
B9
A9
D9
E9

Close to LG1154A

B11

R492 330

A11

R407 330

D11
C11
E10
D10
C10
A10

R451 330

D13
C13
E12
D12
C12

C17
E16
D16
C16
E15
D15
C15
E14
D14
C14
E13

B18

A12
B12
A13
B13
A14
B14
A15
B15
A16
B16
A17
B17

PWM1
PWM2

BPL_IN

R467 82

AT16
AU17
AT17

AT24
AU24
AT23
AU23
AT22

AU36

AT20
AU20
AT19
AU19
AT18
AU18
AU22
AT21
AU21

AT25
AU25
AP23
AR23
AP22
AR22
AP21
AR21
AP20
AR20
AP19
AR19
AP18
AR18

AU28
AR24
AU27
AT27
AP24
AR25

AU29

DAC_START_PULLDOWN

AT29

AP27
AR27
AP26
AR26
AP25
AT28

AR30
AP29
AR29
AP28
AR28

AP35
AR35
AP34
AR34
AP33
AR33
AP32
AR32
AP31
AR31
AP30

AT36

AT30
AU30
AT31
AU31
AT32
AU32
AT33
AU33
AT34
AU34
AT35
AU35

AT14
AT15
AU15

NC

AR14
AP14
AN14
AP13

LG1154DLG1154A

INTR_GBB
INTR_AFE3CH
INTR_AGPIO

AUD_FS20CLK
AUD_FS21CLK
AUD_FS23CLK
AUD_FS24CLK
AUD_FS25CLK

AUD_HDMI_MCLK

AUD_DAC1_LRCK
AUD_DAC1_SCK
AUD_DAC1_LRCH
AUD_DAC0_LRCK
AUD_DAC0_SCK
AUD_DAC0_LRCH
AUD_ADC_LRCK
AUD_ADC_SCK
AUD_ADC_LRCH

BB_SCL
BB_SDA
BB_TPI_CLK
BB_TPI_ERR
BB_TPI_SOP
BB_TPI_VAL
BB_TPI_DATA7
BB_TPI_DATA6
BB_TPI_DATA5
BB_TPI_DATA4
BB_TPI_DATA3
BB_TPI_DATA2
BB_TPI_DATA1
BB_TPI_DATA0

CLK_54M
CVBS_GC2
CVBS_GC1
CVBS_GC0
CVBS_UP
CVBS_DN

FS00CLK
H13A_AUDCLK_OUT

DAC_START
DAC_DATA4
DAC_DATA3
DAC_DATA2
DAC_DATA1
DAC_DATA0

AAD_GC4
AAD_GC3
AAD_GC2
AAD_GC1
AAD_GC0

AAD_DATA9
AAD_DATA8
AAD_DATA7
AAD_DATA6
AAD_DATA5
AAD_DATA4
AAD_DATA3
AAD_DATA2
AAD_DATA1
AAD_DATA0
AAD_DATAEN

ADCO_OUT_CLK

HSR_AP
HSR_AM
HSR_BP
HSR_BM
HSR_CP
HSR_CM
HSR_CLKP
HSR_CLKM
HSR_DP
HSR_DM
HSR_EP
HSR_EM

AUD_HPDRV_LRCH
AUD_HPDRV_LRCK
AUD_HPDRV_SCK

AC7

FRC_LR_O_SYNC_FLAG

AN5

L_VSOUT_LD
DIM0_SCLK
DIM0_MOSI
DIM1_SCLK
DIM1_MOSI

AF6

PWM0

AF7

PWM1

AD7

PWM2

AE6

PWM_IN

AP5

EPI_EO

AN8

EPI_VST

AP8

EPI_DPM

AR7

EPI_MCLK

AN7

EPI_GCLK

IC100

LG1154D_H13D

STPI0_CLK/GPIO47
STPI0_SOP/GPIO46
STPI0_VAL/GPIO45
STPI0_ERR/GPIO44

STPI0_DATA/GPIO43

STPI1_CLK/GPIO42
STPI1_SOP/GPIO41
STPI1_VAL/GPIO40
STPI1_ERR/GPIO55

STPI1_DATA/GPIO54

TPIO_DATA0/GPIO58
TPIO_DATA1/GPIO59
TPIO_DATA2/GPIO60
TPIO_DATA3/GPIO61
TPIO_DATA4/GPIO62
TPIO_DATA5/GPIO63
TPIO_DATA6/GPIO48
TPIO_DATA7/GPIO49

DACSLRCH/GPIO127
PCMI3SCK/GPIO112

PCMI3LRCK/GPIO113

DACCLFCH/GPIO126

TP_DVB_CLK
TP_DVB_SOP
TP_DVB_VAL

TP_DVB_ERR
TP_DVB_DATA0
TP_DVB_DATA1
TP_DVB_DATA2
TP_DVB_DATA3
TP_DVB_DATA4
TP_DVB_DATA5
TP_DVB_DATA6
TP_DVB_DATA7

TPI_CLK
TPI_SOP
TPI_VAL

TPI_ERR
TPI_DATA0
TPI_DATA1
TPI_DATA2
TPI_DATA3
TPI_DATA4
TPI_DATA5
TPI_DATA6
TPI_DATA7

TPIO_CLK/GPIO53
TPIO_SOP/GPIO52
TPIO_VAL/GPIO51
TPIO_ERR/GPIO50

AUDCLK_OUT

DACLRCH

DACSCK

DACLRCK

PCMI3LRCH

IEC958OUT

DACSUBMCLK
DACSUBLRCH

DACSUBSCK

DACSUBLRCK

TEST1
TEST2

TX0N
TX0P
TX1N
TX1P
TX2N
TX2P
TX3N
TX3P
TX4N
TX4P
TX5N
TX5P
TX6N
TX6P
TX7N
TX7P
TX8N
TX8P
TX9N

TX9P
TX10N
TX10P
TX11N
TX11P
TX12N
TX12P

TX13N
TX13P
TX14N
TX14P
TX15N
TX15P
TX16N
TX16P
TX17N
TX17P
TX18N
TX18P
TX19N
TX19P
TX20N
TX20P
TX21N
TX21P
TX22N
TX22P
TX23N
TX23P

TX_LOCKN

AK35
AK36
AK37
AJ35
AJ36
AH35
AH37
AH36
AG35
AG36

AM36
AL36
AL35
AL37
AM35
AN36
AN37
AN35
AP37
AP36
AR37
AR36

A28
B29
B28
C28
B32
C31
B31
A31
C30
A30
B30
C29

D30
D31
F30
E31
E30
F29
E29
F28
E28
D28
E27
D27

AD5
AD6
Y6
Y7
AC6
AC5
AA6
AB7
AB5
AU14
AA32
AA34
AA33
AB34
AE32
AE33

AT6
AU6
AT5
AU5
AT4
AU4
AU3
AU2
AT2
AT1
AR4
AR3
AP1
AP2
AP4
AP3
AN4
AN3
AM4
AM3
AL4
AL3
AK1
AK2
AK4
AK3

AJ4
AJ3
AH4
AH3
AG4
AG3
AF1
AF2
AF4
AF3
AE4
AE3
AD4
AD3
AC4
AC3
AB1
AB2
AB4
AB3
AA4
AA3

AR5

FE_DEMOD2_TS_CLK
FE_DEMOD2_TS_SYNC
FE_DEMOD2_TS_VAL
FE_DEMOD2_TS_ERROR
FE_DEMOD2_TS_DATA

D13_STPO_CLK
D13_STPO_SOP
D13_STPO_VAL
D13_STPO_ERR
D13_STPO_DATA

FE_DEMOD1_TS_CLK
FE_DEMOD1_TS_SYNC
FE_DEMOD1_TS_VAL
FE_DEMOD1_TS_ERROR

FE_DEMOD1_TS_DATA[0]
FE_DEMOD1_TS_DATA[1]
FE_DEMOD1_TS_DATA[2]
FE_DEMOD1_TS_DATA[3]
FE_DEMOD1_TS_DATA[4]
FE_DEMOD1_TS_DATA[5]
FE_DEMOD1_TS_DATA[6]
FE_DEMOD1_TS_DATA[7]

TPI_CLK
TPI_SOP
TPI_VAL
TPI_ERR

TPI_DATA[0]
TPI_DATA[1]
TPI_DATA[2]
TPI_DATA[3]
TPI_DATA[4]
TPI_DATA[5]
TPI_DATA[6]
TPI_DATA[7]

TPO_CLK
TPO_SOP
TPO_VAL

TPO_ERR
TPO_DATA[0]
TPO_DATA[1]
TPO_DATA[2]
TPO_DATA[3]
TPO_DATA[4]
TPO_DATA[5]
TPO_DATA[6]
TPO_DATA[7]

R495 100

R496 100
R452 100

R497 100
R498 100

FRC_DONE

URSA7_RESET

R49333
R49433

TXB4N/TX0N
TXB4P/TX0P
TXB3N/TX1N
TXB3P/TX1P
TXBCLKN/TX2N
TXBCLKP/TX2P
TXB2N/TX3N
TXB2P/TX3P
TXB1N/TX4N
TXB1P/TX4P
TXB0N/TX5N
TXB0P/TX5P
TXA4N/TX6N
TXA4P/TX6P
TXA3N/TX7N
TXA3P/TX7P
TXACLKN/TX8N
TXACLKP/TX8P
TXA2N/TX9N

TXA2P/TX9P
TXA1N/TX10N
TXA1P/TX10P
TXA0N/TX11N

TXA0P/TX11P

TXB2N

TXB2P

TXB1N

TXB1P

TXB0N

TXB0P

TXA4N

TXA4P

TXACLKN

TXACLKP

TXA1N

TXA1P
TXC4N

TXC4P
TXC3N
TXC3P

TXCCLKN
TXCCLKP
TXC2N
TXC2P
TXC1N
TXC1P
TXC0N
TXC0P

R4634.7K

TP402

C411
10pF
50V
OPT

TPI_ERRXIN_SUB

TPI_DATA[0-7]

TP400

+3.3V_NORMAL

H13 Ball Name

EPI Output
TXD4N/TX12N
TXD4P/TX12P

TXD3N/TX13N
TXD3P/TX13P
TXDCLKN/TX14N
TXDCLKP/TX14P
TXD2N/TX15N
TXD2P/TX15P
TXD1N/TX16N
TXD1P/TX16P
TXD0N/TX17N
TXD0P/TX17P

FE_DEMOD1_TS_DATA[0-7]

TPO_ERR

TPO_DATA[0-7]

AUD_MASTER_CLK
AUD_LRCH
AUD_LRCH1

AUD_SCK

AUD_LRCK

SPDIF_OUT

I2S_I/F

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BSD-NC4_H004-HD

2012-11-13

MAIN AUDIO/VIDEO

IC100

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

LG1154D_H13D

M0_DDR_A[10]
M0_DDR_A[11]
M0_DDR_A[12]
M0_DDR_A[13]
M0_DDR_A[14]
M0_DDR_A[15]

M0_DDR_BA[0]
M0_DDR_BA[1]
M0_DDR_BA[2]

M0_DDR_U_CLK

M0_DDR_U_CLKN

M0_DDR_D_CLK

M0_DDR_D_CLKN

M0_DDR_RESET_N

M0_DDR_ZQCAL

M0_DDR_DQS[0]

M0_DDR_DQS_N[0]

M0_DDR_DQS[1]

M0_DDR_DQS_N[1]

M0_DDR_DQS[2]

M0_DDR_DQS_N[2]

M0_DDR_DQS[3]

M0_DDR_DQS_N[3]

M0_DDR_DM[0]
M0_DDR_DM[1]
M0_DDR_DM[2]
M0_DDR_DM[3]

M0_DDR_DQ[0]
M0_DDR_DQ[1]
M0_DDR_DQ[2]
M0_DDR_DQ[3]
M0_DDR_DQ[4]
M0_DDR_DQ[5]
M0_DDR_DQ[6]
M0_DDR_DQ[7]
M0_DDR_DQ[8]

M0_DDR_DQ[9]
M0_DDR_DQ[10]
M0_DDR_DQ[11]
M0_DDR_DQ[12]
M0_DDR_DQ[13]
M0_DDR_DQ[14]
M0_DDR_DQ[15]
M0_DDR_DQ[16]
M0_DDR_DQ[17]
M0_DDR_DQ[18]
M0_DDR_DQ[19]
M0_DDR_DQ[20]
M0_DDR_DQ[21]
M0_DDR_DQ[22]
M0_DDR_DQ[23]
M0_DDR_DQ[24]
M0_DDR_DQ[25]
M0_DDR_DQ[26]
M0_DDR_DQ[27]
M0_DDR_DQ[28]
M0_DDR_DQ[29]
M0_DDR_DQ[30]
M0_DDR_DQ[31]

IC100

LG1154D_H13D

M1_DDR_U_CLKN

M1_DDR_D_CLKN

M1_DDR_RESET_N

M1_DDR_DQS[0]

M1_DDR_DQS_N[0]

M1_DDR_DQS[1]

M1_DDR_DQS_N[1]

M1_DDR_DQS[2]

M1_DDR_DQS_N[2]

M1_DDR_DQS[3]

M1_DDR_DQS_N[3]

M1_DDR_DQ[10]
M1_DDR_DQ[11]
M1_DDR_DQ[12]
M1_DDR_DQ[13]
M1_DDR_DQ[14]
M1_DDR_DQ[15]
M1_DDR_DQ[16]
M1_DDR_DQ[17]
M1_DDR_DQ[18]
M1_DDR_DQ[19]
M1_DDR_DQ[20]
M1_DDR_DQ[21]
M1_DDR_DQ[22]
M1_DDR_DQ[23]
M1_DDR_DQ[24]
M1_DDR_DQ[25]
M1_DDR_DQ[26]
M1_DDR_DQ[27]
M1_DDR_DQ[28]
M1_DDR_DQ[29]
M1_DDR_DQ[30]
M1_DDR_DQ[31]

M0_DDR_A[0]
M0_DDR_A[1]
M0_DDR_A[2]
M0_DDR_A[3]
M0_DDR_A[4]
M0_DDR_A[5]
M0_DDR_A[6]
M0_DDR_A[7]
M0_DDR_A[8]
M0_DDR_A[9]

M0_DDR_CKE

M0_DDR_ODT
M0_DDR_RASN
M0_DDR_CASN

M0_DDR_WEN

M1_DDR_A[0]

M1_DDR_A[1]

M1_DDR_A[2]

M1_DDR_A[3]

M1_DDR_A[4]

M1_DDR_A[5]

M1_DDR_A[6]

M1_DDR_A[7]

M1_DDR_A[8]

M1_DDR_A[9]

M1_DDR_A[10]
M1_DDR_A[11]
M1_DDR_A[12]
M1_DDR_A[13]
M1_DDR_A[14]
M1_DDR_A[15]

M1_DDR_BA[0]
M1_DDR_BA[1]
M1_DDR_BA[2]

M1_DDR_U_CLK

M1_DDR_D_CLK

M1_DDR_CKE

M1_DDR_ODT
M1_DDR_RASN
M1_DDR_CASN

M1_DDR_WEN

M1_DDR_ZQCAL

M1_DDR_DM[0]
M1_DDR_DM[1]
M1_DDR_DM[2]
M1_DDR_DM[3]

M1_DDR_DQ[0]
M1_DDR_DQ[1]
M1_DDR_DQ[2]
M1_DDR_DQ[3]
M1_DDR_DQ[4]
M1_DDR_DQ[5]
M1_DDR_DQ[6]
M1_DDR_DQ[7]
M1_DDR_DQ[8]
M1_DDR_DQ[9]

DDR_VTT

F15

M0_DDR_A0

F13

M0_DDR_A1

F17

M0_DDR_A2

F19

M0_DDR_A3

E10

M0_DDR_A4

E18

M0_DDR_A5

E11

M0_DDR_A6

F18

M0_DDR_A7

F11

M0_DDR_A8

F16

M0_DDR_A9

E9

M0_DDR_A10

E12

M0_DDR_A11

E13

M0_DDR_A12

E16

M0_DDR_A13

F12

M0_DDR_A14

F14

M0_DDR_A15

E19

M0_DDR_BA0

F10

M0_DDR_BA1

E15

M0_DDR_BA2

B10

M0_U_CLK

A10

M0_U_CLKN

A19

M0_D_CLK

B19

M0_D_CLKN

E14

M0_DDR_CKE

F21

M0_DDR_ODT

E21

M0_DDR_RASN

E20

M0_DDR_CASN

F20

M0_DDR_WEN

E17

M0_DDR_RESET_N

F9

B20
A20
C19
D19
A11
B11
C10
D10

D18
C20
D9
C11

D22
C15
C23
D16
B24
B15
D23
A15
C16
D21
D17
C22
C18
C21
C17
D20
C13
D7
D13
C6
D14
D6
C14
A5
C7
D12
D8
B13
C9
C12
C8
D11

R500

240

1%

M0_DDR_DQS0
M0_DDR_DQS_N0
M0_DDR_DQS1
M0_DDR_DQS_N1
M0_DDR_DQS2
M0_DDR_DQS_N2
M0_DDR_DQS3
M0_DDR_DQS_N3

M0_DDR_DM0
M0_DDR_DM1
M0_DDR_DM2
M0_DDR_DM3

M0_DDR_DQ0
M0_DDR_DQ1
M0_DDR_DQ2
M0_DDR_DQ3
M0_DDR_DQ4
M0_DDR_DQ5
M0_DDR_DQ6
M0_DDR_DQ7
M0_DDR_DQ8
M0_DDR_DQ9
M0_DDR_DQ10
M0_DDR_DQ11
M0_DDR_DQ12
M0_DDR_DQ13
M0_DDR_DQ14
M0_DDR_DQ15
M0_DDR_DQ16
M0_DDR_DQ17
M0_DDR_DQ18
M0_DDR_DQ19
M0_DDR_DQ20
M0_DDR_DQ21
M0_DDR_DQ22
M0_DDR_DQ23
M0_DDR_DQ24
M0_DDR_DQ25
M0_DDR_DQ26
M0_DDR_DQ27
M0_DDR_DQ28
M0_DDR_DQ29
M0_DDR_DQ30
M0_DDR_DQ31

N6

M1_DDR_A0

R6

M1_DDR_A1

L6

M1_DDR_A2

J6

M1_DDR_A3

U5

M1_DDR_A4

J5

M1_DDR_A5

T5

M1_DDR_A6

K6

M1_DDR_A7

U6

M1_DDR_A8

M6

M1_DDR_A9

V5

M1_DDR_A10

R5

M1_DDR_A11

P5

M1_DDR_A12

L5

M1_DDR_A13

T6

M1_DDR_A14

P6

M1_DDR_A15

H5

M1_DDR_BA0

V6

M1_DDR_BA1

M5

M1_DDR_BA2

R2
R1
F1
F2
N5

G6
F5
G5
H6

K5

F6

E2
E1
F3
F4
P1
P2
R3
R4

G4
E3
T4
P3

C4
K3
B3
J4
A3
K2
B4
K1
J3
D4
H4
C3
G3
D3
H3
E4
M3
V4
M4
W3
L4
W4
L3
Y2
V3
N4
U4
M2
T3
N3
U3
P4

M1_U_CLK

M1_U_CLKN
M1_D_CLK
M1_D_CLKN
M1_DDR_CKE

M1_DDR_ODT

M1_DDR_RASN

M1_DDR_CASN

M1_DDR_WEN

M1_DDR_RESET_N

R501

240

1%

M1_DDR_DQS0
M1_DDR_DQS_N0
M1_DDR_DQS1
M1_DDR_DQS_N1
M1_DDR_DQS2
M1_DDR_DQS_N2
M1_DDR_DQS3
M1_DDR_DQS_N3

M1_DDR_DM0
M1_DDR_DM1
M1_DDR_DM2
M1_DDR_DM3

M1_DDR_DQ0
M1_DDR_DQ1
M1_DDR_DQ2
M1_DDR_DQ3
M1_DDR_DQ4
M1_DDR_DQ5
M1_DDR_DQ6
M1_DDR_DQ7
M1_DDR_DQ8
M1_DDR_DQ9
M1_DDR_DQ10
M1_DDR_DQ11
M1_DDR_DQ12
M1_DDR_DQ13
M1_DDR_DQ14
M1_DDR_DQ15
M1_DDR_DQ16
M1_DDR_DQ17
M1_DDR_DQ18
M1_DDR_DQ19
M1_DDR_DQ20
M1_DDR_DQ21
M1_DDR_DQ22
M1_DDR_DQ23
M1_DDR_DQ24
M1_DDR_DQ25
M1_DDR_DQ26
M1_DDR_DQ27
M1_DDR_DQ28
M1_DDR_DQ29
M1_DDR_DQ30
M1_DDR_DQ31

M0_DDR_A0
M0_DDR_A1
M0_DDR_A2
M0_DDR_A3
M0_DDR_A4
M0_DDR_A5
M0_DDR_A6
M0_DDR_A7
M0_DDR_A8

M0_DDR_A9
M0_DDR_A10
M0_DDR_A11
M0_DDR_A12
M0_DDR_A13
M0_DDR_A14
M0_DDR_A15

M0_DDR_BA0
M0_DDR_BA1
M0_DDR_BA2

M0_D_CLK

M0_D_CLKN
M0_DDR_CKE

M0_DDR_ODT

M0_DDR_RASN
M0_DDR_CASN

M0_DDR_WEN

M0_DDR_RESET_N

M0_DDR_DQS0

M0_DDR_DQS_N0

M0_DDR_DM0

M0_DDR_DQ0
M0_DDR_DQ1
M0_DDR_DQ2

M0_DDR_DQ3
M0_DDR_DQ4
M0_DDR_DQ5
M0_DDR_DQ6
M0_DDR_DQ7

VDDC15_M0

200

VDDC15_M0

R514

1K 1%

R515

1K 1%

VDDC15_M0

R516

1K 1%

R517

1K 1%

R520
10K

200

R519

R580

M0_DDR_VREFCA

C504

M0_DDR_VREFDQ

C505

M0_DDR_RESET_N

M0_D_CLK

M0_D_CLKN

M0_D_CLK

M0_D_CLKN

0.1uF

0.1uF

M0_DDR_CKE

IC500

H5TQ4G83AFR-PBC

DDR3

K3

A0

4Gbit

L7

A1

L3

A2

K2

A3

L8

A4

L2

A5

M8

A6

M2

A7

N8

A8

M3

A9

H7

A10/AP

M7

A11

K7

A12/BC

N3

A13

N7

A14

J7

A15

J2

BA0

K8

BA1

J3

BA2

F7

CK

G7

CK

G9

CKE

H2

CS

G1

ODT

F3

RAS

G3

CAS

H3

WE

N2

RESET

C3

DQS

D3

DQS

B7

DM/TDQS

A7

NF/TDQS

B3

DQ0

C7

DQ1

C2

DQ2

C8

DQ3

E3

DQ4

E8

DQ5

D2

DQ6

E7

DQ7

A3

NC_1

F1

NC_2

F9

NC_3

H1

NC_4

H9

NC_5

M0_U_CLK

200

R535

M0_U_CLKN

M0_U_CLK

200

R581

M0_U_CLKN

VDDC15_M0

M0_1_DDR_VREFCA

R536

1K 1%

R537

1K 1%

C512

VDDC15_M0

M0_1_DDR_VREFDQ

R538

1K 1%

R539

1K 1%

C513

0.1uF

0.1uF

VREFCA

VREFDQ

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4

VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5

R541
10K

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9

M0_DDR_VREFCA

M0_DDR_VREFDQ

J8

E1

VDDC15_M0

R558

H8

ZQ

240

1%
A2
A9
D7
G2
G8
K1
K9
M1
M9

B9
C1
E2
E9

A1
A8
B1
D8
F2
F8
J1
J9
L1
L9
N1
N9

B2
B8
C9
D1
D9

VDDC15_M0

VDDC15_M0

R550

R551

1K 1%

R552

R553

1K 1%

C559
C560

M0_DDR_VREFCA_T

1K 1%

C550

M0_DDR_VREFDQ_T

1K 1%

C551

0.1uF

0.1uF

0.1uF

0.1uF

M0_DDR_A0
M0_DDR_A1
M0_DDR_A2
M0_DDR_A3
M0_DDR_A4
M0_DDR_A5
M0_DDR_A6
M0_DDR_A7
M0_DDR_A8

M0_DDR_A9
M0_DDR_A10
M0_DDR_A11
M0_DDR_A12
M0_DDR_A13
M0_DDR_A14
M0_DDR_A15

M0_DDR_BA0
M0_DDR_BA1
M0_DDR_BA2

M0_D_CLK

M0_D_CLKN
M0_DDR_CKE

M0_DDR_ODT

M0_DDR_RASN
M0_DDR_CASN

M0_DDR_WEN

M0_DDR_RESET_N

M0_DDR_DQS1

M0_DDR_DQS_N1

M0_DDR_DM1

M0_DDR_DQ8

M0_DDR_DQ9
M0_DDR_DQ10
M0_DDR_DQ11
M0_DDR_DQ12
M0_DDR_DQ13
M0_DDR_DQ14
M0_DDR_DQ15

VDDC15_M0

R554

1K 1%

R555

1K 1%

VDDC15_M0

R556

1K 1%

R557

1K 1%

M0_1_DDR_VREFCA_T

0.1uF

C552

M0_1_DDR_VREFDQ_T

0.1uF

C553

IC502

H5TQ4G83AFR-PBC

DDR3

K3

A0

4Gbit

L7

A1

L3

A2

K2

A3

L8

A4

L2

A5

M8

A6

M2

A7

N8

A8

M3

A9

H7

A10/AP

M7

A11

K7

A12/BC

N3

A13

N7

A14

J7

A15

J2

BA0

K8

BA1

J3

BA2

F7

CK

G7

CK

G9

CKE

H2

CS

G1

ODT

F3

RAS

G3

CAS

H3

WE

N2

RESET

C3

DQS

D3

DQS

B7

DM/TDQS

A7

NF/TDQS

B3

DQ0

C7

DQ1

C2

DQ2

C8

DQ3

E3

DQ4

E8

DQ5

D2

DQ6

E7

DQ7

A3

NC_1

F1

NC_2

F9

NC_3

H1

NC_4

H9

NC_5

VDDC15_M1

R521
10K

M1_D_CLK

100

R518

M1_D_CLKN

VDDC15_M1

M1_DDR_VREFCA

R510

1K 1%

R511

1K 1%

C500

VDDC15_M1

M1_DDR_VREFDQ

R512

1K 1%

R513

1K 1%

C501

VREFCA

VREFDQ

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4

VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5

M1_DDR_RESET_N

0.1uF

0.1uF

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9

J8

E1

H8

ZQ

A2
A9
D7
G2
G8
K1
K9
M1
M9

B9
C1
E2
E9

A1
A8
B1
D8
F2
F8
J1
J9
L1
L9
N1
N9

B2
B8
C9
D1
D9

M1_DDR_CKE

M0_1_DDR_VREFCA

R560

240
1%

100

R530

M1_U_CLK

M1_U_CLKN

VDDC15_M1

R531

R532

VDDC15_M1

R533

R534

M0_1_DDR_VREFDQ

R540
10K

M1_1_DDR_VREFCA

1K 1%

0.1uF

1K 1%

C508

M1_1_DDR_VREFDQ

1K 1%

0.1uF

1K 1%

C509

VDDC15_M0

M0_DDR_A0
M0_DDR_A1
M0_DDR_A2
M0_DDR_A3
M0_DDR_A4
M0_DDR_A5
M0_DDR_A6
M0_DDR_A7
M0_DDR_A8

M0_DDR_A9
M0_DDR_A10
M0_DDR_A11
M0_DDR_A12
M0_DDR_A13
M0_DDR_A14
M0_DDR_A15

M0_DDR_BA0

M0_DDR_BA1

M0_DDR_BA2

M0_U_CLK

0.1uF

C583
C574

0.1uF

M0_U_CLKN

M0_DDR_CKE

M0_DDR_ODT

M0_DDR_RASN
M0_DDR_CASN

M0_DDR_WEN

M0_DDR_RESET_N

M0_DDR_DQS2

M0_DDR_DQS_N2

M0_DDR_DM2

M0_DDR_DQ16
M0_DDR_DQ17
M0_DDR_DQ18
M0_DDR_DQ19
M0_DDR_DQ20
M0_DDR_DQ21
M0_DDR_DQ22
M0_DDR_DQ23

M1_DDR_DQS0

M1_DDR_DQS_N0

M1_DDR_DQS1

M1_DDR_DQS_N1

M1_DDR_DM0
M1_DDR_DM1

M1_DDR_A0
M1_DDR_A1
M1_DDR_A2
M1_DDR_A3
M1_DDR_A4
M1_DDR_A5
M1_DDR_A6
M1_DDR_A7
M1_DDR_A8

M1_DDR_A9
M1_DDR_A10
M1_DDR_A11
M1_DDR_A12
M1_DDR_A13
M1_DDR_A14
M1_DDR_A15

M1_DDR_BA0
M1_DDR_BA1
M1_DDR_BA2

M1_D_CLK

M1_D_CLKN
M1_DDR_CKE

M1_DDR_ODT

M1_DDR_RASN
M1_DDR_CASN

M1_DDR_WEN

M1_DDR_RESET_N

M1_DDR_DQ0
M1_DDR_DQ1
M1_DDR_DQ2
M1_DDR_DQ3
M1_DDR_DQ4
M1_DDR_DQ5
M1_DDR_DQ6
M1_DDR_DQ7

M1_DDR_DQ8
M1_DDR_DQ9

M1_DDR_DQ10
M1_DDR_DQ11
M1_DDR_DQ12
M1_DDR_DQ13
M1_DDR_DQ14
M1_DDR_DQ15

IC504

H5TQ4G83AFR-PBC

DDR3

K3

4Gbit

A0

L7

A1

L3

A2

K2

A3

L8

A4

L2

A5

M8

A6

M2

A7

N8

A8

M3

A9

H7

A10/AP

M7

A11

K7

A12/BC

N3

A13

N7

A14

J7

A15

J2

BA0

K8

BA1

J3

BA2

F7

CK

G7

CK

G9

CKE

H2

CS

G1

ODT

F3

RAS

G3

CAS

H3

WE

N2

RESET

C3

DQS

D3

DQS

B7

DM/TDQS

A7

NF/TDQS

B3

DQ0

C7

DQ1

C2

DQ2

C8

DQ3

E3

DQ4

E8

DQ5

D2

DQ6

E7

DQ7

A3

NC_1

F1

NC_2

F9

NC_3

H1

NC_4

H9

NC_5

DDR_SAMSUNG

K4B4G1646B-HCK0

N3

DDR3

A0

P7

4Gbit

A1

P3

(x16)

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

IC501

VREFCA

VREFDQ

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5

ZQ

VREFCA

VREFDQ

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9

NC_1
NC_2
NC_3
NC_4

J8

E1

H8

A2
A9
D7
G2
G8
K1
K9
M1
M9

B9
C1
E2
E9

A1
A8
B1
D8
F2
F8
J1
J9
L1
L9
N1
N9

B2
B8
C9
D1
D9

ZQ

M0_DDR_VREFCA_T

R559

240
1%

M1_DDR_VREFCA

M8

H1

L8

VDDC15_M1

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

J1
J9
L1
L9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

M0_DDR_VREFDQ_T

VDDC15_M0

C568
C569

M1_DDR_VREFDQ

R543

C529

0.1uF

C530

0.1uF

* DDR_VTT

VDDC15_M0

C502
10uF

DDR_VTT

CIS21J121

C503
10uF

AR8

AR7

56

56

M0_DDR_A0
M0_DDR_A1
M0_DDR_A2
M0_DDR_A3
M0_DDR_A4
M0_DDR_A5
M0_DDR_A6
M0_DDR_A7
M0_DDR_A8

M0_DDR_A9
M0_DDR_A10
M0_DDR_A11
M0_DDR_A12
M0_DDR_A13
M0_DDR_A14
M0_DDR_A15

M0_DDR_BA0
M0_DDR_BA1
M0_DDR_BA2

0.1uF

0.1uF

M0_DDR_CKE

M0_DDR_ODT

M0_DDR_RASN
M0_DDR_CASN

M0_DDR_WEN

M0_DDR_RESET_N

240

DDR_HYNIX

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

M2
N8
M3

J7
K7
K9

L2
K1
J3
K3
L3

T2

F3
G3

C7
B7

E7
D3

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

IC501-*1

H5TQ4G63AFR-PBC

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

BA0
BA1
BA2

CK
CK
CKE

CS
ODT
RAS
CAS
WE

RESET

DQSL
DQSL

DQSU
DQSU

DML
DMU

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

M0_U_CLKN

M8

VREFCA

H1

VREFDQ

L8

ZQ

B2

VDD_1

D9

VDD_2

G7

VDD_3

K2

VDD_4

K8

VDD_5

N1

VDD_6

N9

VDD_7

R1

VDD_8

R9

VDD_9

A1

VDDQ_1

A8

VDDQ_2

C1

VDDQ_3

C9

VDDQ_4

D2

VDDQ_5

E9

VDDQ_6

F1

VDDQ_7

H2

VDDQ_8

H9

VDDQ_9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4

A9

VSS_1

B3

VSS_2

E1

VSS_3

G8

VSS_4

J2

VSS_5

J8

VSS_6

M1

VSS_7

M9

VSS_8

P1

VSS_9

P9

VSS_10

T1

VSS_11

T9

VSS_12

B1

VSSQ_1

B9

VSSQ_2

D1

VSSQ_3

D8

VSSQ_4

E2

VSSQ_5

E8

VSSQ_6

F9

VSSQ_7

G1

VSSQ_8

G9

VSSQ_9

DDR3 1.5V bypass Cap - Place these caps near Memory

REFIN

VLDOIN

VOSNS

PGND

VO

IC506

TPS51200DRCR

1

2

3

4

5

THERMAL

R546

1%

10K

C510

R549

10K

1000pF

1%

C511
10uF

L500

C507

C506

10uF

10uF

AR9

AR10

56

56

M0_U_CLK

M0_DDR_DQS3

M0_DDR_DQS_N3

M0_DDR_DQ24
M0_DDR_DQ25
M0_DDR_DQ26
M0_DDR_DQ27
M0_DDR_DQ28
M0_DDR_DQ29
M0_DDR_DQ30
M0_DDR_DQ31

Real USE : 1Gbit

H5TQ1G63DFR-PBC(x16)

1Gbit : T7(NC_6)

4Gbit : T7(A14)

M1_DDR_RESET_N

[EP]

VIN

10

PGOOD

11

9

GND

8

EN

7

REFOUT

6

AR11
56

M0_DDR_DM3

M1_DDR_A0
M1_DDR_A1
M1_DDR_A2
M1_DDR_A3
M1_DDR_A4
M1_DDR_A5
M1_DDR_A6
M1_DDR_A7
M1_DDR_A8

M1_DDR_A9
M1_DDR_A10
M1_DDR_A11
M1_DDR_A12
M1_DDR_A13
M1_DDR_A14
M1_DDR_A15

M1_DDR_BA0
M1_DDR_BA1
M1_DDR_BA2

M1_U_CLK

M1_U_CLKN
M1_DDR_CKE

M1_DDR_ODT

M1_DDR_RASN
M1_DDR_CASN

M1_DDR_WEN

M1_DDR_DQS2

M1_DDR_DQS_N2

M1_DDR_DQS3

M1_DDR_DQS_N3

M1_DDR_DM2
M1_DDR_DM3

M1_DDR_DQ16
M1_DDR_DQ17
M1_DDR_DQ18
M1_DDR_DQ19
M1_DDR_DQ20
M1_DDR_DQ21
M1_DDR_DQ22
M1_DDR_DQ23

M1_DDR_DQ24
M1_DDR_DQ25
M1_DDR_DQ26
M1_DDR_DQ27
M1_DDR_DQ28
M1_DDR_DQ29
M1_DDR_DQ30
M1_DDR_DQ31

+3.3V_NORMAL

L501

CIS21J121

C514

0.1uF

C515
4700pF

AR12
56

R3104
56

H5TQ4G83AFR-PBC

K3

A0

L7

A1

L3

A2

K2

A3

L8

A4

L2

A5

M8

A6

M2

A7

N8

A8

M3

A9

H7

A10/AP

M7

A11

K7

A12/BC

N3

A13

N7

A14

J7

A15

J2

BA0

K8

BA1

J3

BA2

F7

CK

G7

CK

G9

CKE

H2

CS

G1

ODT

F3

RAS

G3

CAS

H3

WE

N2

RESET

C3

DQS

D3

DQS

B7

DM/TDQS

A7

NF/TDQS

B3

DQ0

C7

DQ1

C2

DQ2

C8

DQ3

E3

DQ4

E8

DQ5

D2

DQ6

E7

DQ7

A3

NC_1

F1

NC_2

F9

NC_3

H1

NC_4

H9

NC_5

DDR_SAMSUNG

IC503

K4B4G1646B-HCK0

N3

DDR3

A0

P7

4Gbit

A1

P3

(x16)

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

DDR_VTT

IC505

DDR3
4Gbit

VREFCA

VREFDQ

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9

M0_1_DDR_VREFCA_T

VDDC15_M1

R561

240
1%

M1_1_DDR_VREFDQ

R545

C561
C562

C519

0.1uF
16V

M0_1_DDR_VREFDQ_T

VDDC15_M0

0.1uF

C572

0.1uF

C577

DDR_HYNIX

IC503-*1

H5TQ4G63AFR-PBC

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

0.1uF

0.1uF

240

DDR3 1.5V bypass Cap - Place these caps near Memory

C521

C522

C520

0.1uF

0.1uF

0.1uF
16V

16V

16V

M8

VREFCA

H1

VREFDQ

L8

ZQ

B2

VDD_1

D9

VDD_2

G7

VDD_3

K2

VDD_4

K8

VDD_5

N1

VDD_6

N9

VDD_7

R1

VDD_8

R9

VDD_9

A1

VDDQ_1

A8

VDDQ_2

C1

VDDQ_3

C9

VDDQ_4

D2

VDDQ_5

E9

VDDQ_6

F1

VDDQ_7

H2

VDDQ_8

H9

VDDQ_9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4

A9

VSS_1

B3

VSS_2

E1

VSS_3

G8

VSS_4

J2

VSS_5

J8

VSS_6

M1

VSS_7

M9

VSS_8

P1

VSS_9

P9

VSS_10

T1

VSS_11

T9

VSS_12

B1

VSSQ_1

B9

VSSQ_2

D1

VSSQ_3

D8

VSSQ_4

E2

VSSQ_5

E8

VSSQ_6

F9

VSSQ_7

G1

VSSQ_8

G9

VSSQ_9

J8

VREFCA

E1

VREFDQ

H8

ZQ

A2

VDD_1

A9

VDD_2

D7

VDD_3

G2

VDD_4

G8

VDD_5

K1

VDD_6

K9

VDD_7

M1

VDD_8

M9

VDD_9

B9

VDDQ_1

C1

VDDQ_2

E2

VDDQ_3

E9

VDDQ_4

A1

VSS_1

A8

VSS_2

B1

VSS_3

D8

VSS_4

F2

VSS_5

F8

VSS_6

J1

VSS_7

J9

VSS_8

L1

VSS_9

L9

VSS_10

N1

VSS_11

N9

VSS_12

B2

VSSQ_1

B8

VSSQ_2

C9

VSSQ_3

D1

VSSQ_4

D9

VSSQ_5

M1_1_DDR_VREFCA

M8

H1

L8

ZQ

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

Close to REFOUT pin

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BSD-NC4_H005-HD

2012-09-14

MAIN DDR

PCM_RESET

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

/PCM_WAIT

PCM_INPACK

/PCM_IORD
/PCM_IOWR

R701
R702

R700

CI_IN_TS_DATA[0-7]

R704

10K
OPT

CI

33

CI

33

OPT

33

+5V_CI_ON

R706
10K

OPT

+5V_CI_ON

R707

10K

OPT

CI_VS1

PCM_INPACK

/PCM_CE2

10K

R709

CI

10K

R708

OPT

C702

0.1uF
CI

/CI_CD1
CI_TS_DATA[3]
CI_TS_DATA[4]
CI_TS_DATA[5]
CI_TS_DATA[6]
CI_TS_DATA[7]

/PCM_CE2

CI_VS1

CI_IN_TS_DATA[0]
CI_IN_TS_DATA[1]
CI_IN_TS_DATA[2]
CI_IN_TS_DATA[3]

CI_IN_TS_DATA[4]
CI_IN_TS_DATA[5]
CI_IN_TS_DATA[6]
CI_IN_TS_DATA[7]

CI_TS_CLK

/PCM_REG

CI_TS_VAL

CI_TS_SYNC
CI_TS_DATA[0]
CI_TS_DATA[1]
CI_TS_DATA[2]

/CI_CD2

C703

4.7uF
10V

CI

R710

R711
10K
OPT

+5V_CI_ON

CI_ADDR[11]
CI_ADDR[9]

CI_ADDR[13]

R722 33

C707

0.1uF

16V

CI_ADDR[12]

CI_ADDR[7]
CI_ADDR[6]
CI_ADDR[5]

CI_ADDR[4]

CI_ADDR[3]

CI_ADDR[2]
CI_ADDR[1]
CI_ADDR[0]

CI_DATA[0-7]

OPT

+5V_CI_ON

CI_ADDR[10]

CI_ADDR[11]
CI_ADDR[9]
CI_ADDR[8]
CI_ADDR[13]
CI_ADDR[14]

CI_ADDR[12]
CI_ADDR[7]
CI_ADDR[6]
CI_ADDR[5]
CI_ADDR[4]
CI_ADDR[3]
CI_ADDR[2]
CI_ADDR[1]
CI_ADDR[0]

/PCM_CE1

+5V_CI_ON

R724

10K

OPT

+5V_CI_ON

R723

10K

CI
CI_DATA[0]
CI_DATA[1]

/PCM_OE

R725

10K

OPT

CI

/PCM_WE
/PCM_IRQA

CI_DATA[0-7]

CI_DATA[2]
CI_DATA[3]

CI_DATA[0-7]

CI_DATA[4]
CI_DATA[5]
CI_DATA[6]
CI_DATA[7]

AR712

33

CI

AR713

33

EB_DATA[0]
EB_DATA[1]
EB_DATA[2]
EB_DATA[3]

EB_DATA[4]
EB_DATA[5]
EB_DATA[6]
EB_DATA[7]

EB_DATA[0-7]

EB_DATA[0-7]

R712
10K
OPT

100

R716

CI

0
OPT

0

R715

OPT

CI

R714 0

CI

R717 100

R713

0

OPT

CI

JK700

10120698-015LF

35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59

65
66
67
68

R720

R718

R719

10K

OPT

CI_DATA[3]
CI_DATA[4]
CI_DATA[5]
CI_DATA[6]
CI_DATA[7]

CI

R721 33

C706 0.1uF

0

OPT

10K

OPT

C705
12pF
50V
OPT

CI

CI_DATA[0]
CI_DATA[1]
CI_DATA[2]

CI_IN_TS_VAL
CI_IN_TS_CLK

CI_IN_TS_SYNC

CI_ADDR[10]

CI_ADDR[8]

CI_ADDR[14]

CI

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
2660
2761
2862
2963
3064
31
32
33
34

G1G2

69

TPO_DATA[0-7]

/CI_CD2

/CI_CD1

TPO_CLK
TPO_SOP
TPO_VAL

R703

+5V_NORMAL

10K

R705

CI
C700

0.1uF
16V

TPO_DATA[0]
TPO_DATA[1]
TPO_DATA[2]
TPO_DATA[3]
TPO_DATA[4]
TPO_DATA[5]
TPO_DATA[6]
TPO_DATA[7]

10K

CI
C701

0.1uF
16V

PCM_INPACK

CI_TS_CLK

CI_TS_VAL

CI_TS_SYNC

CI_TS_DATA[7]

CI_TS_DATA[6]

CI_TS_DATA[5]

CI_TS_DATA[4]

/PCM_WAIT
/PCM_IRQA

CI

AR701

33

AR706

CI

AR705

33

AR702

100

AR703

CI

100

AR704

CI

100

CI
33

CI_IN_TS_DATA[0]
CI_IN_TS_DATA[1]
CI_IN_TS_DATA[2]
CI_IN_TS_DATA[3]
CI_IN_TS_DATA[4]
CI_IN_TS_DATA[5]
CI_IN_TS_DATA[6]
CI_IN_TS_DATA[7]

CI_IN_TS_CLK
CI_IN_TS_SYNC
CI_IN_TS_VAL

CAM_WAIT_N
CAM_IREQ_N

CAM_CD2_N
CAM_CD1_N

CAM_INPACK_N

TPI_VAL
TPI_SOP

TPI_DATA[7]
TPI_DATA[6]
TPI_DATA[5]
TPI_DATA[4]

C704
12pF
50V
OPT

TPI_CLK

CI_ADDR[0]
CI_ADDR[1]
CI_ADDR[2]
CI_ADDR[3]

CI_ADDR[4]
CI_ADDR[5]
CI_ADDR[6]
CI_ADDR[7]

CI_ADDR[8]

CI_ADDR[9]
CI_ADDR[10]
CI_ADDR[11]

CI

AR707

33

CI

AR708

33

CI

AR709

33

EB_ADDR[0]
EB_ADDR[1]
EB_ADDR[2]
EB_ADDR[3]

EB_ADDR[4]
EB_ADDR[5]
EB_ADDR[6]
EB_ADDR[7]

EB_ADDR[8]
EB_ADDR[9]
EB_ADDR[10]
EB_ADDR[11]

CI_ADDR[12]
CI_ADDR[13]
CI_ADDR[14]

/PCM_REG

/PCM_OE
/PCM_WE

/PCM_IORD
/PCM_IOWR

CI

AR711

33

CI

AR710

33

EB_ADDR[12]
EB_ADDR[13]
EB_ADDR[14]
CAM_REG_N

EB_OE_N
EB_WE_N
EB_BE_N1
EB_BE_N0

CI_TS_DATA[3]
CI_TS_DATA[2]
CI_TS_DATA[1]
CI_TS_DATA[0]

AR700

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

CI

100

TPI_DATA[3]
TPI_DATA[2]
TPI_DATA[1]
TPI_DATA[0]

BSD-NC4_H007-HD

2012-10-20

PCMCIA

RL_ON

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

+3.5V_ST

+12V

C2306

0.1uF
50V

L/DIM0_MOSI

+3.5V_ST

R2300
10K

L2304

UBW2012-121F

C2307

0.1uF
16V

UBW2012-121F

L2303

10K

R2301

2

1

Q2300 MMBT3906(NXP)

3

P2300

SMAW200-H18S1

POWER_WAFER_18PIN

PWR ON

1

1

3.5V
3

3

3.5V
5

5

GND

7

7

24V

9

9

GND

11

11

12V

13

13

12V

15

15

GND

17

17
19
21 22
23 24

POWER_WAFER_24PIN

2

2
4

4
6

6
8

8

10

10
12

12
14

14
16

16
18

18
20

19

25

P2301
SMAW200-H24S2

INV ON
PDIM#1
PDIM#2
GND
24V
GND
12V
24V
GND

PWM_DIM
PWM_DIM2

R2309
100

L2306

UBW2012-121F

C2316

0.1uF
50V

+3.3V_NORMAL

R2310
1K

INV_CTL

+24V

L/DIM0_VS
L/DIM0_SCLK

+12V

L2313

UBW2012-121F

PANEL_CTL

PANEL_POWER

C2331

0.1uF
50V

C2333

33K

5.6K

C

E

10uF

16V

Q2301
MMBT3904(NXP)

R2314

10K

R2317

R2318

B

Q2302

AO3407A

S

Power_DET

+12V

PANEL_VCC

D

G

R2346

R2347

5.6K

5.6K

LVDS_DISCHARGE

LVDS_DISCHARGE

C2347

0.1uF
50V

PD_UHD_24V

R2327-*2

9.1K
1%

PD_UHD_24V
R2328-*2

1.6K
1%

PD_+12V

R2325

2.7K
1%

PD_+12V
R2326

1.2K
1%

PD_20V
R2327-*1

5.6K

1%

PD_20V
R2328-*1

1.3K
1%

+24V

+3.5V_ST

PD_24V

R2327

8.2K
1%

PD_24V

R2328

1.5K
1%

PD_+3.5V
R2330
0
5%

C2355

0.1uF
16V

C2356

0.1uF
16V

PD_20_24V

R2337
100K

IC2307

NCP803SN293

ONSEMI

VCC

3

1

GND

PD_20_24V

R2336
100K

PD_20_24V_ONSEMI

IC2308

NCP803SN293

VCC

3

1

GND

2

2

RESET

RESET

DIODES
IC2307-*1
APX803D29

VCC2RESET

3

1

GND

PD_20_24V_DIODES

IC2308-*1
APX803D29

VCC2RESET

3

1

GND

+3.5V_ST

R2338
10K
OPT

ST_3.5V-->3.5V

POWER_DET

C2365

0.1uF
16V

not to RESET at 8kV ESD

24V-->3.48V
20V-->3.51V
12V-->3.58V

eMMC POWER

+3.3V_NORMAL

+12V

Switching freq: 700K

+12V

Switching freq: 700K

L2302
BLM18PG121SN1D

L2300
BLM18PG121SN1D

C2301
10uF
16V

L2305
BLM18PG121SN1D

C2304
10uF
16V

3.3V_EMMC

C2305

C2300

0.1uF
22uF

16V

10V

+1.0V_VDD

R2304

1%

R2302

R2306

R2

10K

11K

C2310
1uF
10V

C2312
3300pF
50V

33K

1%

POWER_ON/OFF2_3

R1

C2308
100pF

50V

DCDC_TI

Vout=0.765*(1+R1/R2)

+3.3V_NORMAL

R2311

POWER_ON/OFF1

R1

C2325
100pF

50V

OPT

10K

1% C2332

R2308

51K

R2319

15K

R2

C2326
1uF
10V

1%

Vout=0.765*(1+R1/R2)

DCDC_TI

TPS54327DDAR

EN

VFB

VREG5

SS

EN

VFB

VREG5

SS

C2328
3300pF
50V

IC2300

1

9

2

THERMAL

3

4

3A

IC2301

TPS54327DDAR

1

9

2

THERMAL

3

4

3A

8

7

6

5

[EP]GND

VIN

VBST

SW

GND

8

7

6

5

LG1154A

[EP]GND

VIN

VBST

SW

GND

0.1uF
C2314

0.1uF

16V

16V

NR5040T2R2N
L2307

2.2uH

L2309

3.6uH

SM-8040

C2339

22uF

10V

+1.0V_VDD

C2317
22uF
10V

+3.3V_NORMAL

C2319
22uF
10V

C2340
22uF
10V

2.5V

ZD2300

EN

FB

PVCC

SS

5V

ZD2301

DCDC_RT

IC2300-*1

RT7266ZSP

1

2

3

4

ESD

THERMAL

+2.5V

OPT

C2343
22uF
10V

+1.1V_VDD

C2366

22uF
10V

+2.5V_Normal

C2341

22uF

10V

C2346

C2348

0.1uF

10uF

16V

10V

C2323
22uF
10V

OPT

POWER_ON/OFF2_2

5V

ZD2302

ZD2304

5V
OPT

DDR MAIN 1.5V

10K

R2331

C2354

EP[GND]

1

THERMAL

2

IC2305

3

TPS54319TRE

4

3A

5

AGND

3A

17

6

VSENSE

0.1uF
16V

DCDC_TI

7

COMP

BOOT14PWRGD15EN16VIN_3

13

12

11

10

9

8

RT/CLK

1/16W 5%

$ 0.145

PH_3

PH_2

PH_1

SS/TR

R2334
15K

+3.5V_ST

L2318

C2350
10uF
10V

VIN_1

VIN_2

GND_1

GND_2

Vout=0.827*(1+R1/R2)=1.521V

+5.0V normal & USB

IC2304

RT8289GSP

C2324

0.01uF
50V

BOOT

1

NC_1

2

FB

R2344

51K

C2329
150pF
50V

3

4

1%

THERMAL

5A

R1

+24V

L2311
BLM18PG121SN1D

C2309
10uF
35V

C2311

0.1uF
50V

NC_2

R2

1%

R2343

16K

Vout=1.222*(1+R1/R2)

9

C2358

0.1uF

16V

R2335

C2359

0.01uF
50V

330K1/16W 5%

4700pF

8

7

6

5

NR5040T3R3N

C2360

50V

[EP]GND

SW

VIN

GND

EN

POWER_ON/OFF2_2

L2320

3.3uH

C2361
22uF
10V

D2300

40V

B540C

C2362
22uF
10V

L2312

4.7uH

R1

R2

L2310

4.7uH

+1.5V_DDR

R2340
56K

1/16W

1%

R2339

LG1154D

47K 1%

C2330
22uF
10V

C2335

0.1uF
16V

DCDC_TI
C2364
100pF
50V

VIN_1

VIN_2

GND_1

GND_2

C2334
22uF
10V

1

2

3

4

5V

ZD2303

THERMAL

DCDC_RT

5

AGND

R2345

10K

ESD

BOOT14PGOOD15EN16VIN_317[EP]GND

13

12

11
IC2305-*1
RT8079AGQW

10

9

6FB7

8

COMP

RT/SYNC

+5V_NORMAL

C2336
10uF
10V

POWER_ON/OFF1

SW_3

SW_2

SW_1

SS/TR

C2338

0.1uF
50V

IC2302

[EP]

IN

1

PG

2

VCC

3

1.5A

EN

4

9

THERMAL

OUT

8

FB

7

SS

6

GND

5

C2337
2200pF
50V

R2321
2K
1%

R2322

4.3K
1%

R2

R1

POWER_ON/OFF2_1

+3.3V_NORMAL

+5V_NORMAL

R2312
10K

AP7173-SPG-13 HF(DIODES)

C2327
10uF
10V

Vout=0.8*(1+R1/R2)

+1.23V_CORE

IC2303

C2313

4.7uF
16V

RT/CLK

GND_1

GND_2

PVIN_1

PVIN_2

VSENSE

VIN

TPS54821RHL

1

2

3

4

5

6

8A

7

+12V

L2301

C2302
180pF
50V

+1.1V_VDD

R2303

16K

R2305

15K

1/16W

1/16W

R1

1%

R2

1%

[EP]GND

VIN

8

BOOT

9

7

SW

6

GND

5

C2303
10uF
16V

R2307
120K

1/16W
1%

Vout(1.24V)=0.6*(1+16k/15k)

Vout=0.6*(1+R1/R2)

POWER UP SEQUENCE

5V/3.3V->2.5V->1.5V/1.1V->1.0V

LG1154D : 3.3V->2.5V->1.5V->1.1V
LG1154AN : 3.3V->2.5V->1.0V

15

THERMAL

[EP]GND

PWRGD

14

C2318

BOOT

13

0.1uF
16V

PH_2

12

PH_1

11

EN

10

SS/TR

9

COMP

8

1.3K
R2313

C2315

4700pF 50V

L2308

2.2uH

C2322
22uF
10V

R2316 1K

C2321

22000pF 50V

C2320

47pF 50V

1/16W

5%

R2315 0

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

LG1154

POWER

BSD-NC4_H023-HD

2012-12-07

Renesas MICOM

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

For Debug

+3.5V_ST

MICOM_DEBUG

P3000

12507WS-04L

1

2

3

4

5

GP4 High/MID Power SEQUENCE

POWER_ON/OFF!

POWER_ON/OFF2_1

POWER_ON/OFF2_2

POWER_ON/OFF2_3

POWER_ON/OFF2_4

SOC_RESET

Don’t remove R3014,
not making float P40

R3016 1K

R3014 10K

MICOM_DEBUG

MICOM_DEBUG

MICOM_RESET

EYE_SDA

EYE_SCL

EYE_Q

+3.5V_ST

R3020

3.3K

CAM_PWR_ON_CMD

CAM_PWR_ON_CMD

R3022

3.3K

EYE_Q

I2C_SCL_MICOM

I2C_SDA_MICOM

MODEL1_OPT_1

PANEL_CTL

WOL/WIFI_POWER_ON

HDMI_CEC

POWER_ON/OFF2_2

POWER_ON/OFF2_3

HDMI_WAUP:HDMI_INIT

MHL_DET

+3.5V_ST

R3021

10K

P60/SCLA0
P61/SDAA0

P31/TI03/TO03/INTP4

IR

P75/KR5/INTP9/SCK01/SCL01

P74/KR4/INTP8/SI01/SDA01

P73/KR3/SO01
P72/KR2/SO21

P71/KR1/SI21/SDA21

P70/KR0/SCK21/SCL21

P30/INTP3/RTC1HZ/SCK11/SCL11

+3.5V_ST

MHL_DET

C3000

0.1uF

P62
P63

R3032

+3.5V_ST

MOVING_SPK

R3001 4.7K

1
2
3
4
5
6
7
8
9
10
11
12

10K

MOVING_SPK

R3002 4.7K

VDD

48

13

GND

VSS

47

14

C3001

REGC

46

15

8pF

C3003 8pF

C3002

X3000

32.768KHz
R3028

DOOR_OPEN_DET

DOOR_CLOSE_DET

4.7M
OPT

22

22

R3009

R3010

MOVING_SPK

MOVING_SPK

0.47uF

P124/XT2/EXCLKS

P123/XT1

P137/INTP0

P122/X2/EXCLK

P121/X1

41

42

43

44

45

IC3000

R5F100GEAFB

MICOM_LEAD_Au

16

17

18

19

20

MICOM_DEBUG

LOGO_LIGHT

MICOM_RESET

R3029 22

MICOM_RESET_22OHM

P41/TI07/TO07

P40/TOOL0

RESET

38

39

40

21

22

23

LOGO_LIGHT

+3.5V_ST

10K

R3030

C3004

0.1uF

OPT

270K

R3031

16V

ST_BY_DET_CAM

P120/ANI19

37

P140/PCLBUZ0/INTP6

36

P00/TI00/TXD1

35

P01/TO00/RXD1

34

P130

33

P20/ANI0/AVREFP

32

P21/ANI1/AVREFM

31

P22/ANI2

30

P23/ANI3

29

P24/ANI4

28

P25/ANI5

27

P26/ANI6

26

P27/ANI7

25

24

MICOM_RESET_SW

SW3000

JTP-1127WEM

12

4 3

ST_BY_DET_CAM

MICOM_RESET_33OHM

R3029-*1 33



+3.5V_ST

R3005 4.7K

R3006 4.7K

R3004 4.7K

R3007 4.7K

MOVING_SPK

MOVING_SPK

MOVING_SPK

MOVING_SPK

SCART_MUTE



MOVING_SPK

R3015 22

MOVING_SPK

R3017 22

MOVING_SPK

R3018 22

MOVING_SPK

R3019 22

LED_R

POWER_ON/OFF2_1

KEY2

KEY1

MOTOR_CTRL_A

MOTOR_CTRL_B

MODEL1_OPT_0

SIDE_HP_MUTE

MOTOR_CTRL_C

MOTOR_CTRL_D

SCART_MUTE

LED_R

MICOM MODEL OPTION

+3.5V_ST

R3013 10K

R3000 10K

NON_MOVING_SPK

MICOM_LOGO_LIGHT

MOVING_SPK

R3012 10K

R3003 10K

MICOM_NON_LOGO_LIGHT

MODEL1_OPT_0

MODEL1_OPT_1

P60/SCLA0
P61/SDAA0

P31/TI03/TO03/INTP4

P75/KR5/INTP9/SCK01/SCL01

P74/KR4/INTP8/SI01/SDA01

P73/KR3/SO01
P72/KR2/SO21

P71/KR1/SI21/SDA21

P70/KR0/SCK21/SCL21

P30/INTP3/RTC1HZ/SCK11/SCL11

1
2

P62

3

P63

4
5
6
7
8
9
10
11
12

P50/INTP1/SI11/SDA11

P123/XT1

P137/INTP0

P122/X2/EXCLK

P121/X1

REGC47VSS48VDD

42

43

44

45

46

IC3000-*1

R5F100GEAFB#30

MICOM_LEAD_Cu

13

14

15

16

17

18

19

20

P17/TI02/TO02

P13/TXD2/SO20

P51/INTP2/SO11

P16/TI01/TO01/INTP5

P14/RXD2/SI20/SDA20

P12/SO00/TXD0/TOOLTXD

P15/PCLBUZ1/SCK20/SCL20

P120/ANI19

P41/TI07/TO07

P40/TOOL0

RESET41P124/XT2/EXCLKS

37

38

39

40

21

P11/SI00/RXD0/TOOLRXD/SDA00

P140/PCLBUZ0/INTP6

36

P00/TI00/TXD1

35

P01/TO00/RXD1

34

P130

33

P20/ANI0/AVREFP

32

P21/ANI1/AVREFM

31

P22/ANI2

30

P23/ANI3

29

P24/ANI4

28

P25/ANI5

27

P26/ANI6

26

P27/ANI7

25

22

23

24

P146

P147/ANI18

P10/SCK00/SCL00

P17/TI02/TO02

P51/INTP2/SO11

P50/INTP1/SI11/SDA11

P16/TI01/TO01/INTP5

P13/TXD2/SO20

P14/RXD2/SI20/SDA20

P12/SO00/TXD0/TOOLTXD

P15/PCLBUZ1/SCK20/SCL20

P11/SI00/RXD0/TOOLRXD/SDA00

SOC_TX

INV_CTL

POWER_DET

WOL/ETH_POWER_ON

WOL_CTL

POWER_ON/OFF1

SOC_RESET

P146

P147/ANI18

P10/SCK00/SCL00

RL_ON

SOC_RX

AMP_MUTE

CAM_CTL

CAM_CTL

CEC_REMOTE

D3000

BAT54_SUZHO

D

R3033
27K

G

Q3001-*1
SI1012CR-T1-GE3

S

HDMI_CEC_FET_VISHAY

For CEC

+3.5V_ST

G

D

S

Q3001
RUE003N02

HDMI_CEC_FET_ROHM

R3034

120K

HDMI_CEC

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

MICOM

2012.02.22

30

DOOR MOTOR Sheet option : MOVING_SPK

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

MOTOR_CTRL_C

MOTOR_CTRL_D

MOTOR_CTRL_A

MOTOR_CTRL_B

MOVING_SPK

IC3101

KID65003AF

I1

1

I2

2

I3

3

I4

4

I5

5

I6

6

I7

7

GND

8

MOVING_SPK

IC3100

KID65003AF

I1

1

I2

2

I3

3

I4

4

I5

5

I6

6

I7

7

GND

8

MOVING_SPK

P3100

+12V

SMAW200-H16S2

L3100

C3102

0.1uF

CIS21J121

10

12

14

16

12V

2

12V

4

CTRL_D

6

CTRL_B

8

GND

C3105

0.1uF

C3106

0.1uF

GND

GND

SPK_L+

H_SPK_L+H_SPK_L-

DOOR_CLOSE_DET

O1

16

O2

15

O3

14

O4

13

O5

12

O6

11

O7

10

COMMON

9

C3101

0.1uF

+12V

DOOR_OPEN_DET

C3104

C3103

0.1uF

0.1uF

H_SPK_R-

H_SPK_R+

CLOSE_DET

OPEN_DET

CTRL_C

CTRL_A

GND

SPK_R-

SPK_R+

SPK_L-

1

3

5

7

9

11

13

15

17

GND

O1

16

O2

15

O3

14

O4

13

O5

12

O6

11

O7

10

COMMON

9

C3100

0.1uF

+12V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

GP4

Motor 31

BODY_SHIELD

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

20

HDMI_FREEPORT

EAG62611204

HP_DET

19

5V

18

GND

17

DDC_DATA

16

DDC_CLK

15

ARC

14

CE_REMOTE

13

CK-

12

CK_GND

11

CK+

10

D0-

9

D0_GND

8

D0+

7

D1-

6

D1_GND

5

D1+

4

D2-

3

D2_GND

2

D2+

1

JK3202

51U019S-312HFN-E-R-B-LG

BODY_SHIELD

20

JK3200

19

18

17

16

15

14

13

12

11
10

9

8

7

6

5

4

3

2

1

HP_DET

5V

GND

DDC_DATA

DDC_CLK

NC

CE_REMOTE

CK-

CK_GND

CK+

D0-

D0_GND

D0+

D1-

D1_GND

D1+

D2-

D2_GND

D2+

HDMI_FREEPORT

EAG62611204

51U019S-312HFN-E-R-B-LG

VA3206

ESD_HDMI

5V_HDMI_2

TMDS_DATA2+

TMDS_DATA2_SHIELD

TMDS_DATA2-

TMDS_DATA1+

TMDS_DATA1_SHIELD

TMDS_DATA1-

TMDS_DATA0+

TMDS_DATA0_SHIELD

TMDS_DATA0-

TMDS_CLK+

TMDS_CLK_SHIELD

TMDS_CLK-

RESERVED

DDC/CEC_GND

VDD[+5V]

HOT_PLUG_DETECT

VA3209
ESD_HDMI

CEC_REMOTE

HDMI_FOOSUNG

JK3200-*1
DAADR019A

1

2

3

4

5

6

7

8

9

10

11

12

CEC

13

14

SCL

15

SDA

16

17

18

19

20

BODY_SHIELD

R3250

VA3208

ESD_HDMI

R3207 22

R3208

ESD_HDMI

VA3213

ESD_HDMI

CEC_REMOTE

VA3205

ESD_HDMI

33

HDMI_HPD_1

DDC_SDA_1

22

DDC_SCL_1

VA3207

R3248

OPT

R3249

OPT

D3210

RCLAMP0524PA

1

10

2

9
8

3

7

4

6

5

HDMI_ESD_SEMTEK

D3211

RCLAMP0524PA

1
2
3
4
5

HDMI_ESD_SEMTEK

HDMI1 With ARC

R3251
33

VA3203
ESD_HDMI

D3212

RCLAMP0524PA

1
2
3
4
5

HDMI_ESD_SEMTEK

D3213

RCLAMP0524PA

1
2
3
4
5

HDMI_ESD_SEMTEK

HDMI_FOOSUNG

JK3201-*1
DAADR019A

TMDS_DATA2+

1

TMDS_DATA2_SHIELD

2

TMDS_DATA2-

3

TMDS_DATA1+

4

TMDS_DATA1_SHIELD

5

TMDS_DATA1-

6

TMDS_DATA0+

7

TMDS_DATA0_SHIELD

8

TMDS_DATA0-

9

TMDS_CLK+

10

TMDS_CLK_SHIELD

11

TMDS_CLK-

12

CEC

13

RESERVED

14

SCL

15

SDA

16

DDC/CEC_GND

17

VDD[+5V]

18

HOT_PLUG_DETECT

19

20

BODY_SHIELD

1K

C3202
1uF

10V

3.9K

10
9
8
7
6

HDMI_HPD_2

R3209

R3210

10
9
8
7
6

10
9
8
7
6

HDMI2

TMDS_DATA2+

TMDS_DATA2_SHIELD

TMDS_DATA2-

TMDS_DATA1+

TMDS_DATA1_SHIELD

TMDS_DATA1-

TMDS_DATA0+

TMDS_DATA0_SHIELD

TMDS_DATA0-

TMDS_CLK+

TMDS_CLK_SHIELD

TMDS_CLK-

RESERVED

DDC/CEC_GND

VDD[+5V]

HOT_PLUG_DETECT

5V_HDMI_1

VA3215
ESD_HDMI

OPT

C3226

0.1uF
16V

22

22

VA3204
ESD_HDMI

HDMI_FOOSUNG

JK3202-*1
DAADR019A

1

2

3

4

5

6

7

8

9

10

11

12

CEC

13

14

SCL

15

SDA

16

17

18

19

20

ARC

SPDIF_OUT_ARC

CK-_HDMI1
CK+_HDMI1

D0-_HDMI1

D0+_HDMI1

D1-_HDMI1

D1+_HDMI1

D2-_HDMI1
D2+_HDMI1

DDC_SDA_2

DDC_SCL_2

CK-_HDMI2
CK+_HDMI2

D0-_HDMI2
D0+_HDMI2

D1-_HDMI2
D1+_HDMI2

D2-_HDMI2
D2+_HDMI2

BODY_SHIELD

HDMI_ESD_NXP

D3210-*1

IP4283CZ10-TBA

TMDS_CH1-

1

TMDS_CH1+

2

GND_1

3

TMDS_CH2-

4

TMDS_CH2+6NC_1

5

HDMI_ESD_NXP

D3211-*1

IP4283CZ10-TBA

TMDS_CH1-

1

TMDS_CH1+

2

GND_1

3

TMDS_CH2-

4

TMDS_CH2+6NC_1

5

HDMI_ESD_NXP

D3212-*1

IP4283CZ10-TBA

TMDS_CH1-

1

TMDS_CH1+

2

GND_1

3

TMDS_CH2-

4

TMDS_CH2+6NC_1

5

HDMI_ESD_NXP

D3213-*1

IP4283CZ10-TBA

TMDS_CH1-

1

TMDS_CH1+

2

GND_1

3

TMDS_CH2-

4

TMDS_CH2+6NC_1

5

BODY_SHIELD

HDMI_FREEPORT

NC_4

10

NC_3

9

EAG62611204

GND_2

8

NC_2

7

NC_4

10

NC_3

9

GND_2

8

NC_2

7

JK3201

51U019S-312HFN-E-R-B-LG

NC_4

10

NC_3

9

GND_2

8

NC_2

7

NC_4

10

NC_3

9

GND_2

8

NC_2

7

20

19

18

17

16

15

14

13

12

11
10

9

8

7

6

5

4

3

2

1

+5V_NORMAL

D3200

R3217

47K

+5V_NORMAL

D3201

R3218
47K

HP_DET

5V

GND

DDC_DATA

DDC_CLK

NC

CE_REMOTE

CK-

CK_GND

CK+

D0-

D0_GND

D0+

D1-

D1_GND

D1+

D2-

D2_GND

D2+

5V_HDMI_1

5V_HDMI_3

A2CA1

A2CA1

5V_HDMI_3

R3219
47K

D3205

R3220
47K

DDC_SDA_3

DDC_SCL_3

VA3214
ESD_HDMI

DDC_SDA_1

DDC_SCL_1

+3.5V_ST

CEC_REMOTE

HDMI_ESD_SEMTEK

HDMI_ESD_SEMTEK

HDMI3 With MHL

+5V_NORMAL

5V_HDMI_2

D3202

A2CA1

R3225

R3228
47K

47K

A2CA1

ESD_HDMI

VA3200

ESD_HDMI

D3209

RCLAMP0524PA

1

10

2

9
8

3

7

4

6

5

D3208

RCLAMP0524PA

1

10

2

9
8

3

7

4

6

5

DDC_SDA_2

DDC_SCL_2

R3252
33

VA3202

R3203

R3205

ESD_HDMI

+3.3V_NORMAL

22

22

VA3201

HDMI_HPD_3

DDC_SDA_3

DDC_SCL_3

CK-_HDMI3
CK+_HDMI3

D0-_HDMI3
D0+_HDMI3

D1-_HDMI3
D1+_HDMI3

D2-_HDMI3
D2+_HDMI3

D3207

+5V_NORMAL

R3204

10K

G

D

S
AO3438
Q3202

AZ1117BH-1.2TRE1

IN

3

5V_HDMI_3

C3205
10uF
10V

TMDS_CH1-

TMDS_CH1+

GND_1

TMDS_CH2-

TMDS_CH2+6NC_1

TMDS_CH1-

TMDS_CH1+

GND_1

TMDS_CH2-

TMDS_CH2+6NC_1

5.6V

IC3200

1

GND/ADJ

MBR230LSFT1G

R3215

HDMI_ESD_NXP

D3209-*1

IP4283CZ10-TBA

NC_4

1

10

NC_3

2

9

GND_2

3

8

NC_2

4

7

5

HDMI_ESD_NXP

D3208-*1

IP4283CZ10-TBA

NC_4

1

10

NC_3

2

9

GND_2

3

8

NC_2

4

7

5

R3243
1K

1/16W
5%

C3200
10uF
10V

OUT

2

100K

D3206

30V

C3223

0.047uF
25V

C3210

0.1uF

16V

OUT

GND

OC

B

Q3200
MMBT3904(NXP)

C3211

0.1uF

16V

R321211/16W

IC3202

TPS2051BDBVR

1

2

3

+3.5V_ST

R3246

10K

R3247
10K Q3201

C

E

HDMI2

CK-_HDMI2

CK+_HDMI2

D0-_HDMI2

D0+_HDMI2

D1-_HDMI2

D1+_HDMI2

D2-_HDMI2

D2+_HDMI2

HDMI3

CK-_HDMI3

CK+_HDMI3

D0-_HDMI3

D0+_HDMI3

D1-_HDMI3

D1+_HDMI3

D2-_HDMI3

D2+_HDMI3

5%

C3201
10uF
10V

C3204

0.1uF
16V

5

4

B

+5V_NORMAL

IN

EN

E

C

C3208

0.1uF

5%

220K

1/16W

MMBT3906(NXP)

C3206

C3207

0.1uF

0.1uF

16V

16V

OPT

R3254
100

1/16W
5%

1/16W

10K

R3245

R3206

MHL_DET

5%

C3203
10uF
10V

C

D3204

A1

A2

R1XCN
R1XCP
R1X0N
R1X0P
R1X1N
R1X1P
R1X2N
R1X2P

AVDD12_1

VDD12_1

R3XCN
R3XCP
R3X0N
R3X0P
R3X1N
R3X1P
R3X2N
R3X2P

AVDD12_2

VDD33_1

R4XCN
R4XCP

C3217

0.1uF
16V

MHL_ON_OFF

MHL_DET

HDMI1

[EP]GND

VDD33_2

88

1
2
3
4

D2+_HDMI1

R0X2P

AVDD12_3

86

87

THERMAL

89

D2-_HDMI1

R0X2N

85

D1+_HDMI1

R0X1N

R0X1P

83

84

D1-_HDMI1

D0+_HDMI1

R0X0N

R0X0P

82

D0-_HDMI1

CK+_HDMI1

R0XCP

80

81

5
6
7
8
9
10
11
12

IC3201

SII9587CNUC

FHD

13
14

Device Address : 0XB0

15
16
17
18
19
20
21
22

23

R4X0N24R4X0P25R4X1N26R4X1P27R4X2N28R4X2P

29

30

DSDA031DSCL0

VDD12_2

CK-_HDMI1

L3202

L3203

TCVDD12

TPVDD12

R0XCN

77

78

79

32

33

34

DSDA135DSCL1

R0PWR5V

CBUS_HPD0

HDMI S/W OUTPUT

HDMI_RX0+

HDMI_RX0-

HDMI_CLK-

HDMI_CLK+

TX1N

TX0P

TX0N

TXCP

TXCN

73

74

75

76

36

37

38

DSDA339DSCL3

R1PWR5V

CBUS_HPD1

HDMI_RX1+

HDMI_RX1-

HDMI_RX2-

TX2N

TX1P

70

71

72

40

41

R3PWR5V

CBUS_HPD3

HDMI_RX2+

VDD12_3

ARC69TX2P

67

68

42

44

DSDA443DSCL4

CBUS_HPD4

RSVDL

66

SPDIF_IN

65

INT

64

CSCL

63

CSDA

62

RESET_N

61

TPWR

60

GPIO1

59

GPIO0

58

CD-SENSE4

57

CD_SENSE3

56

GPIO2

55

CD_SENSE1

54

CD_SENSE0

53

WKUP

52

LPSBV

51

PWRMUX_OUT

50

SBVCC5

49

R5PWR5V[VGA]

48

DSCL5[VGA]

47

DSDA5[VGA]

46

R4PWR5V

45

C3224

0.1uF
16V

C3219

0.33uF

R0PWR5V

VDD12_368ARC69TX2P70TX2N71TX1P72TX1N73TX0P74TX0N75TXCP76TXCN77TCVDD1278TPVDD1279R0XCN80R0XCP81R0X0N82R0X0P83R0X1N84R0X1P85R0X2N86R0X2P87AVDD12_388VDD33_2

67

RSVDL

66

SPDIF_IN

65

INT

64

CSCL

63

CSDA

62

RESET_N

61

TPWR

60

GPIO1

59

GPIO0

58

CD-SENSE4

57

CD_SENSE3

56

GPIO2

55

CD_SENSE1

54

CD_SENSE0

53

WKUP

52

LPSBV

51

PWRMUX_OUT

50

SBVCC5

49

R5PWR5V[VGA]

48

DSCL5[VGA]

47

DSDA5[VGA]

46

R4PWR5V

33

DSDA135DSCL1

45

34

36

37

38

40

41

42

44

DSDA339DSCL3

DSDA443DSCL4

R1PWR5V

R3PWR5V

CBUS_HPD1

CBUS_HPD3

CBUS_HPD4

0.1uF

C3225

[EP]GND

UD

R1XCN

1

R1XCP

2

THERMAL

R1X0N

3

89

R1X0P

4

R1X1N

5

R1X1P

6

R1X2N

7

R1X2P

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

23

R4X0N24R4X0P25R4X1N26R4X1P27R4X2N28R4X2P

IC3201-*1

SII9587CNUC-3

29

30

32

DSDA031DSCL0

VDD12_2

CBUS_HPD0

AVDD12_1

VDD12_1

AVDD12_2

VDD33_1

R3XCN
R3XCP
R3X0N
R3X0P
R3X1N
R3X1P
R3X2N
R3X2P

R4XCN
R4XCP

16V

+3.3V_NORMAL

10K

R3202

R3211 33

R3236 33

R3237 33

R3214 33

+3.5V_ST

+5V_NORMAL

1/16W
R3213

5.1K
5%

R3216
10

C3209

16V

R3201
10

R3200

5.1K

16V

0.1uF

+5V_NORMAL

C3212

1uF
10V

C3215

0.1uF

16V

C3218
10uF
10V

HDMI_INT

I2C_SCL5

I2C_SDA5

HDMI_S/W_RESET

MHL_DET

10K

R3244

C3222
10uF
10V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Vout=0.8*(1+R1/R2)

D13_HDMI_TXCP

D13_HDMI_TXCN

D13_HDMI_TX0N

D13_HDMI_TX1N

D13_HDMI_TX0P

D13_HDMI_TX1P

From D13

DDC_SDA_1

D13_HDMI_TX2N

D13_HDMI_TX2P

DDC_SCL_1

HDMI_HPD_1

DDC_SDA_2

5V_HDMI_1

C3213

1uF

DDC_SCL_2

R3231
10

1/16W

HDMI_HPD_2

R3233

5.1K
5%

C3214

1uF

DDC_SDA_3

DDC_SCL_3

5V_HDMI_2

R3232
10

1/16W

R3234

5.1K
5%

HDMI_HPD_3

D13_HDMI_DDC_CK

D13_HDMI_DDC_DA

5V_HDMI_3

R3240
10

1/16W

C3220

R3241

5.1K

1uF

5%

D13_HDMI_HPD

GP4

HDMI 32

SPDIF OUT

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

SPDIF_OUT

R3400

+3.3V_NORMAL

33

C3402
47pF
50V

VA3400

5.5V

OPT

ADUC 5S 02 0R5L

C3400

0.1uF
16V

JK3401

JSTIB15

VIN

A

VCC

B

GND

C

Fiber Optic

4

SHIELD

HP_LOUT

HP_ROUT

R3404
150

1/10W
5%

R3405
150

1/10W
5%

HP_DET

HP_OUT

R3409
100

1/16W
5%

+3.3V_NORMAL

R3406

10K

HP_OUT

VA3405

5.6V

JACK_PARK

JK3403

PEJ038-3B6

5GND

4L

3DETECT

1R

EAG61030009

JACK_KSD

JK3403-*1

KJA-PH-0-0177

5GND

4L

3DETECT

1R

EAG61030001

COMPONENT 1 PHONE JACK

JACK_PARK

JK3400

PEJ038-4G6

5 M5_GND

4 M4

3 M3_DETECT

1 M1

6 M6

EAG61030012

JACK_KSD

JK3400-*1

KJA-PH-1-0177-2

5 M5_GND

4 M4

3 M3_DETECT

1 M1

6 M6

EAG61030007

VA3401

5.6V

+3.3V_NORMAL

R3402
10K

OPT

C3401
18pF

R3407
100

1/16W
5%

COMP1_DET

COMP1_Y

COMP1_Pb

COMP1_Pr

CVBS 1 PHONE JACK

JACK_PARK

JK3402

PEJ038-4Y6

5 M5_GND

4 M4

3 M3_DETECT

1 M1

6 M6

EAG61030011

JACK_KSD

JK3402-*1

KJA-PH-1-0177-1

5 M5_GND

4 M4

3 M3_DETECT

1 M1

6 M6

EAG61030006

VA3402

5.6V

VA3403

5.6V

VA3404

5.6V

+3.3V_NORMAL

R3403
330K

C3403

0.1uF
16V

for audio Hum noise (L)

OPT

C3405

0.01uF
25V

OPT

C3404

0.01uF
25V

R3408
100

1/16W
5%

AV1_CVBS_DET

COMP1/AV1/DVI_L_IN

COMP1/AV1/DVI_R_IN

AV1_CVBS_IN

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

JACK HIGH/MID

BSD-NC4_H034-HD

2012.10.09

Place Near Micom

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

LOGO_LIGHT

+3.5V_ST

10K

R4001

10K

LOGO_LIGHT

OPT

R4000

C4000

0.1uF
16V

LOGO_LIGHT

1K

R4002

LOGO_LIGHT

LOGO_LIGHT

B

Q4000
MMBT3904(NXP)

IR

LOGO_LIGHT

R4003 33

LOGO_LIGHT

R4004 33

C

E

R4005

10K
5%

+3.5V_ST

LOGO_LIGHT_WAFER

R4008

R4006
100

KEY1

R4007
100

KEY2

+3.5V_ST

10K

5%

R4009

10K
5%

C4001

0.1uF

C4002

0.1uF

AMOTECH CO., LTD.

+3.5V_ST

VA4000

5.6V

VA4001

5.6V

AMOTECH CO., LTD.

BLM18PG121SN1D

EYE_SCL

EYE_Q

EYE_SDA

EYE_Q

R4011
100

R4010
100

L4001

OPT

OPT

C4005
1000pF
50V

LOGO_LIGHT_WAFER

VA4004
ADMC 5M 02 200L

VA4003
ADMC 5M 02 200L

C4006
100pF

LED_R

NON_OLED

50V

VA4002

5.6V

R4015

11K

R4016

0

OPT

NON_OLED

AMOTECH CO., LTD.

55/65_NON_EYE_Q_8P

P4002

12507WR-08L

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

11

55/65_EYE_Q_10P

P4004

12507WR-10L

84_EYE_Q_10P

P4001

12507WR-10L

1

2

3

4

5

6

7

8

9

10

11

For 84" UD only

+3.5V_ST

LOGO_LIGHT_WAFER

LOGO_LIGHT

L4004

BLM18PG121SN1D

LOGO_LIGHT

R4017
0

LOGO_LIGHT

P4005

12507WR-03L

1

2

3

4

+3.5V_WOL

WIFI_DM

WIFI_DP

WOL/WIFI_POWER_ON

L4000

BLM18PG121SN1D

C4016
5pF
50V

120-ohm

C4015
5pF
50V

MAX 0.4A

C4004

22uF

10V

+3.5V_WOL

USB_DM
USB_DP

GND
WOL
GND

P4000

SMAW200-H12S2

.

3.3V
RTS
RX
TX
RESET
CTS

+3.3V_NORMAL

L4002

120-ohm

C4007

0.1uF

C4012
1000pF
50V

For EMI

C4008
47pF
50V

R4012
100

C4009
47pF
50V

OPT
C4013
47pF
50V

OPT
C4014
47pF
50V

For EMI

AR4000
100
1/16W

+3.3V_NORMAL

R4014

10K

M_REMOTE_RTS

M_REMOTE_RX

M_REMOTE_TX

M_RFModule_RESET

M_REMOTE_CTS

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

IR / KEY

BSD-NC4_H040-HD

2012.10.10

+3.3V_NORMAL

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

+3.3V_NORMAL

BLM18PG121SN1D

CAMERA

L4200

120-ohm

USB2_HUB_IC_IN_DM

USB2_HUB_IC_IN_DP

USB_DM3

USB_DP3

C4200

CAMERA

1uF
25V

C4201

0.1uF
CAMERA

CAMERA
C4202

4.7uF

CAMERA

C4203

0.1uF

CAMERA

R42040

CAMERA

R42050

USB_CAMERA_DM

USB_CAMERA_DP

CAMERA

CAMERA

R421910K

R421810K

CAMERA

R4216

R4215100K

PGANG

23

GND_2

X-TAL_2

100K

PSELF

22

21

20

19

18

17

16

15

14

AVDD_3

DVDD

OVCUR3

OVCUR4

TEST/SCL

RESET

DP4

DM4

C4207

22pF

CAMERA

+3.3V_NORMAL

CAMERA

C4208

0.1uF
R4217

10K

CAMERA

1/16W

5%

C4209

0.1uF

CAMERA

/RST_HUB

CAMERA POWER ENABLE CONTROL

+3.5V_ST

CAMERA

Q4201

PMV48XP

S

From HUB

USB_Camera

CAM_SLIDE_DET

+3.5V_CAM

C4213

4.7uF
CAMERA

+3.5V_CAM

D

5V

10V

ZD4200

CAM_PWR_ON_CMD

AUD_LRCH

OPT

AUD_LRCK

AUD_SCK

R4211
33

R4212
33

R4213
33

CAMERA

CAMERA

CAMERA

CAMERA

OPT

CAMERA

33pF
50V

33pF
50V

CAMERA

33pF
50V

C4211

C4215

33pF
50V

C4212

C4214

CAMERA

P4200

12507WR-12L

1

2

3

4

5

6

7

OPT

OVCUR2

OVCUR1

SDA

V33

[EP]GND

24

25

26

1

2

3

4

5

6

7

R4214

CAMERA

1%

C4205

0.1uF

CAMERA

CAMERA

27V528

THERMAL

29

GL852G-31

9

8

RREF

AVDD_2

680

X-TAL_1

GND_1

22pF

C4204

CAMERA

IC4200

10X111X212

X4200
12MHZ

1

2

CAMERA

DM313DP3

C4206

0.1uF
CAMERA

4

3

DM0

DP0

CAMERA

R42060

R42100

CAMERA

DM1

DP1

AVDD_1

DM2

DP2

USB2_HUB_IC_IN_DM

USB2_HUB_IC_IN_DP

NON_CAMERA

NON_CAMERA

NON_CAMERA

R42000

R42010

R42020

R42030

NON_CAMERA

USB_DM3

USB_DP3

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

CAM_CTL

R4207

3.3K

CAMERA

B

R4208
22K

CAMERA

R4209

2.2K
CAMERA

C

Q4200
MMBT3904(NXP)

E

C4210

4.7uF
10V

CAMERA

CAMERA

G

ST_BY_DET_CAM

USB_CAMERA_DP

USB_CAMERA_DM

R4220

10K

CAMERA

VA4201

VA4200

CAMERA

D4200

OPT

RCLAMP0502BA

CAMERA

8

9

10

11

12

13

BSD-NC4_H042-HD

USB3_HUB

2012.10.08

/USB_OCD1

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

USB_CTL1

+3.3V_NORMAL

R4500

10K

OPT

R4501

10K

+5V_NORMAL

C4500

0.1uF
16V

OCP USB1

IC4500

BD82020FVJ

GND

1

IN_1

2

IN_2

3

EN

4

+5V_USB_1

USB1 (3.0)

C4400

ZD4301

10uF

USB3_DM

USB3_DP

+5V_USB_1

OUT_3

8

OUT_2

7

OUT_1

6

OC

5

C4501

10uF

10V

USB3_RX0M

USB3_RX0P

USB3_TX0M

USB3_TX0P

D4400

RCLAMP0502BA

D4401

RCLAMP0502BA

RCLAMP0502BA

10V

D4402

5V

OPT

MAX 1.2A

STDA_SSRX-

STDA_SSRX+

GND_DRAIN

STDA_SSTX-

STDA_SSTX+

VBUS

GND

D-

D+

SHIELD

JK4400

SJ113262

1

2

3

4

5

6

7

8

9

10

C4302

0.1uF
16V

+5V_NORMAL

USB_CTL3

USB_CTL2

OCP USB2/3

IC4306

TPS2066CDGNR

GND

EN1

EN2

1

IN

2

3

4

9

THERMAL

8

7

6

5

[EP]GND

FLT1

OUT1

OUT2

FLT2

C4337

10uF

10V

C4301

10uF

10V

+3.3V_NORMAL

+5V_USB_3

+5V_USB_2

10K

R4301

10K

R4302

/USB_OCD3

/USB_OCD2

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

USB_DM2

USB_DP2

+5V_USB_2

C4322

10uF

10V

USB2 (2.0)

MAX 1.0A

ZD4300

5V

D4302

OPT

RCLAMP0502BA

3AU04S -30 5-ZC-(LG)

JK4302

1234

USB DO WN STREAM

5

+5V_USB_3

USB_DM3

USB_DP3

USB JACK

C4310

10uF

10V

ZD4302

5V

USB3 (2.0)
MAX 1.0A

D4300

RCLAMP0502BA

OPT

3AU04S -30 5-ZC-(LG)

JK4300

1234

USB DOWN STREAM

5

BSD-NC4_H044-HD

2012-11-09

Full Scart(18 Pin Gender)

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

VA4801

5.6V
EU

VA4807

VA4800
20V

EU

5.5V
EU

VA4808

5.5V
OPT

VA4802

5.6V

VA4803

5.5V
EU

VA4804

5.5V
EU

VA4805

5.5V
EU

19

DA1R018H91E

JK4800

EU

SHIELD

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

AV_DET

COM_GND

SYNC_IN

SYNC_OUT

SYNC_GND

RGB_IO

R_OUT

R_GND

G_OUT

G_GND

ID

B_OUT

AUDIO_L_IN

B_GND

AUDIO_GND

AUDIO_L_OUT

AUDIO_R_IN

AUDIO_R_OUT

+3.3V_NORMAL

EU
R4801

CLOSE TO JUNCTION

10K

EU
R4802

100

1/16W

EU

5%

C4804

0.1uF

SC_CVBS_IN

R480075

EU

EU

VA4809

5.6V
EU

SC_FB

SC_R

SC_G

SC_B

SC_L_IN

SC_DET

DTV/MNT_V_OUT

SC_ID

VA4806

5.6V
EU

BLM18PG121SN1D

EU

EU
C4800
1000pF
50V

BLM18PG121SN1D

EU

EU
C4801
1000pF
50V

L4800

L4801

C4802
4700pF

EU

C4803
4700pF

EU

SC_R_IN

DTV/MNT_L_OUT

DTV/MNT_R_OUT

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BSD-NC4_H048-HD

2012.10.31

SCART GENDER

Ethernet Block

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

LAN_JACK_POWER

JK5100

XRJH-01A-4-DA7-180-LG(B)

LAN_XML

P1[CT]

1

P2[TD+]

2

P3[TD-]

3

P4[RD+]

4

P5[RD-]

5

P6[CT]

6

P7

7

P8

8

P9

9

P10[GND]

10

P11

11

YL_C

D1

YL_A

D2

GN_C

D3

GN_A

D4

12

SHIELD

R5100
0

C5101

C5100

0.01uF

0.1uF
50V

16V

VA5100

5.5V

EMI

C5102

0.1uF
16V

VA5101

5.5V

C5103

0.01uF
50V

VA5102

5.5V

VA5103

5.5V

EPHY_TDP

EPHY_TDN

EPHY_RDP

EPHY_RDN

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

JK5100-*1
TLA-6T764

LAN_TDK

R1

1

R2

2

R3

3

R4

4

R5

5

R6

6

R7

7

R8

8

R9

9

R10[GND]

10

R11

11

YL_C

D1

YL_A

D2

GN_C

D3

GN_A

D4

12

SHIELD

LAN_VERTICAL

2011.12.09

50

Ethernet Block

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

+3.3V_WOL

3.3K

+3.5V_WOL

L5200

5V

ZD5201

OPT

+3.3V_WOL

120-ohm

BLM18PG121SN1D

LAN_JACK_POWER

C5201

0.1uF
16V

EPHY_TDP

EPHY_TDN

EPHY_RDP

EPHY_RDN

C5203

0.1uF
16V

Route Single 50 Ohm, Differential 100 Ohm

C5200

4.7uF
10V

Place 0.1uF close to each power pins

ET_COL/SNI

Place this cap. near IC

C5205

0.1uF
16V

Place this Res. near IC

+3.3V_WOL

R5203

3.3K

C5206
15pF
50V

R5204

2.49K 1%

GND_1

1

2

4

3

X-TAL_2

C5207
15pF

50V

AVDD10OUT

+3.3V_WOL

X-TAL_1

X5200

25MHz

GND_2

RSET

MDI+[0]

MDI-[0]

MDI+[1]

MDI-[1]

AVDD33_1

RXDV

3.3K

R5200

+3.3V_WOL

R52021M

OPT

[EP]

CKXTAL2

1

2

3

4

5

6

7

8

RXD[0]10RXD[1]

R5206 33

Place this cap. near IC

C5208

0.1uF
16V

ET_RXER

R5218

0

DVDD10OUT

AVDD33_2

CKXTAL1

29

30

31

32

THERMAL

33

IC5200

RTL8201F-VB-CG

9

11

12

13

RXC

RXD[2]/INTB

RXD[3]/CLK_CTL

OPT

R5207 33

R5201 33

3.3K

EPHY_INT

EPHY_RXD0

R5208

EPHY_RXD1

ET_COL/SNI

COL28RXER/FXEN

27

14

DVDD33

C5209

33pF

C5202

5pF

EPHY_CRS_DV

EPHY_ACTIVITY

R521033

LED1/PHYAD[1]

CRS/CRS_DV

25

26

24

23

22

21

20

19

18

17

15

16

TXC

TXD[0]

R5209

51

EPHY_TXD0

Place near IC

LED0/PHYAD[0]/PMEB

MDIO

MDC

PHYRSTB

TXEN

TXD[3]

TXD[2]

TXD[1]

+3.3V_WOL

C5211

0.1uF
16V

R5215

3.3K

R5217

EPHY_EN

EPHY_TXD1

R5205

+3.3V_WOL

3.3K

R5212

1.5K

1/16W

EPHY_ACTIVITY

ET_RXER

R5219

10K

1/16W

1%

C5212

0.1uF
OPT

5%

WOL/ETH_POWER_ON

EPHY_MDIO

EPHY_MDC

/RST_PHY

(from SOC)

WOL POWER ENABLE CONTROL

+3.5V_ST

WOL_CTL

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

R4316

3.3K

B

R4317
22K

R4318

2.2K

C

Q4300
MMBT3904(NXP)

E

C4325

4.7uF
10V

Q4301

PMV48XP

S

+3.5V_WOL

D

G

5V

ZD5200

OPT

EPHY_REFCLK

BSD-NC4_H052-HD

2012-09-12

ETHERNET

R5602

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

0

Separate DGND AND AVSS

AMP_MUTE

R5600

10K

+24V

UBW2012-121F

+3.3V_NORMAL

R5601

10K

C

B

Q5600

MMBT3904(NXP)

E

L5600

WOOFER_MUTE

+24V_AMP

C5601

0.1uF
50V

R5603

100

C5602

1000pF

50V

AUD_MASTER_CLK

AMP_RESET_N

WOOFER_MUTE

+3.3V_NORMAL

AUD_LRCK

AUD_SCK

AUD_LRCH
I2C_SDA1

I2C_SCL1

L5601

C5603
10uF
10V

BLM18PG121SN1D

This parts are Located
on AVSS area.

R5610

470

4700pF

C5612

0.047uF

AVDD

MCLK

PDN

SCLK
SDIN

SDA
SCL

C5610

0.1uF
16V

C5611

PLL_FLTM

PLL_FLTP

VR_ANA

10

11

12

13
14
15
16
17
18
19
20
21
22
23
24

25

27

DVDD28DVSS

RESET26STEST

C5614

0.1uF

L5602

BLM18PG121SN1D

AVSS

9

PBTL

8

29

GND

7

30

50V

C5613 2200pF

NC_1

SSTIMER

NC_2

5

6

TAS5733

32

AGND31VREG

GVDD_OUT

25V

1uF

C5615

C5617

C5616

BST_A

3

4

THERMA L

49

IC5600

33

34

BST_D

C5609

4700pF

C5608

R5609

A_SEL_FAULT

1%

470

OSC_RES

DVSSO

VR_DIG

LRCLK

+3.3V_NORMAL

5V

ZD5600

OPT

0.047uF

C5604

0.1uF
16V

33 R5605

R5608 15K

18K

R5607

C5605

C5607

4.7uF

0.1uF

10V

R560633 +24V_AMP

R560433

C5606

0.1uF
16V

50V

0.033uF

OUT_A

PVDD_AB_1

PVDD_AB_2

1

2

48
47
46
45
44
43
42
41
40
39
38
37

35

36

OUT_D

PVDD_CD_1

PVDD_CD_2

0.033uF
50V

C5618

0.1uF
50V

[EP]
PGND_AB_2
PGND_AB_1
OUT_B
NC_6
NC_5
BST_B
BST_C
NC_4
NC_3
OUT_C
PGND_CD_2
PGND_CD_1

C5619

0.1uF
50V

+24V_AMP

C5620
10uF
35V

C5621
10uF
35V

C5622
10uF
35V

C5623
10uF
35V

50V

0.033uF

C5624

50V

0.033uF
C5625

R5613181/16W

R5614181/16W

R5611
18

C5626
330pF
50V

C5627
330pF
50V

R5612
18

C5628
330pF
50V

C5629
330pF
50V

NRS6045T100MMGK

L5605

10.0uH

L5606

10.0uH

NRS6045T100MMGK

NRS6045T100MMGK

L5604

10.0uH

L5603

10.0uH

NRS6045T100MMGK

C5630

0.47uF
50V

C5631

0.47uF
50V

C5632

0.1uF
50V

C5633

0.1uF
50V

C5634

0.1uF
50V

C5635

0.1uF
50V

Close to Speaker

C5636
2200pF

50V

C5637
2200pF

50V

C5638
2200pF
50V

C5639
2200pF

50V

SPK_L+

SPEAKER_L

SPK_L-

SPK_R+

SPEAKER_R

SPK_R-

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

GP4_MT5369

AUDIO[ST]

SPK_L+

SPK_L-

SPK_R+

SPK_R-

WAFER-ANGLE

4

3

2

1

P5600

2011.11.21

58

WOOFER

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

R5700
0

Separate DGND AND AVSS

WOOFER

L5700

+24V_AMP_WOOFER

WOOFER

C5701

0.1uF
50V

WOOFER

R5701

WOOFER

100

C5702

1000pF

50V

+24V

UBW2012-121F

WOOFER_MUTE

GND-4

BLM18PG121SN1D

WOOFER

AUD_MASTER_CLK

AUD_LRCK

AUD_SCK

AUD_LRCH
I2C_SDA1

I2C_SCL1

AMP_RESET_N

+3.3V_NORMAL

L5701

C5703
10uF
10V

WOOFER

WOOFER

C5704

0.1uF
16V

C5705

WOOFER

4.7uF
10V

33 R5703

WOOFER

R570233

This parts are Located
on AVSS area.

GND-4

WOOFER

C5709

C5708

0.047uF

1%

4700pF

WOOFER
R5707

470

AVDD

A_SEL_FAULT

MCLK

OSC_RES

DVSSO

VR_DIG

PDN

LRCLK

SCLK
SDIN

SDA
SCL

+3.3V_NORMAL

5V

ZD5700

OPT

R570433

R5706 15K

WOOFER

R5705

WOOFER

C5707

0.1uF

WOOFER

WOOFER

WOOFER

WOOFER

C5706

0.1uF
16V

WOOFER

18K

R5708

470

4700pF

C5712

C5711

WOOFER

PLL_FLTP

VR_ANA

11

12

13
14
15
16
17
18
19
20
21
22
23
24

25

RESET26STEST

WOOFER

WOOFER

L5702
BLM18PG121SN1D

C5710

0.1uF
16V

WOOFER

WOOFER

0.047uF

WOOFER

PBTL

AVSS

PLL_FLTM

8

9

10

27

29

GND

DVDD28DVSS

C5714

0.1uF

WOOFER

NC_2

6

7

WOOFER

30

AGND31VREG

C5716

WOOFER

50V

0.033uF

C5713 2200pF

PVDD_AB_2

BST_A

NC_1

SSTIMER

3

4

5

THERMA L

49

IC5700

TAS5733

32

33

34

BST_D

GVDD_OUT

PVDD_CD_1

25V

1uF

WOOFER

C5715

C5717

50V

OUT_A

PVDD_AB_1

1

2

48
47
46
45
44
43
42
41
40
39
38
37

35

36

OUT_D

PVDD_CD_2

WOOFER

0.033uF
50V

WOOFER

WOOFER

C5720

C5718

10uF

0.1uF
35V

50V

WOOFER

[EP]
PGND_AB_2
PGND_AB_1
OUT_B
NC_6
NC_5
BST_B
BST_C
NC_4
NC_3
OUT_C
PGND_CD_2
PGND_CD_1

+24V_AMP_WOOFER

C5719

0.1uF
50V

WOOFER_STEREO

+24V_AMP_WOOFER

WOOFER

C5722
10uF
35V

OPT

R5710

WOOFER_STEREO

C5723

C5721

10uF

10uF

35V

35V

OPT

10K

R5709

WOOFER

50V

0.033uF

C5724

50V

0.033uF
C5725

10K

WOOFER

WOOFER_STEREO

WOOFER_STEREO

WOOFER

R5713
18

WOOFER

C5728
330pF
50V

WOOFER

C5729
330pF
50V

R5714
18

WOOFER

R5711181/16W

WOOFER_STEREO
C5726
330pF
50V

WOOFER_STEREO
C5727
330pF
50V

R5712181/16W

WOOFER

NRS6045T100MMGK

L5704

10.0uH

WOOFER

L5706

10.0uH

NRS6045T100MMGK

NRS6045T100MMGK

L5703

10.0uH

WOOFER_STEREO

L5705

10.0uH

NRS6045T100MMGK

WOOFER_STEREO

WOOFER

C5730

0.47uF
50V

WOOFER_STEREO

C5731

0.47uF
50V

SPK_WOOFER_L-

SPK_WOOFER_L+

WOOFER

C5732

0.1uF
50V

WOOFER

C5733

0.1uF
50V

WOOFER_STEREO

C5734

0.1uF
50V

WOOFER_STEREO
C5735

0.1uF
50V

Close to Speaker

WOOFER

C5736
2200pF

50V

WOOFER
C5737
2200pF

50V

WOOFER_STEREO

C5738
2200pF
50V

WOOFER_STEREO
C5739
2200pF

50V

P5701

FW25001-02(SPK 2P)

WOOFER

1

2

SPK_WOOFER_L+

WOOFER_L

SPK_WOOFER_L-

SPK_WOOFER_R+

WOOFER_R

SPK_WOOFER_R-

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

SPK_WOOFER_R-

SPK_WOOFER_R+

P5700

250A1-WR-H03B

1

2

3

WOOFER_STEREO

GP4_MT5369

AUDIO[ST]

2011.11.21

58

R5800

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

0

Separate DGND AND AVSS

Height_SPK option

GND-5

+24V

WOOFER_MUTE

L5800

CIS21J121

+24V_UD_AMP

C5800

0.1uF
50V

R5801

100

C5801

1000pF

50V

BLM18PG121SN1D

AUD_MASTER_CLK

AUD_LRCK

AUD_SCK

AUD_LRCH1
I2C_SDA2

I2C_SCL2

AMP_RESET_N

This parts are Located
on AVSS area.

R5808

4700pF

C5810

12

13

Height_SPK

14
15
16
17
18
19
20
21
22
23
24

25

L5802

470

C5811

0.047uF

PLL_FLTM

PLL_FLTP

VR_ANA

10

11

27

DVDD28DVSS

RESET26STEST

C5813

0.1uF

AVSS

9

PBTL

8

29

GND

7

30

50V

C5812 2200pF

NC_1

SSTIMER

NC_2

5

6

TAS5733

32

AGND31VREG

GVDD_OUT

25V

1uF

C5814

C5816

50V

C5815

0.033uF

PVDD_AB_1

PVDD_AB_2

BST_A

2

3

4

THERMA L

49

IC5800

33

34

35

BST_D

PVDD_CD_1

PVDD_CD_2

0.033uF
50V

OUT_A

1
48
47
46
45
44
43
42
41
40
39
38
37

36

OUT_D

C5817

0.1uF
50V

[EP]
PGND_AB_2
PGND_AB_1
OUT_B
NC_6
NC_5
BST_B
BST_C
NC_4
NC_3
OUT_C
PGND_CD_2
PGND_CD_1

+24V_UD_AMP

C5818

0.1uF
50V

+24V_UD_AMP

C5819

C5821

10uF

10uF

35V

35V

C5820
10uF
35V

C5822
10uF
35V

50V

0.033uF

C5823

50V

0.033uF
C5824

R5813
18

C5827
330pF
50V

C5828
330pF
50V

R5814
18

R5811181/16W

C5825
330pF
50V

C5826
330pF
50V

R5812181/16W

NRS6045T100MMGK

L5804

10.0uH

L5806

10.0uH

NRS6045T100MMGK

NRS6045T100MMGK

L5803

10.0uH

L5805

10.0uH

NRS6045T100MMGK

C5830

0.47uF
50V

C5829

0.47uF
50V

C5833

0.1uF
50V

C5834

0.1uF
50V

C5831

0.1uF
50V

C5832

0.1uF
50V

Close to Speaker

C5835
2200pF

50V

C5836
2200pF

50V

C5837
2200pF
50V

C5838
2200pF

50V

H_SPK_L+

Height Speaker L to 24P wafer

H_SPK_R+

Height Speaker R to 24P wafer

H_SPK_R-

GND-5

C5808

4700pF

C5807

+3.3V_NORMAL

L5801

C5802

C5803

10uF

0.1uF

10V H_SPK_L-

16V

C5804

4.7uF
10V

33 R5803

R580233

R580433

R5806 15K

18K

R5805

C5806

0.1uF

C5805

0.1uF
16V

0.047uF

1%

R5807

470

AVDD

A_SEL_FAULT

MCLK

OSC_RES

DVSSO

VR_DIG

LRCLK

SCLK
SDIN

+3.3V_NORMAL

5V

ZD5800

OPT

PDN

SDA
SCL

BLM18PG121SN1D

C5809

0.1uF
16V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

H13_UD

AUDIO[HEIGHT CH.]

58

AUD_OUT >> EU/CHINA_HOTEL_OPT

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

DTV/MNT_L_OUT

EU

C6000
1uF
25V

OPT
C6002
6800pF

EU

R60002.2K

R6002

OPT

470K

SCART_AMP_L_FB

SCART_Lout

33pF

+12V

EU

IC6000

AZ4580MTR-E1

EU

VCC

8

OUT2

7

IN2-

6

IN2+

5

OUT1

1

EU

R600433K

C6003

EU

IN1-

IN1+

2

3

VEE

4

L6000

C6004

0.1uF
50V

EU

SIGN600002

R6008 33K

C6005

33pF

EU

EU

SCART_AMP_R_FB

SCART_Rout

OPT
R6010

470K

OPT
C6007
6800pF

R6011

2.2K

EU

C6008

1uF
25V

EU

DTV/MNT_R_OUT

[SCART AUDIO MUTE]

DTV/MNT_L_OUT

Q6000

MMBT3904(NXP)

DTV/MNT_R_OUT

Q6001

MMBT3904(NXP)

C

E

C

E

EU

R6013

1K

B

EU

EU

R6014

1K

B

EU

EU_SCART_MUTE_ISAHAYA

Q6002
RT1P141C-T112

E

C

B

SCART_MUTE

PDTA114ET

Q6002-*1

E

C

B

EU_SCART_MUTE_NXP

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

SCART AUDIO AMP

2011.11.21

60

EARPHONE AMP

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

HP_OUT_H13

C6104-*1

18pF

IC6100

TPA6138A2

HP_OUT_H13

C6109-*1
18pF

HP_ROUT_MAIN

HP_OUT_H13

R6103-*1
43K

1%

C6100
1uF
10V

HP_OUT

HP_ROUT_AMP

SIDE_HP_MUTE

HP_OUT

R6100
10K

HP_OUT_MTK

C6104

180pF

R6103

33K

+3.3V_NORMAL

HP_OUT_MTK

HP_OUT

R6106
43K

1%

4.7K

R6105

HP_OUT

HP_OUT

HP_OUT

C6102
1uF
10V

C6108
10pF
50V

+INR

-INR

OUTR

GND_1

MUTE

VSS

C6103
1uF

10V

+INL

14

-INL

13

12

11

10

HP_OUT

OUTL

UVP

GND_2

VDD

9

CP

8

1

2

3

4

5

6

CN

7

HP_OUT

C6106
10pF
50V

HP_OUT_MTK

HP_OUT

R6104
43K

1%

+3.3V_NORMAL

HP_OUT

HP_OUT

C6109
180pF

R6102

33K

HP_OUT_MTK

L6100

120-ohm

BLM18P G12 1SN1D

HP_OUT

C6105

1uF
10V

C6107

0.1uF

16V

HP_OUT
R6101
10K

C6101
1uF
10V

HP_OUT

HP_LOUT_AMP

HP_LOUT_MAIN

HP_OUT_H13

R6102-*1
43K

1%

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

HEADPHONE AMP

2011.09.29

61

CI POWER ENABLE CONTROL

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

+5V_NORMAL

PCM_5V_CTL

R6218
10K

CI

CI

R6217
100

IN

EN

AP2151WG-7

5

4

IC6200

CI

+5V_CI_ON

OUT

1

GND

2

FLG

3

C6210
1uF
25V

CI

R6219

10K

CI

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

CI SLOT

2011.10.31

62

B-CAS (SMART CARD) INTERFACE

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

SMARTCARD_PWR_SEL/SD_EMMC_DATA[1]

JAPAN

R6300 22

+3.3V_NORMAL

2.7K

R6301

R6303

JAPAN

OPT

R6302

R6304

OPT

2.7K
JAPAN

R6305

R6306

CLKDIV1 CLKDIV2 : F_CRD_CLK

2.7K

----------------------------­ 1 0 CLKIN

JAPAN

+5V_NORMAL

OPT

BLM18PG121SN1D

JAPAN

C6300

0.1uF
16V

JAPAN

L6300

SIGN630028

JAPAN

C6301

10uF
10V

C6302

0.1uF

INT CMDVCC : STATUS

+3.3V_NORMAL

IC6300

TDA8024TT

CLKDIV1

1

CLKDIV2

2

5V/3V

3

PGND

4

S2

5

VDDP

PRES

PRES

AUX2

AUX1

CGND

6

S1

7

VUP

I/O

JAPAN

8

9

10

11

12

13

14

JAPAN

C6303

0.1uF
16V

JAPAN

16V

AUX2UC

28

AUX1UC

27

I/OUC

26

XTAL2

25

XTAL1

24

OFF

23

GND

22

VDD

21

RSTIN

20

CMDVCC

19

PORADJ

18

VCC

17

RST

16

CLK

15

C6304

0.1uF

JAPAN

16V

JAPAN

R6307 22

JAPAN

R6308 22

JAPAN

R6309 22

JAPAN

R6310 22

JAPAN

R6311 22

Place CLK C3 far from C2,C7,C4 and C8

75 ohm in I/O is for short circuit Protection

OPT

JAPAN

R6317

1.2K

L6301

JAPAN

BLM18PG121SN1D

JAPAN

C6305

0.1uF
16V

JAPAN

JAPAN

R6315

R6318

1.2K

JAPAN

C6306

0.1uF

16V

+3.3V_NORMAL

10K

R6312

1.2K

JAPAN

R6313
75

OPT

R6319

1.2K

JAPAN

R6316

1.2K

+3.3V_NORMAL

JAPAN

C6307

0.33uF
16V

JAPAN

R6314
1K

ZD6300

5V

JAPAN

SMARTCARD_DATA/SD_EMMC_CLK

SMARTCARD_CLK/SD_EMMC_DATA[0]

SMARTCARD_DET/SD_EMMC_DATA[3]

SMARTCARD_RST/SD_EMMC_DATA[2]

B-CAS SLOT

P6300

10057542-1311FLF(B CAS Slot)

VCC

C1

RST

C2

CLK

C3

RESERVED_1

JAPAN

RESERVED

ZD6301
5V

C4

GND

C5

JAPAN

VPP

C6

I/O

C7

C8

SW1

S1

SW2

S2

--------------------------------­ HIGH HIGH CARD PRESENT
LOW HIGH CARD not PRESENT

SMARTCARD_VCC/SD_EMMC_CMD

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

CI SLOT

2011.04.17

62

Global F/E Option Name

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

1. TU

2. Tuner Name = TDS’S’,TDS’Q’...

3. Country Name = T,T2,S2,KR,US,BR ...

Example of Option name
TU_Q_T2 = apply TDSQ type tuner and T2 country
TU_M/W = apply TDSM&TDSW Type Tuner

13’ Tuner Type for Global
TDS’S’-G501D : T/C Half NIM Horizontal Type
TDS’Q’-G501D : T/C/S2 Combo Horizontal type
TDS’Q’-G601D : T2/C/S2 Combo Horizontal Type
TDS’Q’-G651D : T2/C/S2 Combo Vertical Type
TDS’M’-C601D : China NIM with Isolater Type
TDS’W’-J551F : Japan Dual NIM
TDS’W’-B651F : Brazil 2Tuner
TDS’W’-A651F : Taiwan 2Tuner
TDS’W’-K651F : Colombia DVB-T2 2Tuner

1

RF_SWITCH_CTL_TU

/TU_RESET1_TU

2

I2C_SCL6_TU

3

4

I2C_SDA6_TU

5

6

7

8

9

+3.3V_TU

TUNER_SIF_TU

TU_+1.8V_TU

TU_CVBS_TU

IF_AGC_TU

10

11

12

13

14

16

17

FE_DEMOD1_1_TS_DATA[0]

18

19

20

FE_DEMOD1_2_TS_DATA[0]

FE_DEMOD1_TS_DATA[1]

21

FE_DEMOD1_TS_DATA[2]

22

FE_DEMOD1_TS_DATA[3]

23

FE_DEMOD1_TS_DATA[4]

24

FE_DEMOD1_TS_DATA[5]

25

FE_DEMOD1_TS_DATA[6]

26

FE_DEMOD1_TS_DATA[7]

27

30

31

32

+3.3V_TU

Power_D_Demod_TU

CN_RESET_TU

FE_DEMOD1_TS_ERROR

FE_DEMOD1_1_TS_SYNC

FE_DEMOD1_TS_VAL

FE_DEMOD1_1_TS_CLK

FE_DEMOD1_2_TS_SYNC

FE_DEMOD1_2_TS_CLK

+1.23V_D_Demod_TU

/S2_RESET_TU

+3.3V_TU

33

34

I2C_SCL4_TU

I2C_SDA4_TU

35

36

LNB_OUT

IF_P

IF_N

LNB_TX

close to TUNER

TU_W_BR/TW/CO

C6501-*1
1000pF

TU_N/Q_KR/TW/BR/CO/AU

TU_N/Q_KR/TW/BR/CO/AU

TU_S/N/Q_T/US/KR/TW/AU

C6503

0.1uF

16V

TU_N/M

R6502
10

TU_N_TW/BR

C6501

0.1uF

C6508
47pF

50V
C6506
47pF

TU_W_BR/TW/CO/JP/_Q_AU

50V

TU_W_BR/TW/CO/JP/_Q_AU

C6554
100pF
50V

close to Tuner

close to Tuner

TU_N_BR

R6502-*1

/S2_RESET

1K 5%

FE_DEMOD1_1

R6535 0

FE_DEMOD1_1

R6536 0
R6537 0
FE_DEMOD1_1

FE_DEMOD1_2

R6538 0

FE_DEMOD1_2

R6539 0
R6540 0

FE_DEMOD1_2

TU_W_BR/TW/CO

L6508-*1

0

L6508

R6500

TU_N/M_TW/BR

RF_SWITCH_CTL_50

TU_S/N/Q/W
R6508
100

TU_M/W_BR/TW/CO/CN

+3.3V_TU

C6514

0.1uF
16V

R6506

+3.3V_TU

1K

C6502

0.1uF

I2C_SCL6

I2C_SDA6

L6500

BLM18PG121SN1D

100

TU_Q/W_KR/JP/AU

BLM18PG121SN1D

TU_N/M_TW/BR

R6505
10K

NON_TU_W_BR/TW/CO
R6509

33
NON_TU_W_BR/TW/CO
R6510

33

C6550

0.1uF

16V

TU_S/N/Q_T/US/KR/TW/AU

should be guarded by ground

R6506-*1

TU_W_BR/TW

100

TU_Q/W_KR/BR/CO/TW/JP/AU

TU_Q/W_KR/BR/CO/TW/JP/AU

LNB_OUT

TU_N/M/W_TW/BR/CO

R6508-*1

1K 5%

RF_SWITCH_CTL

1K

R6501

TU_M/W_BR/TW/CO/CN

close to TUNER

0.1uF 16V

+1.8V_TU

IF_AGC

IF_P

IF_N

TU_N/M_CN/BR

BLM18PG121SN1D

TU_Q/W_KR/BR/TW/CO/JP/AU

C6516

BLM18PG121SN1D

0.1uF
16V

TU_N/M/Q/W_KR/CN/BR/JP/AU

FE_DEMOD1_TS_DATA[0]
FE_DEMOD1_TS_DATA[1]
FE_DEMOD1_TS_DATA[2]
FE_DEMOD1_TS_DATA[3]

FE_DEMOD1_TS_DATA[4]
FE_DEMOD1_TS_DATA[5]
FE_DEMOD1_TS_DATA[6]
FE_DEMOD1_TS_DATA[7]

R6503 22

C6504
18pF
50V

R6504 22

C6500
18pF
50V

OPT
C6522

R6515

4.7K

+3.3V_TU

L6502

L6507

FE_DEMOD1_TS_ERROR
FE_DEMOD1_TS_SYNC
FE_DEMOD1_TS_VAL

FE_DEMOD1_TS_CLK

TU_Q/W

L6501

BLM18PG121SN1D

C6515

0.1uF
TU_Q/W

LNB_TX

TU_Q/W

TU_Q/W

TU_S/N/Q/W

C6520

0.1uF

16V

TU_A_GLOBAL_6/7

R6534 0

+3.3V_TU

OPT

R6516

470

E

B

OPT

Q6500

C

MMBT3906(NXP)

TU_W_BR/TW

C6503-*1

0.1uF

16V

+1.23V_D_Demod

+1.8V_TU

+1.23V_D_Demod

TU_Q
R6513

10

C6521

0.1uF
OPT

/TU_RESET1

TU_W_BR/TW/CO

R6518
82

OPT

C6516-*1

0.1uF
16V

TU_W_BR/TW/CO/JP

FE_DEMOD1_TS_DATA[0-7]

TU_W_BR/TW/CO

R6534-*1

OPT

R6509-*1

150

1. should be guarded by ground

2. No via on both of them

3. Signal Width >= 12mils

TU_W

R6513-*1

300

TU_A_GLOBAL_6/7

TUNER_SIF

Signal to Signal Width = 12mils

1K 5%

/S2_RESET

+3.3V_TU

I2C_SCL4

I2C_SDA4

R6510-*1

220

+3.3V_TU

E

Q6501
MMBT3906(NXP)

C

TU_W_BR/TW/CO

1608 perallel
because of derating

TU_A_GLOBAL_6/7

R6521

200

TU_A_GLOBAL_6/7

TU_W_BR/TW/CO

R6520
200

B

Ground Width >= 24mils

C6508-*1
18pF

TU_W_BR/TW/CO

C6506-*1
18pF

TU_CVBS

+3.3V_TU

C6533
10uF
16V

+5V_NORMAL

C6535
1uF

+3.3V_NORMAL

L6503

BLM18PG121SN1D

C6526

0.1uF
16V

for DVB-T2(V1.3.1) Sony Demod

TU_Q/N/M/W

C6540

0.1uF

deleted resistor

TU_Q/N/M/W

AP2132MP-2.5TRG1

1

PG

2

EN

3

VIN

4

VCTRL

Vout=0.6*(1+R1/R2)

+3.3V_TU

AZ1117BH-1.8TRE1

IN

+3.3V_TU

3

C6531

0.1uF

IC6503

1

ADJ/GND

RF_SWITCH_CTL_50

mA(MAX)

+3.3V_TU

C6529

22uF

10V
85C

output : 1.1V_D_Demod

TU_Q/N/M/W

IC6501

2A

EAN61387601

2

THERMAL

OUT

8

9

7

6

5

CHB : Max mA
else : Max mA

R6531
1

C6546
10uF
10V

C6538
10uF

10V

[EP]

GND

ADJ

VOUT

NC

Close to the tuner

C6530

0.1uF
16V

TU_W_CO_T2

R6528-*1

6.8K

1%

C6548
10uF
10V

C6542

0.1uF

R6527
20K
1%

R6528
11K
1%
R6529
10K
1%

+1.8V_TU

ZD6804

2.5V

else : Max 0.7A

TU_Q/N/M/W

R2

TU_Q/N/M/W

R1

TU_Q/N/M/W

/TU_RESET2

FE_DEMOD1_TS_ERROR

T2 : Max 1.0A

+1.23V_D_Demod

C6549
10uF
16V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

TUNER

2012.07.10

65

B1

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

B1

TU_GND_B

GND seperation for CHINA tuner

TU_GND_B

TU_M_CN

1000pF

R6700

0

NON_CHINA

/TU_RESET2

R6701

0

NON_CHINA

NON_CHINA

C6707

630V

TU_S_US

TU_GND_A

R6703

R6702

0

0

12

SHIELD

TU_M_CN

C6706
1000pF
630V

NON_CHINA

TU_M/W

C6700

0.1uF

TU6700
TDSS-H651F(B)

NC

1

RESET

2

SCL

3

SDA

4

+B1[3.3V]

5

SIF

6

+B2[1.8V]

7

CVBS

8

IF_AGC

9

DIF[P]

10

DIF[N]

11

A1

A1

R6704
100

TU_M/W

TU_PIN2

I2C_SCL6_TU

I2C_SDA6_TU

+3.3V_TU

TUNER_SIF_TU

TU_+1.8V_TU

RF_SWITCH_CTL_50

TU_PIN2

I2C_SCL6_TU

I2C_SDA6_TU

+3.3V_TU

TUNER_SIF_TU

TU_+1.8V_TU

RF_S/W_CTL

RESET

SCL

SDA

+B1[3.3V]

SIF

+B2[1.8V]

TU_GND_B

TU6705
TDSN-G351D

TU_T2/C

NC_1

RESET

SCL

SDA

TU6701
TDSM-C651D(B)

+B1[3.3V]

SIF

+B2[1.8V]

TU_M_CN

50

51

52

53

54

55

56

B1

B1

59

B2

B2

A2

CVBS

8

NC_1

9

NC_2

10

NC_3

11

+B3[3.3V]

12

+B4[1.23V]

13

DEMOD_RESET

14

GND

15

NC_4

16

SYNC

17

VALID

18

MCLK

19

D0

20

D1

21

D2

22

D3

23

D4

24

D5

25

D6

26

D7

27

A1

A1

A2

B1

CVBS

NC_2

NC_3

NC_4

+B3[3.3V]

+B4[1.23V]

NC_5

GND

ERROR

SYNC

VALID

MCLK

D0

D1

D2

D3

D4

D5

D6

D7

B1

28

SHIELD

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

A1

A1

SHIELD

TU_GND_A

TU_GND_B

B1

TU_Korea_PIP

B1

TU6702
TDSQ-H651F(B)

+B1[+3.3V_S/P]

1

RESET

2

TU_SCL

3

TU_SDA

4

+B2[3.3V_M]

5

S_SIF

6

+B3[1.8V_M]

7

S_CVBS

8

M_IF_AGC

9

M_DIF[P]

10

M_DIF[N]

11

+B4[3.3V_S]

12

+B5[1.8V_S]

13

NC_1

14

GND

15

SD_ERROR

16

SD_SYNC

17

SD_VALID

18

SD_MCLK

19

SD_SERIAL_D0

20

NC_2

21

NC_3

22

NC_4

23

NC_5

24

NC_6

25

NC_7

26

NC_8

27

GND_1

28

GND_2

29

+B6[1.23V_SD]

30

SD_RESET

31

+B7[3.3V_SD]

32

NC_9

33

SD_SCL

34

SD_SDA

35

A1

A1

TU_Q_T2/S2

36

B1

SHIELD

B1

TU_GND_B

TU_PIN2

I2C_SCL6_TU

I2C_SDA6_TU

+3.3V_TU

TUNER_SIF_TU

TU_+1.8V_TU

FE_LNA_Ctrl1

FE_LNA_Ctrl2

TU_GND_B

RF_SWITCH_CTL_50

50
51
52

TU6704-*1
TDSW-B652F(B)

+B1(3.3V)_S/P

1

T_RESET

2

TU_SCL

3

TU_SDA

4

+B2[3.3V_M]

5

S_SIF

6

+B3[1.8V_M]

7

S_CVBS

8

M_IF_AGC

9

M_DIF[P]

10

M_DIF[N]

11

+B4[3.3V_S]

12

+B5[1.8V_S]

13

GND_1

28

GND_2

29

+B6[1.23V_D]

30

D_RESET

31

+B7[3.3V_D]

32

NC_1

33

D_SCL

34

D_SDA

35

GND_3

38

GND_4

39

MD_ERROR

40

MD_SYNC

41

MD_VALID

42

MD_MCLK

43

MD_DATA

44

SD_ERROR

45

SD_SYNC

46

SD_VALID

47

SD_MCLK

48

SD_DATA

49

A1A1B1

TU6704-*2

TU6704-*3

TDSW-A652F(B)

TU_TW

RF_S/W_CTRL

50

NC_7

51

B1

TDSW-K651F(B)

TU_CO

+B1(3.3V)_S/P

+B1(3.3V)_S/P

1

1

T_RESET

T_RESET

2

2

TU_SCL

TU_SCL

3

3

TU_SDA

TU_SDA

4

4

+B2[3.3V_M]

+B2[3.3V_M]

5

5

S_SIF

S_SIF

6

6

+B3[1.8V_M]

+B3[1.8V_M]

7

7

S_CVBS

S_CVBS

8

8

M_IF_AGC

M_IF_AGC

9

9

M_DIF[P]

M_DIF[P]

10

10

M_DIF[N]

M_DIF[N]

11

11

+B4[3.3V_S]

+B4[3.3V_S]

12

12

+B5[1.8V_S]

+B5[1.8V_S]

13

13

GND_1

GND_1

28

28

GND_2

GND_2

29

29

+B6[1.23V_D]

+B6[1.1V_D]

30

30

D_RESET

D_RESET

31

31

+B7[3.3V_D]

+B7[3.3V_D]

32

32

NC_1

NC_1

33

33

SD_SCL

D_SCL

34

34

SD_SDA

D_SDA

35

35

GND_3

GND_3

38

38

GND_4

GND_4

39

39

NC_2

MD_ERROR

40

40

NC_3

RF_S/W_CTRL

MD_SYNC

41

50

41

NC_4

NC_2

MD_VALID

42

51

42

NC_5

MD_MCLK

43

43

NC_6

MD_DATA

44

44

SD_ERROR

SD_ERROR

45

45

SD_SYNC

SD_SYNC

46

46

SD_VALID

SD_VALID

47

47

SD_MCLK

SD_MCLK

48

48

SD_DATA

SD_DATA

49

49

A1A1B1

A1A1B1

B1

59

59

SHIELD

SHIELD

TU6702-*1

TU6704-*4
TDSN-T751F

TU_TW_SINGLE

LNA_CTRL1

57

LNA_CTRL2

58

B1

59

TDSQ-A651D(B)

TU_AJJA

RF_S/W_CTL

1

RESET

2

SCL

3

SDA

4

+B1[3.3V]

5

SIF

6

+B2[1.8V]

7

CVBS

8

IF_AGC

9

DIF[P]

10

DIF[N]

11

NC_1

12

NC_2

13

NC_3

14

GND

15

NC_4

16

NC_5

17

NC_6

18

NC_7

19

NC_8

20

NC_9

21

NC_10

22

NC_11

23

NC_12

24

NC_13

25

NC_14

26

NC_15

27

A1B1

A1

SHIELD

B1

TU_BR

+B1[+3.3V_S/P]

1

RESET

2

TU_SCL

3

TU_SDA

4

+B2[3.3V_M]

5

S_SIF

6

+B3[1.8V_M]

7

S_CVBS

8

M_IF_AGC

9

M_DIF[P]

10

M_DIF[N]

11

+B4[3.3V_S]

12

+B5[1.8V_S]

13

NC_1

14

GND

15

SD_ERROR

16

SD_SYNC

17

SD_VALID

18

SD_MCLK

19

SD_SERIAL_D0

20

NC_2

21

NC_3

22

NC_4

23

NC_5

24

NC_6

25

NC_7

26

NC_8

27

GND_1

28

GND_2

29

+B6[1.23V_SD]

30

SD_RESET

31

+B7[3.3V_SD]

32

NC_9

33

SD_SCL

34

SD_SDA

35

A1A1B1

36

SHIELD

RF_S/W_CTRL

50

NC_2

51

B1

59

SHIELD

53

54

55

56

57

58

TU6703
TDSQ-G651D(B)

N.C_1

1

RESET

2

SCL

3

SDA

4

+B1[3.3V]

5

SIF

6

+B2[1.8V]

7

CVBS

8

NC_2

9

NC_3

10

NC_4

11

NC_5

12

NC_6

13

NC_7

14

GND

15

ERROR

16

SYNC

17

VALID

18

MCLK

19

D0

20

D1

21

D2

22

D3

23

D4

24

D5

25

D6

26

D7

27

GND_2

28

GND_3

29

+B3[1.23V]

30

DEMOD_RESET

31

F22_OUTPUT

32

DEMOD_SCL

33

DEMOD_SDA

34

LNB

35

GND_4

36

SHIELD

37

A1

A1

38

+B4[3.3V]

TU_W_JP

TU_W_JP

10K

R6705

TU_W_JP

10K

R6706

C6701

0.1uF
16V

TU_W_JP

C6702

0.1uF

16V

NC_7

RESET_T2

SCL_S

SDA_S

+3.3V_S_TUNER

NC_8

NC_9

LNA_CTR1

LNA_CTR2

TU_GND_B

TU6704
TDSW-J551F(B)

0

R6708

C6705

10uF
10V

TU_QW

C6709
10uF

TU_MNQW

C6704
10uF

RF_SWITCH_CTL_TU

/TU_RESET1_TU

I2C_SCL6_TU

I2C_SDA6_TU

+3.3V_TU

TUNER_SIF_TU

TU_+1.8V_TU

TU_CVBS_TU

IF_AGC_TU

IF_P

IF_N

+3.3V_D_Demod

Power_D_Demod_TU

CN_RESET_TU

FE_DEMOD1_TS_ERROR

FE_DEMOD1_1_TS_SYNC

FE_DEMOD1_TS_VAL

FE_DEMOD1_1_TS_CLK

FE_DEMOD1_1_TS_DATA[0]

FE_DEMOD1_TS_DATA[1]

FE_DEMOD1_TS_DATA[2]

FE_DEMOD1_TS_DATA[3]

FE_DEMOD1_TS_DATA[4]

FE_DEMOD1_TS_DATA[5]

FE_DEMOD1_TS_DATA[6]

FE_DEMOD1_TS_DATA[7]

+1.23V_D_Demod_TU

/S2_RESET_TU

+3.3V_D_Demod2

LNB_TX

I2C_SCL4_TU

I2C_SDA4_TU

LNB_OUT

FE_DEMOD2_TS_ERROR

FE_DEMOD2_TS_SYNC

FE_DEMOD2_TS_VAL

FE_DEMOD2_TS_CLK

FE_DEMOD2_TS_DATA

FE_DEMOD1_TS_ERROR

FE_DEMOD1_2_TS_SYNC

FE_DEMOD1_TS_VAL

FE_DEMOD1_2_TS_CLK

FE_DEMOD1_2_TS_DATA[0]

TU_QW
L6701

BLM18PG121SN1D

10V

TU_MNQW

L6700

BLM18PG121SN1D

10V

1

2

3

4

5

6

7

8

9

10

11

12

13

14

16

17

18

19

20

21

22

23

24

25

26

27

30

31

32

33

34

35

36

40

41

42

43

44

45

46

47

48

49

+3.3V_TU

+3.3V_TU

TU_W_JP

TU_Q_T2/S2

R6707 0

50

51

52

53

54

55

56

57

58

B1

B1

59

+5V_OR_+3.3V_SPLITTER

1

RESET_T1

2

SCL_T

3

SDA_T

4

+3.3V_T1

5

NC_1

6

+1.8V_T1

7

NC_2

8

NC_3

9

NC_4

10

NC_5

11

+3.3V_T2

12

+1.8V_T2

13

GND_2

28

GND_3

29

+B5[1.23V]

30

D_RESET

31

+B6[3.3V]

32

NC_6

33

D_SCL

34

D_SDA

35

LNB

36

GND_4

37

GND_5

38

GND_6

39

TS1_ERROR

40

TS1_SYNC

41

TS1_VALID

42

TS1_MCLK

43

TS1_DATA

44

TS2_ERROR

45

TS2_SYNC

46

TS2_VALID

47

TS2_MCLK

48

TS2_DATA

49

A1

A1

+3.3V_D_Demod2

TU_W_JP

TU_QW

C6708

0.1uF

SHIELD

+3.3V_D_Demod

TU_GND_A

TU_MNQW

C6703

0.1uF

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

TU_SYMBOL

BSD-NC4_H067-HD

2012.09.14

RS-232C Control INTERFACE

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

+3.5V_ST

C6812

0.33uF

OPT

IC6801

MAX3232CDR

C6813

0.1uF

OPT
ZD6802

ADUC 20S 02 010L
20V

R6820
100

R6821
100

OPT
ZD6803

ADUC 20S 02 010L
20V

JK6801

SPG13-SD-0402

5

9

4

8

3

7

2

6

1

10

C6808

0.1uF

C6809

0.1uF

C6810

0.1uF

C6811

0.1uF

C1+

C1-

C2+

C2-

DOUT2

RIN2

V+

V-

1

2

3

4

5

6

7

8

EAN41348201

VCC

16

GND

15

DOUT1

14

RIN1

13

ROUT1

12

DIN1

11

DIN2

10

ROUT2

9

SOC_RX

SOC_TX

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

12/08/16

RS232C 68

DVB-S2 LNB Part Allegro

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

LNB_OUT

(Option:LNB)

C6900
18pF

LNB

Close to Tuner
Surge protectioin

C6901
33pF

LNB

D6900

LNB

R6900

2.2K
1W
LNB

D6901

MBR230LSFT1G

C6902

0.22uF

LNB

25V

A_GND

LNB

30V

2A

D6902

LNB

30V

C6903

0.01uF
50V

LNB

C6905
10uF
25V

LNB

close to Boost pin(#1)

C6904

0.1uF
50V

LNB

A_GND

C6906
10uF
25V

D6903

LNB_SMAB34

40V

D6903-*1

LNB_SX34

40V

LNB

A_GND

C6907
10uF
25V

LNB

D6904-*1

LNB_SX34

LNB_SMAB34

LNB

C6908 0.1uF

40V

D6904

40V

[EP]GND

VCP

1

LNB

2

NC_1

3

TDI

A8303SESTR-T

4

TDO

5

A_GND

NC_3

BOOST

19

20

THERMAL

21

IC6900

7

6

SCL9ADD

IRQ

LNB

NC_2

18

8

SDA

GNDLX

3.5A

15uH

SP-7850_15

16LX17

15

14

13

12

11

10

TONECTRL

L6900

VIN

GND

VREG

ISET

TCAP

+12V

LNB

3A

Max 1.3A

C6909
10uF
25V

LNB

A_GND

close to VIN pin(#15)

C6910

0.1uF
50V

LNB

C6912

LNB

0.1uF

LNB

C6911 0.22uF

Input trace widths should be sized to conduct at least 3A
Ouput trace widths should be sized to conduct at least 2A

LNB
R6903

39K

1/16W
1%

Caution!! need isolated GND

A_GND



R6904
0

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

LNB

R6901 33

I2C_SCL4

LNB

R6902 33

I2C_SDA4

LNB_TX

LNB

2012.03.08

69

LVDS

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

[51Pin LVDS OUTPUT Connector]

LVDS

P7201

FI-RE51S-HF-J-R1500

NC

UD

NC

OLED

NC

OLED

NC

UD_CPBOX

NC

UD_CPBOX

NC

LVDS_SEL

NC

NC

UD

L/DIM_ENABLE

UD

GND

RA0N

RA0P

RA1N

RA1P

RA2N

RA2P

GND

RACLKN

RACLKP

GND

RA3N

RA3P

RA4N

RA4P

GND

BIT_SEL

RB0N

RB0P

RB1N

RB1P

RB2N

RB2P

GND

RBCLKN

RBCLKP

GND

RB3N

RB3P

RB4N

RB4P

GND

GND

GND

GND

GND

NC

VLCD

VLCD

VLCD

VLCD

R7202 0

R7209 0

R7208 0

R7200 0

R7201 0

R7204
OLED

R7213
ALEF

R7203 0

R7205 0

0

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

GND

OLED : FRC_RESET = LVDS_VAL
INV_CTL = ELVDD_ON

PA168_RESET

I2C_SCL1

I2C_SDA1

I2C_SDA1

I2C_SCL1

INV_CTL

BPL_IN

FRC_DONE

URSA7_RESET

TXA0N/TX11N

TXA0P/TX11P

TXA1N/TX10N

TXA1P/TX10P

TXA2N/TX9N

TXA2P/TX9P

TXACLKN/TX8N

TXACLKP/TX8P

TXA3N/TX7N

TXA3P/TX7P

TXA4N/TX6N

TXA4P/TX6P

TXB0N/TX5N

TXB0P/TX5P

TXB1N/TX4N

TXB1P/TX4P

TXB2N/TX3N

TXB2P/TX3P

TXBCLKN/TX2N

TXBCLKP/TX2P

TXB3N/TX1N

TXB3P/TX1P

TXB4N/TX0N

TXB4P/TX0P

T_CON_SYS_POWER_OFF

T_CON_SYS_POWER_OFF

R7217
0

UD_OLED

PANEL_VCC

R7216

OLED

UD

10K
R7215

BIT_SEL

FRC_FLASH_WP

R7214
10K

LVDS_BIT_SEL_LOW

L7201

120-ohm

LVDS

C7201
10uF
16V
OPT

0

LED_R

C7203

0.1uF
16V

LVDS

[41Pin LVDS OUTPUT Connector]

P7202

FI-RE41S-HF-J-R1500

LVDS

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

TXC0N

TXC0P

TXC1N

TXC1P

TXC2N

TXC2P

TXCCLKN

TXCCLKP

TXC3N

TXC3P

TXC4N

TXC4P

TXA1N

TXA1P

TXACLKN

TXACLKP

TXA4N

TXA4P

TXB0N

TXB0P

TXB1N

TXB1P

TXB2N

TXB2P

TXD0N/TX17N

TXD0P/TX17P

TXD1N/TX16N

TXD1P/TX16P

TXD2N/TX15N

TXD2P/TX15P

TXDCLKN/TX14N

TXDCLKP/TX14P

TXD3N/TX13N

TXD3P/TX13P

TXD4N/TX12N

TXD4P/TX12P

H13 BALL NAME

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BSD-NC4_H072-HD

2012-10-15

LVDS INTERFACE

eMMC I/F

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

R8106-*1 47K

R8107-*1 47K

AR8100
22
1/16W

EMMC_SERIAL_22

AR8101
22
1/16W

EMMC_SERIAL_22

AR8102 22

3.3V_EMMC

R8100 10K

OPT

R8101 10K

R8102 10K

C8100

0.1uF
16V

R8103 10K

C8107
10pF

OPT

50V

EMMC DATA LINE 47K PULL/UP

R8100-*1 47K

EMMC_DATA[0-7]

EMMC_DATA[0]
EMMC_DATA[1]
EMMC_DATA[2]

EMMC_DATA[3]

EMMC_DATA[4]
EMMC_DATA[5]
EMMC_DATA[6]
EMMC_DATA[7]

EMMC_CLK
EMMC_CMD
EMMC_RST

R8102-*1 47K

R8101-*1 47K

R8105-*1 47K

R8103-*1 47K

EMMC_SERIAL_22

R8104-*1 47K

eMMC serial 100 ohm option

AR8101-*1
100
1/16W

EMMC_SERIAL_100

EMMC_SERIAL_100

AR8102-*1
100
1/16W

AR8100-*1
100
1/16W

EMMC_SERIAL_100

Don’t Connect Power At VDDI

(Just Interal LDO Capacitor)

IC8100-*1

THGBM5G5A1JBAIR

A3

DAT0

A4

DAT1

A5

DAT2

B2

DAT3

B3

DAT4

B4

DAT5

B5

DAT6

B6

DAT7

EMMC DATA LINE
10K PULL/UP
FOR M13

R8104 10K

R8106 10K

R8107 10K

R8105 10K

DAT5

DAT6

DAT4

DAT3

10K

R8117

EMMC_CMD_BALL

EMMC_CLK_BALL

10K

R8116

EMMC_RESET_BALL

3.3V_EMMC

EMMC_VDDI

C8105

0.1uF
16V

EMMC_VDDI

C8106

2.2uF
10V

3.3V_EMMC

C8102

0.1uF
16V

DAT3
DAT4

DAT5

C8103

2.2uF
10V

C8104
1uF
10V

A3
A4
A5
B2
B3
B4
B5
B6

M6
M5

A6
A7
C5
E5
E8

E9
E10
F10

G3
G10

H5

J5

K6

K7
K10

P7
P10

K5

C6

M4

N4

P3

P5

E6

F5
J10

K9

C2

E7

G5
H10

K8

C4

N2

N5

P4

P6

A1

A2

A8

A9
A10
A11
A12
A13
A14

B1

B7

B8

B9
B10
B11
B12
B13
B14

C1

C3

C7

DU1
DU2
DU3
DU4
DU5
DU6
DU7
DU8

H26M31002GPR

DAT0
DAT1
DAT2
DAT3
DAT4
DAT5
DAT6
DAT7

CLK
CMD

NC_3
NC_4
NC_23
NC_42
NC_43
NC_44
NC_45
NC_52
NC_58
NC_59
NC_66
NC_73
NC_80
NC_81
NC_82
NC_116
NC_119

RESET

VCCQ_1
VCCQ_2
VCCQ_3
VCCQ_4
VCCQ_5

VCC_1
VCC_2
VCC_3
VCC_4

VDDI

VSS_1
VSS_2
VSS_3
VSS_4
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5

NC_1
NC_2
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20
NC_21
NC_22
NC_24

DUMMY_1
DUMMY_2
DUMMY_3
DUMMY_4
DUMMY_5
DUMMY_6
DUMMY_7
DUMMY_8

IC8100

C8

NC_25

C9

NC_26

C10

NC_27

C11

NC_28

C12

NC_29

C13

NC_30

C14

NC_31

D1

NC_32

D2

NC_33

D3

NC_34

D4

NC_35

D12

NC_36

D13

NC_37

D14

NC_38

E1

NC_39

E2

NC_40

E3

NC_41

E12

NC_46

E13

NC_47

E14

NC_48

F1

NC_49

F2

NC_50

F3

NC_51

F12

NC_53

F13

NC_54

F14

NC_55

G1

NC_56

G2

NC_57

G12

NC_60

G13

NC_61

G14

NC_62

H1

NC_63

H2

NC_64

H3

NC_65

H12

NC_67

H13

NC_68

H14

NC_69

J1

NC_70

J2

NC_71

J3

NC_72

J12

NC_74

J13

NC_75

J14

NC_76

K1

NC_77

K2

NC_78

K3

NC_79

K12

NC_83

K13

NC_84

K14

NC_85

L1

NC_86

L2

NC_87

L3

NC_88

L12

NC_89

L13

NC_90

L14

NC_91

M1

NC_92

HYNIX_EMMC_4GB

NC_93
NC_94
NC_95
NC_96
NC_97
NC_98

NC_99
NC_100
NC_101
NC_102
NC_103
NC_104
NC_105
NC_106
NC_107
NC_108
NC_109
NC_110
NC_111
NC_112
NC_113
NC_114
NC_115
NC_117
NC_118
NC_120
NC_121
NC_122
NC_123

DUMMY_9
DUMMY_10
DUMMY_11
DUMMY_12
DUMMY_13
DUMMY_14
DUMMY_15
DUMMY_16

M2
M3
M7
M8
M9
M10
M11
M12
M13
M14
N1
N3
N6
N7
N8
N9
N10
N11
N12
N13
N14
P1
P2
P8
P9
P11
P12
P13
P14

DU9
DU10
DU11
DU12
DU13
DU14
DU15
DU16

DAT5

DAT6

EMMC_RESET_BALL

EMMC_CMD_BALL

EMMC_CLK_BALL

M6

CLK

M5

CMD

A6

RFU_1

A7

RFU_2

C5

NC_21

E5

RFU_3

E8

RFU_4

E9

RFU_5

E10

RFU_6

F10

RFU_7

G3

RFU_8

G10

RFU_9

H5

RFU_10

J5

RFU_11

K6

RFU_12

K7

RFU_13

K10

RFU_14

P7

RFU_15

P10

RFU_16

K5

RST_N

C6

VCCQ_1

M4

VCCQ_2

N4

VCCQ_3

P3

VCCQ_4

P5

VCCQ_5

E6

VCC_1

F5

VCC_2

J10

VCC_3

K9

VCC_4

C2

VDDI

E7

VSS_1

G5

VSS_2

H10

VSS_3

K8

VSS_4

C4

VSSQ_1

N2

VSSQ_2

N5

VSSQ_3

P4

VSSQ_4

P6

VSSQ_5

A1

NC_1

A2

NC_2

A8

NC_3

A9

NC_4

A10

NC_5

A11

NC_6

A12

NC_7

A13

NC_8

A14

NC_9

B1

NC_10

B7

NC_11

B8

NC_12

B9

NC_13

B10

NC_14

B11

NC_15

B12

NC_16

B13

NC_17

B14

NC_18

C1

NC_19

C3

NC_20

C7

NC_22

TOSHIBA_EMMC_4GB

IC8100-*5

KLM4G1FE3B-B001

A3

DAT0

A4

DAT1

A5

DAT2

B2

DAT3

B3

DAT4

B4

DAT5

B5

DAT6

B6

DAT7

M6

CLK

M5

CMD

A6

NC_3

A7

NC_4

C5

NC_23

E5

NC_42

E8

NC_43

E9

NC_44

E10

NC_45

F10

NC_52

G3

NC_58

G10

NC_59

H5

NC_66

J5

NC_73

K6

NC_80

K7

NC_81

K10

NC_82

P7

NC_116

P10

NC_119

K5

RSTN

C6

VDD_1

M4

VDD_2

N4

VDD_3

P3

VDD_4

P5

VDD_5

E6

VDDF_1

F5

VDDF_2

J10

VDDF_3

K9

VDDF_4

C2

VDDI

E7

VSS_2

G5

VSS_3

H10

VSS_4

K8

VSS_5

C4

VSS_1

N2

VSS_6

N5

VSS_7

P4

VSS_8

P6

VSS_9

A1

NC_1

A2

NC_2

A8

NC_5

A9

NC_6

A10

NC_7

A11

NC_8

A12

NC_9

A13

NC_10

A14

NC_11

B1

NC_12

B7

NC_13

B8

NC_14

B9

NC_15

B10

NC_16

B11

NC_17

B12

NC_18

B13

NC_19

B14

NC_20

C1

NC_21

C3

NC_22

C7

NC_24

C8

NC_23

C9

NC_24

C10

NC_25

C11

NC_26

C12

NC_27

C13

NC_28

C14

NC_29

D1

NC_30

D2

NC_31

D3

NC_32

D4

NC_33

D12

NC_34

D13

NC_35

D14

NC_36

E1

NC_37

E2

NC_38

E3

NC_39

E12

NC_40

E13

NC_41

E14

NC_42

F1

NC_43

F2

NC_44

F3

NC_45

F12

NC_46

F13

NC_47

F14

NC_48

G1

NC_49

G2

NC_50

G12

NC_51

G13

NC_52

G14

NC_53

H1

NC_54

H2

NC_55

H3

NC_56

H12

NC_57

H13

NC_58

H14

NC_59

J1

NC_60

J2

NC_61

J3

NC_62

J12

NC_63

J13

NC_64

J14

NC_65

K1

NC_66

K2

NC_67

K3

NC_68

K12

NC_69

K13

NC_70

K14

NC_71

L1

NC_72

L2

NC_73

L3

NC_74

L12

NC_75

L13

NC_76

L14

NC_77

M1

NC_78

M2

NC_79

M3

NC_80

M7

NC_81

M8

NC_82

M9

NC_83

M10

NC_84

M11

NC_85

M12

NC_86

M13

NC_87

M14

NC_88

N1

NC_89

N3

NC_90

N6

NC_91

N7

NC_92

N8

NC_93

N9

NC_94

N10

NC_95

N11

NC_96

N12

NC_97

N13

NC_98

N14

NC_99

P1

NC_100

P2

NC_101

P8

NC_102

P9

NC_103

P11

NC_104

P12

NC_105

P13

NC_106

P14

NC_107

IC8100-*6

THGBM5G6A2JBAIR

C8

NC_25

C9

NC_26

C10

NC_27

C11

NC_28

C12

NC_29

C13

NC_30

C14

NC_31

D1

NC_32

D2

NC_33

D3

NC_34

D4

NC_35

D12

NC_36

D13

NC_37

D14

NC_38

E1

NC_39

E2

NC_40

E3

NC_41

E12

NC_46

E13

NC_47

E14

NC_48

F1

NC_49

F2

NC_50

F3

NC_51

F12

NC_53

F13

NC_54

F14

NC_55

G1

NC_56

G2

NC_57

G12

NC_60

G13

NC_61

G14

NC_62

H1

NC_63

H2

NC_64

H3

NC_65

H12

NC_67

H13

NC_68

H14

NC_69

J1

NC_70

J2

NC_71

J3

NC_72

J12

NC_74

J13

NC_75

J14

NC_76

K1

NC_77

K2

NC_78

K3

NC_79

K12

NC_83

K13

NC_84

K14

NC_85

L1

NC_86

L2

NC_87

L3

NC_88

L12

NC_89

L13

NC_90

L14

NC_91

M1

NC_92

M2

NC_93

M3

NC_94

M7

NC_95

M8

NC_96

M9

NC_97

M10

NC_98

M11

NC_99

M12

NC_100

M13

NC_101

M14

NC_102

N1

NC_103

N3

NC_104

N6

NC_105

N7

NC_106

SAMSUNG_EMMC_4GB

N8

NC_107

N9

NC_108

N10

NC_109

N11

NC_110

N12

NC_111

N13

NC_112

N14

NC_113

P1

NC_114

P2

NC_115

P8

NC_117

P9

NC_118

P11

NC_120

P12

NC_121

P13

NC_122

P14

NC_123

A3

DAT0

A4

DAT1

A5

DAT2

B2

DAT3

B3

DAT4

B4

DAT5

B5

DAT6

B6

DAT7

M6

CLK

M5

CMD

A6

RFU_1

A7

RFU_2

C5

NC_21

E5

RFU_3

E8

RFU_4

E9

RFU_5

E10

RFU_6

F10

RFU_7

G3

RFU_8

G10

RFU_9

H5

RFU_10

J5

RFU_11

K6

RFU_12

K7

RFU_13

K10

RFU_14

P7

RFU_15

P10

RFU_16

K5

RSTN

C6

VCCQ_1

M4

VCCQ_2

N4

VCCQ_3

P3

VCCQ_4

P5

VCCQ_5

E6

VCC_1

F5

VCC_2

J10

VCC_3

K9

VCC_4

C2

VDDI

E7

VSS_1

G5

VSS_2

H10

VSS_3

K8

VSS_4

C4

VSSQ_1

N2

VSSQ_2

N5

VSSQ_3

P4

VSSQ_4

P6

VSSQ_5

A1

NC_1

A2

NC_2

A8

NC_3

A9

NC_4

A10

NC_5

A11

NC_6

TOSHIBA_EMMC_8GB

A12

NC_7

A13

NC_8

A14

NC_9

B1

NC_10

B7

NC_11

B8

NC_12

B9

NC_13

B10

NC_14

NC_100

B11

NC_15

NC_101

B12

NC_16

NC_102

B13

NC_17

NC_103

B14

NC_18

NC_104

C1

NC_19

NC_105

C3

NC_20

NC_106

C7

NC_22

NC_107

E10
F10

G10

K10

P10

J10

H10

A10
A11
A12
A13
A14

B10
B11
B12
B13
B14

NC_23
NC_24
NC_25
NC_26
NC_27
NC_28
NC_29
NC_30
NC_31
NC_32
NC_33
NC_34
NC_35
NC_36
NC_37
NC_38
NC_39
NC_40
NC_41
NC_42
NC_43
NC_44
NC_45
NC_46
NC_47
NC_48
NC_49
NC_50
NC_51
NC_52
NC_53
NC_54
NC_55
NC_56
NC_57
NC_58
NC_59
NC_60
NC_61
NC_62
NC_63
NC_64
NC_65
NC_66
NC_67
NC_68
NC_69
NC_70
NC_71
NC_72
NC_73
NC_74
NC_75
NC_76
NC_77
NC_78
NC_79
NC_80
NC_81
NC_82
NC_83
NC_84
NC_85
NC_86
NC_87
NC_88
NC_89
NC_90
NC_91
NC_92
NC_93
NC_94
NC_95
NC_96
NC_97
NC_98
NC_99

A3
A4
A5
B2
B3
B4
B5
B6

M6
M5

A6
A7
C5
E5
E8
E9

G3

H5
J5
K6
K7

P7

K5

C6
M4
N4
P3
P5

E6
F5

K9

C2

E7
G5

K8
C4
N2
N5
P4
P6

A1
A2
A8
A9

B1
B7
B8
B9

C1
C3
C7

C8
C9
C10
C11
C12
C13
C14
D1
D2
D3
D4
D12
D13
D14
E1
E2
E3
E12
E13
E14
F1
F2
F3
F12
F13
F14
G1
G2
G12
G13
G14
H1
H2
H3
H12
H13
H14
J1
J2
J3
J12
J13
J14
K1
K2
K3
K12
K13
K14
L1
L2
L3
L12
L13
L14
M1
M2
M3
M7
M8
M9
M10
M11
M12
M13
M14
N1
N3
N6
N7
N8
N9
N10
N11
N12
N13
N14
P1
P2
P8
P9
P11
P12
P13
P14

IC8100-*2

H26M21001ECR

DAT0
DAT1
DAT2
DAT3
DAT4
DAT5
DAT6
DAT7

CLK
CMD

NC_3
NC_4
NC_23
NC_42
NC_43
NC_44
NC_45
NC_52
NC_58
NC_59
NC_66
NC_73
NC_80
NC_81
NC_82
NC_116
NC_119

RESET

VCCQ_1
VCCQ_2
VCCQ_3
VCCQ_4
VCCQ_5

VCC_1
VCC_2
VCC_3
VCC_4

VDDI

VSS_1
VSS_2
VSS_3
VSS_4
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5

NC_1
NC_2
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20
NC_21
NC_22
NC_24

C8

NC_25

C9

NC_26

C10

NC_27

C11

NC_28

C12

NC_29

C13

NC_30

C14

NC_31

D1

NC_32

D2

NC_33

D3

NC_34

D4

NC_35

D12

NC_36

D13

NC_37

D14

NC_38

E1

NC_39

E2

NC_40

E3

NC_41

E12

NC_46

E13

NC_47

E14

NC_48

F1

NC_49

F2

NC_50

F3

NC_51

F12

NC_53

F13

NC_54

F14

NC_55

G1

NC_56

G2

NC_57

G12

NC_60

G13

NC_61

G14

NC_62

H1

NC_63

H2

NC_64

H3

NC_65

H12

NC_67

H13

NC_68

H14

NC_69

J1

NC_70

J2

NC_71

J3

NC_72

J12

NC_74

J13

NC_75

J14

NC_76

K1

NC_77

K2

NC_78

K3

NC_79

K12

NC_83

K13

NC_84

K14

NC_85

L1

NC_86

L2

NC_87

L3

NC_88

L12

NC_89

L13

NC_90

L14

NC_91

M1

NC_92

HYNIX_EMMC_2GB

KLMAG2GE4A-A001

A3

DAT0

A4

DAT1

A5

DAT2

B2

DAT3

B3

DAT4

B4

DAT5

B5

DAT6

B6

DAT7

M6

CLK

M5

CMD

A6

RFU_1

A7

RFU_2

C5

RFU_3

E5

RFU_4

E8

RFU_5

E9

RFU_6

E10

NC_39

F10

RFU_7

G3

RFU_8

G10

RFU_9

H5

RFU_10

J5

RFU_11

K6

RFU_12

K7

RFU_13

K10

RFU_14

P7

RFU_15

P10

NC_104

K5

RESET

C6

VDD_1

M4

VDD_2

N4

VDD_3

P3

VDD_4

P5

VDD_5

E6

VDDF_1

F5

VDDF_2

J10

VDDF_3

K9

VDDF_4

C2

VDDI

E7

VSS_2

G5

VSS_3

H10

VSS_4

K8

VSS_9

C4

VSS_1

N2

VSS_5

N5

VSS_6

P4

VSS_7

P6

VSS_8

A1

NC_1

A2

NC_2

A8

NC_3

A9

NC_4

A10

NC_5

A11

NC_6

A12

NC_7

A13

NC_8

A14

NC_9

B1

NC_10

B7

NC_11

B8

NC_12

B9

NC_13

B10

NC_14

B11

NC_15

B12

NC_16

B13

NC_17

B14

NC_18

C1

NC_19

C3

NC_20

C7

NC_21

DU1

DUMMY_1

DU2

DUMMY_2

DU3

DUMMY_3

DU4

DUMMY_4

DU5

DUMMY_5

DU6

DUMMY_6

DU7

DUMMY_7

DU8

DUMMY_8

M2

NC_93

M3

NC_94

M7

NC_95

M8

NC_96

M9

NC_97

M10

NC_98

M11

NC_99

M12

NC_100

M13

NC_101

M14

NC_102

N1

NC_103

N3

NC_104

N6

NC_105

N7

NC_106

N8

NC_107

N9

NC_108

N10

NC_109

N11

NC_110

N12

NC_111

N13

NC_112

N14

NC_113

P1

NC_114

P2

NC_115

P8

NC_117

P9

NC_118

P11

NC_120

P12

NC_121

P13

NC_122

P14

NC_123

IC8100-*7

C8

NC_22

C9

NC_23

C10

NC_24

C11

NC_25

C12

NC_26

C13

NC_27

C14

NC_28

D1

NC_29

D2

NC_30

D3

NC_31

D4

NC_32

D12

NC_33

D13

NC_34

D14

NC_35

E1

NC_36

E2

NC_37

E3

NC_38

E12

NC_40

E13

NC_41

E14

NC_42

F1

NC_43

F2

NC_44

F3

NC_45

F12

NC_46

F13

NC_47

F14

NC_48

G1

NC_49

G2

NC_50

G12

NC_51

G13

NC_52

G14

NC_53

H1

NC_54

H2

NC_55

H3

NC_56

H12

NC_57

H13

NC_58

H14

NC_59

J1

NC_60

J2

NC_61

J3

NC_62

J12

NC_63

J13

NC_64

J14

NC_65

K1

NC_66

K2

NC_67

K3

NC_68

K12

NC_69

K13

NC_70

K14

NC_71

L1

NC_72

L2

NC_73

L3

NC_74

L12

NC_75

L13

NC_76

L14

NC_77

M1

NC_78

M2

NC_79

M3

NC_80

M7

NC_81

M8

NC_82

M9

NC_83

M10

NC_84

M11

NC_85

M12

NC_86

M13

NC_87

M14

NC_88

N1

SAMSUNG_EMMC_16G

NC_89

N3

NC_90

N6

NC_91

N7

NC_92

N8

NC_93

N9

NC_94

N10

NC_95

N11

NC_96

N12

NC_97

N13

NC_98

N14

NC_99

P1

NC_100

P2

NC_101

P8

NC_102

P9

NC_103

P11

RFU_16

P12

NC_105

P13

NC_106

P14

NC_107

DU9

DUMMY_9

DU10

DUMMY_10

DU11

DUMMY_11

DU12

DUMMY_12

DU13

DUMMY_13

DU14

DUMMY_14

DU15

DUMMY_15

DU16

DUMMY_16

A3

DAT0

A4

DAT1

A5

DAT2

B2

DAT3

B3

DAT4

B4

DAT5

B5

DAT6

B6

DAT7

M6

CLK

M5

CMD

A6

NC_3

A7

NC_4

C5

NC_23

E5

NC_42

E8

NC_43

E9

NC_44

E10

NC_45

F10

NC_52

G3

NC_58

G10

NC_59

H5

NC_66

J5

NC_73

K6

NC_80

K7

NC_81

K10

NC_82

P7

NC_116

P10

NC_119

K5

RESET

C6

VCCQ_1

M4

VCCQ_2

N4

VCCQ_3

P3

VCCQ_4

P5

VCCQ_5

E6

VCC_1

F5

VCC_2

J10

VCC_3

K9

VCC_4

C2

VDDI

E7

VSS_1

G5

VSS_2

H10

VSS_3

K8

VSS_4

C4

VSSQ_1

N2

VSSQ_2

N5

VSSQ_3

P4

VSSQ_4

P6

VSSQ_5

A1

NC_1

A2

NC_2

A8

NC_5

A9

NC_6

A10

NC_7

A11

NC_8

A12

NC_9

A13

NC_10

A14

NC_11

B1

NC_12

B7

NC_13

B8

NC_14

B9

NC_15

B10

NC_16

B11

NC_17

B12

NC_18

B13

NC_19

B14

NC_20

C1

NC_21

C3

NC_22

C7

NC_24

IC8100-*8

H26M42002GMR

IC8100-*3

KLM2G1HE3F-B001

A3

DAT0

A4

DAT1

A5

DAT2

B2

DAT3

B3

DAT4

B4

DAT5

B5

DAT6

B6

DAT7

M6

CLK

M5

CMD

A6

NC_3

A7

NC_4

C5

NC_23

E5

NC_42

E8

NC_43

E9

NC_44

E10

NC_45

F10

NC_52

G3

NC_58

G10

NC_59

H5

NC_66

J5

NC_73

K6

NC_80

K7

NC_81

K10

NC_82

P7

NC_116

P10

NC_119

K5

RSTN

C6

VDD_1

M4

VDD_2

N4

VDD_3

P3

VDD_4

P5

VDD_5

E6

VDDF_1

F5

VDDF_2

J10

VDDF_3

K9

VDDF_4

C2

VDDI

C4

VSS_1

E7

VSS_2

G5

VSS_3

H10

VSS_4

K8

VSS_5

N2

VSS_6

N5

VSS_7

P4

VSS_8

P6

VSS_9

A1

NC_1

A2

NC_2

A8

NC_5

A9

NC_6

A10

NC_7

A11

NC_8

A12

NC_9

A13

NC_10

A14

NC_11

B1

NC_12

B7

NC_13

B8

NC_14

B9

NC_15

B10

NC_16

B11

NC_17

B12

NC_18

B13

NC_19

B14

NC_20

C1

NC_21

C3

NC_22

C7

NC_24

C8

NC_25

C9

NC_26

C10

NC_27

C11

NC_28

C12

NC_29

C13

NC_30

C14

NC_31

D1

NC_32

D2

NC_33

D3

NC_34

D4

NC_35

D12

NC_36

D13

NC_37

D14

NC_38

E1

NC_39

E2

NC_40

E3

NC_41

E12

NC_46

E13

NC_47

E14

NC_48

F1

NC_49

F2

NC_50

F3

NC_51

F12

NC_53

F13

NC_54

F14

NC_55

G1

NC_56

G2

NC_57

G12

NC_60

G13

NC_61

G14

NC_62

H1

NC_63

H2

NC_64

H3

NC_65

H12

NC_67

H13

NC_68

H14

NC_69

J1

NC_70

J2

NC_71

J3

NC_72

J12

NC_74

J13

NC_75

J14

NC_76

K1

NC_77

K2

NC_78

K3

NC_79

K12

NC_83

K13

NC_84

K14

NC_85

L1

NC_86

L2

NC_87

L3

NC_88

L12

NC_89

L13

NC_90

HYNIX_EMMC_8GB

L14

NC_91

M1

NC_92

M2

NC_93

M3

NC_94

M7

NC_95

M8

NC_96

M9

NC_97

M10

NC_98

M11

NC_99

M12

NC_100

M13

NC_101

M14

NC_102

N1

NC_103

N3

NC_104

N6

NC_105

N7

NC_106

N8

NC_107

N9

NC_108

N10

NC_109

N11

NC_110

N12

NC_111

N13

NC_112

N14

NC_113

P1

NC_114

P2

NC_115

P8

NC_117

P9

NC_118

P11

NC_120

P12

NC_121

P13

NC_122

P14

NC_123

NC_25
NC_26
NC_27
NC_28
NC_29
NC_30
NC_31
NC_32
NC_33
NC_34
NC_35
NC_36
NC_37
NC_38
NC_39
NC_40
NC_41
NC_46
NC_47
NC_48
NC_49
NC_50
NC_51
NC_53
NC_54
NC_55
NC_56
NC_57
NC_60
NC_61
NC_62
NC_63
NC_64
NC_65
NC_67
NC_68
NC_69
NC_70
NC_71
NC_72
NC_74
NC_75
NC_76
NC_77
NC_78
NC_79
NC_83
NC_84
NC_85
NC_86
NC_87
NC_88
NC_89
NC_90
NC_91

SAMSUNG_EMMC_2GB

NC_92
NC_93
NC_94
NC_95
NC_96
NC_97
NC_98

NC_99
NC_100
NC_101
NC_102
NC_103
NC_104
NC_105
NC_106
NC_107
NC_108
NC_109
NC_110
NC_111
NC_112
NC_113
NC_114
NC_115
NC_117
NC_118
NC_120
NC_121
NC_122
NC_123

C8
C9
C10
C11
C12
C13
C14
D1
D2
D3
D4
D12
D13
D14
E1
E2
E3
E12
E13
E14
F1
F2
F3
F12
F13
F14
G1
G2
G12
G13
G14
H1
H2
H3
H12
H13
H14
J1
J2
J3
J12
J13
J14
K1
K2
K3
K12
K13
K14
L1
L2
L3
L12
L13
L14
M1
M2
M3
M7
M8
M9
M10
M11
M12
M13
M14
N1
N3
N6
N7
N8
N9
N10
N11
N12
N13
N14
P1
P2
P8
P9
P11
P12
P13
P14

THGBM5G7A2JBAIR

A3

DAT0

A4

DAT1

A5

DAT2

B2

DAT3

B3

DAT4

B4

DAT5

B5

DAT6

B6

DAT7

M6

CLK

M5

CMD

A6

RFU_1

A7

RFU_2

C5

NC_21

E5

RFU_3

E8

RFU_4

E9

RFU_5

E10

RFU_6

F10

RFU_7

G3

RFU_8

G10

RFU_9

H5

RFU_10

J5

RFU_11

K6

RFU_12

K7

RFU_13

K10

RFU_14

P7

RFU_15

P10

RFU_16

K5

RSTN

C6

VCCQ_1

M4

VCCQ_2

N4

VCCQ_3

P3

VCCQ_4

P5

VCCQ_5

E6

VCC_1

F5

VCC_2

J10

VCC_3

K9

VCC_4

C2

VDDI

E7

VSS_1

G5

VSS_2

H10

VSS_3

K8

VSS_4

C4

VSSQ_1

N2

VSSQ_2

N5

VSSQ_3

P4

VSSQ_4

P6

VSSQ_5

A1

NC_1

A2

NC_2

A8

NC_3

A9

NC_4

A10

NC_5

A11

NC_6

A12

NC_7

A13

NC_8

A14

NC_9

B1

NC_10

B7

NC_11

B8

NC_12

B9

NC_13

B10

NC_14

B11

NC_15

B12

NC_16

B13

NC_17

B14

NC_18

C1

NC_19

C3

NC_20

C7

NC_22

IC8100-*4

C8

NC_23

C9

NC_24

C10

NC_25

C11

NC_26

C12

NC_27

C13

NC_28

C14

NC_29

D1

NC_30

D2

NC_31

D3

NC_32

D4

NC_33

D12

NC_34

D13

NC_35

D14

NC_36

E1

NC_37

E2

NC_38

E3

NC_39

E12

NC_40

E13

NC_41

E14

NC_42

F1

NC_43

F2

NC_44

F3

NC_45

F12

NC_46

F13

NC_47

F14

NC_48

G1

NC_49

G2

NC_50

G12

NC_51

G13

NC_52

G14

NC_53

H1

NC_54

H2

NC_55

H3

NC_56

H12

NC_57

H13

NC_58

H14

NC_59

J1

NC_60

J2

NC_61

J3

NC_62

J12

NC_63

J13

NC_64

J14

NC_65

K1

NC_66

K2

NC_67

K3

NC_68

K12

NC_69

K13

NC_70

K14

NC_71

L1

NC_72

L2

NC_73

L3

NC_74

L12

NC_75

L13

NC_76

L14

NC_77

M1

NC_78

M2

NC_79

M3

NC_80

M7

NC_81

M8

NC_82

M9

NC_83

M10

NC_84

M11

NC_85

M12

NC_86
NC_87
NC_88
NC_89
NC_90
NC_91
NC_92
NC_93
NC_94
NC_95
NC_96
NC_97
NC_98

NC_99
NC_100
NC_101
NC_102
NC_103
NC_104
NC_105
NC_106
NC_107

M13
M14
N1
N3
N6
N7
N8
N9
N10
N11
N12
N13
N14
P1
P2
P8
P9
P11
P12
P13
P14

TOSHIBA_EMMC_16GB

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

eMMC

11.09.29

81

XTAL(24.75MHz)

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

XTAL_IN

C12000
27pF
50V

JTAG for HEVC

P12000

12507WS-08L

HEVC_DEBUG

9

UART For HEVC

P12001

12507WS-04L

HEVC_DEBUG

5

1

2

3

4

5

6

7

8

1

2

3

4

X12000

24.75MHz

X-TAL_1

1

GND_1

2

+3.3V_NORMAL

HEVC_DEBUG

R12000 33

R12001 33

R12002 33

HEVC_DEBUG

R12004 33

HEVC_DEBUG

R12003 33

+3.3V_NORMAL

HEVC_DEBUG

R12005

33

HEVC_DEBUG

R12006

33

HEVC_DEBUG

R12007
1M

4

3

C12001

0.1uF
16V

HEVC_DEBUG

HEVC_DEBUG

HEVC_DEBUG

C12002

0.1uF
16V

GND_2

X-TAL_2

D13_TDI_1

D13_TMS_1

D13_TCK_1

D13_TDO_1

D13_TRST_N_1

D13_UART_RX_1

D13_UART_TX_1

C12003
27pF
50V

XTAL_OUT

+3.3V_NORMAL

R12009

10K
OPT

D13_SMODE[0]

R12013

10K

SMODE[1:0]

- 00 : Normal Mode

- Other : Test Mode

+3.3V_NORMAL

R12010

10K

D13_SPI_CS/GPIO[0]

R12011

10K
OPT

GPIO[0]

- 1 : Serial Flash Boot

- 0 : Live Boot

Serial Flash Boot Test

P12002

12507WS-10L

1

2

3

4

5

HEVC_DEBUG

6

7

8

9

10

11

+3.3V_NORMAL

R12043

HEVC_DEBUG

R12038 0

HEVC_DEBUG

R12039 0

HEVC_DEBUG

R12040 0

HEVC_DEBUG

R12041 0

HEVC_DEBUG

R12042 0

HEVC_DEBUG

R12044 0

R12045 0

+3.3V_NORMAL

R12020

10K
OPT

R12021

10K

1K

OPT

OPT

HEVC_DEBUG

R12046 0

HEVC_DEBUG

R12047 0

HEVC option sheet

D13_SMODE[1]

D13_SPI_CS/GPIO[0]

D13_SPI_DO_M

D13_SPI_SCLK_M

D13_SPI_DI_M

SPI_DL_MODE

D13_FLASH_WP

I2C_SDA2

I2C_SCL2

D13_RESET

SPI_DL_MODE

D13_TRST_N_0
D13_TMS_0
D13_TCK_0
D13_TDI_0
D13_TDO_0
D13_UART_RX_0
D13_UART_TX_0

I2C_SCL2
I2C_SDA2

D13_STPO_CLK
D13_STPO_SOP
D13_STPO_VAL
D13_STPO_ERR

D13_STPO_DATA

+3.3V_NORMAL

C12004

0.01uF

SOC_SPI0_SCLK

SOC_SPI0_CS0
SOC_SPI0_MOSI
SOC_SPI0_MISO

D13_SPI_SCLK_M

D13_SPI_DO_M

D13_SPI_DI_M

R12016

3.3K

R12014

33

D13_TRST_N_0

D13_TMS_0
D13_TCK_0
D13_TDI_0
D13_TDO_0

D13_TRST_N_1

D13_TMS_1
D13_TCK_1
D13_TDI_1
D13_TDO_1

D13_UART_RX_0
D13_UART_TX_0
D13_UART_RX_1
D13_UART_TX_1

R12008 33
R12012 33
R12022 33
R12023 33
R12033 33

XTAL_IN

XTAL_OUT

R12050

33

R2

XTALI

R1

A18

B10
A10

C20
D20
D19
C19
A14
B14
B13
A13

A11
B11
A12
B12

G20
H19
G19
H20
J19
J20
K19
K20
L19
L20
M19
M20

E1
C3
D1
B1
D3
E2
B3
D2
B2
C2

B9
A9

XTALO

PORES_N

TRST_N0
TMS0
TCK0
TDI0
TDO0
TRST_N1
TMS1
TCK1
TDI1
TDO1

UART_RXD0
UART_TXD0
UART_RXD1
UART_TXD1

SPI_SCLK_S
SPI_CS_S
SPI_DO_S
SPI_DI_S
SPI_SCLK_M
SPI_CS_M
SPI_DO_M
SPI_DI_M

SCL_S
SDA_S
SCL_M
SDA_M

STPI_CLK
STPI_SOP
STPI_VAL
STPI_ERR
STPI_DATA[0]
STPI_DATA[1]
STPI_DATA[2]
STPI_DATA[3]
STPI_DATA[4]
STPI_DATA[5]
STPI_DATA[6]
STPI_DATA[7]

R12024 33
R12025 33
R12026 33
R12027 33

R12028 33
R12029 33
R12030 33
R12031 33

C12261
10pF

R12051

33

OPT

OPT

OPT

OPT

SPI FLASH(4MByte)

D13_SPI_CS/GPIO[0]

D13_SPI_DI_M

D13_FLASH_WP

IC12000

LG1153

HEVC

R12015
0

1/16W
5%

GPIO[7]
GPIO[6]
GPIO[5]
GPIO[4]
GPIO[3]
GPIO[2]
GPIO[1]
GPIO[0]

HDMI_DDC_CK
HDMI_DDC_DA

HDMI_HPD

HDMI_REXT

HDMI_CEC

HDMI_DDCCEC

HDMI_TX0N
HDMI_TX0P
HDMI_TX1N
HDMI_TX1P
HDMI_TX2N
HDMI_TX2P
HDMI_TXCN
HDMI_TXCP

SMODE[0]
SMODE[1]

TMODE[0]
TMODE[1]
TMODE[2]
TMODE[3]

R12017
10K

R12019

33

R12018
10K

OPT

R12049
10

B7
A7
B6
A6
B5
A5
B4
A4

G1
G2
J2
J1
H2
H1

M1
M2
L1
L2
K1
K2
N1
N2

F2
E3

A16
B16
A17
B17

* Default Internal Pull-Up

IC12001

MX25L3206EM2I-12G

CS#

1

SO/SIO1

2

WP#

3

GND

4

Write Protection

- HIGH : Normal Operation

- LOW : Write Protection

D13_INT

+3.3V_NORMAL

3.3K

3.3K

R12034

D13_HDMI_HPD

D13_HDMI_TX0N
D13_HDMI_TX0P
D13_HDMI_TX1N
D13_HDMI_TX1P
D13_HDMI_TX2N
D13_HDMI_TX2P
D13_HDMI_TXCN
D13_HDMI_TXCP

D13_SMODE[0]
D13_SMODE[1]

VCC

8

HOLD#

7

SCLK

6

SI/SIO0

5

OPT

3.3K

R12035

R12032

3.3K

H/W Option : default low
SPI Clock Frq. &
DDR density
(High:512MB, LOW:256MB)

3.3K

R12036

R12048

D13_FLASH_WP

D13_HDMI_DDC_CK
D13_HDMI_DDC_DA

+3.3V_NORMAL

R12037

1.6K 1%

Closed to D13

D13_SPI_SCLK_M

D13_SPI_DO_M

D13_SPI_CS/GPIO[0]

C12005

0.1uF

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

IC12000

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

LG1153

HEVC

DDR_A[0]
DDR_A[1]
DDR_A[2]
DDR_A[3]
DDR_A[4]
DDR_A[5]
DDR_A[6]
DDR_A[7]
DDR_A[8]

DDR_A[9]
DDR_A[10]
DDR_A[11]
DDR_A[12]
DDR_A[13]
DDR_A[14]
DDR_A[15]

DDR_BA[0]
DDR_BA[1]
DDR_BA[2]

DDR_U_CK

DDR_U_CK_N

DDR_D_CK

DDR_D_CK_N

DDR_CKE

DDR_ODT
DDR_RAS_N
DDR_CAS_N

DDR_WE_N

DDR_RST_N

DDR_ZQ_CALIB

DDR_DQS[0]

DDR_DQS_N[0]

DDR_DQS[1]

DDR_DQS_N[1]

DDR_DQS[2]

DDR_DQS_N[2]

DDR_DQS[3]

DDR_DQS_N[3]

DDR_DM[0]
DDR_DM[1]
DDR_DM[2]
DDR_DM[3]

DDR_DQ[0]
DDR_DQ[1]
DDR_DQ[2]
DDR_DQ[3]
DDR_DQ[4]
DDR_DQ[5]
DDR_DQ[6]
DDR_DQ[7]
DDR_DQ[8]
DDR_DQ[9]

DDR_DQ[10]
DDR_DQ[11]
DDR_DQ[12]
DDR_DQ[13]
DDR_DQ[14]
DDR_DQ[15]
DDR_DQ[16]
DDR_DQ[17]
DDR_DQ[18]
DDR_DQ[19]
DDR_DQ[20]
DDR_DQ[21]
DDR_DQ[22]
DDR_DQ[23]
DDR_DQ[24]
DDR_DQ[25]
DDR_DQ[26]
DDR_DQ[27]
DDR_DQ[28]
DDR_DQ[29]
DDR_DQ[30]
DDR_DQ[31]

T11
T13
T9
T7
U16
U8
U15
T8
T15
T10
U17
U14
U13
U10
T14
T12

U7
T16
U11

V15
W15
V6
W6
U12

T5
U5
U6
T6

U9

T17

W5
V5
W7
Y7
W14
V14
W16
Y16

Y8
Y5
Y17
Y14

D13_DDR_DQ[0]

W3

D13_DDR_DQ[1]

W10

D13_DDR_DQ[2]

V2

D13_DDR_DQ[3]

V9

D13_DDR_DQ[4]

Y2

D13_DDR_DQ[5]

Y10

D13_DDR_DQ[6]

W2

D13_DDR_DQ[7]

V10

D13_DDR_DQ[8]

W9

D13_DDR_DQ[9]

W4

D13_DDR_DQ[10]

V8

D13_DDR_DQ[11]

V3

D13_DDR_DQ[12]

V7

D13_DDR_DQ[13]

Y4

D13_DDR_DQ[14]

W8

D13_DDR_DQ[15]

V4
W12
V18

D13_DDR_DQ[18]

V11

D13_DDR_DQ[19]

W19

D13_DDR_DQ[20]

Y11

D13_DDR_DQ[21]

Y19

D13_DDR_DQ[22]

W11

D13_DDR_DQ[23]

V19

D13_DDR_DQ[24]

W18

D13_DDR_DQ[25]

W13

D13_DDR_DQ[26]

V17

D13_DDR_DQ[27]

V12

D13_DDR_DQ[28]

V16

D13_DDR_DQ[29]

Y13

D13_DDR_DQ[30]

W17

D13_DDR_DQ[31]

V13

D13_DDR_A[0]
D13_DDR_A[1]
D13_DDR_A[2]
D13_DDR_A[3]
D13_DDR_A[4]
D13_DDR_A[5]
D13_DDR_A[6]
D13_DDR_A[7]
D13_DDR_A[8]

D13_DDR_A[9]
D13_DDR_A[10]
D13_DDR_A[11]
D13_DDR_A[12]
D13_DDR_A[13]

D13_DDR_BA[0]
D13_DDR_BA[1]
D13_DDR_BA[2]

D13_D1_CLK
D13_D1_CLK
D13_D0_CLK
D13_D0_CLK
D13_DDR_CKE

D13_DDR_ODT
D13_DDR_RAS
D13_DDR_CAS
D13_DDR_WE

D13_DDR_RESET
R12100
240

1%

D13_DDR_DQS[0]

D13_DDR_DQS[0]

D13_DDR_DQS[1]

D13_DDR_DQS[1]

D13_DDR_DQS[2]

D13_DDR_DQS[2]

D13_DDR_DQS[3]

D13_DDR_DQS[3]

D13_DDR_DM[0]

D13_DDR_DM[1]

D13_DDR_DM[2]

D13_DDR_DM[3]

D13_DDR_DQ[16]
D13_DDR_DQ[17]

D13_DDR_A[0-13]

D13_DDR_DQ[16-31]

D13_DDR_A[0-13] D13_DDR_A[0-13]

D13_DDR_DQ[0-15]

D13_DDR_DQ[0-15]

HEVC option sheet

VDDC15_D13_DDR

R12102
10K

R12101

100

D13_DDR_BA[0]
D13_DDR_BA[1]
D13_DDR_BA[2]

D13_DDR_CKE

D13_DDR_ODT
D13_DDR_RAS
D13_DDR_CAS

D13_DDR_RESET

D13_DDR_DQS[0]
D13_DDR_DQS[0]

D13_DDR_DQS[1]
D13_DDR_DQS[1]

D13_DDR_DM[0]
D13_DDR_DM[1]

D13_DDR_RESET

D13_D1_CLK

D13_D1_CLK

IC12100

H5TQ2G63DFR-PBC

D13_DDR_A[0] D13_DDR_A[0]
D13_DDR_A[1]
D13_DDR_A[2]
D13_DDR_A[3]
D13_DDR_A[4]
D13_DDR_A[5]
D13_DDR_A[6]
D13_DDR_A[7]
D13_DDR_A[8]
D13_DDR_A[9]
D13_DDR_A[10]
D13_DDR_A[11]
D13_DDR_A[12]
D13_DDR_A[13] D13_DDR_A[13]

D13_D0_CLK
D13_D0_CLK

D13_DDR_WE

D13_DDR_DQ[0]
D13_DDR_DQ[1]
D13_DDR_DQ[2]
D13_DDR_DQ[3]
D13_DDR_DQ[4]
D13_DDR_DQ[5]
D13_DDR_DQ[6]
D13_DDR_DQ[7]

D13_DDR_DQ[8]
D13_DDR_DQ[9]
D13_DDR_DQ[10]
D13_DDR_DQ[11]
D13_DDR_DQ[12]
D13_DDR_DQ[13]
D13_DDR_DQ[14]
D13_DDR_DQ[15]

D13_DDR_CKE

R12103

100

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

D13_D0_CLK

D13_D0_CLK

R12108
10K

D13_DDR0_VREFCA

M8

VREFCA

H1

VREFDQ

L8

ZQ

B2

VDD_1

D9

VDD_2

G7

VDD_3

K2

VDD_4

K8

VDD_5

N1

VDD_6

N9

VDD_7

R1

VDD_8

R9

VDD_9

A1

VDDQ_1

A8

VDDQ_2

C1

VDDQ_3

C9

VDDQ_4

D2

VDDQ_5

E9

VDDQ_6

F1

VDDQ_7

H2

VDDQ_8

H9

VDDQ_9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4

T7

NC_6

A9

VSS_1

B3

VSS_2

E1

VSS_3

G8

VSS_4

J2

VSS_5

J8

VSS_6

M1

VSS_7

M9

VSS_8

P1

VSS_9

P9

VSS_10

T1

VSS_11

T9

VSS_12

B1

VSSQ_1

B9

VSSQ_2

D1

VSSQ_3

D8

VSSQ_4

E2

VSSQ_5

E8

VSSQ_6

F9

VSSQ_7

G1

VSSQ_8

G9

VSSQ_9

VDDC15_D13_DDR

R12104

1K 1%

R12105

1K 1%

C12100

D13_DDR0_VREFDQ

R12109
240

1%

0.1uF

C12104

0.1uF

C12105

D13_DDR0_VREFCA

0.1uF

VDDC15_D13_DDR

D13_DDR_DQ[16-31]

VDDC15_D13_DDR

R12106

1K 1%

R12107

1K 1%

D13_DDR_DQS[2]
D13_DDR_DQS[2]

D13_DDR_DQS[3]
D13_DDR_DQS[3]

D13_DDR0_VREFDQ

0.1uF

C12101

D13_DDR_BA[0]
D13_DDR_BA[1]
D13_DDR_BA[2]

D13_D1_CLK
D13_D1_CLK

D13_DDR_CKE

D13_DDR_ODT
D13_DDR_RAS
D13_DDR_CAS

D13_DDR_WE

D13_DDR_RESET

D13_DDR_DM[2]
D13_DDR_DM[3]

D13_DDR_A[1]
D13_DDR_A[2]
D13_DDR_A[3]
D13_DDR_A[4]
D13_DDR_A[5]
D13_DDR_A[6]
D13_DDR_A[7]
D13_DDR_A[8]
D13_DDR_A[9]
D13_DDR_A[10]
D13_DDR_A[11]
D13_DDR_A[12]

D13_DDR_DQ[16]
D13_DDR_DQ[17]
D13_DDR_DQ[18]
D13_DDR_DQ[19]
D13_DDR_DQ[20]
D13_DDR_DQ[21]
D13_DDR_DQ[22]
D13_DDR_DQ[23]

D13_DDR_DQ[24]
D13_DDR_DQ[25]
D13_DDR_DQ[26]
D13_DDR_DQ[27]
D13_DDR_DQ[28]
D13_DDR_DQ[29]
D13_DDR_DQ[30]
D13_DDR_DQ[31]

VDDC15_D13_DDR

R12110

1K 1%

R12111

1K 1%

H5TQ2G63DFR-PBC

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

D13_DDR1_VREFCA

0.1uF

C12102

IC12101

D13_DDR1_VREFCA

VREFCA

VREFDQ

ZQ

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

NC_1
NC_2
NC_3
NC_4
NC_6

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9

VDDC15_D13_DDR

R12112

1K 1%

R12113

1K 1%

C12103

D13_DDR1_VREFDQ

M8

H1

R12114
240

L8

1%

VDDC15_D13_DDR

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2

C12106

H9

C12107

J1
J9
L1
L9
T7

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

D13_DDR1_VREFDQ

0.1uF

0.1uF

0.1uF

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

+12V

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

L12201

BLM18PG121SN1D

C12202
10uF
16V

Switching freq: 700K

+12V

L12200

BLM18PG121SN1D

C12201
10uF
16V

Switching freq: 700K

+1.1V_D13_VDD

R12205

10K

R12201

R1

C12208

100pF

50V

15K1%

R12204

33K

1%

C12214
1uF
10V

VREG5

C12218
3300pF
50V

R2

Vout=0.765*(1+R1/R2)= 1.113V

+1.5V_D13_DDR

R12206

10K

EN

R1

R12200

C12207

100pF

50V

18K
1%

R12202

3.6K
1%

R12203
22K
1%

C12213
1uF
10V

R2

Vout=0.765*(1+R1/R2)=1.516V

VREG5

C12216
3300pF
50V

VFB

SS

TPS54327DDAR

EN

1

VFB

2

3

SS

4

3A

IC12200

TPS54327DDAR

1

2

THERMAL

3

4

3A

IC12201

9

THERMAL

8

9

7

6

5

[EP]GND

VIN

8

VBST

7

SW

6

GND

5

[EP]GND

VIN

VBST

SW

GND

+1.1V_D13_VDD

10uFC12200

HEVC option sheet

+1.1V_D13_VDD

0.1uF

16V

0.1uF
C12224

16V

C12225

L12205

2.2uH

NR5040T2R2N

L12204

3.6uH

SM-8040

10uFC12203

C12229

22uF

10V

+1.5V_D13_DDR

C12227

22uF

10V

C12204 0.1uF

C12205 0.1uF

ZD12201

OPT

C12232
22uF
10V

2.5V

ZD12200

OPT

C12231

22uF

10V

+1.5V_D13_DDR

2.5V

BLM18PG121SN1D

+2.5V_Normal

+3.3V_NORMAL

VDDC15_D13_DDR

L12208

22uF

C12241

VDD25_D13_XTAL

L12209

BLM18PG121SN1D

VDD33_D13_XTAL

L12207

BLM18PG121SN1D

0.1uF

C12244

C12242

+2.5V_Normal

0.1uF

4.7uFC12246

4.7uFC12245

10uFC12237

0.1uF

C12247

C12249 0.1uF

C12248 0.1uF

VDD25_D13

L12206

BLM18PG121SN1D

VREF_D13_M0

R12207

1K 1%

R12208

1K 1%

C12253

+1.1V_D13_VDD

10uFC12238

C12239 0.1uF

OPT

0.1uF

L12211

BLM18PG121SN1D

C12240 0.1uF

VDDC15_D13_DDRVDDC15_D13_DDR

VREF_D13_M1

R12209

1K 1%

R12210

1K 1%

C12259

VDDC11_D13_XTAL

4.7uFC12257

+3.3V_NORMAL

L12210

BLM18PG121SN1D

10uFC12243

OPT

0.1uF

C12260 0.1uF

VDD33_D13

10uFC12250

VDDC11_D13_XTAL

VDD25_D13_XTAL

VDD33_D13_XTAL

VREF_D13_M0

VREF_D13_M1

C12252 0.1uF

C12251 0.1uF

+1.1V_D13_VDD

VDDC15_D13_DDR

VDD25_D13

VDD33_D13

H10
H11
H12
H13

J13

K13
L13

M10
M11
M12
M13

P10
P11
P12
P13
P14
P15
P16
P17

E10
E11
E12

J15
K15
L15

W20

A15
A19

B15
B18
B19
B20

C10
C11
C12
C13
C14
C15
C16
C17
C18

D10
D11
D12
D13
D14
D15
D16
D17
D18

E13
E14
E15
E16
E17
E18
E19
E20

H8
H9

J8

M8

M9

T1
L8
K8
T2

P5
P6
P7
P8
P9

J6
K6
L6
U2

G6

U1

W1

A2
A3
A8

B8

C4
C5
C6
C7
C8
C9

D4
D5
D6
D7
D8
D9

E4
E5
E6
E7
E8
E9

F3

IC12000

HEVC

DVDD11_1
DVDD11_2
DVDD11_3
DVDD11_4
DVDD11_5
DVDD11_6
DVDD11_7
DVDD11_8
DVDD11_9
DVDD11_10
DVDD11_11
DVDD11_12
DVDD11_13
DVDD11_14
DVDD11_15
DVDD11_16
DVDD11_XTAL
AVDD11_HDMI_1
AVDD11_HDMI_2
AVDD11_PLL

DVDD15_DDR_1
DVDD15_DDR_2
DVDD15_DDR_3
DVDD15_DDR_4
DVDD15_DDR_5
DVDD15_DDR_6
DVDD15_DDR_7
DVDD15_DDR_8
DVDD15_DDR_9
DVDD15_DDR_10
DVDD15_DDR_11
DVDD15_DDR_12
DVDD15_DDR_13

DVDD25_OTP
AVDD25_HDMI_1
AVDD25_HDMI_2
AVDD25_PLL

DVDD33_1
DVDD33_2
DVDD33_3
DVDD33_4
DVDD33_5
DVDD33_6
DVDD33_7
DVDD33_XTAL

VREF0_DDR
VREF1_DDR

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55

LG1153

VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98

VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162

F4
F17
F18
F19
F20
G3
G4
G7
G8
G9
G10
G11
G12
G13
G14
G15
G17
G18
H3
H4
H6
H7
H14
H15
H17
H18
J3
J4
J7
J9
J10
J11
J12
J14
J17
J18
K3
K4
K7
K9
K10
K11
K12
K14
K17
K18
L3
L4
L7
L9
L10
L11
L12
L14
L17
L18
M3
M4
M6
M7
M14
M15
M17
M18
N3
N4
N17
N18
N19
N20
P1
P2
P3
P4
P18
P19
P20
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13
R14
R15
R16
R17
R18
R19
R20
T3
T4
T18
T19
T20
U3
U4
U18
U19
U20
V1
V20

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

IC2500

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

LGE7410

[51P HS-LVDS input wafer]

P100

FI-RE51S-HF-J-R1500

1

2

3

4

5

6

R100 0

7

8

9

R3007 0

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

PA168_AB_Reset

PWM_BPL

FRC_DONE

URSA7_Reset

RXA0N

RXA0P

RXA1N

RXA1P

RXA2N

RXA2P

RXACLKN

RXACLKP

RXA3N

RXA3P

RXA4N

RXA4P

RXB0N

RXB0P

RXB1N

RXB1P

RXB2N

RXB2P

RXBCLKN

RXBCLKP

RXB3N

RXB3P

RXB4N

RXB4P

PANEL_CTL

L100

MLB-201209-0120P-N2

C100
10uF
25V

+3.3V

R250
1K

OPT

R251
1K

OPT

C101
10uF
25V

FLASH_WP

+3.3V

D

Q101

2N7002A

R103 33

OPT

+3.3V

D

Q100

2N7002A

R104 33

OPT

RXA0N

[41P HS-LVDS input wafer]

H13_41pin LVDS

C103

0.1uF
16V

G

S

C102

0.1uF
16V

G

S

SDA_M1_A

SCL_M1_A

P101

FI-RE41S-HF-J-R1500

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

OPTION (LVDS 4CH)

RXC0N

RXC0P

RXC1N

RXC1P

RXC2N

RXC2P

RXCCLKN

RXCCLKP

RXC3N

RXC3P

RXC4N

RXC4P

RXD0N

RXD0P

RXD1N

RXD1P

RXD2N

RXD2P

RXDCLKN

RXDCLKP

RXD3N

RXD3P

RXD4N

RXD4P

RXA0P
RXA1N
RXA1P
RXA2N

RXA2P
RXACLKN
RXACLKP

RXA3N

RXA3P

RXA4N

RXA4P

RXB0N

RXB0P

RXB1N

RXB1P

RXB2N

RXB2P
RXBCLKN
RXBCLKP

RXB3N

RXB3P

RXB4N

RXB4P

RXC0N

RXC0P

RXC1N

RXC1P

RXC2N

RXC2P
RXCCLKN
RXCCLKP

RXC3N

RXC3P

RXC4N

RXC4P

RXD0N

RXD0P

RXD1N

RXD1P

RXD2N

RXD2P
RXDCLKN
RXDCLKP

RXD3N

RXD3P

RXD4N

RXD4P

AG9

RA0N

AH9

RA0P

AJ10

RA1N

AJ9

RA1P

AJ11

RA2N

AH10

RA2P

AH11

RACKN

AG10

RACKP

AG11

RA3N

AG12

RA3P

AJ12

RA4N

AH12

RA4P

AM4

RB0N

AL4

RB0P

AK4

RB1N

AL5

RB1P

AK5

RB2N

AL6

RB2P

AM6

RBCKN

AK6

RBCKP

AM7

RB3N

AL7

RB3P

AK7

RB4N

AL8

RB4P

AK8

RC0N

AL9

RC0P

AM9

RC1N

AK9

RC1P

AM10

RC2N

AL10

RC2P

AK10

RCCKN

AL11

RCCKP

AK11

RC3N

AL12

RC3P

AM12

RC4N

AK12

RC4P

AM13

RD0N

AL13

RD0P

AK13

RD1N

AL14

RD1P

AK14

RD2N

AL15

RD2P

AM15

RDCKN

AK15

RDCKP

AM16

RD3N

AL16

RD3P

AK16

RD4N

AL17

RD4P

AK17

RE0N

AL18

RE0P

AM18

RE1N

AK18

RE1P

AM19

RE2N

AL19

RE2P

AK19

RECKN

AL20

RECKP

AK20

RE3N

AL21

RE3P

AM21

RE4N

AK21

RE4P

AM22

RXM[0]

AL22

RXP[0]

AK22

RXM[1]

AL23

RXP[1]

AK23

RXM[2]

AL24

RXP[2]

AM24

RXM[3]

AK24

RXP[3]

AM25

RXM[4]

AL25

RXP[4]

AK25

RXM[5]

AL26

RXP[5]

AK26

RXM[6]

AL27

RXP[6]

AM27

RXM[7]

AK27

RXP[7]

AM28

RXM[8]

AL28

RXP[8]

AK28

RXM[9]

AL29

RXP[9]

AD28

VX1R_HTPD_O/GPIO[12]

AD29

VX1R_HTPD_V/GPIO[13]

AC27

GPIO[14]

AC28

VX1R_LOCK_O/GPIO[15]

AB27

VX1R_LOCK_V/GPIO[16]

AB28

GPIO[17]

AK29

NC_1

AL30

NC_2

AM30

NC_3

AK30

NC_4

ECKP/VBY11N
ECKM/VBY11P

A0P/VBY0N
A0M/VBY0P
A1P/VBY1N
A1M/VBY1P
A2P/VBY2N

A2M/VBY2P
ACKP/VBY3N
ACKM/VBY3P

A3P/VBY4N

A3M/VBY4P

A4P/VBY5N

A4M/VBY5P

B0P/VBY6N

B0M/VBY6P

B1P/VBY7N

B1M/VBY7P

BCKP
BCKM

CCKP
CCKM

DCKP
DCKM

E0P/VBY8N

E0M/VBY8P

E1P/VBY9N
E1M/VBY10P
E2P/VBY10N
E2M/VBY10P

E3P/VBY12N
E3M/VBY12P
E4P/VBY13N
E4M/VBY13P
F0P/VBY14N
F0M/VBY14P
F1P/VBY15N
F1M/VBY15P

FCKP
FCPM

GCKP
GCKM

HCKP
HCKM

NC_5
NC_6
NC_7
NC_8

NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20

AL2
AL1
AK3
AK1
AJ3
AJ2
AH3
AH2
AG3
AG1
AG2
AF3
AE3
AE2
AE1
AD3
AA5

B2P

Y4

B2M

AC2
AB3
Y5

B3P

Y6

B3M

AB2

B4P

AB1

B4M

W6

C0P

V6

C0M

AA3

C1P

AA1

C1M

W5

C2P

W4

C2M

AA2
Y3
V5

C3P

U4

C3M

Y2

C4P

W3

C4M

U5

D0P

U6

D0M

W2

D1P

W1

D1M

V3

D2P

V1

D2M

T5
T4
V2

D3P

U3

D3M

R5

D4P

P4

D4M

T1
R3
R1
R2
P2
N3
N2
N1
M1
M2
L3
L2
K2
K1
J3
J1
G3

F2P

G2

F2M

G1
F3
F1

F3P

F2

F3M

E3

F4P

E2

F4M

D3

G0P

D2

G0M

G4

G1P

G5

G1M

H5

G2P

H6

G2M

G6
F4
D1

G3P

D4

G3M

C1

G4P

C2

G4M

B1

H0P

B2

H0M

A2

H1P

C3

H1M

C4

H2P

B4

H2M

C5
B5
A5

H3P

C6

H3M

A6

H4P

B6

H4M

A3
B3
T6
R6
AD2
AC3
U2
T3
P5
P6
H3
H2
C7
B7
C8
B8

MTXA0P
MTXA0M
MTXA1P
MTXA1M
MTXA2P
MTXA2M
MTXACKP
MTXACKM
MTXA3P
MTXA3M
MTXA4P
MTXA4M
MTXB0P
MTXB0M
MTXB1P
MTXB1M
MTXB2P
MTXB2M
MTXBCKP
MTXBCKM
MTXB3P
MTXB3M
MTXB4P
MTXB4M

MTXE0P
MTXE0M
MTXE1P
MTXE1M
MTXE2P
MTXE2M
MTXECKP
MTXECKM
MTXE3P
MTXE3M
MTXE4P
MTXE4M
MTXF0P
MTXF0M
MTXF1P
MTXF1M
MTXF2P
MTXF2M
MTXFCKP
MTXFCKM
MTXF3P
MTXF3M
MTXF4P
MTXF4M

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

EAX65309301

2013.03.18

U_LVDS INPUT 2 22

MTXA0M

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

MTXA0P
MTXA1M
MTXA1P
MTXA2M
MTXA2P
MTXA3M
MTXA3P
MTXA4M

MTXA4P
MTXACKM
MTXACKP

MTXB0M

MTXB0P

MTXB1M

MTXB1P

MTXB2M

MTXB2P

MTXB3M

MTXB3P

MTXB4M

MTXB4P
MTXBCKM
MTXBCKP

MTXE0M

MTXE0P

MTXE1M

MTXE1P

MTXE2M

MTXE2P

MTXE3M

MTXE3P

MTXE4M

MTXE4P
MTXECKM
MTXECKP

MTXF0M

MTXF0P

MTXF1M

MTXF1P

MTXF2M

MTXF2P

MTXF3M

MTXF3P

MTXF4M

MTXF4P
MTXFCKM
MTXFCKP

R105
100

R145
100

R106
100

R151
100

Master

IC100

PA168-ES

R111

R117

100

100

1%

1%

1%

1%

1%

R146
100

R112
100

R152
100

1%

R147
100

1%

1%

R118
100

1%

1%

R153
100

1%

1%

R123
100

R148
100

R124
100

R154
100

R129

R135

100

100

R150
100

R136
100

R156
100

AK27

1%

AJ27
AK28
AJ28
AJ30
AJ29
AH30
AH29
AG30
AG29
AG28
AG27

AF30

1%

AF29
AE30
AE29
AD30
AD29
AC30
AC29
AB30
AB29
AC28
AC27

AA30

1%

AA29

Y30
Y29
W30
W29
V30
V29
U30
U29
V28
V27

T30

1%

T29
R30
R29
P30
P29
N30
N29
M30
M29
P28
P27

1%

1%

R149
100

1%

1%

R130
100

1%

1%

R155
100

1%

1%

LVDSRXA0N
LVDSRXA0P
LVDSRXA1N
LVDSRXA1P
LVDSRXA2N
LVDSRXA2P
LVDSRXA3N
LVDSRXA3P
LVDSRXA4N
LVDSRXA4P
LVDSRXACLKN
LVDSRXACLKP

LVDSRXB0N
LVDSRXB0P
LVDSRXB1N
LVDSRXB1P
LVDSRXB2N
LVDSRXB2P
LVDSRXB3N
LVDSRXB3P
LVDSRXB4N
LVDSRXB4P
LVDSRXBCLKN
LVDSRXBCLKP

LVDSRXC0N
LVDSRXC0P
LVDSRXC1N
LVDSRXC1P
LVDSRXC2N
LVDSRXC2P
LVDSRXC3N
LVDSRXC3P
LVDSRXC4N
LVDSRXC4P
LVDSRXCCLKN
LVDSRXCCLKP

LVDSRXD0N
LVDSRXD0P
LVDSRXD1N
LVDSRXD1P
LVDSRXD2N
LVDSRXD2P
LVDSRXD3N
LVDSRXD3P
LVDSRXD4N
LVDSRXD4P
LVDSRXDCLKN
LVDSRXDCLKP

[A]

HSRXN
HSRXP
VSRXN

VSRXP
EVSRXN
EVSRXP
CLKRXN
CLKRXP

REFCLKRXN
REFCLKRXP

R172
100

1%

J30
J29
L27
L26
H30
H29
M27
M26
K30
K29

R173
100

R174
100

1%

1%

R175
100

R176
100

1%

1%

iMXHSN
iMXHSP
iMXVSN
iMXVSP
iMXEVSN
iMXEVSP
iMXCLKN

iMXCLKP
iMXREFCLKN
iMXREFCLKP

R141

10K

R142

C115 0.1uFTXDAN7_L

C113 0.1uF
C114 0.1uFTXDAP3_L
C105 0.1uF
C106 0.1uF
C107 0.1uFTXDAN1_L
C108 0.1uF

C104 0.1uFTXDAP0_L

R143
R144

TXDAP7_L C116 0.1uF

TXDAN6_L C117 0.1uF

TXDAP6_L C118 0.1uF

TXDAN5_L C119 0.1uF

TXDAP5_L C110 0.1uF

TXDAN4_L C111 0.1uF

TXDAP4_L C112 0.1uF

TXDAN3_L

TXDAN2_L

TXDAP2_L

TXDAP1_L

TXDAN0_L C109 0.1uF

LOCKAn
HTPDAn

HTPDn_pulldown

12K 1%

H4
H5
E1
E2
G4
G5
J5
J4
F1
F2

AK6
AJ6
AK8

AJ8
AK10
AJ10
AK12
AJ12
AK14
AJ14
AK16
AJ16
AK18
AJ18
AK20
AJ20

100

AF22
AF23

100

U5

PA168-ES

HSTXN
HSTXP
VSTXN
VSTXP
EVSTXN
EVSTXP
CLKTXN
CLKTXP
REFCLKTXN
REFCLKTXP

TXD0N
TXD0P
TXD1N
TXD1P
TXD2N
TXD2P
TXD3N
TXD3P
TXD4N
TXD4P
TXD5N
TXD5P
TXD6N
TXD6P
TXD7N
TXD7P

LOCKN
HTPDN

LVDSTXRPI

IC100

[F]

LVDSTXA0N
LVDSTXA0P
LVDSTXA1N
LVDSTXA1P
LVDSTXA2N
LVDSTXA2P
LVDSTXA3N
LVDSTXA3P
LVDSTXA4N

LVDSTXA4P
LVDSTXACLKN
LVDSTXACLKP

LVDSTXB0N

LVDSTXB0P

LVDSTXB1N

LVDSTXB1P

LVDSTXB2N

LVDSTXB2P

LVDSTXB3N

LVDSTXB3P

LVDSTXB4N

LVDSTXB4P
LVDSTXBCLKN
LVDSTXBCLKP

LVDSTXC0N

LVDSTXC0P

LVDSTXC1N

LVDSTXC1P

LVDSTXC2N

LVDSTXC2P

LVDSTXC3N

LVDSTXC3P

LVDSTXC4N

LVDSTXC4P
LVDSTXCCLKN
LVDSTXCCLKP

LVDSTXD0N

LVDSTXD0P

LVDSTXD1N

LVDSTXD1P

LVDSTXD2N

LVDSTXD2P

LVDSTXD3N

LVDSTXD3P

LVDSTXD4N

LVDSTXD4P
LVDSTXDCLKN
LVDSTXDCLKP

AG1
AG2
AF1
AF2
AE1
AE2
AD1
AD2
AC1
AC2
AD3
AD4

AB1
AB2
AA1
AA2
Y1
Y2
W1
W2
V1
V2
W3
W4

U1
U2
T1
T2
R1
R2
P1
P2
N1
N2
R3
R4

M1
M2
L1
L2
K1
K2
J1
J2
H1
H2
L3
L4

MXAON0
MXAOP0
MXAON1
MXAOP1
MXAON2
MXAOP2
MXAON3
MXAOP3
MXAON4
MXAOP4
MXAONCLK
MXAOPCLK

MXAEN0
MXAEP0
MXAEN1
MXAEP1
MXAEN2
MXAEP2
MXAEN3
MXAEP3
MXAEN4
MXAEP4
MXAENCLK
MXAEPCLK

MXBON0
MXBOP0
MXBON1
MXBOP1
MXBON2
MXBOP2
MXBON3
MXBOP3
MXBON4
MXBOP4
MXBONCLK
MXBOPCLK

MXBEN0
MXBEP0
MXBEN1
MXBEP1
MXBEN2
MXBEP2
MXBEN3
MXBEP3
MXBEN4
MXBEP4
MXBENCLK
MXBEPCLK

MXAON0
MXAOP0
MXAON1
MXAOP1
MXAON2
MXAOP2
MXAON3
MXAOP3
MXAON4

MXAOP4
MXAONCLK
MXAOPCLK

MXAEN0

MXAEP0

MXAEN1

MXAEP1

MXAEN2

MXAEP2

MXAEN3

MXAEP3

MXAEN4

MXAEP4
MXAENCLK
MXAEPCLK

MXBON0

MXBOP0

MXBON1

MXBOP1

MXBON2

MXBOP2

MXBON3

MXBOP3

MXBON4

MXBOP4
MXBONCLK
MXBOPCLK

MXBEN0

MXBEP0

MXBEN1

MXBEP1

MXBEN2

MXBEP2

MXBEN3

MXBEP3

MXBEN4

MXBEP4
MXBENCLK
MXBEPCLK

R107
100

R108
100

R109
100

R110
100

Slave

IC200

PA168-ES

R119

R113

100

100

R114
100

R115
100

R116
100

1%

1%

R120
100

1%

1%

R121
100

1%

1%

R122
100

1%

1%

1%

1%

1%

1%

R125
100

R126
100

R127
100

R128
100

R131

R137

100

100

R138
100

R139
100

R140
100

AK27

1%

AJ27
AK28
AJ28
AJ30
AJ29
AH30
AH29
AG30
AG29
AG28
AG27

AF30

1%

AF29
AE30
AE29
AD30
AD29
AC30
AC29
AB30
AB29
AC28
AC27

AA30

1%

AA29

Y30
Y29
W30
W29
V30
V29
U30
U29
V28
V27

T30

1%

T29
R30
R29
P30
P29
N30
N29
M30
M29
P28
P27

1%

1%

R132
100

1%

1%

R133
100

1%

1%

R134
100

1%

1%

LVDSRXA0N
LVDSRXA0P
LVDSRXA1N
LVDSRXA1P
LVDSRXA2N
LVDSRXA2P
LVDSRXA3N
LVDSRXA3P
LVDSRXA4N
LVDSRXA4P
LVDSRXACLKN
LVDSRXACLKP

LVDSRXB0N
LVDSRXB0P
LVDSRXB1N
LVDSRXB1P
LVDSRXB2N
LVDSRXB2P
LVDSRXB3N
LVDSRXB3P
LVDSRXB4N
LVDSRXB4P
LVDSRXBCLKN
LVDSRXBCLKP

LVDSRXC0N
LVDSRXC0P
LVDSRXC1N
LVDSRXC1P
LVDSRXC2N
LVDSRXC2P
LVDSRXC3N
LVDSRXC3P
LVDSRXC4N
LVDSRXC4P
LVDSRXCCLKN
LVDSRXCCLKP

LVDSRXD0N
LVDSRXD0P
LVDSRXD1N
LVDSRXD1P
LVDSRXD2N
LVDSRXD2P
LVDSRXD3N
LVDSRXD3P
LVDSRXD4N
LVDSRXD4P
LVDSRXDCLKN
LVDSRXDCLKP

[A]

HSRXN
HSRXP
VSRXN

VSRXP
EVSRXN
EVSRXP
CLKRXN
CLKRXP

REFCLKRXN
REFCLKRXP

J30
J29
L27
L26
H30
H29
M27
M26
K30
K29

R157
100

R158
100

1%

1%

R159
100

R160

R161

100

100

1%

1%

1%

0

R162
R163
R164
R165
R166
R167
R168
R169
R170
R171

0
0
0
0
0
0
0
0
0

iMXHSN
iMXHSP
iMXVSN
iMXVSP
iMXEVSN
iMXEVSP
iMXCLKN
iMXCLKP
iMXREFCLKN
iMXREFCLKP

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

EAX65309301

2013.03.18

P_LVDS INPUT 3 22

[51P Vx1 output wafer]

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

[41P Vx1 output wafer]

+3.3V

22

R200

LD200

SML-512UW

R201

220

E

Q200

MMBT3906(NXP)

C

IC200

PA168-ES

[F]

LVDSTXA0N

H4

HSTXN

H5

HSTXP

E1

VSTXN

E2

VSTXP

G4

EVSTXN

G5

EVSTXP

J5

CLKTXN

J4

CLKTXP

F1

REFCLKTXN

F2

REFCLKTXP

TXDBN7_L

TXDBP7_L

TXDBN6_L

TXDBP6_L

TXDBN5_L

TXDBP5_L

TXDBN4_L

TXDBP4_L

TXDBN3_L

TXDBP3_L

TXDBN2_L

R202

10K
OPT

B

TXDBN1_L

TXDBP1_L

TXDBN0_L

TXDBP0_L

LOCKBn

HTPDBn

HTPDn_pulldown

R203

10K

R204

C213 0.1uF

C214 0.1uF

C215 0.1uF

C210 0.1uF

C211 0.1uF

C212 0.1uF

C207 0.1uF

C208 0.1uF

C209 0.1uF

C203 0.1uF

C204 0.1uF

C205 0.1uFTXDBP2_L

C206 0.1uF

C200 0.1uF

C201 0.1uF

C202 0.1uF

R205

R206

12K 1%

AK6

TXD0N

AJ6

TXD0P

AK8

TXD1N

AJ8

TXD1P

AK10

TXD2N

AJ10

TXD2P

AK12

TXD3N

AJ12

TXD3P

AK14

TXD4N

AJ14

TXD4P

AK16

TXD5N

AJ16

TXD5P

AK18

TXD6N

AJ18

TXD6P

AK20

TXD7N

AJ20

TXD7P

100

AF22

LOCKN

AF23

U5

HTPDN

LVDSTXRPI

100

LVDSTXA0P
LVDSTXA1N
LVDSTXA1P
LVDSTXA2N
LVDSTXA2P
LVDSTXA3N
LVDSTXA3P
LVDSTXA4N

LVDSTXA4P
LVDSTXACLKN
LVDSTXACLKP

LVDSTXB0N

LVDSTXB0P

LVDSTXB1N

LVDSTXB1P

LVDSTXB2N

LVDSTXB2P

LVDSTXB3N

LVDSTXB3P

LVDSTXB4N

LVDSTXB4P
LVDSTXBCLKN
LVDSTXBCLKP

LVDSTXC0N

LVDSTXC0P

LVDSTXC1N

LVDSTXC1P

LVDSTXC2N

LVDSTXC2P

LVDSTXC3N

LVDSTXC3P

LVDSTXC4N

LVDSTXC4P
LVDSTXCCLKN
LVDSTXCCLKP

LVDSTXD0N

LVDSTXD0P

LVDSTXD1N

LVDSTXD1P

LVDSTXD2N

LVDSTXD2P

LVDSTXD3N

LVDSTXD3P

LVDSTXD4N

LVDSTXD4P
LVDSTXDCLKN
LVDSTXDCLKP

AG1
AG2
AF1
AF2
AE1
AE2
AD1
AD2
AC1
AC2
AD3
AD4

AB1
AB2
AA1
AA2
Y1
Y2
W1
W2
V1
V2
W3
W4

U1
U2
T1
T2
R1
R2
P1
P2
N1
N2
R3
R4

M1
M2
L1
L2
K1
K2
J1
J2
H1
H2
L3
L4

P200

FI-RE51S-HF-J-R1500

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

+3.3V

L/D_Control_3.3V

R208

10K

R207

10K

OPT

MLB-201209-0120P-N2

C216
10uF
25V

OPT

TXDAP7_L

TXDAN7_L

TXDAP6_L

TXDAN6_L

TXDAP5_L

TXDAN5_L

TXDAP4_L

TXDAN4_L

TXDAP3_L

TXDAN3_L

TXDAP2_L

TXDAN2_L

TXDAP1_L

TXDAN1_L

TXDAP0_L

TXDAN0_L

100

R230

L/D_Control_GPIO

3D_EN

PANEL_VCC

L200

OPT

L_DIM_EN

C217
10uF
25V

OPT

LOCKn_IN

HTPDn_up

HTPDn_IN

+3.3V

R213
10K

R212
10K

OPT

+1.8V

R1505

4.7K

+1.8V

R209

4.7K

HTPDn_pullup

R1504

1.5K

G

S

Q1404

AO3438

R211

1.5K
HTPDn_pullup

G

S

HTPDn_pullup

Q203

AO3438

R220

0

OPT

R221

0

HTPDn_pullup

LOCKn_IN

HTPDn_IN

+3.3V

R214
10K

R215
10K

OPT

LOCKAn

R210
0

D

+3.3V

D

R222
10K

HTPDn_pullup

HTPDAn

HTPDAn

L/D_EN(Pin30)

- T-Con L/D Function
HIGH : Enable
LOW or NC : Disable

BIT_SEL(Pin31)

- Bit Selection
HIGH or NC : 10Bit
LOW : 8Bit

Input Data Format[1:0]

- Data Format 1(Pin36) = High
Data Format 0(Pin37) = Low
: Mode 3
(Divide screen into 4 area)

LOCKBn

HTPDn_pullup

R223
0

R224
0

+3.3V

HTPDBn

HTPDBn

HTPDn_up

IC2000

AZ1117BH-1.8TRE1

IN

3

1

ADJ/GND

TCON_I2C_EN

G

S

Q202

2N7002A

R217

OPT

33

TCON_I2C_EN

G

S

Q201

2N7002A

R216

OPT

33

+1.8V

OUT

2

R225
1

C218

C219

10uF

10uF

25V

25V

R219

D

0

R218

D

0

SCL_M1_A

SDA_M1_A

P201

FI-RE41S-HF-J-R1500

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

TXDBP7_L

TXDBN7_L

TXDBP6_L

TXDBN6_L

TXDBP5_L

TXDBN5_L

TXDBP4_L

TXDBN4_L

TXDBP3_L

TXDBN3_L

TXDBP2_L

TXDBN2_L

TXDBP1_L

TXDBN1_L

TXDBP0_L

TXDBN0_L

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

EAX65309301

P_Vx1 OUTPUT

2013.03.18
4 22

MMAA0

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

MMAA1
MMAA2
MMAA3
MMAA4
MMAA5
MMAA6

MMAA7
MMAA8

MMAA9
MMAA10
MMAA11

MMAA12

MMDMA0
MMDMA1
MMDMA2
MMDMA3

MMDQSAN0
MMDQSAP0
MMDQSAN1
MMDQSAP1
MMDQSAN2
MMDQSAP2
MMDQSAN3
MMDQSAP3

MMCKAN0
MMCKAP0
MMCKAN1
MMCKAP1

MMCKEA
MMODTA
MMRASA

MMCSA

MMCASA

MMWEA

MMAA0
MMAA1
MMAA2
MMAA3
MMAA4
MMAA5
MMAA6
MMAA7
MMAA8

MMAA9
MMAA10
MMAA11
MMAA12
MMBKA0
MMBKA1
MMBKA2

IC100

PA168-ES

C16

MDM1_0

C13

MDM0_1

C27

MDM2

E28

MDM3

B16

MDQS1N_0

A16

MDQS1P_0

B12

MDQS0N_1

A12

MDQS0P_1

B27

MDQS2N

A27

MDQS2P

E29

MDQS3N

E30

MDQS3P

D18

MCK0N

E19

MCK0P

A23

MCK1N

B23

MCK1P

D20

MCKE

A19

MODT

B19

MRAS

E20

MCS

A20

MCAS

C20

MWE

A22

MA0

E23

MA1

E22

MA2

C21

MA3

D23

MA4

C22

MA5

F23

MA6

B22

MA7

C24

MA8

C23

MA9

C19

MA10

C25

MA11

F25

MA12

A21

MBANK0

E24

MBANK1

E21

MBANK2

AVDD_DDR_PA1 AVDD_DDR_PA1

R311

R312

R309

R310

R307

R308

R304

R305

R306

R302

R303

R300

R301

120

120 5%

120 5%

120 5%

120 5%

120 5%

120 5%

120 5%

120 5%

120 5%

120 5%

120 5%

120 5%

R343

5%

120 5%

R344

120

R341

120 5%

R342

120 5%

R339

120 5%

R340

120 5%

R336

120 5%

R337

120 5%

R338

120 5%

R334

120 5%

R335

120 5%

R332

120 5%

R333

120 5%

[B]

MD15_0
MD11_1
MD14_2
MD10_3
MD13_4

MD12_6

MD0_10
MD6_11
MD2_12
MD7_13
MD1_14

MD4_15
MD19_16
MD23_17

MD22_19
MD17_20

MD16_22
MD20_23
MD31_24
MD28_25
MD29_26
MD25_27
MD27_28
MD24_29

MD26_31

MRESET

MREXT0

MREXT1

MVREF_1
MVREF_2

MMCKEA

MMRASA

5%

MMCASA

MMWEA

MMCSA
MMODTA R350
MMBKA0

MMBKA1
MMBKA2

MD9_5

MD8_7
MD3_8
MD5_9

MD18

MD21

MD30

C14
A17
D15
B17
C15
C17
A15
C18
A11
A13
A10
B14
C12
A14
B11
D13
C26
D28
A26
C28
B25
B28
A25
A28
B29
C30
B30
F29
D30
F30
C29
F28

D22

E16
G25

E15
H25

R353

R354

R351

R352

R349

R346

R347

R348

R355 240

C302

0.1uF

120 5%

120 5%

120 5%

120 5%

120 5%

5%

120

5%

120

5%

120

120 5%

R35722

240

1%R356

1%

MMDA0
MMDA1
MMDA2
MMDA3
MMDA4
MMDA5
MMDA6
MMDA7
MMDA8
MMDA9
MMDA10
MMDA11
MMDA12
MMDA13
MMDA14
MMDA15
MMDA16
MMDA17
MMDA18
MMDA19
MMDA20
MMDA21
MMDA22
MMDA23
MMDA24
MMDA25
MMDA26
MMDA27
MMDA28
MMDA29
MMDA30
MMDA31

C303

0.1uF

R365

120 5%

R366

120 5%

R363

120 5%

R364

120 5%

R361

120 5%

R362

120 5%

R358

120 5%

R359

120 5%

R360

120 5%

MVREFDQ_A

MMRESETA

MMAA0
MMAA1
MMAA2
MMAA3
MMAA4
MMAA5
MMAA6
MMAA7
MMAA8

MMAA9
MMAA10
MMAA11
MMAA12

MMBKA0
MMBKA1
MMBKA2

MMCKAP0

R371

120

MMCKAN0

MMCKEA

MMCSA
MMODTA
MMRASA

AVDD_DDR_PA1

MMCASA

MMWEA

MMRESETA

R370

10K

MMDQSAP0
MMDQSAN0

MMDQSAP1
MMDQSAN1

MMDMA0
MMDMA1

MMDA0

MMDA1

MMDA2

MMDA3

MMDA4

MMDA5

MMDA6

MMDA7

MMDA8

MMDA9
MMDA10
MMDA11
MMDA12
MMDA13
MMDA14
MMDA15

C300

0.1uF

R331
1K

1%

16V

R345
1K
1%

16V

0.1uF
C301

AVDD_DDR_PA1 MVREFCA_A

AVDD_DDR_PA1

H5TQ1G63EFR-PBC

IC300

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

NC_7

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

5%

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

+1.5V_P_DDR

VREFCA

VREFDQ

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

NC_1
NC_2
NC_3
NC_4
NC_6

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9

MVREFCA_A

M8

H1

L8

ZQ

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

J1
J9
L1
L9
T7

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

L300

C322 0.1uF

R372 240

AVDD_DDR_PA1

1%

C325

0.1uF

16V

R373
1K

1%

R374
1K

1%

AVDD_DDR_PA1

AVDD_DDR_PA1

MVREFDQ_A

16V

0.1uF
C328

MMCKAP1
MMCKAN1

MMCKEA

MMCSA
MMODTA
MMRASA
MMCASA

MMWEA

MMRESETA

MMDQSAP2
MMDQSAN2

MMDQSAP3
MMDQSAN3

MMDMA2
MMDMA3

MMDA16
MMDA17
MMDA18
MMDA19
MMDA20
MMDA21
MMDA22
MMDA23

MMDA24
MMDA25
MMDA26
MMDA27
MMDA28
MMDA29
MMDA30
MMDA31

MMAA0
MMAA1
MMAA2
MMAA3
MMAA4
MMAA5
MMAA6
MMAA7
MMAA8

MMAA9
MMAA10
MMAA11
MMAA12

MMBKA0
MMBKA1
MMBKA2

R375

120 5%

H5TQ1G63EFR-PBC

IC400

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

NC_7

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

VREFCA

VREFDQ

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

NC_1
NC_2
NC_3
NC_4
NC_6

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9

ZQ

MVREFCA_A

M8

MVREFDQ_A

H1

R376 240

L8

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

J1
J9
L1
L9
T7

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

C344 0.1uF

C343 0.1uF

AVDD_DDR_PA1

1%

AVDD_DDR_PA1

OPT

C304

0.1uF
16V

AVDD_DDR_PA1

C305

0.1uF
16V

C306

0.1uF
16V

C307

0.1uF
16V

C308

0.1uF
16V

C309

0.1uF
16V

C310
1uF
10V

C311
10uF
10V

C312
10uF
10V

OPT

C313

0.1uF
16V

C314

0.1uF
16V

C315

0.1uF
16V

C316

0.1uF
16V

C317

0.1uF
16V

C318

0.1uF
16V

C319
1uF
10V

C320
10uF
10V

C321
10uF
10V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

EAX65309301

P_DDR_A

2013.03.18
5 22

MMAB0

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

MMAB1
MMAB2
MMAB3
MMAB4
MMAB5
MMAB6

MMAB7
MMAB8

MMAB9
MMAB10
MMAB11

MMAB12

MMDMB0
MMDMB1
MMDMB2
MMDMB3

MMDQSBN0
MMDQSBP0
MMDQSBN1
MMDQSBP1
MMDQSBN2
MMDQSBP2
MMDQSBN3
MMDQSBP3

MMCKBN0
MMCKBP0
MMCKBN1
MMCKBP1

MMCKEB
MMODTB
MMRASB

MMCSB

MMCASB

MMWEB

MMAB0
MMAB1
MMAB2
MMAB3
MMAB4
MMAB5
MMAB6
MMAB7
MMAB8

MMAB9
MMAB10
MMAB11
MMAB12
MMBKB0
MMBKB1
MMBKB2

AVDD_DDR_PA2

R412

120 5%

R410

120 5%

R411

5%

120

R408

120 5%

R409

120 5%

R406

120 5%

R407

120 5%

R404

120 5%

R405

120 5%

R402

120 5%

R403

120 5%

R400

120 5%

R401

5%

120

C16
C13
C27
E28

B16
A16
B12
A12
B27
A27
E29
E30

D18
E19
A23
B23

D20
A19
B19
E20
A20
C20

A22
E23
E22
C21
D23
C22
F23
B22
C24
C23
C19
C25
F25
A21
E24
E21

R444

R442

R443

R440

R441

R438

R439

R436

R437

R434

R435

R432

R433

120 5%

120 5%

120 5%

120

120 5%

120 5%

120 5%

120 5%

120 5%

120

120 5%

120

120 5%

PA168-ES

MDM1_0
MDM0_1
MDM2
MDM3

MDQS1N_0
MDQS1P_0
MDQS0N_1
MDQS0P_1
MDQS2N
MDQS2P
MDQS3N
MDQS3P

MCK0N
MCK0P
MCK1N
MCK1P

MCKE
MODT
MRAS
MCS
MCAS
MWE

MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12
MBANK0
MBANK1
MBANK2

5%

5%

5%

IC200

[B]

MMCKEB

MMRASB
MMCASB

MMWEB

MMCSB
MMODTB
MMBKB0

MMBKB1
MMBKB2

MD15_0
MD11_1
MD14_2
MD10_3
MD13_4

MD9_5

MD12_6

MD8_7
MD3_8

MD5_9
MD0_10
MD6_11
MD2_12
MD7_13
MD1_14
MD4_15

MD19_16
MD23_17

MD18
MD22_19
MD17_20

MD21
MD16_22
MD20_23
MD31_24
MD28_25
MD29_26
MD25_27
MD27_28
MD24_29

MD30
MD26_31

MRESET

MREXT0
MREXT1

MVREF_1
MVREF_2

C14
A17
D15
B17
C15
C17
A15
C18
A11
A13
A10
B14
C12
A14
B11
D13
C26
D28
A26
C28
B25
B28
A25
A28
B29
C30
B30
F29
D30
F30
C29
F28

D22

R455 240

E16

R456 240

G25

E15
H25

0.1uF

AVDD_DDR_PA2

R454

120 5%

R452

120 5%

R453

120

5%

R450

120 5%

R451

5%

120

R448

120 5%

R449

120 5%

R446

5%

120

R447

120 5%

C402

R45722

1%

1%

R466

R464

R465

R462

R463

R460

R461

R458

R459

MMDB0
MMDB1
MMDB2
MMDB3
MMDB4
MMDB5
MMDB6
MMDB7
MMDB8
MMDB9
MMDB10
MMDB11
MMDB12
MMDB13
MMDB14
MMDB15
MMDB16
MMDB17
MMDB18
MMDB19
MMDB20
MMDB21
MMDB22
MMDB23
MMDB24
MMDB25
MMDB26
MMDB27
MMDB28
MMDB29
MMDB30
MMDB31

C403

0.1uF

120 5%

120 5%

120 5%

120 5%

120 5%

120 5%

5%

120

120 5%

120 5%

MVREFDQ_B

MMRESETB

AVDD_DDR_PA2

AVDD_DDR_PA2

MMAB10
MMAB11
MMAB12

MMBKB0
MMBKB1
MMBKB2

MMCKBP0
MMCKBN0

MMCKEB

MMCSB
MMODTB
MMRASB
MMCASB

MMWEB

MMRESETB

MMDQSBP0
MMDQSBN0

MMDQSBP1
MMDQSBN1

MMDMB0
MMDMB1

MMDB0

MMDB1

MMDB2

MMDB3

MMDB4

MMDB5

MMDB6

MMDB7

MMDB8

MMDB9
MMDB10
MMDB11
MMDB12
MMDB13
MMDB14
MMDB15

MMAB0
MMAB1
MMAB2
MMAB3
MMAB4
MMAB5
MMAB6
MMAB7
MMAB8
MMAB9

C400

0.1uF

R431
1K

1%

16V

R470

R471

120 5%

10K

1%

1K

R445

H5TQ1G63EFR-PBC

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

NC_7

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

MVREFCA_B

16V

0.1uF
C401

IC500

VREFCA

VREFDQ

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

NC_1
NC_2
NC_3
NC_4
NC_6

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9

AVDD_DDR_PA2

MVREFCA_B

M8

H1

L8

ZQ

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

J1
J9
L1
L9
T7

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

+1.5V_P_DDR

POWER Conn

C426 0.1uF

R472 240

1%

L400

C427

0.1uF

16V

R473
1K

1%

AVDD_DDR_PA2

AVDD_DDR_PA2

AVDD_DDR_PA2

C404

0.1uF
16V

AVDD_DDR_PA2

C413

0.1uF
16V

MVREFDQ_B

IC600

H5TQ1G63EFR-PBC

16V

1%

C430

MMAB0
MMAB1

0.1uF

R474

1K

MMAB2
MMAB3
MMAB4
MMAB5
MMAB6
MMAB7
MMAB8

MMAB9
MMAB10
MMAB11
MMAB12

MMBKB0
MMBKB1
MMBKB2

MMCKBP1

R475

120

MMCKBN1

MMCKEB

MMCSB
MMODTB
MMRASB
MMCASB

MMWEB

MMRESETB

MMDQSBP2
MMDQSBN2

MMDQSBP3
MMDQSBN3

MMDMB2
MMDMB3

MMDB16
MMDB17
MMDB18
MMDB19
MMDB20
MMDB21
MMDB22
MMDB23

MMDB24
MMDB25
MMDB26
MMDB27
MMDB28
MMDB29
MMDB30
MMDB31

C405

0.1uF
16V

C414

0.1uF
16V

C406

0.1uF
16V

C415

0.1uF
16V

C407

0.1uF
16V

C416

0.1uF
16V

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

NC_7

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

5%

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

C408

0.1uF
16V

C417

0.1uF
16V

C409

0.1uF
16V

C418

0.1uF
16V

VREFCA

VREFDQ

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9

C410
1uF
10V

C419
1uF
10V

NC_1
NC_2
NC_3
NC_4
NC_6

ZQ

C411
10uF
10V

C420
10uF
10V

MVREFCA_B

M8

MVREFDQ_B

H1

R476 240

L8

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

J1
J9
L1
L9
T7

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

C448 0.1uF

C447 0.1uF

1%

OPT

C412
10uF
10V

OPT

C421
10uF
10V

AVDD_DDR_PA2

AVDD_DDR_PA2

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

EAX65309301

2013.03.18
6 22P_DDR_B

SCL_S_A

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

SDA_S_A
SCL_M1_A
SDA_M1_A

SCL_M2_A
SDA_M2_A

CLOSE TO PA168_A

PA168 HW OPT

+3.3V

R1507

1K

R15081KOLED

R1509

1K

H13

R1510

1KL9R1511

LCD

FRC_DONE

3D_EN

TCON_I2C_EN

1K

SR CHIP

R1512

1K

NO SR CHIP

R6531K21:9

R654

NO 21:9

R514

10K

R509

47K

R655

1K

SR Stable

1K

R656

1K

NO SR Stable

R507 0

+3.3V

R652 1K

+3.3V

OPT

R571

LD501

SML-512UW

OPT

R572

E

OPT

MMBT3906(NXP)

Q501

C

OPT

22

OPT

220

B

100

R500

100

R501

100

R502

100

R503

100

R504

100

R505

RSTn_A

TESTEN_A

GPIOB2_AB
GPIOB3_AB

PWM_BPL

GPIOB6_AB
GPIOB7_AB

GPIOC0_AB
GPIOC1_AB
GPIOC2_AB

GPIOC3_AB

R644

10K

FLASH_WP_P1

R520

10K
OPT

C500

3.3pF
50V

C502

3.3pF
50V

C501

3.3pF
50V
OPT

R508

C503

3.3pF
50V
OPT

IC100

PA168-ES

AG24

TWOWSCL0

AH24

TWOWSDA0

E6

TWOWSCL1

B4

TWOWSDA1

A4

TWOWSCL2

C5

AJ24
AK24

AE23

AK22
AJ22
AH22
AG22
AK23
AJ23
AH23
AG23

A8

B7
A6
E9
D8
C6
D7
D6
B5

E7
A3
C4
D5
E5
F6
D4
B3

TWOWSDA2

INTL
INTH

RESETN
TESTEN

GPIOA0
GPIOA1
GPIOA2
GPIOA3
GPIOA4
GPIOA5
GPIOA6
GPIOA7

GPIOB0
GPIOB1
GPIOB2
GPIOB3
GPIOB4
GPIOB5
GPIOB6
GPIOB7

GPIOC0
GPIOC1
GPIOC2
GPIOC3
GPIOC4
GPIOC5
GPIOC6
GPIOC7

C508

C507

3.3pF

3.3pF
50V

50V

100

OPT

R512

100

OPT

R513

100

C506

0.1uF

100

R519

100

OPT

R521

100

OPT

R510

100

OPT

R511

100

R522

100

R523

100

R524

100

OPT

R525

100

R526

100

R527

100

R528

100

R529

100

R530

100

R531

100

R532

100

R533

100

OPT

R534

[C]

LVDSRXTESTOUT

SLVRST0
SLVRST1
SLVRST2

TDI
TMS
TCK

TRSTN

TDO

SPICS0
SPICLK
SPITXD
SPIRXD

SPI2TXD

UARTRXD0
UARTTXD0

UARTRXD1
UARTTXD1

GPIOD0
GPIOD1
GPIOD2
GPIOD3
GPIOD4
GPIOD5
GPIOD6
GPIOD7

GPIOE0
GPIOE1
GPIOE2
GPIOE3
GPIOE4
GPIOE5
GPIOE6
GPIOE7

XIN

XOUT

E12
C10
D11

E8
AK25
AJ25
B6
AH25

U4
M5
N5
P5
T5

C7
A5

AG25
AF24

E4
C3
C2
D3
D2
C1
E3
D1

D10
E11
B8
C9
E10
A7
D9
C8

AF25

AJ2
AJ1

C509

R536

R537

R538

R539

R540

R541

R542

R543

R544

R545

R546

R548

R549

R550

R551

R552

R553

R554
R555

R556

R557

R558

R559

R560

R561

R562

R563

R564

R565

R566

R567

R649

R535

0.1uF

+3.3V

R751

4.7K

+3.3V

SCL_S_B

SDA_S_B
SCL_M1_B
SDA_M1_B

+3.3V

R650

1K

FRC_DONE_Slave

100

100

OPT

100

OPT

100

100

100

100

100

100

100

100

100

100

100

100

OPT

100

OPT

100

100

100

100

100

100

OPT

100

OPT

100

100

100

100

100

100

OPT

100

100

100

OPT

100

OPT

SLVRST0_AB

PA_TDI_A
PA_TMS_A
PA_TCK_A
PA_TRST_A
PA_TDO_A

SPICS0_A
SPICLK_A
SPITXD_A

CLOSE TO PA168_B

1K
R568

SPIRXD_A
SPI2TXD_A

U_RX0_A
U_TX0_A

GPIOD0_AB
FRC_DONE_Slave
URSA7_stable
GPIOD3_AB
SPI2TXD_B

GPIOD7_AB

GPIOE0_A
GPIOE1_A
GPIOE2_A
GPIOE3_A

GPIOE5_AB
GPIOE6_AB

100

R573

100

R574

100

R575

100

R576

100

R577

OPT

100

OPT

R578

RSTn_B

TESTEN_B

GPIOB2_AB
GPIOB3_AB

GPIOB6_AB
GPIOB7_AB

GPIOC0_AB
GPIOC1_AB
GPIOC2_AB
GPIOC3_AB

FLASH_WP_P2

C512

3.3pF
50V
OPT

C514

3.3pF
50V
OPT

+3.3V

C515

3.3pF
50V

R581

C517

3.3pF
50V

AG24

TWOWSCL0

AH24

TWOWSDA0

E6

TWOWSCL1

B4

TWOWSDA1

A4

TWOWSCL2

C5

C521

C522

3.3pF

3.3pF

50V

50V

OPT

100

R585

OPT

100

R586

100

C520

0.1uF

100

OPT

R587

100

OPT

R588

100

OPT

R589

100

OPT

R590

100

OPT

R591

100

R592

100

OPT

R593

100

OPT

R594

100

OPT

R583

100

OPT

R584

100

R595

100

R596

100

OPT

R597

100

OPT

R598

100

R599

100

R600

100

R601

100

R602

100

R603

100

R604

100

OPT

R605

100

R606

100

OPT

R607

AJ24
AK24

AE23

AK22
AJ22
AH22
AG22
AK23
AJ23
AH23
AG23

A8

B7
A6
E9
D8
C6
D7
D6
B5

E7
A3
C4
D5
E5
F6
D4
B3

TWOWSDA2

INTL
INTH

RESETN
TESTEN

GPIOA0
GPIOA1
GPIOA2
GPIOA3
GPIOA4
GPIOA5
GPIOA6
GPIOA7

GPIOB0
GPIOB1
GPIOB2
GPIOB3
GPIOB4
GPIOB5
GPIOB6
GPIOB7

GPIOC0
GPIOC1
GPIOC2
GPIOC3
GPIOC4
GPIOC5
GPIOC6
GPIOC7

C511

R569

2.2M

X-TAL_1

GND_1

X500

27MHz

1

2

4

3

GND_2

X-TAL_2

15pF

C510

15pF

OPT

22

R506

OPT

LD503

SML-512UW

OPT

R579

220

E

OPT

MMBT3906(NXP)

Q502

C

R580

10K
OPT

B

IC200

PA168-ES

[C]

LVDSRXTESTOUT

SLVRST0
SLVRST1
SLVRST2

TDI
TMS
TCK

TRSTN

TDO

SPICS0
SPICLK
SPITXD
SPIRXD

SPI2TXD

UARTRXD0
UARTTXD0

UARTRXD1
UARTTXD1

GPIOD0
GPIOD1
GPIOD2
GPIOD3
GPIOD4
GPIOD5
GPIOD6
GPIOD7

GPIOE0
GPIOE1
GPIOE2
GPIOE3
GPIOE4
GPIOE5
GPIOE6
GPIOE7

XIN

XOUT

E12
C10
D11

E8
AK25
AJ25
B6
AH25

U4
M5
N5
P5
T5

C7
A5

AG25
AF24

E4
C3
C2
D3
D2
C1
E3
D1

D10
E11
B8
C9
E10
A7
D9
C8

AF25

AJ2
AJ1

R609

R610

R611

R612

R613

R614

R615

R616

R617

R618

R619

R621

R622

R623

R624

R625

R626

R627
R628

R629

R630

R631

R632

R633

R634

R635

R636

R637

R638

R639

R640

R641

R608

R642

2.2M

100

100

100

100

100

100

100

100

100

100

100

100

100

100

100

100

100

100

100

100

100

100

100

100

100

100

100

100

100

100

100

100

100

C523

0.1uF

OPT

OPT

OPT

OPT

OPT

OPT

OPT

OPT

OPT

OPT

X-TAL_1

GND_1

X502

27MHz

1

2

4

3

SLVRST0_AB

PA_TDI_B
PA_TMS_B
PA_TCK_B
PA_TRST_B
PA_TDO_B

SPICS0_B
SPICLK_B
SPITXD_B
SPIRXD_B
SPI2TXD_B

U_RX0_B
U_TX0_B

GPIOD0_AB

URSA7_stable
GPIOD3_AB
SPI2TXD_A

GPIOD7_AB

GPIOE0_B
GPIOE1_B
GPIOE2_B
GPIOE3_B

GPIOE5_AB
GPIOE6_AB

C525

15pF

GND_2

X-TAL_2

C524

15pF

+3.3V

+3.3V

1K

1K

R643

R651

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

EAX65309301

2013.03.18

P_GPIO_AB 8 22

+3.3V

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

+3.3V

SPICS0_A

SPIRXD_A

FLASH_WP

FLASH_WP_P1

100

R547

R703 0

OPT

W25Q16BVSSIG(TRAY)

IC700

CS

1

DO[IO1]

%WP[IO2]

GND

2

3

4

2MByte

(Debug use)

VCC

8

HOLD[IO3]

7

CLK

6

DI[IO0]

5

IIC Slave A

R709
10K

C601

0.1uF
16V

16V

OPT

C610

0.1uF

WAFER-STRAIGHT

P602

12507WS-04L

3.3V

GND

SCL

SDA

5

SPICLK_A

SPITXD_A

1

2

3

4

+3.3V

R704

4.7K

R707

4.7K

SCL_S_A
SDA_S_A

SPICS0_B

SPIRXD_B

FLASH_WP

FLASH_WP_P2

R713

R714

R620

R719 0

0

0

100

OPT

SCL_S_B
SDA_S_B

W25Q16BVSSIG(TRAY)

IC800

CS

1

DO[IO1]

%WP[IO2]

GND

2

3

4

2MByte

VCC

8

HOLD[IO3]

7

CLK

6

DI[IO0]

5

IIC Slave B

R735
10K

C611

OPT

C603

0.1uF
16V

0.1uF

16V

SPICLK_B

SPITXD_B

IIC Master 1 A

(Main connection use)

IIC Master 2 A

(Master/Slave connection use)

WAFER-STRAIGHT

P601

12507WS-04L

3.3V

GND

SCL

SDA

5

+3.3V

R705

R708

1.8K

1.8K

R715 0

OPT

R716 0

OPT

SCL_M1_B
SDA_M1_B

IIC Master 1 B

1

2

3

4

SCL_M1_A
SDA_M1_A

+3.3V

R706

R710

4.7K

4.7K

SCL_M2_A
SDA_M2_A

0

R717

R718 0

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

EAX65309301

2013.03.14

P_SPI,IIC 9 22

Master A

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

Master B

SW701

JTP-1127WEM

1 2

43

+3.3V

R737

4.7K
R739

0

C700

0.1uF
OPT

+3.3V

R745

SW703

RSTn_A

JTP-1127WEM

1 2

R741 0

PA168_AB_Reset

43

4.7K
R746

0

C702

0.1uF
OPT

RSTn_B

OPT

R749 0

PA168_AB_Reset

M701 OPT

MDS62110215

M702 OPT

MDS62110215

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

M703 OPT

MDS62110215

M704 OPT

MDS62110215

EAX65309301

P_RESET

2013.03.18
10 22

Pin Header Insert

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

+3.3V

GPIOE0_A

GPIOD7_AB

GPIOD7_AB

R827

1K

R812

1K

R826

10K

10K

GPIOE0_B

R811

+3.3V +3.3V

R808

10K

R807

10K

OPT

R810

10K

R814

10K

OPT

P911

1

2

3

4

5

R821

10K

R824

10K

R825

10K

OPT

R829

10K

OPT

GPIOE1_A

GPIOE2_A

GPIOE3_A

GPIOE1_B

GPIOE2_B

GPIOE3_B

Master: 0110 Slave: 1100

OPT

OPT

R813

1K

R809

1K

R806

1K

R805

1K

OPT

R820

1K

R822

1K

OPT

R823

1K

R828

1K

Name

Bootstrap0

Function

0:From SPI Flash

1:From internal ROM

0:PA168 WORKS as the master chip

Bootstrap1

1:PA168 WORKS as the slave chip

Bootstrap2
Bootstrap3

TWOWO bus address selection

Bootstrap4

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

EAX65309301

2013.03.18

P_BOOTSTRAP 11 22

+3.3V

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

+3.3V

TESTEN_A

U_RX0_A

U_TX0_A

+3.3V

R910
10K

OPT

R909

0

UART FOR DEBUG PA138A

P900

12507WS-04L

1

2

3

4

WAFER-STRAIGHT

5

TESTEN_B

U_RX0_B

U_TX0_B

+3.3V

R930
10K

OPT

R929

0

UART FOR DEBUG PA138B

P901

12507WS-04L

WAFER-STRAIGHT

1

3.3V

2

3

4

5

+3.3V

P1909

12505WS-10A00

PA168_JTAG

R906

1

2

3

4

5

6

7

8

9

10

11

R905

10K

10K

R907

10K

R908

10K

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

+3.3V

P909

12505WS-10A00

R913

10K

PA_TDO_A

PA_TMS_A

PA_TDI_A PA_TDI_B

RSTn_A

PA168_JTAG

R926

1

2

3

4

5

6

7

8

9

10

11

R925

10K

10K

R927

10K

R928

10K

R933

10K

PA_TCK_BPA_TCK_A

PA_TDO_B

PA_TMS_B

PA_TRST_BPA_TRST_A

EAX65309301
P_UART,JTAG 12 22

RSTn_B

2013.03.18

AE25

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

AF11
AF13
AF17
AF19

AG10
AG12
AG14
AG16
AG18
AG21

AH11
AH13
AH15
AH17
AH19
AH21

AK11
AK13
AK15
AK17
AK19
AK21
AK26

IC100

PA168-ES

A1

[D]

VSS_1

A2

VSS_2

A29

VSS_3

B10

VSS_4

B13

VSS_5

B15

VSS_6

B18

VSS_7

B20

VSS_8

B24

VSS_9

B26

VSS_10

D12

VSS_11

D17

VSS_12

D25

VSS_13

D27

VSS_14

D29

VSS_15

E14

VSS_16

E18

VSS_17

E26

VSS_18

F7

VSS_19

F26

VSS_20

F27

VSS_21

G28

VSS_22

G29

VSS_23

L15

VSS_24

L18

VSS_25

L20

VSS_26

M11

VSS_27

M14

VSS_28

M16

VSS_29

N13

VSS_30

N15

VSS_31

N17

VSS_32

N20

VSS_33

P11

VSS_34

P14

VSS_35

P15

VSS_36

P16

VSS_37

P17

VSS_38

P18

VSS_39

R13

VSS_40

R14

VSS_41

R15

VSS_42

R16

VSS_43

R17

VSS_44

R19

VSS_45

T12

VSS_46

T14

VSS_47

T15

VSS_48

T16

VSS_49

T17

VSS_50

T18

VSS_51

U13

VSS_52

U14

VSS_53

U15

VSS_54

U16

VSS_55

U17

VSS_56

U19

VSS_57

V12

VSS_58

V14

VSS_59

V15

VSS_60

V16

VSS_61

V17

VSS_62

V18

VSS_63

W13

VSS_64

W15

VSS_65

W16

VSS_66

W17

VSS_67

AE8

VSS_68
VSS_69

AF5

VSS_70

AF7

VSS_71

AF9

VSS_72
VSS_73
VSS_74
VSS_75
VSS_76

AG4

VSS_77

AG8

VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84

AH5

VSS_85

AH7

VSS_86

AH9

VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93

AK1

VSS_94

AK3

VSS_95

AK5

VSS_96

AK7

VSS_97

AK9

VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105

VTVDD1V_10
VTVDD1V_11
VTVDD1V_12
VTVDD1V_13
VTVDD1V_14
VTVDD1V_15
VTVDD1V_16
VTVDD1V_17
VTVDD1V_18
VTVDD1V_19
VTVDD1V_20
VTVDD1V_21
VTVDD1V_22
VTVDD1V_23
VTVDD1V_24
VTVDD1V_25
VTVDD1V_26
VTVDD1V_27
VTVDD1V_28
VTVDD1V_29
VTVDD1V_30
VTVDD1V_31
VTVDD1V_32
VTVDD1V_33

VDDM18_15_1
VDDM18_15_2
VDDM18_15_3
VDDM18_15_4
VDDM18_15_5
VDDM18_15_6
VDDM18_15_7
VDDM18_15_8

VDDM18_15_9
VDDM18_15_10
VDDM18_15_11
VDDM18_15_12
VDDM18_15_13
VDDM18_15_14
VDDM18_15_15
VDDM18_15_16
VDDM18_15_17
VDDM18_15_18
VDDM18_15_19
VDDM18_15_20
VDDM18_15_21
VDDM18_15_22
VDDM18_15_23

OSCVDD1V

DPLLVDD1V

VDD1V_34

VDD1V_1
VDD1V_2
VDD1V_3
VDD1V_4
VDD1V_5
VDD1V_6
VDD1V_7
VDD1V_8

VDD1V_9
VDD1V_10
VDD1V_11
VDD1V_12
VDD1V_13
VDD1V_14
VDD1V_15
VDD1V_16
VDD1V_17
VDD1V_18
VDD1V_19
VDD1V_20
VDD1V_21
VDD1V_22
VDD1V_23
VDD1V_24
VDD1V_25
VDD1V_26
VDD1V_27
VDD1V_28
VDD1V_29
VDD1V_30
VDD1V_31
VDD1V_32
VDD1V_33

VTVDD1V_1
VTVDD1V_2
VTVDD1V_3
VTVDD1V_4
VTVDD1V_5
VTVDD1V_6
VTVDD1V_7
VTVDD1V_8
VTVDD1V_9

AH4

AK2

AE7

L12
L14
L16
M12
M13
M15
M17
M18
M19
N12
N14
N16
N18
N19
P12
P13
P19
R12
R18
R20
T13
T19
U12
U18
V13
V19
W12
W14
W18
W19
Y12
Y13
Y17

Y14
Y15
Y16
AF8
AF10
AF12
AF18
AF20
AG7
AG9
AG11
AG13
AG15
AG17
AG19
AG20
AH6
AH8
AH10
AH12
AH14
AH16
AH18
AH20
AJ5
AJ7
AJ9
AJ11
AJ13
AJ15
AJ17
AJ19
AJ21

A9
A18
A24
A30
B21
C11
D14
D16
D19
D21
D24
D26
E17
E25
E27
F24
G26
G27
G30
L17
L19
M20
P20

DPLL_OSC_VDD1V_A

+1.05V_A

AVDD_DDR_PA1

+1.05V_A

+1.05V_A

MLB-201209-0120P-N2

AVDD_DDR_PA1

C1005

0.1uF
16V

C1012

0.1uF
16V

Close to VTVDD1V Pin

C1003

0.1uF
16V

L1002

C1001

0.1uF
16V

C1010

0.1uF
16V

C1008

0.1uF
16V

C1019

0.1uF
16V

C1017

0.1uF
16V

C1026
1uF
10V

C1015

0.1uF
16V

C1025

0.1uF
16V

C1023

0.1uF
16V

C1033

0.1uF
16V

C1021

0.1uF
16V

Close to PORVDD1V

C1088

4.7uF
10V

C1030

4.7uF
10V

C1006
1uF
10V

C1039
1uF
10V

C1000

0.1uF
16V

DPLL_OSC_VDD1V_A

C1013

0.1uF
16V

Close to DPLLVDD1V PinClose to OSCVDD1V Pin

C1028

0.1uF
16V

C1034
1uF
10V

C1045

0.1uF
16V

C1002

0.1uF
16V

C1040
10uF
10V

OPT

C1046
10uF
10V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

EAX65309301

PA168_POWER_A1

2013.03.18
13 22

+2.5V

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

VPLLVDD25_A

MPLLVDD25_A

MEPLLVDD25_A

R1102

R1101

R1100

IC100

PA168-ES

R1103

1.2K

AF14

AF15

C1105

C1104

0.1uF

22uF

16V

10V

10

C1102
22uF
10V

10

C1100
22uF
10V

10

C1103

0.1uF
16V

C1101

0.1uF
16V

AF16

AA27
AB26
AB28
AC25
AD26
AD28
AE27
AF26
AF28
AH26
AH28
AK30

H27

H26

J26

J27

L30
N27
P26
R27
T20
T26
T28
U27
V20
V26
W27
Y20
Y26
Y28

H28
K26
K28

G1
H3
K3
K5
L5
M3
N4
P3
R5
T3

T11

V3

V11

W5

Y3
Y11
AA4
AB3
AB5
AC4
AC6
AD5
AE4
AE6
AF3
AH1

F3

F5

H6

V5

REXT

VPLLVSS25CAP

VPLLVDD25

MPLLVSS25CAP

MPLLVDD25

MEPLLVSS25CAP

MEPLLVDD25

LVRVSS_1
LVRVSS_2
LVRVSS_3
LVRVSS_4
LVRVSS_5
LVRVSS_6
LVRVSS_7
LVRVSS_8
LVRVSS_9
LVRVSS_10
LVRVSS_11
LVRVSS_12
LVRVSS_13
LVRVSS_14
LVRVSS_15
LVRVSS_16
LVRVSS_17
LVRVSS_18
LVRVSS_19
LVRVSS_20
LVRVSS_21
LVRVSS_22
LVRVSS_23
LVRVSS_24
LVRVSS_25
LVRVSS_26

DIFRXVSS_1
DIFRXVSS_2
DIFRXVSS_3

LVTVSS_1
LVTVSS_2
LVTVSS_3
LVTVSS_4
LVTVSS_5
LVTVSS_6
LVTVSS_7
LVTVSS_8
LVTVSS_9
LVTVSS_10
LVTVSS_11
LVTVSS_12
LVTVSS_13
LVTVSS_14
LVTVSS_15
LVTVSS_16
LVTVSS_17
LVTVSS_18
LVTVSS_19
LVTVSS_20
LVTVSS_21
LVTVSS_22
LVTVSS_23
LVTVSS_24
LVTVSS_25
LVTVSS_26

DIFTXVSS_1
DIFTXVSS_2
DIFTXVSS_3

LVTAVSS

[E]

DPLLVSS25CAP

LV1PLLVSS25CAP

LV1PLLVDD25

LV2PLLVSS25CAP

LV2PLLVDD25

LVRVDD25_10
LVRVDD25_11
LVRVDD25_12
LVRVDD25_13
LVRVDD25_14
LVRVDD25_15
LVRVDD25_16
LVRVDD25_17
LVRVDD25_18
LVRVDD25_19
LVRVDD25_20
LVRVDD25_21
LVRVDD25_22
LVRVDD25_23
LVRVDD25_24
LVRVDD25_25
LVRVDD25_26

DIFRXVDD25_1
DIFRXVDD25_2
DIFRXVDD25_3

LVTVDD25_10
LVTVDD25_11
LVTVDD25_12
LVTVDD25_13
LVTVDD25_14
LVTVDD25_15
LVTVDD25_16
LVTVDD25_17
LVTVDD25_18
LVTVDD25_19
LVTVDD25_20
LVTVDD25_21
LVTVDD25_22
LVTVDD25_23

DIFTXVDD25_1
DIFTXVDD25_2
DIFTXVDD25_3

PORVDD25_1

PORVDD25_2

DPLLVDD25

LVRVDD25_1
LVRVDD25_2
LVRVDD25_3
LVRVDD25_4
LVRVDD25_5
LVRVDD25_6
LVRVDD25_7
LVRVDD25_8
LVRVDD25_9

LVTVDD25_1
LVTVDD25_2
LVTVDD25_3
LVTVDD25_4
LVTVDD25_5
LVTVDD25_6
LVTVDD25_7
LVTVDD25_8
LVTVDD25_9

LVTAVDD25

VDDIO33_1
VDDIO33_2
VDDIO33_3
VDDIO33_4
VDDIO33_5
VDDIO33_6
VDDIO33_7
VDDIO33_8

VDDIO33_9
VDDIO33_10
VDDIO33_11
VDDIO33_12
VDDIO33_13

AF4

AF6

AG6

AG5

AK4

AJ4

AJ3

AH3

L29
M28
N26
N28
R26
R28
T27
U20
U26
U28
W20
W26
W28
Y27
AA26
AA28
AB27
AC26
AD25
AD27
AE26
AE28
AF27
AG26
AH27
AK29

J28
K27
L28

G2
J3
K4
M4
N3
P4
R11
T4
U3
U11
V4
W11
Y4
AA3
AA5
AB4
AC3
AC5
AD6
AE3
AE5
AG3
AH2

F4
G3
G6

Y5

B1
B2
B9
E13
F8
L11
L13
N11
Y18
Y19
AE24
AF21
AJ26

C1108

0.1uF
16V

C1107

0.1uF
16V

C1106

0.1uF
16V

LVRVDD25_A

C1126
1uF
10V

C1111
22uF
10V

R1106
10

C1110
22uF
10V

R1105
10

C1109
22uF
10V

R1104
10

DIF_LVTA_VDD25_A

LVTVDD25_A

DIF_LVTA_VDD25_A

+3.3V

C1128

0.1uF
16V

DPLLVDD25_A

LV1PLLVDD25_A

LV2PLLVDD25_A

LVRVDD25_A

C1162

0.1uF
16V

LVTVDD25_A

C1113

0.1uF
16V

C1167

0.1uF
16V

C1118

0.1uF
16V

DIF_LVTA_VDD25_A

C1166

0.1uF
16V

+3.3V

C1133

0.1uF
16V

C1172

0.1uF
16V

C1123

0.1uF
16V

C1171

0.1uF
16V

C1177

4.7uF
10V

C1130

4.7uF
10V

C1176

4.7uF
10V

C1112

0.1uF
16V

C1114

0.1uF
16V

Close to DIFTXVDD25 pin

C1139

0.1uF
16V

C1144

0.1uF
16V

C1148

4.7uF
10V

C1164

0.1uF
16V

C1115

0.1uF
16V

C1116

0.1uF
16V

C1169

0.1uF
16V

+2.5V

L1105

BLM18PG121SN1D

L1103

BLM18PG121SN1D

L1111

BLM18PG121SN1D

L1109

BLM18PG121SN1D

L1110

BLM18PG121SN1D

L1101

BLM18PG121SN1D

L1100

BLM18PG121SN1D

L1102

BLM18PG121SN1D

L1104

BLM18PG121SN1D

LV1PLLVDD25_A

LV2PLLVDD25_A

LVRVDD25_A

LVTVDD25_A

DIF_LVTA_VDD25_A

VPLLVDD25_A

MPLLVDD25_A

MEPLLVDD25_A

DPLLVDD25_A

Close to LVTAVDD25 (pin V5)

C1174

4.7uF
10V

C1149
1uF
10V





C1157

0.1uF
16V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

EAX65309301

PA168_POWER_A2

2013.03.18
14 22

AE25

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

AF11
AF13
AF17
AF19

AG10
AG12
AG14
AG16
AG18
AG21

AH11
AH13
AH15
AH17
AH19
AH21

AK11
AK13
AK15
AK17
AK19
AK21
AK26

IC200

PA168-ES

A1

[D]

VSS_1

A2

VSS_2

A29

VSS_3

B10

VSS_4

B13

VSS_5

B15

VSS_6

B18

VSS_7

B20

VSS_8

B24

VSS_9

B26

VSS_10

D12

VSS_11

D17

VSS_12

D25

VSS_13

D27

VSS_14

D29

VSS_15

E14

VSS_16

E18

VSS_17

E26

VSS_18

F7

VSS_19

F26

VSS_20

F27

VSS_21

G28

VSS_22

G29

VSS_23

L15

VSS_24

L18

VSS_25

L20

VSS_26

M11

VSS_27

M14

VSS_28

M16

VSS_29

N13

VSS_30

N15

VSS_31

N17

VSS_32

N20

VSS_33

P11

VSS_34

P14

VSS_35

P15

VSS_36

P16

VSS_37

P17

VSS_38

P18

VSS_39

R13

VSS_40

R14

VSS_41

R15

VSS_42

R16

VSS_43

R17

VSS_44

R19

VSS_45

T12

VSS_46

T14

VSS_47

T15

VSS_48

T16

VSS_49

T17

VSS_50

T18

VSS_51

U13

VSS_52

U14

VSS_53

U15

VSS_54

U16

VSS_55

U17

VSS_56

U19

VSS_57

V12

VSS_58

V14

VSS_59

V15

VSS_60

V16

VSS_61

V17

VSS_62

V18

VSS_63

W13

VSS_64

W15

VSS_65

W16

VSS_66

W17

VSS_67

AE8

VSS_68
VSS_69

AF5

VSS_70

AF7

VSS_71

AF9

VSS_72
VSS_73
VSS_74
VSS_75
VSS_76

AG4

VSS_77

AG8

VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84

AH5

VSS_85

AH7

VSS_86

AH9

VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93

AK1

VSS_94

AK3

VSS_95

AK5

VSS_96

AK7

VSS_97

AK9

VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105

VDDM18_15_1
VDDM18_15_2
VDDM18_15_3
VDDM18_15_4
VDDM18_15_5
VDDM18_15_6
VDDM18_15_7
VDDM18_15_8

VDDM18_15_9
VDDM18_15_10
VDDM18_15_11
VDDM18_15_12
VDDM18_15_13
VDDM18_15_14
VDDM18_15_15
VDDM18_15_16
VDDM18_15_17
VDDM18_15_18
VDDM18_15_19
VDDM18_15_20
VDDM18_15_21
VDDM18_15_22
VDDM18_15_23

OSCVDD1V

DPLLVDD1V

VDD1V_34

VDD1V_1
VDD1V_2
VDD1V_3
VDD1V_4
VDD1V_5
VDD1V_6
VDD1V_7
VDD1V_8

VDD1V_9
VDD1V_10
VDD1V_11
VDD1V_12
VDD1V_13
VDD1V_14
VDD1V_15
VDD1V_16
VDD1V_17
VDD1V_18
VDD1V_19
VDD1V_20
VDD1V_21
VDD1V_22
VDD1V_23
VDD1V_24
VDD1V_25
VDD1V_26
VDD1V_27
VDD1V_28
VDD1V_29
VDD1V_30
VDD1V_31
VDD1V_32
VDD1V_33

VTVDD1V_1
VTVDD1V_2
VTVDD1V_3
VTVDD1V_4
VTVDD1V_5
VTVDD1V_6
VTVDD1V_7
VTVDD1V_8

VTVDD1V_9
VTVDD1V_10
VTVDD1V_11
VTVDD1V_12
VTVDD1V_13
VTVDD1V_14
VTVDD1V_15
VTVDD1V_16
VTVDD1V_17
VTVDD1V_18
VTVDD1V_19
VTVDD1V_20
VTVDD1V_21
VTVDD1V_22
VTVDD1V_23
VTVDD1V_24
VTVDD1V_25
VTVDD1V_26
VTVDD1V_27
VTVDD1V_28
VTVDD1V_29
VTVDD1V_30
VTVDD1V_31
VTVDD1V_32
VTVDD1V_33

AH4

AK2

AE7

L12
L14
L16
M12
M13
M15
M17
M18
M19
N12
N14
N16
N18
N19
P12
P13
P19
R12
R18
R20
T13
T19
U12
U18
V13
V19
W12
W14
W18
W19
Y12
Y13
Y17

Y14
Y15
Y16
AF8
AF10
AF12
AF18
AF20
AG7
AG9
AG11
AG13
AG15
AG17
AG19
AG20
AH6
AH8
AH10
AH12
AH14
AH16
AH18
AH20
AJ5
AJ7
AJ9
AJ11
AJ13
AJ15
AJ17
AJ19
AJ21

A9
A18
A24
A30
B21
C11
D14
D16
D19
D21
D24
D26
E17
E25
E27
F24
G26
G27
G30
L17
L19
M20
P20

DPLL_OSC_VDD1V_B

+1.05V_B

AVDD_DDR_PA2

+1.05V_B

C1201

0.1uF
16V

Close to VTVDD1V Pin

C1202

0.1uF
16V

+1.05V_B

L1200

MLB-201209-0120P-N2

Close to OSCVDD1V Pin

AVDD_DDR_PA2

C1200

0.1uF
16V

C1204

0.1uF
16V

C1205

0.1uF
16V

C1203

0.1uF
16V

C1208

0.1uF
16V

C1209

0.1uF
16V

C1206
1uF
10V

C1207

0.1uF
16V

C1212

0.1uF
16V

C1213

0.1uF
16V

C1210

0.1uF
16V

C1211

0.1uF
16V

Close to PORVDD1V

C1247

4.7uF
10V

C1216

4.7uF
10V

C1217
1uF
10V

C1249
1uF
10V

C1215

0.1uF
16V

DPLL_OSC_VDD1V_B

C1221

0.1uF
16V

Close to DPLLVDD1V Pin

C1214

0.1uF
16V

C1218
1uF
10V

C1222
10uF
10V

C1250

0.1uF
16V

C1219

0.1uF
16V

OPT
C1225

10uF
10V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

EAX65309301

PA168_POWER_B1

2013.03.18
15 22

+2.5V

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

VPLLVDD25_B

MPLLVDD25_B

MEPLLVDD25_B

R1300

R1301

R1302

IC200

PA168-ES

R1303

1.2K

AF14

AF15

C1303

C1300

0.1uF

22uF

16V

10V

10

C1301
22uF
10V

10

C1302
22uF
10V

10

C1304

0.1uF
16V

C1305

0.1uF
16V

AF16

AA27
AB26
AB28
AC25
AD26
AD28
AE27
AF26
AF28
AH26
AH28
AK30

H27

H26

J26

J27

L30
N27
P26
R27
T20
T26
T28
U27
V20
V26
W27
Y20
Y26
Y28

H28
K26
K28

G1
H3
K3
K5
L5
M3
N4
P3
R5
T3

T11

V3

V11

W5

Y3
Y11
AA4
AB3
AB5
AC4
AC6
AD5
AE4
AE6
AF3
AH1

F3

F5

H6

V5

REXT

VPLLVSS25CAP

VPLLVDD25

MPLLVSS25CAP

MPLLVDD25

MEPLLVSS25CAP

MEPLLVDD25

LVRVSS_1
LVRVSS_2
LVRVSS_3
LVRVSS_4
LVRVSS_5
LVRVSS_6
LVRVSS_7
LVRVSS_8
LVRVSS_9
LVRVSS_10
LVRVSS_11
LVRVSS_12
LVRVSS_13
LVRVSS_14
LVRVSS_15
LVRVSS_16
LVRVSS_17
LVRVSS_18
LVRVSS_19
LVRVSS_20
LVRVSS_21
LVRVSS_22
LVRVSS_23
LVRVSS_24
LVRVSS_25
LVRVSS_26

DIFRXVSS_1
DIFRXVSS_2
DIFRXVSS_3

LVTVSS_1
LVTVSS_2
LVTVSS_3
LVTVSS_4
LVTVSS_5
LVTVSS_6
LVTVSS_7
LVTVSS_8
LVTVSS_9
LVTVSS_10
LVTVSS_11
LVTVSS_12
LVTVSS_13
LVTVSS_14
LVTVSS_15
LVTVSS_16
LVTVSS_17
LVTVSS_18
LVTVSS_19
LVTVSS_20
LVTVSS_21
LVTVSS_22
LVTVSS_23
LVTVSS_24
LVTVSS_25
LVTVSS_26

DIFTXVSS_1
DIFTXVSS_2
DIFTXVSS_3

LVTAVSS

[E]

DPLLVSS25CAP

LV1PLLVSS25CAP

LV1PLLVDD25

LV2PLLVSS25CAP

LV2PLLVDD25

LVRVDD25_10
LVRVDD25_11
LVRVDD25_12
LVRVDD25_13
LVRVDD25_14
LVRVDD25_15
LVRVDD25_16
LVRVDD25_17
LVRVDD25_18
LVRVDD25_19
LVRVDD25_20
LVRVDD25_21
LVRVDD25_22
LVRVDD25_23
LVRVDD25_24
LVRVDD25_25
LVRVDD25_26

DIFRXVDD25_1
DIFRXVDD25_2
DIFRXVDD25_3

LVTVDD25_10
LVTVDD25_11
LVTVDD25_12
LVTVDD25_13
LVTVDD25_14
LVTVDD25_15
LVTVDD25_16
LVTVDD25_17
LVTVDD25_18
LVTVDD25_19
LVTVDD25_20
LVTVDD25_21
LVTVDD25_22
LVTVDD25_23

DIFTXVDD25_1
DIFTXVDD25_2
DIFTXVDD25_3

PORVDD25_1

PORVDD25_2

DPLLVDD25

LVRVDD25_1
LVRVDD25_2
LVRVDD25_3
LVRVDD25_4
LVRVDD25_5
LVRVDD25_6
LVRVDD25_7
LVRVDD25_8
LVRVDD25_9

LVTVDD25_1
LVTVDD25_2
LVTVDD25_3
LVTVDD25_4
LVTVDD25_5
LVTVDD25_6
LVTVDD25_7
LVTVDD25_8
LVTVDD25_9

LVTAVDD25

VDDIO33_1
VDDIO33_2
VDDIO33_3
VDDIO33_4
VDDIO33_5
VDDIO33_6
VDDIO33_7
VDDIO33_8

VDDIO33_9
VDDIO33_10
VDDIO33_11
VDDIO33_12
VDDIO33_13

AF4

AF6

AG6

AG5

AK4

AJ4

AJ3

AH3

L29
M28
N26
N28
R26
R28
T27
U20
U26
U28
W20
W26
W28
Y27
AA26
AA28
AB27
AC26
AD25
AD27
AE26
AE28
AF27
AG26
AH27
AK29

J28
K27
L28

G2
J3
K4
M4
N3
P4
R11
T4
U3
U11
V4
W11
Y4
AA3
AA5
AB4
AC3
AC5
AD6
AE3
AE5
AG3
AH2

F4
G3
G6

Y5

B1
B2
B9
E13
F8
L11
L13
N11
Y18
Y19
AE24
AF21
AJ26

C1306

0.1uF
16V

C1307

0.1uF
16V

C1308

0.1uF
16V

LVRVDD25_B

C1312
1uF
10V

C1309
22uF
10V

R1304
10

C1310
22uF
10V

R1305
10

C1311
22uF
10V

R1306
10

DIF_LVTA_VDD25_B

LVTVDD25_B

DIF_LVTA_VDD25_B

+3.3V

C1313

0.1uF
16V

DPLLVDD25_B

LV1PLLVDD25_B

LV2PLLVDD25_B

LVRVDD25_B

C1350

0.1uF
16V

LVTVDD25_B

C1345

0.1uF
16V

C1352

0.1uF
16V

C1347

0.1uF
16V

DIF_LVTA_VDD25_B

C1316

0.1uF
16V

+3.3V

C1326

0.1uF
16V

C1353

0.1uF
16V

C1349

0.1uF
16V

C1320

0.1uF
16V

C1354

4.7uF
10V

C1351

4.7uF
10V

C1314

0.1uF
16V

C1315

0.1uF
16V

C1324

4.7uF
10V

Close to DIFTXVDD25 pin

C1330

0.1uF
16V

C1334

0.1uF
16V

C1329

0.1uF
16V

C1338

4.7uF
10V

C1317

0.1uF
16V

C1318

0.1uF
16V

C1333

0.1uF
16V

+2.5V

L1304

BLM18PG121SN1D

L1300

BLM18PG121SN1D

L1301

BLM18PG121SN1D

L1302

BLM18PG121SN1D

L1303

BLM18PG121SN1D

L1305

BLM18PG121SN1D

L1306

BLM18PG121SN1D

L1307

BLM18PG121SN1D

L1308

BLM18PG121SN1D

LV1PLLVDD25_B

LV2PLLVDD25_B

LVRVDD25_B

LVTVDD25_B

DIF_LVTA_VDD25_B

VPLLVDD25_B

MPLLVDD25_B

MEPLLVDD25_B

DPLLVDD25_B

Close to LVTAVDD25 (pin V5)

C1337

4.7uF
10V

C1341
1uF
10V





C1344

0.1uF
16V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

EAX65309301

PA168_POWER_B2

2013.03.18
16 22

IC2500

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

LGE7410

U_MMCKAP0
U_MMCKAN0

D15

U_MMAA0
U_MMAA1
U_MMAA2
U_MMAA3
U_MMAA4
U_MMAA5
U_MMAA6
U_MMAA7
U_MMAA8

U_MMAA9
U_MMAA10
U_MMAA11
U_MMAA12
U_MMAA13
U_MMAA14
U_MMAA15
U_MMBKA0
U_MMBKA1
U_MMBKA2

U_MMRASA
U_MMCASA

U_MMWEA
U_MMODTA
U_MMCKEA

U_MMRESETA U_MMRESETB

22

R1700
R1701 22

U_MMCSA0

U_MMDA0

U_MMDA1

U_MMDA2

U_MMDA3

U_MMDA4

U_MMDA5

U_MMDA6

U_MMDA7

U_MMDA8

U_MMDA9
U_MMDA10
U_MMDA11
U_MMDA12
U_MMDA13
U_MMDA14
U_MMDA15
U_MMDMA0
U_MMDMA1

U_MMDQSAP0
U_MMDQSAN0
U_MMDQSAP1
U_MMDQSAN1

B11
D14
D12
B12
D13
A12
E12
D17

C9
B13
D16
E16

A9
A11
E15
D11
E17
E11

E14
B10
C10
E10
C14
E13
C15
A14
D10
F10

D22
D18
D23
D19
B21
B15
A21
C16
B17
D21
E18
B20
D20
E21
E19
E20
C17
A20

B19
C19
A18
C18

C28
E22
B28
E23
A29
B22
B29
C23
D25
D27
E24
C27
D26
B26
E25
C26
D24
A27

C25
B24
C24
A23

A_DDR3_A0
A_DDR3_A1
A_DDR3_A2
A_DDR3_A3
A_DDR3_A4
A_DDR3_A5
A_DDR3_A6
A_DDR3_A7
A_DDR3_A8
A_DDR3_A9
A_DDR3_A10
A_DDR3_A11
A_DDR3_A12
A_DDR3_A13
A_DDR3_A14
A_DDR3_A15
A_DDR3_BA0
A_DDR3_BA1
A_DDR3_BA2

A_DDR3_RASZ
A_DDR3_CASZ
A_DDR3_WEZ
A_DDR3_ODT
A_DDR3_CKE
A_DDR3_RESETB
A_DDR3_MCLK
A_DDR3_MCLKZ
A_DDR3_CSB1
A_DDR3_CSB2

A_DDR3_DQ0
A_DDR3_DQ1
A_DDR3_DQ2
A_DDR3_DQ3
A_DDR3_DQ4
A_DDR3_DQ5
A_DDR3_DQ6
A_DDR3_DQ7
A_DDR3_DQ8
A_DDR3_DQ9
A_DDR3_DQ10
A_DDR3_DQ11
A_DDR3_DQ12
A_DDR3_DQ13
A_DDR3_DQ14
A_DDR3_DQ15
A_DDR3_DM0
A_DDR3_DM1

A_DDR3_DQS0
A_DDR3_DQS0B
A_DDR3_DQS1
A_DDR3_DQS1B

A_DDR3_DQ16
A_DDR3_DQ17
A_DDR3_DQ18
A_DDR3_DQ19
A_DDR3_DQ20
A_DDR3_DQ21
A_DDR3_DQ22
A_DDR3_DQ23
A_DDR3_DQ24
A_DDR3_DQ25
A_DDR3_DQ26
A_DDR3_DQ27
A_DDR3_DQ28
A_DDR3_DQ29
A_DDR3_DQ30
A_DDR3_DQ31
A_DDR3_DM2
A_DDR3_DM3

A_DDR3_DQS2
A_DDR3_DQS2B
A_DDR3_DQS3
A_DDR3_DQS3B

B_DDR3_A10
B_DDR3_A11
B_DDR3_A12
B_DDR3_A13
B_DDR3_A14
B_DDR3_A15
B_DDR3_BA0
B_DDR3_BA1
B_DDR3_BA2

B_DDR3_RASZ
B_DDR3_CASZ

B_DDR3_WEZ
B_DDR3_ODT
B_DDR3_CKE

B_DDR3_RESETB

B_DDR3_MCLK

B_DDR3_MCLKZ

B_DDR3_CSB1
B_DDR3_CSB2

B_DDR3_DQ0
B_DDR3_DQ1
B_DDR3_DQ2
B_DDR3_DQ3
B_DDR3_DQ4
B_DDR3_DQ5
B_DDR3_DQ6
B_DDR3_DQ7
B_DDR3_DQ8

B_DDR3_DQ9
B_DDR3_DQ10
B_DDR3_DQ11
B_DDR3_DQ12
B_DDR3_DQ13
B_DDR3_DQ14
B_DDR3_DQ15

B_DDR3_DM0

B_DDR3_DM1

B_DDR3_DQS0

B_DDR3_DQS0B

B_DDR3_DQS1

B_DDR3_DQS1B

B_DDR3_DQ16
B_DDR3_DQ17
B_DDR3_DQ18
B_DDR3_DQ19
B_DDR3_DQ20
B_DDR3_DQ21
B_DDR3_DQ22
B_DDR3_DQ23
B_DDR3_DQ24
B_DDR3_DQ25
B_DDR3_DQ26
B_DDR3_DQ27
B_DDR3_DQ28
B_DDR3_DQ29
B_DDR3_DQ30
B_DDR3_DQ31

B_DDR3_DM2

B_DDR3_DM3

B_DDR3_DQS2

B_DDR3_DQS2B

B_DDR3_DQS3

B_DDR3_DQS3B

B_DDR3_A0
B_DDR3_A1
B_DDR3_A2
B_DDR3_A3
B_DDR3_A4
B_DDR3_A5
B_DDR3_A6
B_DDR3_A7
B_DDR3_A8
B_DDR3_A9

H29
E31
G29
C30
F30
B31
F32
G28
K29
C31
G31
J29
L28
C32
E30
K28
B30
M28
F29

J28
D31
D32
E29
G30
H28
J31
H30
A30
D29

R29
L29
T29
M29
R30
J30
R32
K32
L31
P29
N28
P31
N29
T28
P28
R28
K30
P30

N31
N32
M32
M31

AB32
U28
AB31
V28
AC30
T31
AC31
T30
V29
Y29
W28
AA31
W29
Y31
Y28
W30
U29
AA32

W32
V30
V31
U30

U_MMAB0
U_MMAB1
U_MMAB2
U_MMAB3
U_MMAB4
U_MMAB5
U_MMAB6
U_MMAB7
U_MMAB8
U_MMAB9
U_MMAB10
U_MMAB11
U_MMAB12
U_MMAB13
U_MMAB14
U_MMAB15
U_MMBKB0
U_MMBKB1
U_MMBKB2

U_MMRASB
U_MMCASB
U_MMWEB
U_MMODTB
U_MMCKEB

R170622
R170722

U_MMCSB0

U_MMDB0
U_MMDB1
U_MMDB2
U_MMDB3
U_MMDB4
U_MMDB5
U_MMDB6
U_MMDB7
U_MMDB8
U_MMDB9
U_MMDB10
U_MMDB11
U_MMDB12
U_MMDB13
U_MMDB14
U_MMDB15
U_MMDMB0
U_MMDMB1

U_MMDQSBP0
U_MMDQSBN0
U_MMDQSBP1
U_MMDQSBN1

U_MMCKBP0
U_MMCKBN0

U_MMCKAP0

U_MMCKAN0

C1750

0.01uF

56

R1750

56

R1751

U_MMRESETA

U_MMDQSAP0
U_MMDQSAN0

U_MMDQSAP1
U_MMDQSAN1

U_MMAA0
U_MMAA1
U_MMAA2
U_MMAA3
U_MMAA4
U_MMAA5
U_MMAA6
U_MMAA7
U_MMAA8

U_MMAA9
U_MMAA10
U_MMAA11
U_MMAA12
U_MMAA13

U_MMAA15

U_MMBKA0
U_MMBKA1
U_MMBKA2

U_MMCKEA

U_MMCSA0
U_MMODTA
U_MMRASA
U_MMCASA

U_MMWEA

U_MMDMA0
U_MMDMA1

U_MMDA0
U_MMDA1
U_MMDA2
U_MMDA3
U_MMDA4
U_MMDA5
U_MMDA6
U_MMDA7

U_MMDA8

U_MMDA9
U_MMDA10
U_MMDA11
U_MMDA12
U_MMDA13
U_MMDA14
U_MMDA15

IC2600

H5TQ1G63EFR-PBC

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

NC_7

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

VREFCA

VREFDQ

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

NC_1
NC_2
NC_3
NC_4
NC_6

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9

M8

H1

L8

ZQ

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

J1
J9
L1
L9
T7

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

U_MVREFCA_A0

U_MVREFDQ_A0

R1713 240

1%

AVDD_DDR_URSA7

AVDD_DDR_URSA7

U_MMAA14

U_MMCKBP0

U_MMCKBN0

C1709

0.01uF

56

R1712

56

R1714

U_MMCKEB

U_MMCSB0
U_MMODTB
U_MMRASB
U_MMCASB

U_MMRESETB

U_MMDQSBP0
U_MMDQSBN0

U_MMDQSBP1
U_MMDQSBN1

U_MMDMB0
U_MMDMB1

U_MMDB10
U_MMDB11
U_MMDB12
U_MMDB13
U_MMDB14
U_MMDB15

U_MMAB0
U_MMAB1
U_MMAB2
U_MMAB3
U_MMAB4
U_MMAB5
U_MMAB6
U_MMAB7
U_MMAB8

U_MMAB9
U_MMAB10
U_MMAB11
U_MMAB12
U_MMAB13

U_MMAB15

U_MMBKB0
U_MMBKB1
U_MMBKB2

U_MMWEB

U_MMDB0
U_MMDB1
U_MMDB2
U_MMDB3
U_MMDB4
U_MMDB5
U_MMDB6
U_MMDB7

U_MMDB8
U_MMDB9

IC2800

H5TQ1G63EFR-PBC

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

NC_7

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

VREFCA

VREFDQ

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

NC_1
NC_2
NC_3
NC_4
NC_6

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9

M8

H1

L8

ZQ

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

J1
J9
L1
L9
T7

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

U_MVREFCA_B0

U_MVREFDQ_B0

R1715 240

1%

AVDD_DDR_URSA7

AVDD_DDR_URSA7

U_MMAB14

DDR PHY VREF

AVDD_DDR_URSA7

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

R1702
1K
1%

R1703
1K
1%

U_MVREFCA_A0

C1700

0.1uF

C1701

1000pF

AVDD_DDR_URSA7

R1704
1K
1%

R1705
1K
1%

U_MVREFDQ_A0

C1702

0.1uF

C1703

1000pF

AVDD_DDR_URSA7

R1708
1K
1%

R1709
1K
1%

C1704

0.1uF

C1705

1000pF

+1.5V_P_DDR AVDD_DDR_URSA7

L1700

AVDD_DDR_URSA7U_MVREFCA_B0

R1710
1K
1%

R1711
1K
1%

U_MVREFDQ_B0

C1706

0.1uF

C1707

1000pF

BLM18PG121SN1D

C1708

0.1uF
16V

AVDD_DDR_URSA7

C1714

0.1uF
16V

Close to DDR POWER PIN

C1711

C1710

0.1uF

0.1uF
16V

16V

Close to DDR POWER PIN

C1718

C1719

0.1uF

0.1uF

16V

16V

C1712

0.1uF
16V

C1720

0.1uF
16V

C1713

0.1uF
16V

C1721

0.1uF
16V

C1715
1uF
10V

C1722
1uF
10V

C1716
10uF
10V

C1723
10uF
10V

OPT
C1717

10uF
10V

OPT

C1724
10uF
10V

EAX65309301
URSA7_DDR_A

2013.03.18

17 22

Clock for URSA7

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

URSA7 Reset

IC2500

LGE7410

8pF

C1903

8pF

C1904

GND_1

2

3

X-TAL_2

1

4

SPI Flash URSA7

SPI_CZ

SPI_DO

FLASH_WP

FLASH_WP_U

R1939 0

X-TAL_1

X1900

24MHz

GND_2

R1904 33

OPT

R1925

1M

XIN_URSA

XO_URSA

IC1901

MX25L3206EM2I-12G

CS#

1

SO/SIO1

2

WP#

3

GND

4

4MByte

8

7

6

5

VCC

HOLD#

SCLK

SI/SIO0

R1905

+3.3V

10K

C1901

0.1uF
16V

SPI_CK

SPI_DI

+3.3V

SW1901

JTP-1127WEM

1 2

43

D1900

1N4148W

100V

R1923

10K

OPT
C1902
22uF
10V

Debugging for URSA7

I2C_S Port

URSA_DEBUG

P1905

12507WS-04L

WAFER-STRAIGHT

1

2

R192 2
URSA_DEBUG

R192 1

URSA_DEBUG

33

SCL2_+3.3V_DB

33

SDA2_+3.3V_DB

SCL2_+3.3V_DB

3

4

5

R1958
0
URSA_MP

R1960
0

OPT

URSA7_Reset

SW1902

JS2235S

1

2

URSA_DEBUG

3

6

R1959
0
URSA_MP

5

4

R1961
0
OPT

I2CS_SDA

SDA2_+3.3V_DB

0

R1924

SCL_M1_A SDA_M1_A

I2CS_SCL

UART2_TX
UART2_RX

UART1_TX

UART1_RX

URSA7_Reset

XIN_URSA

XO_URSA

I2CS_SDA
I2CS_SCL

I2CM_SDA_URSA
I2CM_SCL_URSA

UART2_TX
UART2_RX

UART1_TX
UART1_RX

SPI_CZ
SPI_CK
SPI_DI
SPI_DO

URSA7_stable

OPT

OPT
OPT

OPT

R1963
R1964

R1929
R1927

R1928
R1926

R1919

R1920

R1930 0
R1933

R1931

R1932

R1934

AA28

AM3
AL3

AJ22

33

AH23

33

AG24
AG25

E8

33

D8

33

D9

33

E9

33

AE31

33

AD30

33

AD32
AE32

AB29
AA29

33

AH25

33

AG26

33

F8

33

AA26
AA27

RESET

XTALO
XTALI

I2CS_SDA
I2CS_SCL

I2CM_SDA
I2CM_SCL/VSYNC_LIKE1

GPIO[0]/UART2_TX
GPIO[1]/UART2_RX

GPIO[2]/UART1_TX
GPIO[3]/UART1_RX

SPI_CZ
SPI_CK
SPI_DI
SPI_DO

INT_R21/GPIO[41]
INT_R20/GPIO[42]
GPIO[10]/PWM_DIM_IN[0]
GPIO[11]/PWM_DIM_IN[1]

IRE

TESTPIN
GND_EFUSE

VSYNC_LIKE2
VSYNC_LIKE3

SPI1_CK/PWM2/GPIO58
SPI1_DI/PWM3/GPIO59
SPI2_CK/PWM0/GPIO56

SPI2_DI/PWM1/GPIO57
SPI3_CK/DIM10/GPIO54
SPI3_DI/DIM11/GPIO55

SPI4_CK/DIM8/GPIO52

SPI4_DI/DIM9/GPIO53

VSYNC_LIKE/PWM5/GPIO40

DIM0/GPIO[32]
DIM1/GPIO[33]
DIM2/GPIO[34]
DIM3/GPIO[35]
DIM4/GPIO[36]
DIM5/GPIO[37]
DIM6/GPIO[38]
DIM7/GPIO[39]

NC_21
NC_22
NC_23
NC_24
NC_25
NC_26
NC_27
NC_28

VX1T_HTPDN
VX1T_LOCKN

I2CM_SDA1
I2CM_SCL1

TGPIO12
3D_FLAG
TGPIO14
TGPIO15

AH24
AJ24

AE28
AE29
AF28
AE27
AG29
AF27
AG27
AG28

AD27

AH20
AG20
AJ21
AH21
AG21
AG22
AH22
AG23

E7
F7
D6
D5
E6
E5
F6
F5

AF4
AE4
AF5
AG4
AG5
AH4
AH5
AJ5

R1944

R1945
R1950
R1940
R1935
R1951

R1936
R1946
R1941
R1937
R1942

0
0

33

0
33

33

33
33

33

33

33

OPT
OPT
OPT
OPT
OPT

OPT

OPT

L_DIM_EN

DIM0

DIM1
DIM2

I2CM_SDA1_URSA
I2CM_SCL1_URSA

FLASH_WP_U

I2C EEPROM

URSA7 EEPROM

IC2007

R1EX24256BSAS0A

A0

A1

A2

VSS

I2CM_SCL_EEPROM

I2CM_SDA_EEPROM

VCC

1

8

WP

2

7

SCL

3

6

SDA

4

5

Chip Config

Debug/ISP ADDR
Slabe (Debug Port:0XB4,ISP:0X98)
CHIP_CONF:{DIM2,DIM1,DIM0}
CHIP_CONF=3’d7:111:boot from SPI Flash

+3.3V

OPT

R1902

R1901

R1900

10K

10K

10K

R1908

OPT

R1907

OPT

R1906

+3.3V

C1900

0.1uF

4.7K

R1918

4.7K

33

33

OPT

33

URSA7 EEPROM

33

33

OPT

33

URSA7 EEPROM

25V

I2CM_SCL_EEPROM

I2CM_SDA_EEPROM

I2CM_SCL_URSA

I2CM_SCL1_URSA

I2CM_SCL_M_Port

I2CM_SDA_URSA
I2CM_SDA1_URSA

I2CM_SDA_M_Port

R1917

R1913

R1911

R1916

R1915

R1912

R1914

10K

10K

10K

DIM0

DIM1

DIM2

I2C_M Port

URSA7 EEPROM

P1908

12507WS-04L

1

2

3

4

5

WAFER-STRAIGHT

I2CM_SCL_M_Port

I2CM_SDA_M_Port

AH28

GPIO[8]/HDMIRX_CEC

AH29

GPIO[9]/HDMIRX_HPD

AJ27

GPIO[6]/DDCDA_CK

AJ28

GPIO[7]/DDCDA_DA

AH32

HDMI_RXCP

AH31

HDMI_RXCN

AG32

HDMI_RX0P

AG30

HDMI_RX0N

AF30

HDMI_RX1P

AG31

HDMI_RX1N

AE30

HDMI_RX2P

AF31

HDMI_RX2N

AH26

GPIO[4]/HDMITX_CEC

AH27

GPIO[5]/HDMITX_HPD

AJ25

HDMITX_SCL

AJ26

HDMITX_SDA

AL31

HDMITX_CLKP

AM31

HDMITX_CLKN

AK31

HDMI_TX0P

AL32

HDMI_TX0N

AJ30

HDMI_TX1P

AK32

HDMI_TX1N

AH30

HDMI_TX2P

AJ31

HDMI_TX2N

IC2500

LGE7410

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

EAX65309301

2013.03.18

U_UART,GPIO 20 22

IC2500

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

LGE7410

IC2500

LGE7410

AVDDL_TX_RX

AVDDL_TX_RX

AVDDL_TX_RX

AVDDL_MOD_DRV

AVDDL_MOD_DRV

AVDD_LVDS

AVDD_PLL

AVDD_DDR_URSA7

VDDC

DVDD_DDR

VDDP

AA10

AA11
AB11

AA12
AB12

AB10
AC10

AA16
AA14
AB14
AA13
AB13

AA18
AA19

AB19
AB17
AB18
AC17
AA20

AA17

Y11

Y12

AC7
AD7
AE7
AB8
AC8
AD8
AE8
AA9
AB9
AC9
AD9

W15
Y15

P11
P12
R11
W10
W11
Y10
R12
T11
T12
U11
U12
V11

M11
N11
M12
N12

Y18
Y19

Y21

Y20

Y17

M18
M19
M20
M21
M16
M17

P21
R21
P22
R22
N21
N22

IC2500

LGE7410

VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20

AVDDL_HDMITX
AVDDL_LVDSRX_1
AVDDL_LVDSRX_2
AVDDL_VB1RX_1
AVDDL_VB1RX_2

DVDD_DDR_RX
DVDD_DDR

AVDDL_MOD_1
AVDDL_MOD_2
AVDDL_MOD_3
AVDDL_MOD_4
AVDDL_MOD_5
AVDDL_MOD_6
AVDDL_DRV_1
AVDDL_DRV_2
AVDDL_DRV_3
AVDDL_DRV_4
AVDDL_DRV_5
AVDDL_DRV_6

AVDD_MOD_1
AVDD_MOD_2
AVDD_MOD_3
AVDD_MOD_4

VDDP_1
VDDP_2
VDDP_3
VDDP_4
AVDD_DVI
AVDD_HDMITX
AVDD_LVDSRX_1
AVDD_LVDSRX_2
AVDD_LVDSRX_3
AVDD_VB1RX_1
AVDD_VB1RX_2

AVDD_XTAL
AVDD_PLL

AVDD_DDR0_D_1
AVDD_DDR0_D_2
AVDD_DDR0_D_3
AVDD_DDR0_D_4
AVDD_DDR0_C_1
AVDD_DDR0_C_2

AVDD_DDR1_D_1
AVDD_DDR1_D_2
AVDD_DDR1_D_3
AVDD_DDR1_D_4
AVDD_DDR1_C_1
AVDD_DDR1_C_2

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63

A8

AD10
AE10
AF10

AC11
AD11
AE11
AF11

AC12
AD12
AE12
AF12

VSS_64

G8

VSS_65

H8

VSS_66

J8

VSS_67

K8

VSS_68

L8

VSS_69

M8

VSS_70

N8

VSS_71

P8

VSS_72

R8

VSS_73

T8

VSS_74

U8

VSS_75

V8

VSS_76

W8

VSS_77

Y8

VSS_78

AA8

VSS_79

AF8

VSS_80

AG8

VSS_81

AH8

VSS_82

AJ8

VSS_83

B9

VSS_84

F9

VSS_85

G9

VSS_86

H9

VSS_87

J9

VSS_88

K9

VSS_89

L9

VSS_90

M9

VSS_91

N9

VSS_92

P9

VSS_93

R9

VSS_94

T9

VSS_95

U9

VSS_96

V9

VSS_97

W9

VSS_98

Y9

VSS_99

AE9

VSS_100

AF9

VSS_101

G10

VSS_102

H10

VSS_103

J10

VSS_104

K10

VSS_105

L10

VSS_106

M10

VSS_107

N10

VSS_108

P10

VSS_109

R10

VSS_110

T10

VSS_111

U10

VSS_112

V10

VSS_113
VSS_114
VSS_115
VSS_116

C11

VSS_117

F11

VSS_118

G11

VSS_119

H11

VSS_120

J11

VSS_121

K11

VSS_122

L11

VSS_123
VSS_124
VSS_125
VSS_126
VSS_127

C12

VSS_128

F12

VSS_129

G12

VSS_130

H12

VSS_131

J12

VSS_132

K12

VSS_133

L12

VSS_134

V12

VSS_135

W12

VSS_136
VSS_137
VSS_138
VSS_139
VSS_140

C13

VSS_141

F13

VSS_142

G13

VSS_143

H13

VSS_144

J13

VSS_145

K13

VSS_146

L13

VSS_147

M13

VSS_148

N13

VSS_149

C2102

0.1uF
16V

C2103

0.1uF
16V

C2105

0.1uF
16V

+3.3V

C2101

4.7uF
10V

C2106

0.1uF
16V

L2103
BLM18PG121SN1D

AVDD_LVDS

L2104

BLM18PG121SN1D

C2107

0.1uF
16V

VDDP

C2104

4.7uF
10V

C2145

0.1uF
16V

C2146

0.1uF
16V

C2150

0.1uF
16V

C2151

0.1uF
16V

DDR3 POWER

C2148

0.1uF
16V

C2153
1uF
10V

C2154

0.1uF
16V

C2155

0.1uF
16V

C2157
10uF
10V

C2158

4.7uF
10V

C2159

4.7uF
10V

L2108

BLM18PG121SN1D

L2110
BLM18PG121SN1D

AVDDL_MOD_DRV

L2105

BLM18PG121SN1D

L2106
BLM18PG121SN1D

L2107

BLM18PG121SN1D

C2162

4.7uF
10V

C2163

4.7uF
10V

VDDC

C2108

0.1uF
16V

C2109

0.1uF
16V

DVDD_DDR

C2110

0.1uF
16V

AVDDL_TX_RX

C2000

0.1uF
16V

OPT
C2161
10uF
10V

C2164

4.7uF
10V

C2119

4.7uF
10V

C2117

0.1uF
16V

C2118

0.1uF
16V

C2002

0.1uF
16V

C2001

0.1uF
16V

C2124

0.1uF
16V

C2130

0.1uF
16V

C2004
1uF
10V

C2003

0.1uF
16V

C2111
10uF
10V

C2136

0.1uF
16V

C2006
1uF
10V

C2005

0.1uF
16V

C2112
10uF
10V

C2007
10uF
10V

AVDD_PLL

+3.3V

L2102

BLM18PG121SN1D

C2100

4.7uF
10V

AD1
AH1
J2
T2
AF2
AK2
AM2
K3
M3
P3
J4
K4
L4
M4
N4
AA4
AB4
AC4
AD4
AJ4
AB5
AC5
J5
K5
L5
M5
N5
AD5
AE5
J6
K6
L6
M6
N6
AA6
AB6
AC6
AD6
AE6
AF6
AG6
AH6
AJ6
G7
H7
J7
K7
L7
M7
N7
P7
R7
T7
U7
V7
W7
Y7
AA7
AB7
AF7
AG7
AH7
AJ7

+1.15V

AVDD_DDR_URSA7

VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249

P13
R13
T13
U13
V13
W13
Y13
AC13
AD13
AE13
AF13
AG13
AH13
AJ13
B14
F14
G14
H14
J14
K14
L14
M14
N14
P14
R14
T14
U14
V14
W14
Y14
AC14
AD14
AE14
AF14
AG14
AH14
AJ14
A15
F15
G15
H15
J15
K15
L15
M15
N15
P15
R15
T15
U15
V15
AA15
AB15
AC15
AD15
AE15
AF15
AG15
AH15
AJ15
B16
F16
G16
H16
J16
K16
L16
N16
P16
R16
T16
U16
V16
W16
Y16
AB16
AC16
AD16
AE16
AF16
AG16
AH16
AJ16
A17
F17
G17
H17
J17
K17
L17
N17
P17
R17
T17
U17
V17
W17
AD17
AE17
AF17

AG17
AH17
AJ17

AC18
AD18
AE18
AF18
AG18
AH18
AJ18

AC19
AD19
AE19
AF19
AG19
AH19
AJ19

AB20
AC20
AD20
AE20
AF20
AJ20

AA21
AB21
AC21
AD21
AE21
AF21

AB22
AA22

AF22
AE22
AD22
AC22

VSS_250
VSS_251
VSS_252

B18

VSS_253

F18

VSS_254

G18

VSS_255

H18

VSS_256

J18

VSS_257

K18

VSS_258

L18

VSS_259

N18

VSS_260

P18

VSS_261

R18

VSS_262

T18

VSS_263

U18

VSS_264

V18

VSS_265

W18

VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273

F19

VSS_274

G19

VSS_275

H19

VSS_276

J19

VSS_277

K19

VSS_278

L19

VSS_279

N19

VSS_280

P19

VSS_281

R19

VSS_282

T19

VSS_283

U19

VSS_284

V19

VSS_285

W19

VSS_286

VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293

C20

VSS_294

F20

VSS_295

G20

VSS_296

H20

VSS_297

J20

VSS_298

K20

VSS_299

L20

VSS_300

N20

VSS_301

P20

VSS_302

R20

VSS_303

T20

VSS_304

U20

VSS_305

V20

VSS_306

W20

VSS_307

VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313

C21

VSS_314

F21

VSS_315

G21

VSS_316

H21

VSS_317

J21

VSS_318

K21

VSS_319

L21

VSS_320

T21

VSS_321

U21

VSS_322

V21

VSS_323

W21

VSS_324

VSS_325
VSS_326
VSS_327
VSS_328
VSS_329
VSS_330

C22

VSS_331

F22

VSS_332

G22

VSS_333

H22

VSS_334

J22

VSS_335

K22

VSS_336

L22

VSS_337

M22

VSS_338

T22

VSS_339
VSS_340
VSS_341

Y22

VSS_342

W22

VSS_343

V22

VSS_344

U22

VSS_345

P23

VSS_346

N23

VSS_347

M23

VSS_348

L23

VSS_349

K23

VSS_350

J23

VSS_351

H23

VSS_352

G23

VSS_353

F23

VSS_354

B23

VSS_355
VSS_356
VSS_357
VSS_358
VSS_359

U23

VSS_360

T23

VSS_361

R23

VSS_362

VSS_363
VSS_364
VSS_365
VSS_366
VSS_367
VSS_368
VSS_369
VSS_370
VSS_371
VSS_372
VSS_373
VSS_374
VSS_375
VSS_376
VSS_377
VSS_378
VSS_379
VSS_380
VSS_381
VSS_382
VSS_383
VSS_384
VSS_385
VSS_386
VSS_387
VSS_388
VSS_389
VSS_390
VSS_391
VSS_392
VSS_393
VSS_394
VSS_395
VSS_396
VSS_397
VSS_398
VSS_399
VSS_400
VSS_401
VSS_402
VSS_403
VSS_404
VSS_405
VSS_406
VSS_407
VSS_408
VSS_409
VSS_410
VSS_411
VSS_412
VSS_413
VSS_414
VSS_415
VSS_416
VSS_417
VSS_418
VSS_419
VSS_420
VSS_421
VSS_422
VSS_423
VSS_424
VSS_425
VSS_426
VSS_427
VSS_428
VSS_429
VSS_430
VSS_431
VSS_432
VSS_433
VSS_434
VSS_435
VSS_436
VSS_437
VSS_438
VSS_439
VSS_440
VSS_441
VSS_442
VSS_443
VSS_444
VSS_445
VSS_446
VSS_447
VSS_448
VSS_449
VSS_450
VSS_451
VSS_452
VSS_453
VSS_454
VSS_455
VSS_456
VSS_457
VSS_458
VSS_459
VSS_460
VSS_461
VSS_462
VSS_463
VSS_464
VSS_465
VSS_466
VSS_467
VSS_468
VSS_469
VSS_470
VSS_471
VSS_472
VSS_473
VSS_474
VSS_475
VSS_476
VSS_477
VSS_478

V23
W23
Y23
AA23
AB23
AC23
AD23
AE23
AF23
A24
F24
G24
H24
J24
K24
L24
M24
N24
P24
R24
T24
U24
V24
W24
Y24
AA24
AB24
AC24
AD24
AE24
AF24
B25
F25
G25
H25
J25
K25
L25
M25
N25
P25
R25
T25
U25
V25
W25
Y25
AA25
AB25
AC25
AD25
AE25
AF25
A26
E26
F26
G26
H26
J26
K26
L26
M26
N26
P26
R26
T26
U26
V26
W26
Y26
AB26
AC26
AD26
AE26
AF26
B27
E27
F27
G27
H27
J27
K27
L27
M27
N27
P27
R27
T27
U27
V27
W27
Y27
D28
E28
F28
C29
D30
L30
M30
N30
Y30
AA30
AB30
A31
F31
H31
K31
R31
U31
W31
AD31
B32
G32
J32
T32
V32

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

EAX65309301

2013.03.18

U_Power 21 22

3.3V for URSA7+PA168

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

MAX 1.58A

+12V

2.5V for PA168

MAX 1.17A

1.15V for URSA7

MAX 3.9A

L1402

BLM18PG121SN1D

Placed on SMD-TOP

C1403

C1407

10uF

10uF

25V

25V

+3.3V

R1

R2

R1407

51K

1%

R1406

15K

R1410
10K

C1405
47pF
50V

1%

C1404
1uF
10V

C1408
2200pF
50V

TPS54327DDAR

EN

VFB

VREG5

SS

Vout=0.765*(1+R1/R2)=3.33V

1.5V for URSA7_DDR

+12V

IC1401

BD9C401

[EP]

PGND

VIN

AGND

C1401

0.1uF

FB

25V

[DEV]

Vout=0.8*(1+R1/R2)=1.51V

SW_2

8

1

SW_1

9

7

2

THERMAL

EN

6

3

4

5

4A

C1414

R1400

0.0068uF

20K

COMP

1%

50V

R1401

C1411

10K

0.1uF
16V

1

2

3

4

L1404

4.7uH

IC1100

3A

9

THERMAL

8

7

6

5

C1415
10uF
10V

+3.3V

[EP]GND

VIN

VBST

SW

GND

C1416
10uF
10V

C1412

0.1uF

16V

C1417
10uF
10V

L1403

3.6uH

NR8040T3R6N

C1419
10uF
10V

C1421
22uF
10V

MAX 1.59A

C1420
68pF
50V

L1405
BLM18PG121SN1D

C1422
10uF
16V

+3.3V

+1.5V_P_DDR

1%

16K

R1402

18K

R1408

C1425
22uF
10V

1%

R1

R2

5V

ZD2301

OPT

uClamp2501T
Ready

2.5V

ZD1400

OPT

+3.3V

C3000
10uF
10V

IC3001

AP2132MP-2.5TRG1

C3001
1uF
25V

+12V

R3008

1.3K
1%

R3000
1K
1%

C3002

0.1uF

5V

R3001
10K

VCTRL

1

PG

2

EN

3

VIN

4

2A

EAN61387601

Vout=0.6*(1+R1/R2)=2.55V

9

THERMAL

+2.5V

[EP]

C2310
10uF
25V

L2302

C2311
10uF
25V

+12V

C2312

0.1uF
25V

OPT

PGND

VIN

AGND

FB

IC2301

BD86106EFJ

1

2

THERMAL

3

4

6A

L2303

C2314

6800pF

50V

R2306

2uH

C2316

C2315

10uF

10uF

10V

10V

10K

+3.3V

C2317
10uF
10V

C2318
10uF
10V

[EP]

SW_2

8

SW_1

9

7

EN

6

R2305

6.8K

COMP

5

C2313

0.1uF
16V

8

GND

7

ADJ

6

VOUT

5

NC

R3011

1.2K

R3009

3.9K

R2

BLM18PG121SN1D

R1

C3003
10uF

5V

10V

ZD3000

OPT

Placed on SMD-TOP

C2319
47pF
50V
OPT

+1.15V

1.8K

R2308

220

R2309

3.3K

R2310

R1

1%

1%

1%

R2

2.5V

ZD2306

OPT

uClamp2501T
Ready

Vout=0.8*(1+R1/R2)=1.209V

C1517
10uF
25V

C1459
10uF

25V

+12V

C1518

0.1uF
25V

S1

S2

S3

G

1

2

3

4

C1463

10uF
25V

OPT

GND JIG POINT

JP2202

JP2201

JP2203

JP2200

TYP 6000mA

PANEL_VCC

Q1401

AO4423

D4

8

D3

7

D2

6

D1

5

R1440

2K

R1438

OPT

10K
LVDS_Discharge

C
10u F
25V

OPT

146 6

C1467

0.1uF
25V

UD_VCC

C1511
10uF
25V

UD_VCC

L1412

MLB-201209-0120P-N2

PANEL_CTL

R1431

R1430

L2203 MLB-201209-0120P-N2

C1514

0.1uF
25V

L2204 MLB-201209-0120P-N2

L2205 MLB-201209-0120P-N2

PANEL_POWER

L1413

MLB-201209-0120P-N2

3.3K

C14 54
10u F
25V

OPT

10K

R1432
10K

C1455

0.1uF
25V

C1456

0.01uF
50V

R1434

R1433

1.8K

B

C1458
10uF

10K

25V

C

Q1400
2SC3052

E

1.05V for PA168_A

+12V

L1400

BLM18PG121SN1D

+1.05V_A

C1402

C1400
270pF
50V

R1403

R1404

14K

18K

10uF
16V

R1

1/16W

1%

R2

1/16W

1%

Vout(1.06V)=0.6*(1+14k/18k)

R1405
150K

1%

RT/CLK

PVIN_1

PVIN_2

VSENSE

C1406

4.7uF
16V

GND_1

GND_2

VIN

IC1600

TPS54821RHL

1

2

THERMAL

3

4

5

6

8A

7

[EP]GND

PWRGD

14

C1410

BOOT

15

13

0.1uF
16V

PH_2

12

PH_1

11

EN

10

SS/TR

9

COMP

8

1.3K
R1409

16V

50V

C1413

C1409

270pF

0.022uF
R1411 0

22000pF 50V

L1401

2uH

C1423
22uF
10V

C1418

1/16W

5%

MAX 3.5A

C1424

22uF
10V

R1412 1K

+1.05V_A

C1426

22uF
10V

+3.3V

C1427
22uF
10V

uClamp2501T
Ready

2.5V

ZD1401

OPT

Vout=0.6*(1+R1/R2)

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

1.05V for PA168_B

C1428
270pF
50V

+12V

L1406

BLM18PG121SN1D

+1.05V_B

R1

R1413

14K

1/16W

1%

R2

R1414

18K

1/16W

1%

Vout(1.06V)=0.6*(1+14k/18k)

Vout=0.6*(1+R1/R2)

C1429
10uF
16V

R1415
150K

1%

RT/CLK

PVIN_1

PVIN_2

VSENSE

C1430

4.7uF
16V

GND_1

GND_2

VIN

IC1700

TPS54821RHL

1

2

THERMAL

3

4

5

6

8A

7

MAX 3.5A

P1400

[EP]GND

PWRGD

14

C1432

BOOT

15

13

0.1uF
16V

PH_2

12

PH_1

11

EN

10

SS/TR

9

COMP

8

1.3K
R1416

C1431

0.022uF 16V

L1407

2uH

C1435
22uF
10V

C1434

22000pF 50V

C1433

270pF 50V

1/16W

5%

R1417 0

C1436

R1418 1K

22uF
10V

+1.05V_B

C1437

22uF

10V

+3.3V

C1438
22uF
10V

uClamp2501T
Ready

2.5V

ZD1402

OPT

20037WR-10A00

10

11

UD_VCC

Wafer

1

2

3

4

5

6

7

8

9

EAX65309301

P1401

20037WR-05A00

1

2

3

4

5

6

T-con power

L1419 MLB-201209-0120P-N2

L1418 MLB-201209-0120P-N2

C1464

C1462

0.1uF

10uF

25V

25V

2013.03.18

C1465
10uF
25V

PANEL_VCC

C1468

0.1uF
25V

22 22DC-DC POWER

PWR ON/OFF

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

24V
GND
GND

3.5V

SIGN960

3.5V
GND
GND

SIGN959

12V
12V
12V

PWM Dim#2

P2300
SMAW200-H24S2

2

1

4

3

6

5

8

7
9

10
12

11

14

13

16

15

18

17
19

20

21

22

23

24

25

.

P2301

SMAW200-H18S1

SIGN965

24V
24V
GND
GND

3.5V

3.5V
GND
V-Sync
INV ON/OFF
N.C
PWM Dim#1
ERR_OUT

PWR ON/OFF

3.5V

3.5V
GND
24V
GND
12V
12V
GND

1
3
5
7
9
11
13
15
17

PDIM #1

4

PDIM #2

6

GND

8

24V

10

GND

12

12V

14

24V or N.C

16

GND

18

19

.

DRV ON/OFF

2

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

EAX65313101

24P -> 18P

2013.04.08
23 23

LCD TV Repair Guide

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

`13 years New Models

< Applicable Model >

**LA965*-Z*
**LA970*-Z*

84LM96/LA980*-ZD

Overview for ’13 Broadband Model

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

EU/CIS

(Hardware)

2 types of LED – ALEF

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

Benefit: More Clear More Real

Feature

BLU

structure

Local

ALEF Type

Local Dimming

LED Array is on the side of Module

ALEF Type

Local

Dimming

Best picture quality + thin TV

Local dimming depicts more
deep black.

Model

XXLA970*-ZA

55inch : H(10) * V(10) = 100Block

Dimming

*65inch : H(12) * V(12) = 144Block

Sliding SPK Mechanism

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

※Moving Speaker Stroke : 41.0mm

Close Open

36.0mm

Hinge
(Gear + Link)

Motor

Gear

Speaker

▶ If getting he power from a motor, the power
moving to Hinge(Gear + Link) through decelerate
and drive of Gear. Then the speaker moves up and
down.

4.1ch audio (Height channel Surround)

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

UHD to develop into a three-dimensional multi-channel broadcasting in line with changes in the environment worthy

of Sound feature as UHD TV "Height-channel surround" suggested.

Known that the benefits of the Stereo Look TV's first "Height-channel surround" is implemented with the
introduction of LG's unique concept of surround pouring like waterfalls Height surround the filling of the wide
screen Multi-channel UHD maximize the effect.

Height channel surround

Fundamental channel and the
surround channels being
played on the Front Height
surround effect is applied.
So implementation of a
complex Multi-channel
effects.

 UHD TV worthy of

implementation of multi­channel sound is
differentiated from the old
TV sound.

Left
Surround

Left
Front

Height

channel effect

Right
Surround

Right
Front

Height Channel algorithm sound image of the music that you hear two speakers located higher than the
position as a technology that enables users basically at eye level (or lower place) located in the front-end or
downward-oriented sound image at the bottom of the speaker that's going to be rapid temperature change ,
Height Channel effects of using sound image can be moved to the top.

Sliding SPK UX

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

< The list of TV speaker moving >

Menu

Sound

TV Speaker ON

1

1

Always open (Magic Sound Bar)

Silent Move

1

Always open

2

When the TV on

- Always Sliding Speaker exposure

- To emphasis Sound design by sound bar Looking at TV off

2

When the TV on , open speaker (Magic Move)

- Automatically speaker exposure/ hide at TV on/off

- Minimal design at TV off

- Majestic sound automatically on/off without a separate

setting at TV on

Main PCB

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

**LA965*-Z*

Power

From PSU

FRC B/D (ULTRA HD)

Woofer

4

1

Main processor_Digital(LG1152D),

1

DDR Memory
eMMC Memory

Main processor_analog(LG1152A)

2

wifi

Motion assy

Front Spk

Local Key +IR

3

4

2

5

Micom for Key/IR sensing

3

Audio AMP

4

HDMI switch

5

Main PCB

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

**LA970*-Z*

Power

From PSU

FRC B/D (ULTRA HD)

wifi

Motion assy

Woofer

3

3

4 4

1

1

2

2

Built-in Camera Height SPK

Main processor_Digital(LG1152D),

1

DDR Memory
eMMC Memory

Main processor_analog(LG1152A)

2

Micom for Key/IR sensing

3

Front Spk

Local Key +IR

4

4

5

5

Audio AMP

4

HDMI switch

5

Main PCB

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

84LM96/LA980V-ZD

Power

From PSU

FRC B/D (ULTRA HD)

wifi

Motion assy

Front Spk

Local Key +IR

Woofer

3

3

3

4 4

4 4

1

1

2

2

2

4

4

4

1

5

5

5

Main processor_Digital(LG1152D),

1

DDR Memory
eMMC Memory

Main processor_analog(LG1152A)

2

Micom for Key/IR sensing

3

Audio AMP

4

HDMI switch

5

FRC PCB(ULTRA HD)

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

**LA965*-Z*
**LA970*-Z*

Main B/D

1

Power

From PSU

Power

To Tcon

2

Module

3

Video processor (LGE7410:URSA7),
DDR Memory

1

Flash Memory

Video processor Master (PA168),

2

DDR Memory
Flash Memory

Video processor Slave (PA168),

3

DDR Memory
Flash Memory

FRC PCB(ULTRA HD)

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

84LM96/LA980V-ZD

Module

Power

To Tcon

2

2

3

Video processor (LGE7410:URSA7),
DDR Memory

1

Flash Memory

Power

From PSU

1

Main B/D

Power

From PSU

Power

To Main

Video processor Master (PA168),

2

DDR Memory
Flash Memory

Video processor Slave (PA168),

3

DDR Memory
Flash Memory

H13 Block diagram

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

External I/O

PC_AUDIO

AV1

COMP1

SCART

Tuner

HDMI1

MHL
1A

MOTOR CTRL/SW DET

LED/Logo Light

HDMI2

HDMI3

USB_W-iFi

USB1(USB3.0)

USB2(USB2.0)

USB3(USB2.0)

LAN

PC_Audio_L/R

AV1_CVBS

AV1_Audio L/R

Comp1 Y,Pb,Pr

SC_CVBS, RGB, Audio L/R

DTV/MNT_LR/V_OUT

SPDIF_OUT_ARC

HDMI_CEC

WOL / WOW

PHY

H13
LG1154AN

HDMI
Switch

HEVC HDMI Tx

USB 2.0

USB 3.0

USB 2.0

USB 2.0

LG1132-D13
HEVC
DECODER

OCP
1A

OCP
1A

HEVC TS

H13
LG1154D

LVDS 41P

LVDS 51P

M-Remote_Rx/Tx

SPDIF

X-TAL
24MHZ

H/P AMP

AUD_SCK/LRCK/LRCH

AUD_LRCH1

CI

DDR3

1Gb X 4

16

(800Mhz)

URSA7

EEPROM

Audio
AMP

Audio
AMP

Audio
AMP

DDR3

1Gb X 2

16

(667Mhz)

PA168
MASTER

Vby1
51P

T-CON

Motion-R

OPTIC

RS-232C

H/P
Line out

CI

PA168
SLAVE

L/R SPK

Woofer

Height SPK

DDR3

1Gb X 2

16

(667Mhz)

Vby1
41P

BUILT-IN CAMERA

: Not applied for 55/65LA965V

USB HUB

8

DDR3

4Gb×4
(1600)

16

DDR3

4Gb×2
(1600)

8

eMMC

16GB×1

H13 Block diagram

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

I2C Map

P7201
FI-RE51S-HF-J-R1500
LVDS 51P WAFER
(to URSA7, PA168)

IC5700
TAS5733
AMP WOOFER

IC5600
TAS5733
AMP MAIN

IC3000
R5F100GEAFB
RENESAS

MICOM

4 [SCL]

5 [SDA]

24 [SCL]

23 [SDA]

24 [SCL]

23 [SDA]

1

2

[P60/SCLA0]

[P61/SDAA0]

0 Ω

0Ω

33 Ω

33Ω

33 Ω

33Ω

33 Ω

33Ω

+3.3V_NOR

3.3k Ω

3.3k Ω

I2C_SCL1

I2C_SDA1

+3.3V_NOR

3.3k Ω

3.3k Ω

I2C_SCL_MICOM_SO

I2C_SDA_MICOM_SOC

C

AR15
[SCL0/GPIO66]
AP15

[SDA0/GPIO65]

H13
LG1154D

AR16
[SCL1/GPIO6

4]

AP16

[SDA1/GPIO7
9]

AP6

[SCL3]

AR6

[SDA3]

AH34

[SCL5]

AH33

[SDA5]

I2C_SCL4

I2C_SDA
4

I2C_SCL6

I2C_SDA
6

+3.3V_TU

3.3k Ω

+3.3V_TU

3.3k Ω

[SCL]

7

33 Ω

3.3k Ω

3.3k Ω

33 Ω

22 Ω

22 Ω

33 Ω

33 Ω

[SDA]

[D_SCL]

[D_SDA]

[SCL_T]

[SDA_T]

IC6900
A8303SESTR-T

8

LNB

34

35

TU6503
TDSQ-G651D
TUNER_T2/C/S2

3

4

IC12000

LG1132-D13

HEVC DECODER

IC5800
TAS5733

AMP HEIGHT

B11

24

23

[

[SCL]

[SDA]

33 Ω

33Ω

33 Ω

33 Ω

+3.3V_NOR

3.3k Ω

3.3k Ω

I2C_SCL2_SOC

I2C_SDA2_SOC

AP17
[SCL2/GPIO7

8]
AR17

[SDA2/GPIO7

7]

AH32

[SCL4]

AJ33

[SDA4]

I2C_SCL5

I2C_SDA
5

+3.3V_NOR

3.3k Ω

3.3k Ω

33 Ω

33 Ω

33 Ω

33 Ω

[SCL]

[SDA]

[CSCL]

[CSDA]

6

IC102
R1EX24256BSAS0A

5

NVRAM

63

IC3201

SII9587CNUC

62

HDMI_SW

H13 Block diagram

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

Tuner Block

TDSQ­G651D

[+3.3V_S2_DEMOD] 32

[+3.3V_TUNER] 5

[+.1.8V_TUNER] 7

[+1.23V_S2_DEMOD] 30

[S2_F22_OUTPUT] 33

[LNB] 36

[S2_SCL] 34

[S2_SDA] 35

+3.3V_D_Demod

+3.3V_TU

+1.8_TU

+1.23V_D_Demod

LNB_TX

LNB_OUT

I2C_SCL4

+3.3V_NORMAL

3.3K Ω

22 Ω

I2C_SDA4

[RESET] 2 AG6[GPIO10]

[SLC] 3

[SDA] 4

[ERROR] 16

[SYNC] 17

[VALID] 18

[MCLK] 19

[D0-7] 20-27

[S2_RESET] 31 AM18 [ADIN7_SRV]

[CVBS] 8

[SIF] 6

100Ω

/TU_RESET1

IC2_SDA6
IC2_SCL6

33 Ω 33Ω

FE_DEMOD1_TS_ERROR
FE_DEMOD1_TS_SYNC
FE_DEMOD1_TS_VAL
FE_DEMOD1_TS_CLK

FE_DEMOD1_TS_DATA [0-7]

/S2_RESET

CVBS

TUNER_SIF

10 [TONECTRL]

2 [LNB]

7 [SCL]

A8303SESTR-TB

8 [SDA]

LG1154

AP6 [SCL3]
AR6 [SDA3]

AH34 [SCL5]

AH33 [SDA5]

AL37[TP_DVB_ERR]
AL36 [TP_DVB_SOP]
AL35 [TP_DVB_VAL]
AM36 [TP_DVB_CLK]

[TP_DVB_DATA0-7]

V15[CVBS_IN1]

H18[AAD_ADC_SIF]

LNB

IC6900

CI Slot

PCM_5V_CTL

CI 5V
Power detect

+5V_CI_ON +5V_NORMAL

H32
[CAM_VCCEN_N]

D32[CAM_CD1_N]

E32[CAM_CD2_N]

F33[CAM_CE1_N] CARD_EN1

F34[CAM_CE2_N]

H37[EB_BE_N0]

H36[EB_BE_N1]

[EB_ADDR0-14]

[EB_DATA0-7]

G34[CAM_RESET]

E33[CAM_WAIT]

D33[CAM_INPACK]

D34[CAM_REG]

F32[CAM_IREQ]

J36[EB_OE]

H35[EB_WE]

A28[TPI_CLK]

B28[TPI_VAL]

B29[TPI_SOP]

TPI_DATA[0-7]

TPO_DATA[0-7]

CI_ADDR[0-14] CI_A_ADDR[0-14]

CI_DATA[0-7] CI_A_DATA[0-7]

10K Ω

/CI_CD1
/CI_CD2

CI_VS1

/PCM_CE1

/PCM_CE2

/PCM_IOWR

/PCM_IORD

PCM_RST

/PCM_WAIT

PCM_INPACK

/PCM_REG

/PCM_IRQA

/PCM_OE
/PCM_WE

100 Ω

33 Ω

+5V_CI_ON

10K Ω

CI_TS_CLK
CI_TS_VAL

CI_TS_SYNC

VCC

CI_DET1

CI_DET2

VS1 G32[CAM_VS1_N]

CARD_EN2

IOWR

IORD

ADDR[0-14]

DATA[0-7]

CI_RESET

CI_WAIT

INPACK

REG

/IRQA

O_EN
WR_EN

TS_OUT_CLK

TS_OUT_VAL

TS_OUT_SYNC

CI_TS_DATA[0-7]

CI_IN_TS_DATA[0-7]

H13 Block diagram

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

AV1
Phone JACK

FULL

SCART

(18P)

AV1_CVBS_IN

COMP1/AV1/DVI_L_IN

SC_CVBS_IN

SC_R
SC_G
SC_B
SC_CVBS_IN_SOY

AV1_CVBS_IN_SOC

AUAD_L/R_CH2_IN

SC_CVBS_IN_SOC

COMP1_PR_IN_SOC
COMP1_Y_IN_SOC
COMP1_PB_IN_SOC
COMP1_Y_IN_SOC_SOY

Analogue Input

[CVBS_IN3]

[AUAD_L/R_CH2_IN]

[CVBS_IN2]

[PR1/Y1/PB1/SOY1_IN]

Component

Phone JACK

Tuner

SC_FB
SC_ID

SC_L/R_IN

1

COMP1_Y/Pb/Pr

TU_CVBS

TUNER_SIF_TU
DIF[P/N]

SC_FB_SOC
SC_ID_SOC

AUAD_L/R_CH3_IN

COMP2_PB_IN_SOC
COMP2_Y_IN_SOC

COMP2_Y_IN_SOC_SOY

COMP2_PR_IN_SOC

TU_CVBS_ISOC

TUNER_SIF
ADC_I_INP/INN

H13

[SC1_SID]
[SC1_FB]

[AUAD_L/R_CH3_IN]

[PB2/Y2/SOY2/PR2_IN]

[CVBS_IN1]

[AAD_ADC_SIF]

[ADC_I_INP/INN]

(LG1154AN)

H13 Block diagram

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

SC_L/R_IN

AV_L/R_IN

[AUAD_L_CH1_IN]

[AUAD_L_CH3_IN]

[AUAD_L_CH2_IN]

[AUD_SCART_OUTL/OUTR]

SCART_Lout/Rout

AZ4580MTR

OP AMP

DTV/MNT_L/R_OUT

Mute

CTRL

[TR]

pi filter

Audio I/O

MICOM

SCART

SCART_MUTE

AUDIO L/R OUT

H13

[DACSCK]
[DACLRCK]
[DACLRCH]

[SCL0/SDA0]

[GPIO21]

AUD_SCK/LRCK/LRCH

I2C_SCL1/SDA1

AMP_RESET_N

TAS5733

MAIN

LPF

LPF

4P wafer

LG1154

WOOFER

LPF

LPF

AMP_MUTE

MICOM

Tuner

TUNER_SIF

[AAD_ADC_SIF]

[PHY0_ARC_OUT_0]

[AUDA_OUTL]

[IEC958OUT]

HP_L/ROUT_MAIN

SPDIF_OUT

TPA6138A2
Headphone

SIDE_HP_MUTE

AMP

HEADPHONE

LPF

Phone Jack

LINE OUT

2P wafer

SPDIF_OUT_ARC

H13 Block diagram

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

H13

LG1154D_A0

HDMI_S/W_RESET

HDMI_INT

SPDIF_OUT_ARC

HDMI Out put 8bits

I2C_SCL/SDA 5 2bits

HDMI

Switch

(IC3201 / SII9587CNUC)

CEC_REMOTE

SPDIF_OUT_ARC

HDMI1

TMDS Link 8bits

CEC_REMOTE

DDC_I2C 2bits

HDMI2

TMDS Link 8bits

CEC_REMOTE

DDC_I2C 2bits

MICOM

(IC3000 /

R5F100GEAFB)

OCP
(IC3202 /
TPS2554)

TMDS Link 8bits

DDC_I2C 2bits

MHL_DET

HDMI3

CEC_REMOTE

Panel Interface (EPI)

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

H13

LG1154D

TCON

EPI
(Vx1)
Combo

LOCK

EPI0A +/-

EPI0B +/-

EPI1A +/-

EPI1B +/-

TERM1 +/-

TERM2 +/-

PANEL

(LOCKn)

(TX0 +/-)

(TX1 +/-)

(TX2 +/-)

(TX3 +/-)

H13 Block diagram

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

[USB2_2_DP0 / DM0]

[EB_CS2/GPIO92]

[USB2_1_DP0 / DM0]

[USB2_0_DP / DM]

[USB3_DP0/DM0]
[USB3_RX0P / M]

[USB3_TX0P / M]

[HUB_VBUS_CTRL0]

[HUB_PORT_OVER0/1]

[UART1_RXD / TXD]

[GPIO15 / GPIO18]

H13

LG1154D

[GPIO13]

USB2_HUB_IC_IN_DP / DM

USB_CTL2

USB2_ DP2 / DM2

WIFI_DP / DM

USB3_DP / DM
USB3_RX0P/RX0M

USB3_TX0P/TX0M

USB_CTL2
/USB_OCD1

M_REMOTE_RX / TX
M_REMOTE_CTS / RTS

M_REMOTE_RESET

USB HUB

USB2512B-AEZG

USB_CTL3

Motion Remote

USB_CAMERA_DP / DM

USB_DP3 / DM3

OCP USB2/3

TPS2062C

OCP USB1

TPS2554

Receiver

+5V_USB3

+5V_USB2

+5V_USB1

USB_Camera

(구주7600 - Ready)

USB3

USB2

USB_WIFI

USB1
(USB3.0, PVR Ready)

CAM_DET

(R5F100GEAFB)

WOL/WOW_POWER_ON

MICOM

[UART0_RXD]

[UART0_TXD]

SOC_TX

MICOM

(R5F100GEAFB)

SOC_RX

SOC_TX

SOC_RX

4Pin debugging

Wafer

P3800

FRC B/D (ULTRA HD) Block diagram

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

Interconnection - 1

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

LA965*-Z*

7

2

1

[PCBs]

1

Main PCB

2

PSU

3

WIFI ASSY

4

BT MOTION ASSY

6

4

5

3

5

IR PCB

6

Local Key

7

LED Driver

Interconnection - 1

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

LA970*-Z*

2

7 7

1

[PCBs]

1

Main PCB

2

PSU

3

WIFI ASSY

6

5

4

BT MOTION ASSY

5

IR PCB

6

Local Key

7

LED Driver

3 4

Interconnection - 1

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

84LM96/LA980V-ZD

7 7

2

2

7 7

1

1

[PCBs]

1

Main PCB

2

PSU

3

WIFI ASSY

6

6

4

2 2

5

3

4

BT MOTION ASSY

5

IR/LOGO PCB

6

Local Key

7

LED Driver

Interconnection – sub PCB( **LA965V Series )

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

BT MOTION ASSY

4

Local Key

PCB

5

IR Key PCB

WIFI ASSY

3

IR PCB WIFI ASSY BT MOTION ASSY

1

To Main

Interconnection – sub PCB( **LA970* Series )

Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

BT MOTION ASSY

4

Local Key

PCB

5

IR Key PCB

Sliding SPK control PCB Assy

WIFI ASSY

3

Sliding SPK unit

IR PCB WIFI ASSY BT MOTION ASSY

1

To Main