LG 47SL90QD-SA Schematic

LCD TV

SERVICE MANUAL

CAUTION

BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

CHASSIS : LJ91L

MODEL : 47SL90QD

47SL90QD-SA

North/Latin America http://aic.lgservice.com
Europe/Africa http://eic.lgservice.com
Asia/Oceania http://biz.lgservice.com

Internal Use Only

Printed in KoreaP/NO : MFL61862417 (0911-REV01)

LGE Internal Use OnlyCopyright LG Electronics. Inc. All right reserved.

Only for training and service purposes

- 2 -

CONTENTS

CONTENTS .............................................................................................. 2

PRODUCT SAFETY ..................................................................................3

SPECIFICATION........................................................................................6

ADJUSTMENT INSTRUCTION ...............................................................10

EXPLODED VIEW .................................................................................. 17

SVC. SHEET ...............................................................................................

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Only for training and service purposes

- 3 -

SAFETY PRECAUTIONS

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

General Guidance

An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.

It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.

If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.

When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1W), keep the resistor 10mm away from PCB.

Keep wires away from high voltage or high temperature parts.

Before returning the receiver to the customer,

always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.

Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1MΩ and 5.2MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.

Leakage Current Hot Check (See below Figure)

Plug the AC cord directly into the AC outlet.

Do not use a line Isolation Transformer during this check.

Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to

0.5mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.

Leakage Current Hot Check circuit

1.5 Kohm/10W

To Instrument’s
exposed
METALLIC PARTS

Good Earth Ground
such as WATER PIPE,
CONDUIT etc.

AC Volt-meter

When 25A is impressed between Earth and 2nd Ground
for 1 second, Resistance must be less than 0.1

*Base on Adjustment standard

IMPORTANT SAFETY NOTICE

0.15uF

Ω

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Only for training and service purposes

- 4 -

CAUTION: Before servicing receivers covered by this service
manual and its supplements and addenda, read and follow the

SAFETY PRECAUTIONS on page 3 of this publication.
NOTE: If unforeseen circumstances create conflict between the

following servicing precautions and any of the safety precautions on
page 3 of this publication, always follow the safety precautions.
Remember: Safety First.

General Servicing Precautions

1. Always unplug the receiver AC power cord from the AC power
source before;
a. Removing or reinstalling any component, circuit board

module or any other receiver assembly.

b. Disconnecting or reconnecting any receiver electrical plug or

other electrical connection.

c. Connecting a test substitute in parallel with an electrolytic

capacitor in the receiver.
CAUTION: A wrong part substitution or incorrect polarity
installation of electrolytic capacitors may result in an
explosion hazard.

2. Test high voltage only by measuring it with an appropriate high
voltage meter or other voltage measuring device (DVM,
FETVOM, etc) equipped with a suitable high voltage probe.
Do not test high voltage by "drawing an arc".

3. Do not spray chemicals on or near this receiver or any of its
assemblies.

4. Unless specified otherwise in this service manual, clean
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable
non-abrasive applicator; 10% (by volume) Acetone and 90% (by
volume) isopropyl alcohol (90%-99% strength)
CAUTION: This is a flammable mixture.
Unless specified otherwise in this service manual, lubrication of
contacts in not required.

5. Do not defeat any plug/socket B+ voltage interlocks with which
receivers covered by this service manual might be equipped.

6. Do not apply AC power to this instrument and/or any of its
electrical assemblies unless all solid-state device heat sinks are
correctly installed.

7. Always connect the test receiver ground lead to the receiver
chassis ground before connecting the test receiver positive
lead.
Always remove the test receiver ground lead last.

8. Use with this receiver only the test fixtures specified in this

service manual.

CAUTION: Do not connect the test fixture ground strap to any
heat sink in this receiver.

Electrostatically Sensitive (ES) Devices

Some semiconductor (solid-state) devices can be damaged easily
by static electricity. Such components commonly are called
Electrostatically Sensitive (ES) Devices. Examples of typical ES
devices are integrated circuits and some field-effect transistors and
semiconductor "chip" components. The following techniques
should be used to help reduce the incidence of component
damage caused by static by static electricity.

1. Immediately before handling any semiconductor component or
semiconductor-equipped assembly, drain off any electrostatic
charge on your body by touching a known earth ground.
Alternatively, obtain and wear a commercially available
discharging wrist strap device, which should be removed to
prevent potential shock reasons prior to applying power to the

unit under test.

2. After removing an electrical assembly equipped with ES
devices, place the assembly on a conductive surface such as
aluminum foil, to prevent electrostatic charge buildup or
exposure of the assembly.

3. Use only a grounded-tip soldering iron to solder or unsolder ES
devices.

4. Use only an anti-static type solder removal device. Some solder
removal devices not classified as "anti-static" can generate
electrical charges sufficient to damage ES devices.

5. Do not use freon-propelled chemicals. These can generate
electrical charges sufficient to damage ES devices.

6. Do not remove a replacement ES device from its protective
package until immediately before you are ready to install it.
(Most replacement ES devices are packaged with leads
electrically shorted together by conductive foam, aluminum foil
or comparable conductive material).

7. Immediately before removing the protective material from the
leads of a replacement ES device, touch the protective material
to the chassis or circuit assembly into which the device will be
installed.
CAUTION: Be sure no power is applied to the chassis or circuit,
and observe all other safety precautions.

8. Minimize bodily motions when handling unpackaged
replacement ES devices. (Otherwise harmless motion such as
the brushing together of your clothes fabric or the lifting of your
foot from a carpeted floor can generate static electricity
sufficient to damage an ES device.)

General Soldering Guidelines

1. Use a grounded-tip, low-wattage soldering iron and appropriate
tip size and shape that will maintain tip temperature within the
range or 500

°F to 600°F.

2. Use an appropriate gauge of RMA resin-core solder composed
of 60 parts tin/40 parts lead.

3. Keep the soldering iron tip clean and well tinned.

4. Thoroughly clean the surfaces to be soldered. Use a mall wire­bristle (0.5 inch, or 1.25cm) brush with a metal handle.
Do not use freon-propelled spray-on cleaners.

5. Use the following unsoldering technique
a. Allow the soldering iron tip to reach normal temperature.

(500

°F to 600°F)

b. Heat the component lead until the solder melts.
c. Quickly draw the melted solder with an anti-static, suction-

type solder removal device or with solder braid.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.

6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature

(500

°F to 600°F)

b. First, hold the soldering iron tip and solder the strand against

the component lead until the solder melts.

c. Quickly move the soldering iron tip to the junction of the

component lead and the printed circuit foil, and hold it there
only until the solder flows onto and around both the
component lead and the foil.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.

d. Closely inspect the solder area and remove any excess or

splashed solder with a small wire-bristle brush.

SERVICING PRECAUTIONS

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- 5 -

IC Remove/Replacement

Some chassis circuit boards have slotted holes (oblong) through
which the IC leads are inserted and then bent flat against the
circuit foil. When holes are the slotted type, the following technique
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique
as outlined in paragraphs 5 and 6 above.

Removal

1. Desolder and straighten each IC lead in one operation by gently
prying up on the lead with the soldering iron tip as the solder
melts.

2. Draw away the melted solder with an anti-static suction-type
solder removal device (or with solder braid) before removing the
IC.

Replacement

1. Carefully insert the replacement IC in the circuit board.

2. Carefully bend each IC lead against the circuit foil pad and
solder it.

3. Clean the soldered areas with a small wire-bristle brush.
(It is not necessary to reapply acrylic coating to the areas).

"Small-Signal" Discrete Transistor
Removal/Replacement

1. Remove the defective transistor by clipping its leads as close as
possible to the component body.

2. Bend into a "U" shape the end of each of three leads remaining
on the circuit board.

3. Bend into a "U" shape the replacement transistor leads.

4. Connect the replacement transistor leads to the corresponding
leads extending from the circuit board and crimp the "U" with
long nose pliers to insure metal to metal contact then solder
each connection.

Power Output, Transistor Device
Removal/Replacement

1. Heat and remove all solder from around the transistor leads.

2. Remove the heat sink mounting screw (if so equipped).

3. Carefully remove the transistor from the heat sink of the circuit
board.

4. Insert new transistor in the circuit board.

5. Solder each transistor lead, and clip off excess lead.

6. Replace heat sink.

Diode Removal/Replacement

1. Remove defective diode by clipping its leads as close as
possible to diode body.

2. Bend the two remaining leads perpendicular y to the circuit
board.

3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.

4. Securely crimp each connection and solder it.

5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.

Fuse and Conventional Resistor
Removal/Replacement

1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.

2. Securely crimp the leads of replacement component around
notch at stake top.

3. Solder the connections.
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.

Circuit Board Foil Repair

Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
board causing the foil to separate from or "lift-off" the board. The
following guidelines and procedures should be followed whenever
this condition is encountered.

At IC Connections

To repair a defective copper pattern at IC connections use the
following procedure to install a jumper wire on the copper pattern
side of the circuit board. (Use this technique only on IC
connections).

1. Carefully remove the damaged copper pattern with a sharp
knife. (Remove only as much copper as absolutely necessary).

2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.

3. Bend a small "U" in one end of a small gauge jumper wire and
carefully crimp it around the IC pin. Solder the IC connection.

4. Route the jumper wire along the path of the out-away copper
pattern and let it overlap the previously scraped end of the good
copper pattern. Solder the overlapped area and clip off any
excess jumper wire.

At Other Connections

Use the following technique to repair the defective copper pattern
at connections other than IC Pins. This technique involves the
installation of a jumper wire on the component side of the circuit
board.

1. Remove the defective copper pattern with a sharp knife.
Remove at least 1/4 inch of copper, to ensure that a hazardous
condition will not exist if the jumper wire opens.

2. Trace along the copper pattern from both sides of the pattern
break and locate the nearest component that is directly
connected to the affected copper pattern.

3. Connect insulated 20-gauge jumper wire from the lead of the
nearest component on one side of the pattern break to the lead
of the nearest component on the other side.
Carefully crimp and solder the connections.
CAUTION: Be sure the insulated jumper wire is dressed so the
it does not touch components or sharp edges.

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Only for training and service purposes

- 6 -

SPECIFICATION

NOTE : Specifications and others are subject to change without notice for improvement

.

4. Electrical specification

4.1 General Specification

1. Application range

This specification is applied to the LCD TV used LJ91L
chassis.

2. Requirement for Test

Each part is tested as below without special appointment.

1) Temperature : 25±5ºC (77±9ºF), CST : 40±5ºC

2) Relative Humidity : 65±10%

3)

Power Voltage : Standard input voltage(100~240V@50/60Hz)

* Standard Voltage of each products is marked by models.

4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.

5) The receiver must be operated for about 5 minutes prior to
the adjustment.

3. Test method

1) Performance: LGE TV test method followed

2) Demanded other specification

- Safety: CE, IEC specification

- EMC: CE, IEC specification

No Item Specification Remark

1.

Receiving System

1) SBTVD / NTSC / PAL-M / PAL-N

2.

Available Channel 1) VHF : 02~13

2) UHF : 14~69

3) DTV : 02-69

4) CATV : 01~135

3. Input Voltage 1) AC 100 ~ 240V 50/60Hz Mark : 110V, 60Hz

4. Market Cent
42 inch Wide(1920x1080)

47 inch Wide(1920x1080)

LC420WUL-SBT1
LC470WUL-SBT1

42SL90QD-SA
47SL90QD-SA

42SL90QD-SA
47SL90QD-SA

ral and South AMERICA

5.

Screen Size

6. Aspect Ratio 16:9

7. Tuning System FS

8.

Module

9.

Operating Environment 1) Temp : 0 ~ 40 deg

2) Humidity : ~ 80 %

10.

Storage Environment 1) Temp : -20 ~ 60 deg

2) Humidity : ~ 85 %

- 7 -

LGE Internal Use OnlyCopyright LG Electronics. Inc. All right reserved.

Only for training and service purposes

5. Chromiance & Luminance spec.

No Item Min Typ Max Unit Remark

Module cd/m

2

White brightness

294 368

2.

1.

3.

Luminance uniformity 77 % Full white

0.640

0.331

4.

5.

RED

0.282

0.634

6.

7.

GREEN

0.151

8.

9.

BLUE

0.279

10.

Color
coordinate

WHITE

Y

X

Y

X

Y

X

Y

X

Typ.

-0.03

0.292

Typ.

+0.03

11.

12.

Color coordinate uniformity N/A

900 1300 Contrast ratio

Cool

-0.015

Typ.

0.269

0.273

Typ.
+0.015

Standard

-0.015

Typ.

Typ.

0.285

0.293

Typ.
+0.015

13. Color
Temperature

Warm

-0.015

0.313

0.329

Typ.
+0.015

<Test Condition>
85% Full white pattern

** The W/B Tolerance is
–0.015 for Adjustment

Dynamic contrast : off
Dynamic color : off
OPC : off

14. Color Distortion, DG 10.0 %

15. Color Distortion, DP 10.0 deg

16. Color S/N, AM/FM 43.0 dB

17. Color Killer Sensitivity -80 dBm

6. Component Input (Y, CB/PB, CR/PR)

No Resolution H-freq(kHz) V-freq.(kHz) Pixel clock Proposed

1. 720*480 15.73 60 13.5135 SDTV ,DVD 480I

2. 720*480 15.73 59.94 13.5 SDTV ,DVD 480I

3. 720*480 31.47 60 27.027 SDTV 480P

4. 720*480 31.47 59.94 27.0 SDTV 480P

5. 1280*720 45.00 60.00 74.25 HDTV 720P

6. 1280*720 44.96 59.94 74.176 HDTV 720P

7. 1920*1080 33.75 60.00 74.25 HDTV 1080I

8. 1920*1080 33.72 59.94 74.176 HDTV 1080I

9. 1920*1080 67.500 60 148.50 HDTV 1080P

10. 1920*1080 67.432 59.939 148.352 HDTV 1080P

11. 1920*1080 27.000 24.000 74.25 HDTV 1080P

12. 1920*1080 26.97 23.94 74.176 HDTV 1080P

13. 1920*1080 33.75 30.000 74.25 HDTV 1080P

14. 1920*1080 33.71 29.97 74.176 HDTV 1080P

15. 1920*1080 56.25 50.000 148.5 HDTV 1080P

16. 1920*1080 28.125 25.000 74.25 HDTV 1080P

- 8 -

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7. RGB Input (PC)

No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed

PC DDC

1. 640*350 31.468 70.09 25.17 EGA X
O
O
O
O
O
O
O
O
O
O

2. 720*400 31.469 70.08 28.32 DOS

3. 640*480 31.469 59.94 25.17 VESA(VGA)

4. 800*600 35.156 56.25 36.00 VESA(SVGA)

5. 800*600 37.879 60.31 40.00 VESA(SVGA)

6. 1024*768 48.363 60.00 65.00 VESA(XGA)

7. 1280*768 47.776 59.870 79.5 CVT(WXGA)

8. 1360*768 47.712 60.015 85.50 VESA (WXGA)

9. 1280*1024 63.981 60.020 108.00 VESA

10. 1600*1200 75.00 60.00 162 VESA (UXGA)

11 1920*1080 67.5 60 148.5 HDTV 1080P

** RGB PC Monitor Range Limits

- Min Vertical Freq - 56 Hz

- Max Vertical Freq - 62 Hz

- Min Horiz. Freq - 30 kHz

- Max Horiz. Freq - 80 kHz

- Pixel Clock - 170 MHz

8. HDMI Input (PC/DTV)

No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed

PC DDC

1 640*350 31.468 70.09 25.17 EGA X

O
O
O
O
O
O
O
O
O
O

2 720*400 31.469 70.08 28.32 DOS
3 640*480 31.469 59.94 25.17 VESA(VGA)
4 800*600 35.156 56.25 36.00 VESA(SVGA)
5 800*600 37.879 60.31 40.00 VESA(SVGA)
6 1024*768 48.363 60.00 65.00 VESA(XGA)
7 1280*768 47.776 59.870 79.5 CVT(WXGA)
8 1360*768 47.712 60.015 85.50 VESA (WXGA)
9 1280*1024 63.981 60.020 108.00 VESA (SXGA)
10 1600*1200 75.00 60.00 162 VESA (UXGA)
11 1920*1080 66.587 59.934 138.5 HDTV 1080P
DTV
1 720*480 31.47 60 27.027 SDTV 480P
2 720*480 31.47 59.94 27.00 SDTV 480P
3 1280*720 45.00 60.00 74.25 HDTV 720P
4 1280*720 44.96 59.94 74.176 HDTV 720P
5 1920*1080 33.75 60.00 74.25 HDTV 1080I
6 1920*1080 33.72 59.94 74.176 HDTV 1080I
7 1920*1080 67.500 60 148.50 HDTV 1080P
8 1920*1080 67.432 59.939 148.352 HDTV 1080P
9 1920*1080 27.000 24.000 74.25 HDTV 1080P
10 1920*1080 26.97 23.94 74.176 HDTV 1080P
11 1920*1080 33.75 30.000 74.25 HDTV 1080P
12 1920*1080 33.71 29.97 74.176 HDTV 1080P

17. 1920*1080 56.25 50.000 148.5 HDTV 1080P

18. 1920*1080 28.125 25.000 74.25 HDTV 1080P

** HDMI Monitor Range Limits

- Min Vertical Freq - 56 Hz

- Max Vertical Freq - 62 Hz

- Min Horiz. Freq - 30 kHz

- Max Horiz. Freq - 80 kHz

- Pixel Clock - 170 MHz

- 9 -

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9. Consignment Setting (OUTGOING CONDITION)

No Item Condition

1. Input Mode TV02CH

2. Volume Level 10

3. Mute Off

4. Aspect Ratio 16:9

5. System Color PAL-M

6 Booster On

Picture Mode Vivid

Backlight
Contrast
Brightness
Sharpness
Color 70

70

0

0

100
100
50

Tint

Color Temperature Cool

7. Picture

Picture Reset
Sound Mode Standard
Auto Volume Off
Clear Voice Off
SRS TruSurround XT Off
Balance

8. Audio

TV Speaker On

On

Clock Auto9. Time
Off Timer / On Timer
Sleep Timer / Auto Sleep

Off

Language (Menu/Audio) Portugues
SimpLink
Key Lock Off

Off

Caption

10. Option

Set ID 1

11. Channel Memory RF : 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,

14, 30, 51, 63
CATV : 15, 16, 17

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- 10 -

ADJUSTMENT INSTRUCTION

1. Application Range

This specification sheet is applied all of the LJ91T LCD TV
models, which produced in manufacture department or similar
LG TV factory.

2. Notice

1) Because this is not a hot chassis, it is not necessary to use
an isolation transformer. However, the use of isolation
transformer will help protect test instrument.

2) Adjustment must be done in the correct order. But it is

flexible when its factory local problem occurs. .

3) The adjustment must be performed in the circumstance of
25 ±5°C of temperature and 65±10% of relative humidity if
there is no specific designation.

4) The input voltage of the receiver must keep 100~220V,
50/60Hz.

5) Before adjustment, execute Heat-Run for 5 minutes.

• After Receive 100% Full white pattern (06CH) then process
Heat-run

(or “8. Test pattern” condition of Ez-Adjust status)

• How to make set white pattern

1) Press Power ON button of Service Remocon

2) Press ADJ button of Service remocon. Select “8. Test
pattern” and, after select “White” using navigation button,
and then you can see 100% Full White pattern.

* In this status you can maintain Heat-Run useless any

pattern generator

* Notice: if you maintain one picture over 20 minutes

(Especially sharp distinction black with white pattern –
13Ch, or Cross hatch pattern – 09Ch) then it can appear
image stick near black level.

3. Adjustment Items

3.1 PCB Assembly adjustment

• CPLD DOWNLOAD

• Adjust 480i Comp1

• Adjust 1080p Comp1/RGB

- If it is necessary, it can adjustment at Manufacture Line

- You can see set adjustment status at “1. ADJUST

CHECK” of the “In-start menu”

3.2 Set Assembly Adjustment

• EDID (The Extended Display Identification Data ) / DDC
(Display Data Channel) download

• Color Temperature (White Balance) Adjustment

• Make sure RS-232C control

• Selection Factory output option

4. PCB Assembly Adjustment

4.1. CPLD DOWNLOAD : JTAG MODE

4.2. << PRINT PORT >> PIN MAP

Pin JTAG Mode Signal Name

2 TCK
3 TMS

8 TDI
11 TDO
13 ­15 VCC

18 TO 25 GND

- 11 -

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4.3. << 10P WAFER >> PIN MAP

- 12 -

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Only for training and service purposes

4.4. Using RS-232C

Adjust 3 items at 3.1 PCB assembly adjustments “4.1.3

sequence” one after the order.

O Adjustment protocol

See ADC Adjustment RS232C Protocol_Ver1.0

O Adjustment protocol

- Pattern Generator : (MSPG-925FA)

- Adjust 480i Comp1 (MSPG-925FA : model :209 , pattern
: 65)

- Adjust 1080p Comp1/RGB(MSPG-925FA:model : 225 ,
pattern : 65)

- Adjust RGB (MSPG-925FA:model :225 , Pattern :65) –
RGB-PC Mode

* If you want more information then see the below Adjustment
method (Factory Adjustment)

O Adjustment sequence

- ad 00 00 : Enter the ADC Adjustment mode.

- xb 00 40: Change the mode to Component1 (No actions)

- ad 00 10: Adjust 480i Comp

- ad 00 10: Adjust 1080p Comp

- xb 00 60: Change to RGB-PC mode(No action)

- ad 00 10: Adjust 1080p RGB

- ad 00 90: End of the adjustment

Order

Command

Set response

1. Inter the ad 00 00 d 00 OK00x
Adjustment mode

2. Change the kb 00 40

b 00 OK40x (Adjust 480i Comp1/1080p Comp1)

Source kb 00 60

b 00 OK60x (Adjust 1080p RGB)

3.

Start Adjustment

ad 00 10

4.Return the OKx ( Success condition )
Response NGx ( Failed condition )

5.Read (main)

(main : component1 480i, RGB 1080p)

Adjustment data

ad 00 20

000000000000000000000000007c007b006dx
(main) (main : component1 1080p)
ad 00 30

000000070000000000000000007c00830077x

6.Confirm ad 00 99 NG 03 00x (Failed condition)
Adjustment NG 03 01x (Failed condition)

NG 03 02x (Failed condition)
OK 03 03x (Success condition)

7.

End of Adjustment

ad 00 90 d 00 OK90x

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- 13 -

5. Factory Adjustment

5.1 Manual Adjust Component 480i/1080p
RGB 1080p

O Summary : Adjustment component 480i/1080i and RGB

1080p is Gain and Black levelsetting at Analog
to Digital converter, and compensate the RGB
deviation

O Using instrument

- Adjustment remocon, 801GF(802B, 802F, 802R) or
MSPG925FA pattern generator (It can output 480i/1080i
horizontal 100% color bar pattern signal, and its output
level must setting 0.7V±0.1V p-p correctly)

<Pic.4 Adjustment pattern : 480i / 1080p 60Hz Pattern >

* You must make it sure its resolution and pattern cause every

instrument can have different setting

O Adjustment method 480i Comp1, Adjust 1080p

Comp1/RGB (Factory adjustment)

• ADC 480i Component1 adjustment

- Check connection of Component1

- MSPG-925FA Ë Model: 209, Pattern 65

• Set Component 480i mode and 100% Horizontal Color
Bar Pattern(HozTV31Bar), then set TV set to
Component1 mode and its screen to “NORMAL”

• ADC 1080p Component1 / RGB adjustment

- Check connection both of Component1 and RGB

- MSPG-925FA Model: 225, Pattern 65

• Set Component 1080p mode and 100% Horizontal Color
Bar Pattern(HozTV31Bar), then set TV set to
Component1 mode and its screen to “NORMAL”

• After get each the signal, wait more a second and enter
the “IN-START” with press IN-START key of Service
remocon. After then select “7. External ADC” with
navigator button and press “Enter”.

• After Then Press key of Service remocon “Right
Arrow(VOL+)”

• You can see “ADC Component1 Success”

• Component1 1080p, RGB 1080p Adjust is same
method.

• Component 1080p Adjustment in Component1 input
mode

• RGB 1080p adjustment in RGB input mode

• If you success RGB 1080p Adjust. You can see “ADC
RGB-DTV Success”

5.2 EDID (The Extended Display
Identification Data) / DDC (Display Data
Channel) Download.

O Summary

• It is established in VESA, for communication between
PC and Monitor without order from user for building user
condition. It helps to make easily use realize “Plug and
Play” function.

• For EDID data write, we use DDC2B protocol.

O Auto Download

• After enter Service Mode by pushing “ADJ” key,

• Enter EDID D/L mode.

• Enter “START” by pushing “OK” key.

Caution: - Never connect HDMI & D-sub Cable when the user

downloading .

- Use the proper cables below for EDID Writing.

- 14 -

LGE Internal Use OnlyCopyright LG Electronics. Inc. All right reserved.

Only for training and service purposes

O Manual Download

• Write HDMI EDID data

- Using instruments
=> Jig. (PC Serial to D-Sub connection) for PC, DDC

adjustment.

=> S/W for DDC recording (EDID data write and

read)
=> D-sub jack
=> Additional HDMI cable connection Jig.

- Preparing and setting.
=> Set instruments and Jig. Like pic.5), then turn on

PC and Jig.
=> Operate DDC write S/W (EDID write & read)
=> It will operate in the DOS mode.

Pic.3) For write EDID data, setting Jig and another instruments.

• EDID data for LJ91D Chassis (Model name = LG TV)

- HDMI-1 EDID table (0x3D, 0x2C)

- HDM2 EDID table (0x3D, 0x1C)

- HDMI-3 EDID table (0x3D, 0x0C)

- Analog (RGB) EDID table (0x9B, 0x25)

See Workig Guide of you want more information about EDID
communication.

PC

VSC

B/D

Edid data and Model option download (RS232)

NO Item CMD 1 CMD 2 Data 0

Enter

download MODE

Download

Mode In

A E 0 0

When transfer the ’Mode In’ ,

Carry the command.

Edid data and
Model option

download

Download

A E *Note1 *Note2

Automatically download

(The use of a internal Data)

Adjust Mode Out

A E 9 0

Adjustment

Confirmation

A E 9 9

To check Download

on Assembly line.

5.3 Adjustment Color Temperature
(White balance)

O Using Instruments

• Color Analyzer: CA-210 (CH 9)

- Using LCD color temperature, Color Analyzer (CA-210)
must use CH 9, which Matrix compensated (White, Red,
Green, Blue compensation) with CS-2100. See the
Coordination bellowed one.

• Auto-adjustment Equipment (It needs when Auto­adjustment – It is availed communicate with RS-232C :
Baud rate: 115200)

• Video Signal Generator MSPG-925F 720p, 216Gray
(Model: 217, Pattern 78)

O Connection Diagram (Auto Adjustment)

• Using Inner Pattern

• Using HDMI input

<Pic.5 Connection Diagram for Adjustment White balance> .

O White Balance Adjustment

If you can’t adjust with inner pattern, then you can adjust
it using HDMI pattern. You can select option at "Ez-Adjust
Menu – 7. White Balance" there items "NONE, INNER,
HDMI". It is normally setting at inner basically. If you can’t
adjust using inner pattern you can select HDMI item, and
you can adjust.

In manual Adjust case, if you press ADJ button of service
remocon, and enter "Ez-Adjust Menu – 7. White
Balance", then automatically inner pattern operates. (In
case of "Inner" originally "Inner" will be selected.

• Connect all cables and equipments like Pic.5)

• Set Baud Rate of RS-232C to 115200. It may set
115200 orignally.

• Connect RS-232C cable to set

• Connect HDMI cable to set

¢ RS-232C Command (Commonly apply)

wb 00 00 White Balance adjustment start.
wb 00 10 Start of adjust gain (Inner white

pattern)
wb 00 1f End of gain adjust
wb 00 20 Start of offset adjust(Inner white

pattern)
wb 00 2f End of offset adjust
wb 00 ff End of White Balance adjust(Inner

pattern disappeared)

• "wb 00 00": Start Auto-adjustment of white balance.

• "wb 00 10": Start Gain Adjustment (Inner pattern)

• "jb 00 c0" :

• …

• "wb 00 1f": End of Adjustment
* If it needs, offset adjustment (wb 00 20-start, wb 00

2f-end)

• "wb 00 ff": End of white balance adjustment (inner

pattern disappear)

- 15 -

LGE Internal Use OnlyCopyright LG Electronics. Inc. All right reserved.

Only for training and service purposes

CA-100+

COL OR
ANALYZER
TYPE; CA-100+

Full W hite Pattern

RS-232C

- 16 -

LGE Internal Use OnlyCopyright LG Electronics. Inc. All right reserved.

Only for training and service purposes

O White Balance Adjustment (Manual adjustment)

• Test Equipment: CA-210

- Using LCD color temperature, Color Analyzer (CA-

210) must use CH 9, which Matrix compensated
(White, Red, Green, Blue compensation) with CS-

2100. See the Coordination bellowed one.

• Manual adjustment sequence is like bellowed one.

- Turn to "Ez-Adjust" mode with press ADJ button of
service remocon.

- Select "10.Test Pattern" with CH+/- button and press
enter. Then set will go on Heat-run mode. Over 30
minutes set let on Heat-run mode.

- Let CA-210 to zero calibration and must has gap more
10cm from center of LCD module when adjustment.

- Press "ADJ" button of service remocon and select
"7.White-Balance" in "Ez-Adjust" then press "▶"

button of navigation key.

(When press "▶" button then set will go to full white

mode)

- Adjust at three mode (Cool, Medium, Warm)

- If "cool" mode
Let B-Gain to 192 and R, G, B-Cut to 64 and then
control R, G gain adjustment High Light adjustment.

- If "Medium" and "Warm" mode
Let R-Gain to 192 and R, G, B-Cut to 64 and then
control G, B gain adjustment High Light adjustment.

- All of the three mode
Let R-Gain to 192 and R, G, B-Cut to 64 and then
control G, B gain adjustment High Light adjustment.

- With volume button (+/-) you can adjust.

- After all adjustment finished, with Enter (■ key) turn
to Ez-Adjust mode. Then with ADJ button, exit from

adjustment mode

Attachment: White Balance adjustment coordination and color
temperature.

O Using CS-1000 Equipment.

- COOL : T=11000K, △uv=0.000, x=0.276 y=0.283

- MEDIUM : T=9300K, △uv=0.000, x=0.285 y=0.293

- WARM : T=6500K, △uv=0.000, x=0.313 y=0.329

5.4 EYE-Q Function check.

1) Turn on TV

2) Press EYE Key of Adj R/C

3) Cover the Eye Q II sensor on the front of the using your
hand and wait for 6 seconds

4) Confirm that R/G/B va;ie os ;pwer tjam 10 of the ‘Raw
Data (Sensor data, Back light)”. If after 6 seconds, R/G/B
value is not lower than 10, re[;ace EYE Q II sensor.

5) Remove your hand from the EYE Q II sensor and wait for
6 sencond

6) Confirm that “OK” pop up.

If change is not seen, replace EYE Q II sensor

5.5 Test of RS-232C control

Press IN-Start button of service remocon then set the “4.Baud
rate” to 15200, Then check RS-232C control and

5.6 Selection of Country option.

Selection of country option is allowed only North American model
(Not allowed Korean model). It is selection of Country about
Rating and Time Zone.

• Models: All models which use LA75A Chassis (See the first
page.)

• Press “In-Start” button of Service Remocon, then enter the
“Option” Menu with “PIP CH-“ Button

• Select one of these three (USA, CANADA, MEXICO)

defends on its market using “Vol. +/-“button.

* Caution : Don’t push The Instop Key ater completing the

function inspection.

5.7 Check the Ginga(Data Broadcasting)

1) Turn on TV

2) Press the OK Button on the ADJ R/C

3) Check the Ginga icon

LGE Internal Use OnlyCopyright LG Electronics. Inc. All right reserved.

Only for training and service purposes

-17 -

300

200

801

521

540

530

803

802

550

910

920

900

810

560

310

500

510

120

122

400

EXPLODED VIEW

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

IMPORTANT SAFETY NOTICE

A2

LV1

A10

LV2

A B C D E F G H I J K L M N O P Q R S T U V W X Y Z AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

COMPONENT1

FIX-TER

11

10

9

8

7

6

5

4

JK1101

13

COMPONENT2

FIX-TER

11

10

9

8

7

6

5

4

JK1102

13

AV1

6

8

7

5

4

JK1103

R1151
0

[RD]MONO

R1152
0

[RD]MONO

5.1V

ZD1101

5.1V

ZD1103

5.1V

ZD1105

5.1V

ZD1107

5.1V

ZD1109

5.1V

ZD1111

5.1V

ZD1122

5.1V

ZD1124

5.1V

ZD1126

5.1V

ZD1128

5.1V

ZD1130

5.1V

ZD1132

5.1V

ZD1113

5.1V

ZD1115

5.1V

ZD1117

5.1V

ZD1119

5.1V

5.1V

5.1V

5.1V

5.1V

5.1V

5.1V

5.1V

5.1V

5.1V

5.1V

5.1V

5.1V

5.1V

5.1V

5.1V

C1101
100pF

50V

ZD1102

ZD1104

ZD1106

ZD1108

ZD1110

ZD1112

ZD1121

ZD1123

ZD1125

ZD1127

ZD1129

ZD1131

ZD1114

ZD1116

ZD1118

ZD1120

50V
27pF
C1103

R1105

D3.3V

50V
27pF
C1104

50V
27pF
C1105

D3.3V

10K

10K

10K

C1102
100pF
50V

R1101

CM2012FR27KT

CM2012FR27KT

CM2012FR27KT

470 K

R11 03

470 K

R11 04

R1102

BCM RECOMMAND

CM2012FR27KT

50V
27pF
C1107

CM2012FR27KT

50V
27pF
C1108

CM2012FR27KT

50V
27pF
C1109

470 K

R11 08

470 K

R11 09

D3.3V

C1106

0.1uF
16V

R1171
75

R11 06

470 K

25V

R11 07

470 K

L1101

C1112

C1113

C1110

25V

C1111

L1102

L1103

1uF

25V

1uF

25V

L1106

L1104

L1105

C1114

1uF

25V

C1115

1uF

25V

1uF

1uF

R1110
15

0
R11 14

0
R11 15

0
R11 16

0
R11 17

R11 12

R11 13

R1111

R1118
1K

50V
27pF
C1116

1K

0

0

50V
27pF
C1117

50V
27pF
C1118

R1119
1K

27pF
C1119

27pF
C1120

27pF
C1121

R1123

C1122
100pF

C1123
100pF

50V

50V

50V

C1126
100pF

15

R1124

R1125

50V

50V

R1120
15

R1121
15

R1122
15

SIDE AV

COMP1_DET

3:T21

D3.3V

R1134

5.1V

5.1V

5.1V

5.1V

ZD1133

ZD1135

ZD1137

ZD1139

R1172

75

R11 27

470 K

R11 28

470 K

2.7K

C1132

C1131

1uF
25V

1uF
25V

R1130
15

C1130

0.1uF
16V

R11 35

R11 36

R1137

0

0

1K

C1137
47pF
50V

C1135

100pF

C1136

100pF

SIDE_CVBS_DET
3:T19

SIDE_CVBS_IN
3:T19

SIDE_L_IN
3:T20

SIDE_R_IN
3:T20

3:T21

COMP1_Y_IN

P1101

12507WS-08L

15

15

COMP1_Pb_IN

3:T21

COMP1_Pr_IN

3:T20

COMP1_L_IN

3:T22

COMP1_R_IN

3:T21

COMP2_DET

3:T23

COMP2_Y_IN

3:T23

COMP2_Pb_IN

3:T22

9

R1129
0

1

2

3

4

5

R1131
0

6

7

R1150
0

8

5.1V

ZD1134

5.1V

ZD1136

5.1V

ZD1138

5.1V

ZD1140

PC AUDIO

JK1104

PEJ027-01

E_SPRING

3

T_TERMINAL1

6A

B_TERMINAL1

7A

R_SPRING

4

T_SPRING

5

B_TERMINAL2

7B

T_TERMINAL2

6B

SHIELD_PLATE

8

5.1V

ZD1142

5.1V

ZD1144

5.1V

5.1V

ZD1141

ZD1143

R1132

470K

R1133

470K

C1133

1uF

25V

C1134

1uF

25V

R11 38

0

R11 39

0

3:T13

PC_R_IN
3:T13

PC_L_IN

C1127
100pF
50V

C1128
100pF
50V

COMP2_Pr_IN

3:T22

COMP2_L_IN

3:T23

COMP2_R_IN

3:T23

AV1_CVBS_DET

3:T18

SPDIF OPTIC JACK

C1124
47pF
50V

C1125

100pF

AV1_CVBS_IN

3:T18

AV1_L_IN

3:T18

AV1_R_IN

3:T18

SPDIF_OUT

G4;3:T12

ZD1145

OPT

5.6B

D3.3V

R1126

1K

+5V

C1129

0.1uF
50V

VINPUT

JK1105

JST1223-001

GND

VCC

1

2

3

Fib er O ptic

4

FIX_POLE

R,G,B PC&DDC

RGB_VSYNC

3:T14

D2A10D2B11Q312D3A13D3B14VCC

8Q29

6Q15

7

GND

RGB_HSYNC

3:T14

DSUB_B

3:T15

DSUB_G

3:T15

DSUB_R

3:T16

RS-232C

C1140

0.47uF
25V

C1138

0.1uF
50V

C1141

0.47uF
25V

C1139

0.47uF
25V

4

D1A

D1B

BCM Reference

IC1101

MAX3232CDR

C1+

1

V+

2

C1-

3

C2+

4

C2-

5

V-

6

DOUT2

7

RIN2

8

C1142

0.1uF

3Q02

R1140
100

R1141
100

+5V_ST

D1103

ENKMC2838-T112

A1

C

A2

E0

E1

E2

VSS

5.1V

5.1V

5.1V

5.1V

5.1V

5.1V

M24C02-RMN6T

D1101

30V

ZD1146

ZD1148

ZD1150

IC1103

1

2

3

4

8

7

6

5

D1102
ADUC30S03010L
30V

L1108
0

L1108-*1

BG1608B121F RGB_BEAD

L1109
0

L1109-*1

BG1608B121F RGB_BEAD

L1110

0

L1110-*1

BG1608B121F RGB-BEAD

JK1106

L1107

BLM18PG121SN1D

C1146

0.1uF
50V

R1146
0

R1147
0

R1148

100
OPT

R1149

100
OPT

VCC

WC

SCL

SDA

+5V_ST

RS232C_RxD

RS232C_TxD

50V

C1147

220pF

IR

3:T11

R1156

4.7K

4.7 K

R11 53

D1104

ADMC5M03200L

5.6V

RED2GREEN3BLUE4GND_15DDC_GND

RED_GND7GREEN_GND8BLUE_GND9NC10SYNC_GND

GND_212DDC_DATA13H_SYNC14V_SYNC15DDC_CLOCK

11

6

1

3:T12

3:T12

5.1V

R1154
0

R1155
10K

OPT

5.1V

ZD1153

OPT
R1158

3.3K

B

ZD1152

+5V_ST

OPT

50V

C1148

220pF

R1159

10K
OPT

R1157
22

5.1V

5.1V

ZD1155

US_Commercial

R1160
100K

C

Q1101
2SC3052

E

ZD1154

+5V

R1142

22

IC1102

74F08D

1

D0B

D0A

R1143

22

ADUC30S03010L

C1143
47pF
50V

ZD1147

C1144
47pF
50V

ZD1149

C1145
47pF
50V

ZD1151

SPG09-DB-010

4.7K

R1145

4.7K

R1144

VCC

16

GND

15

DOUT1

14

RIN1

13

ROUT1

12

DIN1

11

DIN2

10

ROUT2

9

R1163

22

R1173

0

OPT

0

OPT

R1162

50V
47pF
C1149

US_Commercial

R1165

3.3K

B

R1161
100K

US_Commercial

C1151

0.1uF
50V

50V
47pF
C1150

+5V_ST

0

R1164

R1166

0

D1105
ADMC5M03200L

5.6V

C1152
100pF
50V

SHILED

16

R1167

220

R1168

220

C

Q1102
2SC3052

US_Commercial

E

C1153

R1169

10K

4700pF

50V

+5V

EDID_WP
3:T16

DDC_SCL

3:T17

DDC_SDA

3:T17

1K

R1170

D1106
ADMC5M03200L

5.6V

JK1107

SPG09-DB-009

6

7

8

9

10

DSUB_DET

3:T16

1

2

3

4

5

2

1

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

LEE GI YOUNG

BCM (BRAZIL VENUS)

IN - OUT

2009. 03. 23

1

15

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

A B C D E F G H I J K L M N O P Q R S T U V W X Y Z AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP

* HDMI CEC

+3.3V_HDMI

L602

BLM18PG121SN1D

C629

0.1uF

20

20

YKF45-7058V

JK501

20

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

D2+_HDMI2
D2-_HDMI2

D1+_HDMI2
D1-_HDMI2

D0+_HDMI2

D0-_HDMI2

CK+_HDMI2
CK-_HDMI2

DDC_SCL_2

DDC_SDA_2

HPD2

CEC_REMOTE

D3.3V

+3.3V_ST

6

5

4

R664

0

HDMI_SDA

C608

0.1uF

HDMI_SCL

68K

R666

Q601

SSM6N15FU

OPT

+3.3V_HDMI

R665

0

11:W17

11:W17

HDMI0_RXC-_BCM

HDMI0_RXC+_BCM

SOURCE1

1

GATE1

2

DRAIN2

3

C609

0.1uF

11:W16

11:W17

11:W17

11:W16

HDMI0_RX0-_BCM

HDMI0_RX1+_BCM

HDMI0_RX0+_BCM

HDMI0_RX1-_BCM

VSS_1
OUT_C+
OUT_C-

VDDO[3V3]
OUT_DDC_CLK
OUT_DDC_DAT

VSS_2

VDDC[1V8]_1

RXA_HPD

RXA_5V
RXA_DDC_DAT
RXA_DDC_CLK

RXA_C-

RXA_C+
VDDH[3V3]_1

RXA_D0­RXA_D0+

VSS_3
RXA_D1­RXA_D1+

VDDH[3V3]_2

RXA_D2­RXA_D2+

VDDH[1V8]_1

NC

C612

0.1uF

0.1uF

C610

0.1uF

11:W16

11:W16

HDMI0_RX2-_BCM

HDMI0_RX2+_BCM

OUT_D0-

100

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25

26

27

TEST

VSS_4

R667

GND

C611

0.1uF

OUT_D1-

VSS_1299OUT_D0+

97

98

28

29

RXB_5V

RXB_HPD

9.1K

C613

VDDO[1V8]

OUT_D1+

96

30

RXB_DDC_DAT

RXB_DDC_CLK

12:F6

HDMI_CEC

C614

0.1uF

C615

0.1uF

D2-_HDMI4

D2+_HDMI4

RXD_D2-

RXD_D2+

VDDC[1V8]_3

VSS_1193OUT_D2+

OUT_D2-

89

90

91

92

94

95

IC601

TDA9996HL

31

32

34

35

37

VSS_5

RXB_C-33RXB_C+

RXB_D0-36RXB_D0+

VDDH[3V3]_3

D1-_HDMI4

D1+_HDMI4

VSS_1086RXD_D1-

RXD_D1+

VDDH[3V3]_8

85

87

88

38

40

41

RXB_D1-39RXB_D1+

RXB_D2-42RXB_D2+

VDDH[3V3]_4

D0-_HDMI4

D0+_HDMI4

RXD_D0-

RXD_D0+

83

84

43

VSS_6

CK+_HDMI4

CK-_HDMI4

RXD_DDC_CLK

RXD_DC-

RXD_DC+

VDDH[3V3]_7

79

80

81

82

44

45

46

47

MODE

CDEC_DDC

VDDC[3V3]

VDDC[1V8]_2

R668 0

R669

0

DDC_SCL_4

DDC_SDA_4

RXD_HPD

RXD_5V78RXD_DDC_DAT

76

77

48PD49

SDA/SEL150SCL/SEL0

R670 0

R671 0

5:G5;16:G14

SDA1_3.3V

HPD4

5V_HDMI_4

75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51

R672

R673

4.7K

R674

4.7K

SCL1_3.3V

5:G5;16:G14

Q16;AH18

JACK_GND

20

19

HPD

18

+5V_POWER

17

DDC/CEC_GND

16

SDA

15

SCL

14

NC

13

CEC

12

CLK-

11

CLK_SHIELD

10

CLK+

9

DATA0-

8

DATA0_SHIELD

7

DATA0+

6

DATA1-

5

DATA1_SHIELD

4

DATA1+

3

DATA2-

2

DATA2_SHIELD

1

DATA2+

KJA-ET-0-0032

JK503

P19;AJ15
5V_HDMI_2

R628

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

GND

L19;Z14
5V_HDMI_1

R618

R605 0

R606

R607

0

R616 0

0

R617

0

UI_HW_PORT2

R627
0

0

0

H17;R26;W27;AL11

AL11

HPD2

R18;AL12

DDC_SDA_2

R17;AL12

DDC_SCL_2

H8;R26;W27;AL11

CEC_REMOTE

AL12

CK-_HDMI2

AL12

CK+_HDMI2

AL13

D0-_HDMI2

AL13

D0+_HDMI2

AL13

D1-_HDMI2

AL13

D1+_HDMI2

AL14

D2-_HDMI2

AL14

D2+_HDMI2

Y13

HPD1

M18;X13

DDC_SDA_1

M17;X12

DDC_SCL_1

CEC_REMOTE

Y12

CK-_HDMI1

Y12

CK+_HDMI1

Y12

D0-_HDMI1

Y11

D0+_HDMI1

Y11

D1-_HDMI1

Y11

D1+_HDMI1

Y10

D2-_HDMI1

Y10

D2+_HDMI1

5V_HDMI_1

R634

47K

R635
47K

GND

DDC_SDA_1

DDC_SCL_1

5V_HDMI_4

R641
0

0

R642

R639 0

R643

0

SIDE_HDMI_PORT4

5V_HDMI_2

R656

R653

47K

47K

5V_HDMI_4

R657

R655

47K

47K

EDID Pull-up

AH19

R14;AG19

DDC_SDA_4

R13;AG19

DDC_SCL_4

H8;H17;W27;AL11

CEC_REMOTE

AG19

AG19

AF19

AF19

AF19

AF19

AE19

AE19

DDC_SDA_2

DDC_SCL_2

DDC_SDA_4

DDC_SCL_4

HPD4

CK-_HDMI4

CK+_HDMI4

D0-_HDMI4

D0+_HDMI4

D1-_HDMI4

D1+_HDMI4

D2-_HDMI4

D2+_HDMI4

CEC_REMOTE
H8;H17;R26;AL11

DDC_SDA_1
DDC_SCL_1

0

R658

AVRL161A1R1NT

GND

CK-_HDMI1
CK+_HDMI1

D0-_HDMI1
D0+_HDMI1

D1-_HDMI1
D1+_HDMI1

D2-_HDMI1
D2+_HDMI1

+1.8V_HDMI

VR607

HPD1

D601

MMBD301LT1G

+5.0V

R662

1.8K

R661

1.8K

C607

0.1uF

+5.0V

C605

C604

0.1uF

5V_HDMI_1

0.1uF

DRAIN1

GATE2

SOURCE2

R663

C606

0.1uF

0

C616

0.1uF

VDDH[1V8]_2
R12K
VSS_9
RXC_D2+
RXC_D2­VDDH[3V3]_6
RXC_D1+
RXC_D1­VSS_8
RXC_D0+
RXC_D0­VDDH[3V3]_5
RXC_C+
RXC_C­RXC_DDC_CLK
RXC_DDCC_DAT
RXC_5V
RXC_HPD
CEC
VSS_7
VDDS[3V3]
CDEC_STBY
INT/HP_CTRL
XTAL_OUT
XTAL_IN

R675

C617

0.1uF

+3.3V_HDMI

OPT4.7K

OPT

OPT

0

OPT

+1.8V_AMP

R676
12K

+1.8V_HDMI

L601

BLM18PG121SN1D

C620

0.1uF

5V_HDMI_2

R677

0

R678 0

OPT

C619

0.1uF

C618

5.6nF

C623

0.1uF

C624

0.1uF

C625

0.1uF

C626

0.1uF

C627

0.1uF

+1.8V_HDMI

C628

C622

0.1uF

0.1uF

C621

0.1uF

Net Labels changed for HDMI2

3

2

1

YKF45-7058V

JK500

GND

UI_HW_PORT1

VARISTORS(VR500/501/502/503/504/505/506/507) on lines-HPD1/2/3/4 are all options
in case HDMI Switch doesn’t support ’ESD protection’

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

LEE GI YOUNG

HDMI S/W For MSTAR Platform

BCM (BRAZIL VENUS)

HDMI

2009.03.23

2

15

A B C D E F G H I J

IC503

D3.3V

AZ1117H-1.8TRE1(EH13A)

+1.8V_AMP

7

INPUT

3

2

C549

C548
10uF
10V

6

0.1uF
16V

OUTPUT

+24V

L511

MLB-201209-0120P-N2

5

4

3

ADJ/GND

1

+24V_AMP

GND

C551

C552

0.1uF

10uF
10V

16V

SPK_L+

SPK_L-

SPK_R+

SPK_R-

WAFER-ANGLE

5

4

3

2

1

P501

H3

SPEAKER_L

H3

H3

SPEAKER_R

H3

9:G7;9:I3;12:I4

+1.8V_AMP

+1.8V_AMP

L501

MLB-201209-0120P-N2

C501

10uF

10V

AMP_RST

9:G6

AUDIO_M_CLK

L502

R501

0

MLB-201209-0120P-N2

C502

C503

0.1uF
10uF

16V

6.3V

R502
100

C506

1000pF

50V

C504
100pF

50V

C505

0.1uF
16V

R504
0

0.1uF

C507
1000pF

50V

R503

3.3K

11:F7
11:F6
11:F7

9:I4;2:AH5
9:I4;2:AH5

D3.3V

L503

MLB-201209-0120P-N2

C508

BCM_I2S_DATA_OUT
BCM_I2S_WORD_CLK

BCM_I2S_BIT_CLK

SDA1_3.3V
SCL1_3.3V

C51 1

1uF 10V

+1.8V_AMP

C510
10uF

10V

C514

22000pF

50V

BST1A
VDR1A
RESET

AD
DVSS_1
VSS_IO

CLK_I

VDD_IO

DGND_PLL
AGND_PLL

LFM
AVDD_PLL
DVDD_PLL

TEST0

C513

0.1uF
16V

R505 100
R506 100
R507 100
R508 100
R509 100

OUT1A_2

PGND1A_1

PGND1A_2

54

55

56
1
2
3
4
5
6
7

NTP-3100L

8
9
10
11
12
13
14

15

16

17

DVDD

SDATA

DVSS_2

C512
33pF
50V

+24V_AMP

C515

0.01uF
50V

OUT1B_2

PVDD1B_1

PVDD1B_2

PVDD1A_1

PVDD1A_2

OUT1A_1

49

50

51

52

53

IC501

EAN60664001

18

22

WCK19BCK20SDA21SCL

MONITOR_023MONITOR_124MONITOR_2

C517
33pF
50V

OPT

C509
33pF
50V

48

C51 8
1uF
10V

OUT1B_1

C520

0.1uF
50V

PGND1B_2

46

47

25

FAULT26VDR2B27BST2B

T_330uF_Capacitor

C522

0.1uF
50V

C519
22000pF

50V

C521
1uF
16V

VDR1B44BST1B45PGND1B_1

43

NC

42

VDR2A

41

BST2A

40

PGND2A_2

39

PGND2A_1

38

OUT2A_2

37

OUT2A_1

36

PVDD2A_2

35

PVDD2A_1

34

PVDD2B_2

33

PVDD2B_1

32

OUT2B_2

31

OUT2B_1

30

PGND2B_2

29

28

PGND2B_1

C553
330uF
35V

C52 3

1uF1 6V

R513

100

R511

3.3

C524
22000pF

50V

C525

22000pF

50V

C526

0.01uF
50V

AMP_MUTE

+24V_AMP

C527

0.01uF
50V

D501

1N4148W

100V

1N4148W

D502
100V

OPT

OPT

R518

5.6
C531

1000pF

50V

C532
1000pF

50V

R519

5.6

L504
DA-8580
EAP38319001

2S

1S 1F

22uH

2F

Change 22uH(L504,L505) TO 15uH/6.3mm After DV1

R520

5.6

C533
1000pF

50V

C534
1000pF

50V

R521

OPT

5.6

C529
330uF

T_330uF_Capacitor

R522

3.3

C535

0.01uF
50V

L505
DA-8580
EAP38319001

2S

1S 1F

22uH

2F

C528

0.1uF
50V

12:F3

D503

1N4148W

100V

D504

1N4148W

100V

C530

0.1uF
50V

OPT

C538

0.47uF
50V

C539

0.47uF
50V

C540

0.1uF
50V

C541

0.1uF
50V

C542

0.1uF
50V

C543

0.1uF

50V

SPK_L+

H5

SPK_L-

H5

SPK_R+

H4

SPK_R-

H4

R527

4.7K

3.3

R528

3.3

R524

C545

4.7K

0.01uF
50V

C546

0.01uF

R525

50V

4.7K R529

3.3

R530

3.3

R526

C547

4.7K

0.01uF
50V

L507

120-ohm

L508

120-ohm

L510

120-ohm

L509

120-ohm

C544

0.01uF
50V

R523

2A => 5A

MCLK SDATA WCK BCK TP is necessory

2

Monitor0_1_2 TP is necessory

1

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

KIM JONG HYUN

BCM (BRAZIL VENUS)

AUDIO

2009.03.23

3 15

A B C D E F G H I J

* FROM LIPS & POWER B/D -->Apply changed Pin Map

10uF 6.3V

14

13

12

11

10

9

8

A1.2V

DH

PN

GND_2

DL

DRV

NC

VCC

C1806

C1807

+12V

1uF

25V

0.1uF

L822

MLB-201209-0120P-N2

1N4148W

OPT
C1819

0.1uF
50V

C1815
10uF

6.3V

C873
1uF

25V

D803

100V

Q812

SI4804BDY

S1

1

G1

2

S2

3

G2

C872

1uF

25V

4

* D1.8V

D3.3V

AZ1085S-ADJTR/E1

INPUT

3

C811

C876

100uF

0.1uF

16V

R819
56
1%

1.8V_BCM3556

D3.3V

L82 4

NC_2

4

VIN

MLB -201 209- 012 0P-N 2

0

R835

C858
33uF
10V

EN

NC_1

3

2

1

SC4215ISTRT

* +5v_ST to +3.3V_ST

+5V_ST

INPUT

C801
10uF

C803

0.1uF

16V

16V

+12V

R875

0

D1_2

8

D1_1

7

D2_2

6

D2_1

5

IC802

OUTPUT

2

1

ADJ/GND

1%
R857

56

R2

Vout = (1+R2/R1)*1.25

5

6

7

8

IC803

IC801

AZ1117D-3.3TRE1

2

3

1

ADJ/GND

We’ll change SI4804 to KEC’s Product

L828

2.2uH

R861

C8780.1uF

3.3

C1809

10uF

25V

750 mA

1%
R825

66.5

R1

330uF
C818
4V

D1.8V

C879
470pF

C822

0.1uF

VOUT : 2.533V

D2.5V

NC_3

VO

L827

MLB-201209-0120P-N2

ADJ

GND

R840 39K

10uF 6.3V

C1803 33uF 10V

C1812

C1813 10uF 6.3V

16V

OUTPUT

C810

+3.3V_ST

22uF 16V

R841 18K

0.1uF

C814

R864

R862

5.6K

620

470pF

C1816
10uF

6.3V

C880

1K

R863

+5.0V

L812

MLB-201209-0120P-N2

C841

C840

1000pF

50V

10uF

0.1uF
C836

* +1.8V_MEMC for FRC DDR

* +1.26V Core for FRC

A2.5V

+1.8V_MEMC

1K

R84 6

33uF 10V

A2[ GN]

A1[ RD]

C888

C

D805

SAM2333

* +12v -> PANEL_POWER

12:I5

PANEL_CTL

D3.3V

MLB-201209-0120P-N2

MLB-201209-0120P-N2

C1814

10uF

C88110uF

6.3V

C883

C882

16V

6.3V

6.3V

100uF

10uF

415 mA @85% efficiency

IC805

AOZ1073AIL

PGND

1

VIN

2

AGND

3

FB

4

R852
10K

R806

10K

R805
10K

C868
10uF

OPT

2SC3052

C870

0.1uF

10V

16V

R812

47K
R810
22K

B

C

B

Q802

R811 22K

E

8

7

6

5

LX_2

LX_1

EN

COMP

NC_1

VIN

NC_2

+12V

47K
R813

C

Q803
2SC3052

E

L829

L830

C885

C884

33uF

0.01uF

R843

R844

C846

330pF

IC807

SC4215ISTRT

1

EN

2

3

4

L801

CB3216PA501E

OPT
C817

4.7uF
25V

A3.3V

C8860.1uF

SAM2333

400 mA + 600 mA

10K

L815

3.6uH

11K

50V

8

7

6

5

1S1

2G1

3S2

4G2

1uF
25V

C1811

+3.3V_MEMC

R876

1K

A2[GN]CA1[RD]

LD1

600 mA

GND

ADJ

VO

NC_3

Q804

SI4925BDY

C1817
10uF

R845

15K

R856

22K

C8870.1uF

C855

10uF

6.3V

R855

8 D1_2

7 D1_1

6 D2_2

5 D2_1

+1.8V_MEMC

R871

20K

+1.26V_MEMC

1%

12.4K

C875

10uF 6.3V

1uF
25V

C859

0.1uF

C1810

C877

10uF 6.3V

7:I5;7:I7

12V_TCON

C833
22uF
25V

C898

16V

0.1uF

+3.3V_ST

L806

MLB-201209-0120P-N2

C820

R817

15pF

OPT

33K

C838
1uF

25V

D802

1N4148W

100V

C837
1uF
25V

50V

CB4532UK121E

L807

100

S1

G1

S2

G2

R815

OPT

P801

N.C
GND
GND

GND
12V
GND
24V
N.C

N.C

L826

FM20020-24

1
3
5
7
9
11
13
15
17
19
21
23

25

DH

14

PN

13

GND_2

12

DL

11

DRV

10

NC

9

VCC

8

C832

25V

2
4
6

8
10
12
14
16
18
20
22
24

GND

+12V

1uF

POWER_ON
GND
GND

5.2V

5.2V
GND
12V
GND
24V
Inverter_On
Error_Out
PWM_Dim

MLB-201209-0120P-N2

OPT
C1818

0.1uF
50V

12:A3;A6;C4;F7;G7;I2;14:B2

L813

7

5.2V

5.2V

C824

C896
22uF

+12V

MLB-201209-0120P-N2

C828

0.1uF
50V

16V

C826

47uF

L808

0.1uF

25V

50V

OPT

A.Dim

6

L804

4.7K
BG2012B080TF

R801

A_DIM

9:G6;9:I3

9:G7;9:I3;7:I5

5

PWM_DIM

OPC_OUT1

7:I5

C805

1uF
25V

OPT

R869

R822

OPT

C808

16V

0.1uF

OPT

0

C829

1uF
25V

0

OPT

R832

3.3K

4

C821

0.068uF

C830

R821

1.8K

2200pF

JP810

C895

0.1uF
50V

TruMotion_240Hz

BG2012B080TF

R834

150K
1/10W

IC806

SC2621ASTRT

BST

1

OCS

2

COMP

3

FB

4

LDOG

5

LDFB

6

GND_1

7

must be placed with pin#8,#10 as close as possible.

+5V_ST

E

C

Q805

B

R820

33K

RT1P141C-T112

Q807

2SC3875S(ALY)

+5V_ST

220uF ==> 100uF*2 + 22uF for Depth

C899

C827

100uF

100uF

16V

L805

CB4532UK121E

C812

0.1uF
50V

+5.0V

R818

3.3K

C

E

B

2SC3875S(ALY)

R816

6.8K

Q806
2SC3052

+12V

Q810

SI4804BDY

D1_2

8

1

D1_1

7

2

D2_2

6

3

D2_1

5

4

R823
1K

OPT

R829

R877

0

R828

B

10K
OPT

OPT

C819

22uF

16V

+24V

C804
1uF
50V

+3.3V_ST

OPT
R826
10K

R830
0

C

R870

Q813

OPT

0

10K

B

OPT

E

R802

C806

0.1uF
16V

OPT

C

E

C807
68uF
35V

R824
10K

R807

OPT

12:A3;A6;B5;F7;G7;I2;14:B2

0

C8450.1uF

C1802

10uF

25V

50V

0

C842
22uF

C802

16V

68uF
35V

R827
10K
OPT

R837

3.3

2.2uH

C848
470pF

RL_ON

12:I5;14:E5

ERROR_OUT

12:F6

L819

INV_ON/OFF

12:I5

10K

R874

R849

1.1K

C856

6800pF

R854

10K

* +12V to +5.0V

R853

300

470pF

C851

C853

10uF
16V

C860

10uF
16V

R873

3.3K

C862

470pF

C863

C1808

100uF

+5.0V

16V

12:A3;2:Y20;2:Z10;B3;C6;H5;7:A3;14:I7;14:J1

10uF
16V

R859

330K
1/10W

IC809

SC2621ASTRT

BST

1

OCS

2

COMP

3

FB

4

LDOG

5

LDFB

6

GND_1

7

must be placed with pin#8,#10 as close as possible.

C1801

0.01uF

3

+5.0V

25V

1uF

L811

C835
1uF

MLB-201209-0120P-N2

25V

D801
1N4148W
100V

25V

1uF

C1800

S1

G1

S2

G2

Q809

SI4804BDY

1

2

3

4

8

7

6

5

+5V_ST

D1_2

D1_1

D2_2

D2_1

* +5.0V to 1.2V

D1.2V

0

R878

22uF

16V

C839

C8440.1uF

R836

C847

2.2uH

3.3

470pF

L817

R842

R847

R848

2K

200

1.5K

R872

C1804

1.2K

470pF

C852

C854

10uF 6.3V

330uF 4V

L821

MLB-201209-0120P-N2

0.01uF

C861

C865

R831

6.8K

2

C815

2200pF

C825

R814

15K
1%

220pF

BST

OCS

COMP

FB

LDOG

LDFB

GND_1

R833

390K
1/8W

IC804

SC2621ASTRT

1

2

3

4

5

6

7

DH

14

PN

13

GND_2

12

DL

11

DRV

10

NC

9

VCC

8

C1805

1

FLASH, A1.2, +1.8_DDR_BCM3556, VTT

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

AN SO YOUNG

BCM (BRAZIL VENUS) 2009.03.23

POWER

154

A B C D E F G H I J

D1.8V

D1.8V

C329

C324

7

C305

100uF

C306

10uF

C307

0.1uF

C308

0.01uF

C309

0.047uF

C310

2700pF

C311

470pF

C312

10uF

C313

0.1uF

C314

0.01uF

C315

0.047uF

C316

2700pF

C317

470pF

C349

0.1uF

C350

0.1uF

C351

0.1uF

C323

100uF

10uF

C325

0.1uF

C326

0.01uF

C327

0.047uF

C328

2700pF

470pF

C330

10uF

C331

0.1uF

A1.2V

IC100

BCM3556

A6

DDR_BVDD0

A24

DDR_BVDD1

B7

DDR_BVSS0

B24

DDR_BVSS1

DDR01_CKE

DDR_COMP

DDR01_ODT

DDR0_CLK

DDR0_CLKB

DDR1_CLK
DDR1_CLKB
DDR01_A00
DDR01_A01
DDR01_A02
DDR01_A03

DDR0_A04

DDR0_A05

DDR0_A06
DDR01_A07
DDR01_A08
DDR01_A09
DDR01_A10
DDR01_A11
DDR01_A12
DDR01_A13

DDR1_A04

DDR1_A05

DDR1_A06
DDR01_BA0
DDR01_BA1
DDR01_BA2

DDR01_CASB

DDR0_DQ00
DDR0_DQ01
DDR0_DQ02
DDR0_DQ03
DDR0_DQ04
DDR0_DQ05
DDR0_DQ06
DDR0_DQ07
DDR0_DQ08
DDR0_DQ09
DDR0_DQ10
DDR0_DQ11
DDR0_DQ12
DDR0_DQ13
DDR0_DQ14
DDR0_DQ15
DDR1_DQ00
DDR1_DQ01
DDR1_DQ02
DDR1_DQ03
DDR1_DQ04
DDR1_DQ05
DDR1_DQ06
DDR1_DQ07
DDR1_DQ08
DDR1_DQ09
DDR1_DQ10
DDR1_DQ11
DDR1_DQ12
DDR1_DQ13
DDR1_DQ14
DDR1_DQ15

DDR0_DM0

DDR0_DM1

DDR1_DM0

DDR1_DM1
DDR0_DQS0

DDR0_DQS0B

DDR0_DQS1

DDR0_DQS1B

DDR1_DQS0

DDR1_DQS0B

DDR1_DQS1

DDR1_DQS1B
DDR01_RASB

DDR_VREF0
DDR_VREF1
DDR01_WEB

F20
B23

R312 0
B17
C22
E16
C23
B12
C12
A13
A12
B15
E14
A15
D15
E13
E12
F13
C14
F14
B14
D14
C13
D13
B13
F15
C15
D16
F16
B16
E15
A17
A8
B11
B8
D11
E11
C8
C11
C9
D8
E10
E9
F11
F12
E8
D10
F8
C18
C20
A18
B21
C21
B18
B20
D18
E18
D21
F18
E20
A22
F17
B22
E17
A10
C10
A20
F19
B10
B9
F10
F9
B19
C19
E19
D19
C16
A7
A23

D1.8V

C17
C7
D22

C355

0.1uF

DDR_PLL_TEST

DDR_PLL_LDO

6

DDR_EXT_CLK

5

4

3

DDR_VDDP1P8_1
DDR_VDDP1P8_2

2

OPT

R313

240

DDR01_A[0]
DDR01_A[1]
DDR01_A[2]
DDR01_A[3]

DDR0_A[4]
DDR0_A[5]

DDR0_A[6]
DDR01_A[7]
DDR01_A[8]
DDR01_A[9]

DDR01_A[10]
DDR01_A[11]
DDR01_A[12]
DDR01_A[13]

DDR1_A[4]

DDR1_A[5]

DDR1_A[6]

DDR0_DQ[0]
DDR0_DQ[1]
DDR0_DQ[2]
DDR0_DQ[3]
DDR0_DQ[4]
DDR0_DQ[5]
DDR0_DQ[6]
DDR0_DQ[7]
DDR0_DQ[8]
DDR0_DQ[9]

DDR0_DQ[10]
DDR0_DQ[11]
DDR0_DQ[12]
DDR0_DQ[13]
DDR0_DQ[14]
DDR0_DQ[15]

DDR1_DQ[0]
DDR1_DQ[1]
DDR1_DQ[2]
DDR1_DQ[3]
DDR1_DQ[4]
DDR1_DQ[5]
DDR1_DQ[6]
DDR1_DQ[7]
DDR1_DQ[8]
DDR1_DQ[9]

DDR1_DQ[10]
DDR1_DQ[11]
DDR1_DQ[12]
DDR1_DQ[13]
DDR1_DQ[14]
DDR1_DQ[15]

C347

1uF

470pF

R301
22

C344

470pF

C3450.1uF
C3460.1uF

DDR01_CKE

DDR01_ODT

DDR0_CLKb

DDR1_CLKb

DDR01_BA0
DDR01_BA1
DDR01_BA2

DDR01_CASb

DDR0_DQS0b

DDR0_DQS1b

DDR1_DQS0b

DDR1_DQS1b

DDR01_RASb

DDR0_CLK

DDR1_CLK

DDR0_DM0
DDR0_DM1
DDR1_DM0
DDR1_DM1

DDR0_DQS0

DDR0_DQS1

DDR1_DQS0

DDR1_DQS1

E5;H5;I1

E5;H5;I2

E5;H5;I1

E5
E5
H5
H5

E4
E4
H4
H4
E4
E4
E4
E4
H4
H4
H4
H4

DDR0_VREF0

DDR01_A[0-3]

DDR0_A[4-6]

DDR01_A[7-13]

DDR1_A[4-6]

DDR0_DQ[0-15]

DDR1_DQ[0-15]

DDR1_VREF0

E6;H6;H2

D6;H2

E6;H6;H2

H6;H1

G6

J6

NC_4/BA2

NC_5/A14
NC_6/A15

NC_3/A13

VREF

A10/AP

A11
A12

BA0
BA1

CKE

ODT

RAS
CAS

LDQS
UDQS

LDM
UDM

LDQS
UDQS

NC_1
NC_2

VSSDL

VDDL

HYNIX

IC300-*2

H5PS1G63EFR-20L

J2

A0

M8

A1

M3

A2

M7

A3

N2

A4

N8

A5

N3

A6

N7

A7

P2

A8

P8

A9

P3
M2
P7
R2

L2
L3
L1

CK

J8

CK

K8
K2

K9

CS

L8
K7
L7

WE

K3

F7
B7

F3
B3

E8
A8

R3
R7

A2
E2
R8

J7

J1

DQ0

G8

DQ1

G2

DQ2

H7

DQ3

H3

DQ4

H1

DQ5

H9

DQ6

F1

DQ7

F9

DQ8

C8

DQ9

C2

DQ10

D7

DQ11

D3

DQ12

D1

DQ13

D9

DQ14

B1

DQ15

B9

VDD_5

A1

VDD_4

E1

VDD_3

J9

VDD_2

M9

VDD_1

R1

VDDQ_10

A9

VDDQ_9

C1

VDDQ_8

C3

VDDQ_7

C7

VDDQ_6

C9

VDDQ_5

E9

VDDQ_4

G1

VDDQ_3

G3

VDDQ_2

G7

VDDQ_1

G9

VSS_5

A3

VSS_4

E3

VSS_3

J3

VSS_2

N1

VSS_1

P9

VSSQ_10

B2

VSSQ_9

B8

VSSQ_8

A7

VSSQ_7

D2

VSSQ_6

D8

VSSQ_5

E7

VSSQ_4

F2

VSSQ_3

F8

VSSQ_2

H2

VSSQ_1

H8

* DDR_VTT

B6;H6;H2;B5

ELPIDA

EDE1116ACBG-1J-E

VREF

J2

A0

M8

A1

M3

A2

M7

A3

N2

A4

N8

A5

N3

A6

N7

A7

P2

A8

P8

A9

P3

A10

M2

A11

P7

A12

R2

BA0

L2

BA1

L3

BA2

L1

CK

J8

CK

K8

CKE

K2

ODT

K9

CS

L8

RAS

K7

CAS

L7

WE

K3

LDQS

F7

UDQS

B7

LDM

F3

UDM

B3

LDQS

E8

UDQS

A8

NC_5

R3

NC_6

R7

NC_1

A2

NC_2

E2

NC_3

R8

VSSDL

J7

VDDL

J1

IC300-*1

B6;H2

DDR01_A[0-3,7-13]

DDR0_A[4-6]

B5;H5;I1
B5;H5;I1
B5;H5;I1

B6

B6

B6;H5;I2

B6;H5;I1

B2;H5;I1
B5;H5;I1
B2;H5;I1

B3
B3

DQ0

G8

DQ1

G2

DQ2

H7

DQ3

H3

DQ4

H1

B3

DQ5

H9

DQ6

F1

B3

DQ7

F9

DQ8

C8

DQ9

C2

DQ10

D7

DQ11

D3

B3

DQ12

D1

DQ13

D9

B3

DQ14

B1

DQ15

B9

VDD_5

A1

VDD_4

E1

VDD_3

J9

VDD_2

M9

VDD_1

R1

VDDQ_10

A9

VDDQ_9

C1

VDDQ_8

C3

VDDQ_7

C7

VDDQ_6

C9

VDDQ_5

E9

VDDQ_4

G1

VDDQ_3

G3

VDDQ_2

G7

VDDQ_1

G9

VSS_5

A3

VSS_4

E3

VSS_3

J3

VSS_2

N1

VSS_1

P9

VSSQ_10

B2

VSSQ_9

B8

VSSQ_8

A7

VSSQ_7

D2

VSSQ_6

D8

VSSQ_5

E7

VSSQ_4

F2

VSSQ_3

F8

VSSQ_2

H2

VSSQ_1

H8

DDR_VTT

DDR01_BA0
DDR01_BA1
DDR01_BA2
DDR0_CLK

DDR0_CLKb
DDR01_CKE

DDR01_ODT

DDR01_RASb
DDR01_CASb
DDR01_WEb

DDR0_DQS0
DDR0_DQS1

DDR0_DM0
DDR0_DM1

DDR0_DQS0b
DDR0_DQS1b

DDR0_VREF0

C300

470pF

R300

C301

0.1uF

DDR01_A[0]
DDR01_A[1]
DDR01_A[2]
DDR01_A[3]
DDR0_A[4]
DDR0_A[5]
DDR0_A[6]
DDR01_A[7]
DDR01_A[8]
DDR01_A[9]
DDR01_A[10]
DDR01_A[11]
DDR01_A[12]

100

Qimonda

HYB18TC1G160C2F-1.9

VREF

J2

A0

M8

A1

M3

A2

M7

A3

N2

A4

N8

A5

N3

A6

N7

A7

P2

A8

P8

A9

P3

A10/AP

M2

A11

P7

A12

R2

BA0

L2

BA1

L3

BA2

L1

CK

J8

CK

K8

CKE

K2

ODT

K9

CS

L8

RAS

K7

CAS

L7

WE

K3

LDQS

F7

UDQS

B7

LDM

F3

UDM

B3

LDQS

E8

UDQS

A8

NC4

R3

NC5

R7

NC1

A2

NC2

E2

NC3

R8

VSSDL

J7

VDDL

J1

D3.3V

IC300

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

DDR0_DQ[0]
DDR0_DQ[1]
DDR0_DQ[2]
DDR0_DQ[3]
DDR0_DQ[4]
DDR0_DQ[5]
DDR0_DQ[6]
DDR0_DQ[7]
DDR0_DQ[8]

DDR0_DQ[9]
DDR0_DQ[10]
DDR0_DQ[11]
DDR0_DQ[12]
DDR0_DQ[13]
DDR0_DQ[14]
DDR0_DQ[15]

G8
G2
H7
H3
H1
H9
F1
F9
C8
C2
D7
D3
D1
D9
B1
B9

D1.8V

VDD5

A1

VDD4

E1

VDD3

J9

VDD2

M9

VDD1

R1

VDDQ10

A9

VDDQ9

C1

VDDQ8

C3

VDDQ7

C7

VDDQ6

C9

VDDQ5

E9

VDDQ4

G1

VDDQ3

G3

VDDQ2

G7

VDDQ1

G9

VSS5

A3

VSS4

E3

VSS3

J3

VSS2

N1

VSS1

P9

VSSQ10

B2

VSSQ9

B8

VSSQ8

A7

VSSQ7

D2

VSSQ6

D8

VSSQ5

E7

VSSQ4

F2

VSSQ3

F8

VSSQ2

H2

VSSQ1

H8

DDR01_WEb

C359

C361

C360

C343

C358

1uF

C342

470pF

1uF

470pF

1uF

C869
100uF

16V

C874
10uF
10V

C864

0.1uF
16V

DDR1_VREF0

DDR0_VREF0

R850 0

R851 0

C834

C831

0.1uF
16V

0.1uF
16V

1M

R858

C866

0.1uF 16V

BD35331F-E2

GND

1

EN

2

VTTS

3

VREF

4

IC808

D1.8V

VTT

8

VTT_IN

7

VCC

6

VDDQ

5

C897

0.1uF
16V

C871
1uF

6.3V

C867
100uF
16V

1

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

HONG YEON HYUK

C332

0.01uF

C333

0.047uF

C334

C335

2700pF

DDR0_DQ[0-15]

470pF

A10/AP

NC_4/BA2

NC_5/A14
NC_6/A15

NC_3/A13

VSSDL

VREF

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9

A11
A12

BA0
BA1

CK
CK

CKE

ODT

CS
RAS
CAS

WE

LDQS
UDQS

LDM
UDM

LDQS
UDQS

NC_1
NC_2

VDDL

C352

C353

0.1uF

B4

B6;E6;H2;B5

B5;H1

HYNIX

IC301-*2

H5PS1G63EFR-20L

J2

M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2

L2
L3
L1

J8
K8
K2

K9
L8
K7
L7
K3

F7
B7

F3
B3

E8
A8

R3
R7

A2
E2
R8

J7

J1

0.1uF

C354

0.1uF

DDR01_A[0-3,7-13]

DDR1_A[4-6]

B5;E5;I1
B5;E5;I1
B5;E5;I1

B6;E5;I2

B6;E5;I1

B2;E5;I1

B5;E5;I1
B2;E5;I1

DQ0

G8

DQ1

G2

DQ2

H7

DQ3

H3

DQ4

H1

DQ5

H9

DQ6

F1

DQ7

F9

DQ8

C8

DQ9

C2

DQ10

D7

DQ11

D3

DQ12

D1

DQ13

D9

DQ14

B1

DQ15

B9

VDD_5

A1

VDD_4

E1

VDD_3

J9

VDD_2

M9

VDD_1

R1

VDDQ_10

A9

VDDQ_9

C1

VDDQ_8

C3

VDDQ_7

C7

VDDQ_6

C9

VDDQ_5

E9

VDDQ_4

G1

VDDQ_3

G3

VDDQ_2

G7

VDDQ_1

G9

VSS_5

A3

VSS_4

E3

VSS_3

J3

VSS_2

N1

VSS_1

P9

VSSQ_10

B2

VSSQ_9

B8

VSSQ_8

A7

VSSQ_7

D2

VSSQ_6

D8

VSSQ_5

E7

VSSQ_4

F2

VSSQ_3

F8

VSSQ_2

H2

VSSQ_1

H8

DDR1_VREF0

C321

470pF

DDR01_BA0
DDR01_BA1
DDR01_BA2

B6

DDR1_CLK

B6

DDR1_CLKb
DDR01_CKE

R303

100

DDR01_ODT

DDR01_RASb
DDR01_CASb
DDR01_WEb

B3

DDR1_DQS0

B3

DDR1_DQS1

B3

DDR1_DM0

B3

DDR1_DM1

B3

DDR1_DQS0b

B3

DDR1_DQS1b

ELPIDA

IC301-*1

EDE1116ACBG-1J-E

VREF

J2

A0

M8

A1

M3

A2

M7

A3

N2

A4

N8

A5

N3

A6

N7

A7

P2

A8

P8

A9

P3

A10

M2

A11

P7

A12

R2

BA0

L2

BA1

L3

BA2

L1

CK

J8

CK

K8

CKE

K2

ODT

K9

CS

L8

RAS

K7

CAS

L7

WE

K3

LDQS

F7

UDQS

B7

LDM

F3

UDM

B3

LDQS

E8

UDQS

A8

NC_5

R3

NC_6

R7

NC_1

A2

NC_2

E2

NC_3

R8

VSSDL

J7

VDDL

J1

DQ0

G8

DQ1

G2

DQ2

H7

DQ3

H3

DQ4

H1

DQ5

H9

DQ6

F1

DQ7

F9

DQ8

C8

DQ9

C2

DQ10

D7

DQ11

D3

DQ12

D1

DQ13

D9

DQ14

B1

DQ15

B9

VDD_5

A1

VDD_4

E1

VDD_3

J9

VDD_2

M9

VDD_1

R1

VDDQ_10

A9

VDDQ_9

C1

VDDQ_8

C3

VDDQ_7

C7

VDDQ_6

C9

VDDQ_5

E9

VDDQ_4

G1

VDDQ_3

G3

VDDQ_2

G7

VDDQ_1

G9

VSS_5

A3

VSS_4

E3

VSS_3

J3

VSS_2

N1

VSS_1

P9

VSSQ_10

B2

VSSQ_9

B8

VSSQ_8

A7

VSSQ_7

D2

VSSQ_6

D8

VSSQ_5

E7

VSSQ_4

F2

VSSQ_3

F8

VSSQ_2

H2

VSSQ_1

H8

BCM recommends to remove this R

B5;E5;H5
B5;E5;H5
B2;E5;H5
B5;E5;H5
B5;E5;H5
B2;E5;H5
B6;E5;H5

Qimonda

IC301

C322

0.1uF

DDR01_A[0]
DDR01_A[1]
DDR01_A[2]
DDR01_A[3]
DDR1_A[4]
DDR1_A[5]
DDR1_A[6]
DDR01_A[7]
DDR01_A[8]
DDR01_A[9]
DDR01_A[10]
DDR01_A[11]
DDR01_A[12]

HYB18TC1G160C2F-1.9

VREF

J2

A0

M8

A1

M3

A2

M7

A3

N2

A4

N8

A5

N3

A6

N7

A7

P2

A8

P8

A9

P3

A10/AP

M2

A11

P7

A12

R2

BA0

L2

BA1

L3

BA2

L1

CK

J8

CK

K8

CKE

K2

ODT

K9

CS

L8

RAS

K7

CAS

L7

WE

K3

LDQS

F7

UDQS

B7

LDM

F3

UDM

B3

LDQS

E8

UDQS

A8

NC4

R3

NC5

R7

NC1

A2

NC2

E2

NC3

R8

VSSDL

J7

VDDL

J1

DDR01_A[0-3,7-13]

DDR0_A[4-6]

B6;E5;H5

DDR1_A[4-6]

DDR01_CKE

DDR01_BA1
DDR01_BA2
DDR01_RASb
DDR01_BA0
DDR01_CASb
DDR01_WEb
DDR01_ODT

DQ0

G8

DQ1

G2

DQ2

H7

DQ3

H3

DQ4

H1

DQ5

H9

DQ6

F1

DQ7

F9

DQ8

C8

DQ9

C2

DQ10

D7

DQ11

D3

DQ12

D1

DQ13

D9

DQ14

B1

DQ15

B9

VDD5

A1

VDD4

E1

VDD3

J9

VDD2

M9

VDD1

R1

VDDQ10

A9

VDDQ9

C1

VDDQ8

C3

VDDQ7

C7

VDDQ6

C9

VDDQ5

E9

VDDQ4

G1

VDDQ3

G3

VDDQ2

G7

VDDQ1

G9

VSS5

A3

VSS4

E3

VSS3

J3

VSS2

N1

VSS1

P9

VSSQ10

B2

VSSQ9

B8

VSSQ8

A7

VSSQ7

D2

VSSQ6

D8

VSSQ5

E7

VSSQ4

F2

VSSQ3

F8

VSSQ2

H2

VSSQ1

H8

DDR1_A[4]
DDR01_A[0]
DDR01_A[1]
DDR01_A[2]

DDR0_A[4]
DDR0_A[5]
DDR0_A[6]
DDR01_A[3]
DDR01_A[7]
DDR01_A[8]
DDR01_A[9]
DDR01_A[10]
DDR01_A[11]
DDR01_A[12]
DDR01_A[13]

DDR1_A[5]
DDR1_A[6]

OPT

DDR1_DQ[0]
DDR1_DQ[1]
DDR1_DQ[2]
DDR1_DQ[3]
DDR1_DQ[4]
DDR1_DQ[5]
DDR1_DQ[6]
DDR1_DQ[7]
DDR1_DQ[8]

DDR1_DQ[9]
DDR1_DQ[10]
DDR1_DQ[11]
DDR1_DQ[12]
DDR1_DQ[13]
DDR1_DQ[14]
DDR1_DQ[15]

D1.8V

R304

R305

R306

R307

R31075
R308

R309

R31175

75

75

75

75

75

75

BCM (BRAZIL VENUS) 2009.03.23

DDR Memory

6 15

DDR_VTT

DDR1_DQ[0-15]

C336

0.01uF

C337

0.01uF

C338

0.01uF

C339

0.01uF

C340

0.01uF

C341

0.01uF

C362

0.1uF

B4

A B C D E F G H I J

C946
22pF

22uF/16 CST PROBLEM

6.3V

6.3V

10uF

C915 10uF

C916 10uF

C3019

100

OPT
R3029

0

1/16W
5%

+3.3V_MEMC

R915 1K

R916 1K

OPT

C919

C920

10K

R913

10K

R914

R929

1M

X901

12MHz

C947
22pF

0.1uF

C923

C918 0.1uF

0.1uF

0.1uF

C925

C9210.1uF

0.1uF

C922

C91 7

0.1 uF

H3
H3

C928

0.1uF

C924

0.1uF

C926

PI Result

0.1uF

C927

0.1uF

1uF

C929

C930

0.1uF

M_XTALI

+3.3V_MEMC

L906

C931

0.1 uF

0.1uF

BLM18PG121SN1D

10V

C93 5

10uF

C933

10uF

SDAS

SCLS
GPIO[8]
GPIO[9]

GND_14

VDDC_1
GPIO[10]
GPIO[11]
GPIO[12]
GPIO[13]
GPIO[22]
GPIO[23]
GPIO[14]
GPIO[15]
GPIO[16]
GPIO[17]
GPIO[18]
GPIO[19]
GPIO[20]
GPIO[21]

VDDP_2

GND_7

GND_15

VDDC_2

MDATA[20]
MDATA[19]

MDATA[17]
MDATA[22]

MDATA[27]
MDATA[28]

MDATA[25]
MDATA[30]

AVDD_DDR_2

DQM[3]

DQM[2]

GND_10

DQS[2]

DQSB[2]

AVDD_DDR_4

VDDP_3

GND_8

DQS[3]

DQSB[3]

AVDD_DDR_5

MDATA[31]
MDATA[24]

GND_11

MDATA[26]
MDATA[29]

AVDD_DDR_6

MDATA[23]
MDATA[16]
MDATA[18]
MDATA[21]

MCLK[0]

MCLKZ[0]

GND_1

AVDD_MEMPLL

MVREF

ODT

C93 4

C93 2

0.1uF

C93 6

0.1uF

0.1 uF

E1
D1
F1
G1
K8
E5
E2
F2
F3
G2
M4
M5
G3
E4
F4
G4
H4
J4
K4
L4
J6
H9
K9

F6
H1
H2

H3
J1

J2
J3

K1
K2
K6
K3
L1
J8
L2
L3
L6
L8
H10
M1
M2
L7
M3
N1
J9
N2
N3
L10
P1
R1
T1
T2
R2
P2
G7
L9
N5
N4

LVDS_TX_1_DATA4_P

C93 7

0.1 uF

T3

P3

RASZR3CASZ

MADR[0]T4MADR[2]R4MADR[4]

C93 8

0.1uF

URSA_A[0]

LVDS_TX_1_DATA4_N

LVDS_TX_1_CLK_N

LVDS_TX_1_DATA3_N

LVDS_TX_1_DATA2_N

LVDS_TX_1_DATA2_P

LVDS_TX_1_CLK_P

LVDS_TX_1_DATA3_P

[E1]
[D1]

J10

P4

R5

GND_12

MADR[6]T5MADR[8]

MADR[11]

C93 9

0.1uF

URSA_A[8]

URSA_A[2]

URSA_A[11]

URSA_A[6]

URSA_A[4]

LVDS_TX_1_DATA0_N

LVDS_TX_1_DATA1_P

LVDS_TX_1_DATA1_N

LVDS_TX_1_DATA0_P

R917

100

R918

100

R919

100

R920

100

R921

100

R922

100

AVDD_LVDS_1

RE0NA4RE0PC4RE1NC3RE1PA3RE2NB3RE2PB2RECKNA2RECKPC2RE3NC1RE3PA1RE4NB1RE4P

B4

F11

[L9]

[N5]

[N4]

P5

T6

T7

WEZ

BADR[1]R6BADR[0]P6MADR[1]

MADR[10]

URSA_A[10]

URSA_A[1]

LVDS_TX_0_DATA4_P

LVDS_TX_0_DATA4_N

LVDS_TX_0_DATA3_P

0.1 uF

C94 0

L11

R7

T8

R8

MADR[5]P7MADR[9]

MADR[7]P8MADR[3]

MADR[12]

AVDD_DDR_7

URSA_A[5]

URSA_A[7]

URSA_A[12]

URSA_A[9]

LVDS_TX_0_DATA3_N

LVDS_TX_0_CLK_N

LVDS_TX_0_DATA2_P

LVDS_TX_0_CLK_P

LVDS_TX_0_DATA1_P

LVDS_TX_0_DATA0_P

LVDS_TX_0_DATA1_N

LVDS_TX_0_DATA2_N

LGE7329A

N8

K10

T9

K7

MCLKE

GND_16F7VDDC_3

GND_13

MDATA[4]R9MDATA[3]

C94 1

0.1 uF

URSA_A[3]

URSA_DQ[4]

URSA_DQ[3]

M_XTALO

LVDS_TX_0_DATA0_N

R923

100

R924

100

R925

100

R926

100

R927

100

R928

100

0.1 uF

C94 2

GPIO_14

GPIO_13

GND_5

AVDD_LVDS_2

RO0NA8RO0PC8RO1NC7RO1PA7RO2NB7RO2PB6ROCKNA6ROCKPC6RO3NC5RO3PA5RO4NB5RO4PH8GND_6

H7

B8

K16

K15

G11

IC901

P9

T10

K11

R10

P10

MDATA[1]

MDATA[6]

MDATA[11]

MDATA[12]

AVDD_DDR_3

URSA_DQ[6]

URSA_DQ[12]

URSA_DQ[11]

URSA_DQ[1]

M_XTALI

+3.3V_MEMC

L907

C94 3

GPIO_1

GPIO_2D3XIND4XOUT

A14

B14

T11

R11

J11

MDATA[9]

MDATA[14]

AVDD_DDR_1

URSA_DQ[14]

URSA_DQ[9]

BLM18PG121SN1D

C944

0.1 uF

GPIO_12

GPIO[25]

SCLMD5SDAM

N7

D6

P11

T12

DQM[1]

DQM[0]

DQS[0]

1uF

GPIO_9

E11

R12

DQSB[0]

D13

P12

GND_2

GPIO_8

D11

J7

GND_9

VDDP_1

C94 5

AVDD_PLL

G8

F10

H11

URSA_A0P

T13

DQS[1]

DQSB[1]

0.1 uF

URSA_A0M

R13

URSA_A1M

URSA_A2M

URSA_A1P

URSA_A2P

LVA2M

LVA2P

LVA1MC9LVA1PA9LVA0MB9LVA0P

B10

A10

C10

P13

T14

R14

MDATA[8]

MDATA[15]

MDATA[10]

URSA_DQ[10]

URSA_DQ[8]

URSA_DQ[15]

URSA_A3M

URSA_A3P

URSA_ACKP

URSA_ACKM

LVA3M

LVA3P

LVACKM

LVACKP

C12

C11

A11

B11

P14

T15

R15

MDATA[7]

MDATA[0]

MDATA[13]

URSA_DQ[0]

URSA_DQ[7]

URSA_DQ[13]

URSA_A4M

URSA_A4P

C94 8

LVA4M

LVA4P

B12

A12

P15

T16

R16

MCLK[1]

MDATA[2]

MDATA[5]

URSA_DQ[5]

URSA_DQ[2]

URSA_B0M

URSA_B1P

URSA_B0P

0.1 uF

LVB1P

LVB0M

LVB0PD7GPIO_4D9GPIO_6

A13

B13

[N13]
[N12]

P16

N10

GND_17

MCLKZ[1]N9GPIO[26]

GPIO[27]

R930

URSA_B1M

C94 9

0.1 uF

REXT

LVB1M

D12

C14

C13

D8
D10
E10

E3

D2
C15
B15
A15
A16
B16
C16
D15
D16

F9
G10
E15
E16
E14
F14
F16
F15
G15
G16
G14
H14
H16
H15
J15
J16
J14
K14

G9
L14
L15
L16
M16

F8
M15
M14
N16
N15

H6

N6
E12
D14
F12
E13
F13
G13
H13
J13
K12
L12
K13
M12
M13
L13
N14

N13
N12

N11

M11

G6

RESET

VDDC_4

0

URSA_DQ[0-31]

R931

820

GPIO_5
GPIO_7
GPIO_11
GPIO_10
GPIO_3
LVB2P
LVB2M
LVBCKP
LVBCKM
LVB3P
LVB3M
LVB4P
LVB4M
AVDD_33_2
GND_4
LVC0P
LVC0M
LVC1P
LVC1M
LVC2P
LVC2M
LVCCKP
LVCCKM
LVC3P
LVC3M
LVC4P
LVC4M
LVD0P
LVD0M
LVD1P
LVD1M

GND_3
LVD2P
LVD2M
LVDCKP
LVDCKM
AVDD_33_1
LVD3P
LVD3M
LVD4P
LVD4M

VDDC_5
GPIO[24]
GPIO[7]
GPIO[6]
GPIO[5]
GPIO[4]
GPIO[3]
GPIO[2]
GPIO[1]
GPIO[0]
PWM0
PWM1
CSZ
SDO
SDI
SCK
GPIO[30]
GPIO[29]
GPIO[28]

C95 0

0.1 uF

C95 1

+3.3V_MEMC

L908

BLM18PG121SN1D

C952 10uF

C953

0.1uF

0.1 uF
+3.3V_MEMC

C954 10uF

4.7K

C955

0.1 uF

C956

0.1uF

C957

0.1uF

R933

URSA_B2P

URSA_B2M
URSA_BCKP
URSA_BCKM

URSA_B3P

URSA_B3M

URSA_B4P

URSA_B4M

URSA_C0P

URSA_C0M

URSA_C1P

URSA_C1M

URSA_C2P

URSA_C2M
URSA_CCKP
URSA_CCKM

URSA_C3P

URSA_C3M

URSA_C4P

URSA_C4M

URSA_D0P

URSA_D0M

URSA_D1P

URSA_D1M

URSA_D2P

URSA_D2M
URSA_DCKP
URSA_DCKM

URSA_D3P

URSA_D3M

URSA_D4P

URSA_D4M

I2C

EEPROM

SPI

M_SPI_CZ
M_SPI_DO
M_SPI_DI
M_SPI_CK

FRC_RESET

HIGH

HIGH

HIGH

OPT

R938

R939

PWM1

LOW

HIGH

HIGH

+3.3V_MEMC

1K

1K

R942

1K

1K

R943

PWM0GPIO8

HIGH

LOW

HIGH

12V_TCON

L909

OPC_EN

P903

TF05-51S

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

TF05-41S

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

52

P904

42

CB3216PA501E

C961

C960

0.1uF 50V

1000pF 50V

URSA_B4M
URSA_B4P
URSA_B3M
URSA_B3P

URSA_BCKM
URSA_BCKP

URSA_B2M
URSA_B2P
URSA_B1M
URSA_B1P
URSA_B0M
URSA_B0P

BIT_SEL

URSA_A4M
URSA_A4P
URSA_A3M
URSA_A3P

URSA_ACKM
URSA_ACKP

URSA_A2M
URSA_A2P
URSA_A1M
URSA_A1P
URSA_A0M
URSA_A0P

+3.3V_MEMC

R948

R936

R937

499

OPC_EN

OPC_OUT1

PWM_DIM

OPC_EN

LVDS_SEL

OPT

R949

3.3K

URSA_D4M
URSA_D4P
URSA_D3M
URSA_D3P

URSA_DCKM

OPT

URSA_DCKP

URSA_D2M
URSA_D2P
URSA_D1M
URSA_D1P
URSA_D0M
URSA_D0P

URSA_C4M
URSA_C4P
URSA_C3M
URSA_C3P

URSA_CCKM
URSA_CCKP

URSA_C2M
URSA_C2P
URSA_C1M
URSA_C1P
URSA_C0M
URSA_C0P

OPT

OPC_EN

R954

R955

0

0

12V_TCON

OPT

3.3K

3.3K

OPT

R953

R941 0

R940 0

0

* XTAL

M_XTALO

7

+1.26V_MEMC

BLM18PG121SN1D

L905

0.1uF

C914

ISP_RXD_TR

9:I4
9:I4

A3
A3

ISP_TXD_TR

SDA3_3.3V
SCL3_3.3V

9:G6;I5

LVDS_SEL

6

R909 0
R910 0

R911 100
R912

+3.3V_MEMC

L903

5

BLM18PG121SN1D

C910

10uF

C911

10uF

C912

0.1uF
16V

C913

0.1uF
16V

PI Result

URSA_DQ[20]
URSA_DQ[19]

+1.8V_MEMC

22uF/16 CST PROBLEM

0.1uF

0.1uF

C901

C904

4

C3020

10uF

C907

URSA_DQM3
URSA_DQM2

URSA_DQS2

URSA_DQSB2

10uF

C909

L904

BLM18PG121SN1D

10uF

URSA_DQ[17]
URSA_DQ[22]

URSA_DQ[0-31]

URSA_DQ[27]
URSA_DQ[28]

URSA_DQ[25]
URSA_DQ[30]

* ISP Port for MEMC

URSA_DQS3

URSA_DQSB3

P902

TJC2508-4A

1

3

2

3

4

+5.0V

+3.3V_MEMC

2.2K

R908

OPT

R907

2.2K

ISP_RXD_TR

ISP_TXD_TR

L902

B6

URSA_MCLK

URSA_MCLKZ

BLM18PG121SN1D

B6

C906

10uF

C90 8

URSA_ODT

0.1 uF

OPT

URSA_DQ[31]
URSA_DQ[24]

URSA_DQ[26]
URSA_DQ[29]

URSA_DQ[23]
URSA_DQ[16]
URSA_DQ[18]
URSA_DQ[21]

* SPI FLASH

+3.3V_MEMC

2

C95 8

R951 56
R952 56

0.1 uF

M_SPI_CK
M_SPI_DI

M_SPI_CZ
M_SPI_DO

R945 56
R946 56
R947 10K

CS

DO

WP

GND

IC902

W25X20AVSNIG

1

2

3

4

VCC

8

HOLD

7

CLK

6

DIO

5

1

URSA_CASZ

URSA_RASZ

URSA_WEZ

URSA_BA1

URSA_BA0

URSA_MCLKE

URSA_A[0-12]

URSA_DQM1

URSA_DQM0

URSA_DQS0

URSA_DQSB0

URSA_DQS1

URSA_DQSB1

URSA_MCLK1

URSA_MCLKZ1

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

PARK.S.W

BCM (BRAZIL VENUS)

LVDS / Mstar FRC

2009.03.23

7 15

A B C D E F G H I J K L M N O P Q R S T U V W X Y Z AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

URSA_DQ[0-31]

7:G1;AM22

URSA_DQ[27]
URSA_DQ[28]
URSA_DQ[25]
URSA_DQ[30]

URSA_DQ[22]
URSA_DQ[17]
URSA_DQ[19]
URSA_DQ[20]

URSA_DQ[31]
URSA_DQ[24]
URSA_DQ[26]
URSA_DQ[29]

URSA_DQ[23]
URSA_DQ[16]
URSA_DQ[18]
URSA_DQ[21]

DDR2 1.8V By CAP - Place these Caps near Memory

+1.8V_MEMC

BLM18PG121SN1D
L1002

0.1uF

0.1uF

0.1uF

C1045

C1044

C1043

PI Result

AR1004

DDR_DQ[27]
DDR_DQ[28]

56

DDR_DQ[25]
DDR_DQ[30]

AR1003

DDR_DQ[22]
DDR_DQ[17]
DDR_DQ[19]

56

DDR_DQ[20]

AR1002

DDR_DQ[31]
DDR_DQ[24]
DDR_DQ[26]

56

DDR_DQ[29]

AR1001

DDR_DQ[23]
DDR_DQ[16] DDR_DQ[10]

56

DDR_DQ[18]
DDR_DQ[21]

DDR_DQ[16]
DDR_DQ[17]
DDR_DQ[18]
DDR_DQ[19]
DDR_DQ[20]
DDR_DQ[21]
DDR_DQ[22]
DDR_DQ[23]
DDR_DQ[24]

DDR_DQ[16-31]

DDR_DQ[25]
DDR_DQ[26]
DDR_DQ[27]
DDR_DQ[28]
DDR_DQ[29]
DDR_DQ[30]
DDR_DQ[31]

+1.8V_FRC_DDR

DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

VDD5
VDD4
VDD3
VDD2
VDD1

VDDQ10

VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1

VSS5
VSS4
VSS3
VSS2
VSS1

VSSQ10

VSSQ9
VSSQ8
VSSQ7
VSSQ6
VSSQ5
VSSQ4
VSSQ3
VSSQ2
VSSQ1

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9

0.1uF

C1042

C1025

IC1001

H5PS5162FFR-S6C

G8
G2
H7
H3
H1
H9
F1
F9
C8
C2
D7
D3
D1
D9
B1
B9

A1
E1
J9
M9
R1

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A3
E3
J3
N1
P9

B2
B8
A7
D2
D8
E7
F2
F8
H2
H8

0.1uF

0.1uF

0.1uF

C1026

10uF

C1028

C1029

C1027

10uF 10V

VREF

J2

A0

M8

A1

M3

A2

M7

A3

N2

A4

N8

A5

N3

A6

N7

A7

P2

A8

P8

A9

P3

A10/AP

M2

A11

P7

A12

R2

BA0

L2

BA1

L3

CK

J8

CK

K8

CKE

K2

ODT

K9

CS

L8

RAS

K7

CAS

L7

WE

K3

LDQS

F7

UDQS

B7

LDM

F3

UDM

B3

LDQS

E8

UDQS

A8

NC4

L1

NC5

R3

NC6

R7

NC1

A2

NC2

E2

NC3

R8

VSSDL

J7

VDDL

J1

C1001

DDRB_A[0]
DDRB_A[1]
DDRB_A[2]
DDRB_A[3]
DDRB_A[4]
DDRB_A[5]
DDRB_A[6]
DDRB_A[7]
DDRB_A[8]

DDRB_A[9]
DDRB_A[10]
DDRB_A[11]
DDRB_A[12]

OPT

R1001

+1.8V_FRC_DDR

C1030

1000pF

B_URSA_BA0
B_URSA_BA1

150

R1006 22

R1007 56
R1008 56

R1009 56
R1010 56

R1011 56
R1012 56

0.1uF

0.1uF

C1031

+1.8V_FRC_DDR

R1002

R1003

C1002

0.1uF

DDRB_A[0-12]

R1004 22

R1005 22

0.1uF

C1032

1K1%

1K 1%

B_URSA_RASZ
B_URSA_CASZ

0.1uF

C1033

DDRB_A[10]
DDRB_A[1]
DDRB_A[3]
DDRB_A[9]
DDRB_A[12]
DDRB_A[7]
DDRB_A[5]
DDRB_A[0]
DDRB_A[2]
DDRB_A[4]
DDRB_A[6]

DDRB_A[11]
DDRB_A[8]

URSA_MCLK

URSA_MCLKZ
B_URSA_MCLKE

URSA_ODT

B_URSA_RASZ
B_URSA_CASZ
B_URSA_WEZ

URSA_DQS2
URSA_DQS3

URSA_DQM2
URSA_DQM3

URSA_DQSB2
URSA_DQSB3

Q16
Q14

7:D1;U12
7:D1;U12

7:E1;U11

7:D1;U11

C1034

0.1uF

C1024

0.1uF

10uF

C1036

C1035

AR1005
22

AR1006
22

AR1007
22

AR1008

22

7:B3

7:B3

T11

7:B3;X15

R17
R17
T11

7:B4
7:B4

7:B4
7:B4

7:B4
7:B4

B_URSA_BA0
B_URSA_BA1

B_URSA_MCLKE

B_URSA_WEZ

URSA_BA0
URSA_BA1

URSA_MCLKE

URSA_WEZ

0.1uF

C1037

0.1uF

C1038

URSA_RASZ
URSA_CASZ

URSA_A[11]

URSA_A[8]

+1.8V_FRC_DDR

0.1uF

0.1uF

C1039

URSA_A[10]

URSA_A[1]
URSA_A[3]
URSA_A[9]

URSA_A[12]

URSA_A[7]
URSA_A[5]
URSA_A[0]
URSA_A[2]
URSA_A[4]
URSA_A[6]

AR1009

AR1010

22

22

+1.8V_FRC_DDR +1.8V_FRC_DDR

C1040

0.1uF

0.1uF

C1041

URSA_A[0-12]

URSA_A[3]
URSA_A[1]
URSA_A[10]

URSA_A[9]
URSA_A[12]
URSA_A[7]
URSA_A[5]
URSA_A[2]
URSA_A[0]
URSA_A[6]
URSA_A[4]

URSA_RASZ
URSA_CASZ

URSA_A[8]
URSA_A[11]

7:B3;Q15

X17
X17
U10

URSA_BA0
URSA_BA1
URSA_MCLKE
URSA_WEZ

A_URSA_BA0
A_URSA_BA1
A_URSA_MCLKE
A_URSA_WEZ

C1003

7:G1

7:G1

7:F1
7:F1

7:F1
7:F1

7:F1
7:F1

0.1uF

AR1012

AR1013

AR1014

AR1011

URSA_MCLKZ1

A_URSA_RASZ
A_URSA_CASZ

C1004

10uF 10V

22

22

22

22

URSA_MCLK1

U10

URSA_ODT

A_URSA_WEZ

URSA_DQS0
URSA_DQS1

URSA_DQM0
URSA_DQM1

URSA_DQSB0
URSA_DQSB1

7:D1;T11
7:D1;T10
7:E1;T10
7:D1;T10

C1005

DDRA_A[10]

DDRA_A[12]

AA17
AA17

Z16

X14

C1006

0.1uF

10uF

+1.8V_FRC_DDR

DDRA_A[3]
DDRA_A[1]

DDRA_A[9]

DDRA_A[7]
DDRA_A[5]
DDRA_A[2]
DDRA_A[0]
DDRA_A[6]
DDRA_A[4]

DDRA_A[8]
DDRA_A[11]

A_URSA_MCLKE

C1008

C1007

0.1uF

A_URSA_RASZ
A_URSA_CASZ

R1013 22

R1014 22

R1015 22

R1016 56
R1017 56

R1018 56
R1019 56

R1020 56
R1021 56

C1010

C1009

0.1uF

0.1uF

R1022

1K

R1023

1K

C1022

DDRA_A[0-12]

A_URSA_BA0
A_URSA_BA1

+1.8V_FRC_DDR

10uF

C1011

0.1uF

0.1uF

C1023

1000pF

DDRA_A[0]
DDRA_A[1]
DDRA_A[2]
DDRA_A[3]
DDRA_A[4]
DDRA_A[5]
DDRA_A[6]
DDRA_A[7]
DDRA_A[8]
DDRA_A[9]
DDRA_A[10]
DDRA_A[11]
DDRA_A[12]

150

R1024

OPT

C1012

0.1uF

A10/AP

C1014

C1013

0.1uF

0.1uF

H5PS5162FFR-S6C

VREF

J2

A0

M8

A1

M3

A2

M7

A3

N2

A4

N8

A5

N3

A6

N7

A7

P2

A8

P8

A9

P3
M2

A11

P7

A12

R2

BA0

L2

BA1

L3

CK

J8

CK

K8

CKE

K2

ODT

K9

CS

L8

RAS

K7

CAS

L7

WE

K3

LDQS

F7

UDQS

B7

LDM

F3

UDM

B3

LDQS

E8

UDQS

A8

NC4

L1

NC5

R3

NC6

R7

NC1

A2

NC2

E2

NC3

R8

VSSDL

J7

VDDL

J1

C1015

C1016

0.1uF

IC1002

0.1uF

C1017

C1018

0.1uF

0.1uF

G8
G2
H7
H3
H1
H9
F1
F9
C8
C2
D7
D3
D1
D9
B1
B9

A1
E1
J9
M9
R1

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A3
E3
J3
N1
P9

B2
B8
A7
D2
D8
E7
F2
F8
H2
H8

C1019

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

VDD5
VDD4
VDD3
VDD2
VDD1

VDDQ10
VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1

VSS5
VSS4
VSS3
VSS2
VSS1

VSSQ10
VSSQ9
VSSQ8
VSSQ7
VSSQ6
VSSQ5
VSSQ4
VSSQ3
VSSQ2
VSSQ1

C1020

C1021

0.1uF

0.1uF

DDR_DQ[0]
DDR_DQ[1]
DDR_DQ[2]
DDR_DQ[3]
DDR_DQ[4]
DDR_DQ[5]
DDR_DQ[6]
DDR_DQ[7]
DDR_DQ[8]
DDR_DQ[9]

DDR_DQ[11]
DDR_DQ[12]
DDR_DQ[13]
DDR_DQ[14]
DDR_DQ[15]

+1.8V_FRC_DDR

0.1uF

DDR_DQ[0-15]

DDR_DQ[15]
DDR_DQ[8]
DDR_DQ[10]
DDR_DQ[13]

DDR_DQ[7]
DDR_DQ[0]
DDR_DQ[2]
DDR_DQ[5]

DDR_DQ[11]
DDR_DQ[12]
DDR_DQ[9]
DDR_DQ[14]

DDR_DQ[6]
DDR_DQ[1]
DDR_DQ[3]
DDR_DQ[4]

AR1018

AR1017

AR1016

AR1015

URSA_DQ[15]

56

URSA_DQ[8]
URSA_DQ[10]
URSA_DQ[13]

URSA_DQ[7]

URSA_DQ[0]

56

URSA_DQ[2]

URSA_DQ[5]

URSA_DQ[11]
URSA_DQ[12]

56

URSA_DQ[9]
URSA_DQ[14]

URSA_DQ[6]

URSA_DQ[1]

56

URSA_DQ[3]

URSA_DQ[4]

URSA_DQ[0-31]

7:G1;C22

8

7

6

5

4

+1.8V_MEMC

C1046

resonance Compensation

0.1uF

0.1uF

C1047

C1048

0.1uF

C1049

0.1uF

C1050

+1.8V_FRC_DDR

C1051

0.1uF

0.1uF

C1052

0.1uF

C1053

0.1uF

3

2

1

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

HONG.Y.H

BCM (BRAZIL VENUS)

M-STAR FRC DDR

2009.03.23

8

15

A B C D E F G H I J

RESET

D3.3V

R2003

R2025

POWER_DET

7

12:B3;12:I4

RESET

10:I2;12:I5

0

R408
330

R409

910

0

OPT

IC400

KIA7029AF

I

1

2

G

6

NVRAM

IC403

AT24C512BW-SH-T

4.7K

4.7K

R422

R419

5

R3016

4.7K

A0

1

A1

2

A2

3

GND

4

D3.3V

VCC

8

7

6

5

C416

0.1uF

WP

R411

SCL

22

R412

SDA

22

4

D3.3V

R410

10K

O

3

C400
10uF

SYS_RESETb

10:E4

SMD Gasket Option

I4;12:F3

SCL2_3.3V

I4;12:F3

SDA2_3.3V

* NAND FLASH MEMORY 1Gbit (128M)

Hot Plug input pin should be feeded over 5mA.
BCM Recommend

D3.3V

BCM_AVC_DEBUG_TX1

G6

BCM_AVC_DEBUG_RX1

G6

BCM_AVC_DEBUG_TX2

G5

BCM_AVC_DEBUG_RX2

G5

32/42/55 - 6T SMD Gasket

GAS1

GAS2

GAS1_6T

MDS61887702

47 - 7T SMD Gasket

GAS2-*1

GAS1-*1

GAS1_7T

MDS61887703

GAS3

GAS2_6T

MDS61887702

GAS3-*1

GAS2_7T

MDS61887703

MDS61887702

MDS61887703

GAS3_6T

GAS4-*1

GAS3_7T

GAS4

MDS61887702

MDS61887703

GAS5

GAS4_6T

GAS5-*1

GAS4_7T

MDS61887702

MDS61887703

GAS5_6T

GAS5_7T

P100

GIL-G-06-S3T2

OPT

1

2

3

4

5

6

IC100

BCM3556

J23

EBI_ADDR3

J24

EBI_ADDR4

H25

EBI_ADDR2

H24

EBI_ADDR1

H23

EBI_ADDR0

J25

EBI_ADDR5

F26

D3.3V

4.7K

R117

33

NAND_IO[0-7]

R193 4.7K

R192 4.7K

NAND_IO[0]
NAND_IO[1]
NAND_IO[2]
NAND_IO[3]
NAND_IO[4]
NAND_IO[5]
NAND_IO[6]
NAND_IO[7]

D3.3V

NAND_CEb

C3

NAND_ALE

C2

NAND_REb

C3

NAND_CLE

C2

NAND_WEb

C2
C3

NAND_RBb

R194 4.7K

R116

H28
J26
H27
G26
J27
J28
F27
G24
H26
G27
G28
K23
G25

U24
T26
T27
U26
U27
V26
V27
V28
T24
R23
T23
T25
R24
U25

W24
U23
V23
V24

EBI_ADDR6
EBI_ADDR8
EBI_ADDR9
EBI_ADDR13
EBI_ADDR12
EBI_ADDR11
EBI_ADDR10
EBI_ADDR7
EBI_TAB
EBI_WE1B
EBI_CLK_IN
EBI_CLK_OUT
EBI_RWB
EBI_CS0B

NAND_DATA0
NAND_DATA1
NAND_DATA2
NAND_DATA3
NAND_DATA4
NAND_DATA5
NAND_DATA6
NAND_DATA7
NAND_CS0B
NAND_ALE
NAND_REB
NAND_CLE
NAND_WEB
NAND_RBB

SF_MISO
SF_MOSI
SF_SCK
SF_CSB

GPIO_00
GPIO_01
GPIO_02
GPIO_03
GPIO_04
GPIO_05
GPIO_06
GPIO_07
GPIO_08
GPIO_09
GPIO_10
GPIO_11
GPIO_12
GPIO_13
GPIO_14
GPIO_15
GPIO_16
GPIO_17
GPIO_18
GPIO_19
GPIO_20
GPIO_21
GPIO_22
GPIO_23
GPIO_24
GPIO_25
GPIO_26
GPIO_27
GPIO_28
GPIO_29
GPIO_30
GPIO_31
GPIO_32
GPIO_33
GPIO_34
GPIO_35
GPIO_36
GPIO_37
GPIO_38
GPIO_39
GPIO_40
GPIO_41
GPIO_42
GPIO_43
GPIO_44
GPIO_45
GPIO_46
GPIO_47
GPIO_48
GPIO_49
GPIO_50
GPIO_51
GPIO_52
GPIO_53
GPIO_54
GPIO_55
GPIO_56

GPIO_57
SGPIO_00
SGPIO_01
SGPIO_02
SGPIO_03
SGPIO_04
SGPIO_05
SGPIO_06
SGPIO_07

N26
L26
N25
L25
K27
K28
K24
K26
K25
AA27
AA28
AA26
L1
L3
L2
Y25
Y26
M27
AA25
R25
N28
N27
AH18
P23
M23
AD19
AE19
M4
M5
L23
Y28
Y27
G2
G3
G5
G6
G4
L24
P25
L5
K4
K1
L27
M26
N23
R28
R27
R26
P28
P27
K6
K5
P26
M3
M2
M1
L4
L6
W27
W28
W26
W25
J2
J1
K3
K2

R105

SF_SCK
SF_MISO
SF_MOSI

SF_CSB

R199
R2001
R2002

22

22

22

22
22
22

OPT

R2009

OPT

R2018 100
R3030 100

0

R103 100

R2024
R16022

R102

TUNER_RESETb

OPT
OPT

OPT

R2005100

OPT
OPT
OPT
OPT

R161

R2004

100

R2008100

AMP_RST

VREG_CTRL

PWM_DIM

GAIN_SWITCH

DSUB_DET

BCM_RX
BCM_TX

RF_SWITCH

SIDE_CVBS_DET

AUDIO_M_CLK

A_DIM

BIT_SEL

LVDS_SEL

BCM_AVC_DEBUG_TX1
BCM_AVC_DEBUG_RX1

AV1_CVBS_DET

BLUETOOTH_RESET

FRC_RESET

BCM_AVC_DEBUG_RX2
BCM_AVC_DEBUG_TX2

DDC_SCL
DDC_SDA

HDMI_HPD_IN

COMP1_DET

COMP2_DET

100

R1890

R1950

OPT

OPT

OPT

R1980
R1960
R1970
R1090

I3;14:A6

I3;4:A5;7:I5

14:A6

14:A6

3:C4

I3;4:A6

C7
C7

14:A5

I3;14:I3

7:H2

C6
C7

I3;14:A6
I3;14:A6

14:A6

14:A5

D3.3V

OPT

OPT

R184

4.7K

R183

4.7K

4.7K

4.7K

R187
R18622
R17422
R17522
R17822
R17922
R18122
R18222
R18522

R180

4.7K

R177

4.7K

R176

4.7K

R171

4.7K

R170

SCL0_3.3V
SDA0_3.3V
SCL1_3.3V
SDA1_3.3V
SCL2_3.3V
SDA2_3.3V
SCL3_3.3V
SDA3_3.3V

14:A6

14:A6
3:D3;2:AH5
3:D3;2:AH5

B5;12:F3

B5;12:F3
7:B6
7:B6

Boot Strap

NAND_IO[0]

3

NAND_IO[0] : Flash Select (1)

2

1

0 : Boot From Serial Flash
1 : Boot From NAND Flash

NAND_IO[1] : NAND Block 0 Write (DNS)
0 : Enable Block 0 Write
1 : Disable Block 0 Write

NAND_IO[3:2] : NAND ECC (10)
00 : No ECC
01 : 1 ECC Bit
10 : 4 ECC Bit
11 : 8 ECC Bit

NAND_IO[4] : CPU Endian (0)
0 : Little Endian
1 : Big Endian

NAND_IO[6:5] : Xtal Bias Control (1, DNS)
00 : 1.2mA
01 : 1.8mA
10 : 2.4mA (Recommand)
11 : 3.0mA

E3;E6

NAND_IO[4]

E3;E6

D3.3V

R2031

R314

2.7K

2.7K

E3;E6

NAND_IO[3]

NAND_IO[5]

E3;E6

D3.3V

2.7K
NAND_IO[2]

OPT

R2029

2.7K

D3.3V

R2033

2.7K R316

2.7K

R315

OPT

IF FUNDMENTAL IS USED => LOW

IF DIP IS USED => HIGH

E3;E6

NAND_IO[6]

E3;E6

D3.3V

R2032

R317

D3.3V

R321

2.7K

R2030

2.7K

2.7K

2.7K

OPT

R2016

2.7K

R2010

2.7K

D3.3V

R2011

2.7K

R2013

2.7K

R2014

2.7K

R2015

2.7K

R131 2.7K

D3.3V

IC101

OPT

R2040 2.7K

B

Open Drain

D3.3V

R136

4.7K

C

Q101
KRC103S

E

C114

0.1uF

E5

E6

E6

E5

E6

E5

FLASH_WP_1

NAND_RBb

NAND_REb

NAND_CEb

NAND_CLE

NAND_ALE

NAND_WEb

R191 2.7K

C3024

4700pF

NC_1

NC_2

NC_3

NC_4

NC_5

NC_6

NC_7

NC_8

VDD_1

VSS_1

NC_9

NC_10

NC_11

NC_12

NC_13

NC_14

NC_15

1

2

3

4

5

6

RB

7

R

8

E

9

10

11

12

13

14

15

CL

16

AL

17

W

18

WP

19

20

21

22

23

24

NC_29

48

NC_28

47

NC_27

46

NC_26

45

I/O7

I/O6

I/O5

I/O4

NC_25

NC_24

NC_23

VDD_2

VSS_2

NC_22

NC_21

NC_20

I/O3

I/O2

I/O1

I/O0

NC_19

NC_18

NC_17

NC_16

NAND_IO[7]

NAND_IO[6]

NAND_IO[5]

NAND_IO[4]

D3.3V

C136 10uF

NAND_IO[3]

NAND_IO[2]

NAND_IO[1]

NAND_IO[0]

C115

0.1uF

6.3V

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

NAND_IO[0-7]

NAND_IO[0-7]

NAND01GW3A2CN6E

* I2C MAP

* I2C_0 : TUNER

* I2C_1 : Audio amp, HDMI S/W

* I2C_2 : NVRAM,Micom

* I2C_3 : FRC

G6;4:A6

G7;4:A5;7:I5

G7;12:I4;3:C5

G7;14:A6

A_DIM

PWM_DIM

BLUETOOTH_RESET

AMP_RST

VREG_CTRL

HDMI_HPD_IN

TUNER_RESETb

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

JANG.J.H

BCM (BRAZIL VENUS)

BCM3556 & NAND FLASH

2009.03.23

9

15

A B C D E F G H I J K

1

2

3

4

Route INCM between associated
left and right signals of same channel

The INCM trace ends at the
same point where the connector
ground connects to the board ground
(thru-hole connector pin).

Place test points, resistors
near audio connector.
Connect the other side of
the resistor to GND as close
as possible to the ground
connection of the associated
audio connector.

5

6

7

BROAD BAND STUDIO

P200

TJC2508-4A

D3.3V

JP200

1

JP201

JP202

JP203

C200

14:A5
14:A5

14:A5

14:A6
14:A6
14:A6
14:A5
14:A5
14:A5
14:A4
14:A4
14:A4
14:A3
14:A3
14:A3

2

3

4

4.7uF

R200

1.5K

AV1_L_IN
AV1_R_IN

AV1_INCM
COMP1_L_IN
COMP1_R_IN

COMP1_INCM
COMP2_L_IN
COMP2_R_IN

COMP2_INCM

SIDE_L_IN
SIDE_R_IN
SIDE_INCM

PC_L_IN
PC_R_IN
PC_INCM

R201

1.5K

A3.3V

C201
100pF

R204 51
R214 51

R215 51
R228 51

R229 51
R230 51

R231 51
R232 51

R233 51
R234 51

R220 : BCM recommened resistor 562 ohm

MNT OUT FOR BCM

R242 0

A1.2V

BLM18PG121SN1D

L200

R209

3.9K

R210
120

C206 15nF
C210 15nF

C211 15nF
C232 15nF

C220 15nF
C221 15nF

C224 15nF
C225 15nF

C226 15nF
C227 15nF

C20 2 0. 1uF

A2.5V

C20 3 0. 1uF

BLM18PG121SN1D

OPT

C20 9 0.1u F

C208 4.7uF

C20 7 0.1u F

47nF

C274 47nF

C277

C279 47nF

D3.3V

C296 47nF

TU_SCLK

TU_SDATA

TU_SYNC

L202

4.7uF
C212

C215

C213

0.01uF

R235

2.7K

C298 47nF

C3004 47nF

A3.3V

0.1uF

0.1uF

C3007 47nF

A1.2V

R236

0.1uF

C214

USB_DM1
USB_DP1
USB_DM2
USB_DP2

USB_OCD1

USB_CTL1

R218
240

A1.2V

C3001 47nF

C3002 47nF

C3003 47nF

0

C219

A2.5V

0.1uF

0

R237

C223

R220 560
R241 0

1K

R219

A2.5V

C222

0.1uF

OPT

D23

PKT0_CLK

C24

PKT0_DATA

B26

PKT0_SYNC

A25

RMX0_CLK

B25

RMX0_DATA

A26

RMX0_SYNC

G23

POD2CHIP_MCLKI

D25

POD2CHIP_MDI0

D24

POD2CHIP_MDI1

C25

POD2CHIP_MDI2

E27

POD2CHIP_MDI3

E26

POD2CHIP_MDI4

D28

POD2CHIP_MDI5

D27

POD2CHIP_MDI6

D26

POD2CHIP_MDI7

E23

POD2CHIP_MISTRT

E24

POD2CHIP_MIVAL

F25

CHIP2POD_MCLKO

C27

CHIP2POD_MDO0

C26

CHIP2POD_MDO1

B28

CHIP2POD_MDO2

B27

CHIP2POD_MDO3

A27

CHIP2POD_MDO4

F24

CHIP2POD_MDO5

F23

CHIP2POD_MDO6

E25

CHIP2POD_MDO7

C28

CHIP2POD_MOSTRT

A28

CHIP2POD_MOVAL

AC18

VDAC_AVDD2P5

AF20

VDAC_AVDD1P2

AG20

VDAC_AVDD3P3_1

AG21

VDAC_AVDD3P3_2

AF19
AD20
AE20
AH22
AH20
AG19

AH21

M25
M24

R6
T6
R7
T7
T8
R3
U3
T4
T3
R4
U4
V1
V2
U1
U2
T5
R5
R1
R2
T2
T1

P6
P5
P3
P2
N3
N2
P1
P4
N4
N1
N5
P7

AE6
AD7
AF6
AH4
AG5
AG4
AG6
AF7
AE7
AH5
AG7
AH6
AD8
AF8
AE8
AH7
AH8
AG8
AF5

AB9
AA10
AB10
AA11
AB11

AC8

AE5

C217
10uF

VDAC_AVSS_1
VDAC_AVSS_2
VDAC_AVSS_3
VDAC_RBIAS
VDAC_1
VDAC_2

VDAC_VREG

BSC_S_SCL
BSC_S_SDA

USB_AVSS_1
USB_AVSS_2
USB_AVSS_3
USB_AVSS_4
USB_AVSS_5
USB_AVDD1P2
USB_AVDD1P2PLL
USB_AVDD2P5
USB_AVDD2P5REF
USB_AVDD3P3
USB_RREF
USB_DM1
USB_DP1
USB_DM2
USB_DP2
USB_MONCDR
USB_MONPLL
USB_PWRFLT_1
USB_PWRFLT_2
USB_PWRON_1
USB_PWRON_2

EPHY_VREF
EPHY_RDAC
EPHY_RDN
EPHY_RDP

PLL_MAIN_MIPS_EREF_TESTOUT

EPHY_TDN
EPHY_TDP
EPHY_AVDD1P2
EPHY_AVDD2P5
EPHY_PLL_VDD1P2
EPHY_AGND_1
EPHY_AGND_2
EPHY_AGND_3

AUDMX_LEFT1
AUDMX_RIGHT1
AUDMX_INCM1
AUDMX_LEFT2
AUDMX_RIGHT2
AUDMX_INCM2
AUDMX_LEFT3
AUDMX_RIGHT3
AUDMX_INCM3
AUDMX_LEFT4
AUDMX_RIGHT4
AUDMX_INCM4
AUDMX_LEFT5
AUDMX_RIGHT5
AUDMX_INCM5
AUDMX_LEFT6
AUDMX_RIGHT6
AUDMX_INCM6
AUDMX_AVSS_1
AUDMX_AVSS_2
AUDMX_AVSS_3
AUDMX_AVSS_4
AUDMX_AVSS_5
AUDMX_AVSS_6
AUDMX_LDO_CAP
AUDMX_AVDD2P5

A2.5V

IC100

BCM3556

LVDS_TX_0_DATA0_P
LVDS_TX_0_DATA0_N
LVDS_TX_0_DATA1_P
LVDS_TX_0_DATA1_N
LVDS_TX_0_DATA2_P
LVDS_TX_0_DATA2_N
LVDS_TX_0_DATA3_P
LVDS_TX_0_DATA3_N
LVDS_TX_0_DATA4_P
LVDS_TX_0_DATA4_N

LVDS_TX_0_CLK_P

LVDS_TX_0_CLK_N
LVDS_TX_1_DATA0_P
LVDS_TX_1_DATA0_N
LVDS_TX_1_DATA1_P
LVDS_TX_1_DATA1_N
LVDS_TX_1_DATA2_P
LVDS_TX_1_DATA2_N
LVDS_TX_1_DATA3_P
LVDS_TX_1_DATA3_N
LVDS_TX_1_DATA4_P
LVDS_TX_1_DATA4_N

LVDS_TX_1_CLK_P

LVDS_TX_1_CLK_N

LVDS_PLL_VREG

LVDS_TX_AVDDC1P2
LVDS_TX_AVDD2P5_1
LVDS_TX_AVDD2P5_2

LVDS_TX_AVSS_1
LVDS_TX_AVSS_2
LVDS_TX_AVSS_3
LVDS_TX_AVSS_4
LVDS_TX_AVSS_5
LVDS_TX_AVSS_6
LVDS_TX_AVSS_7
LVDS_TX_AVSS_8

LVDS_TX_AVSS_9
LVDS_TX_AVSS_10
LVDS_TX_AVSS_11

CLK54_AVDD1P2
CLK54_AVDD2P5

CLK54_AVSS
CLK54_XTAL_N
CLK54_XTAL_P

CLK54_MONITOR

PM_OVERRIDE

VCXO_AGND_1
VCXO_AGND_2
VCXO_AGND_3

VCXO_AVDD1P2

VCXO_PLL_AUDIO_TESTOUT

RESET_OUTB

SPI_S_MISO

POR_OTP_VDD2P5

POR_VDD1P2

EJTAG_TCK
EJTAG_TDI
EJTAG_TDO
EJTAG_TMS

EJTAG_TRSTB

EJTAG_CE0
EJTAG_CE1

PLL_MAIN_AVDD1P2

PLL_MAIN_AGND

PLL_RAP_AVD_TESTOUT
PLL_RAP_AVD_AVDD1P2

PLL_RAP_AVD_AGND

BYP_CPU_CLK

BYP_DS_CLK

BYP_SYS216_CLK
BYP_SYS175_CLK

RESETB

NMIB
TMODE_0
TMODE_1
TMODE_2
TMODE_3

B4
A4
C6
B6
B3
A3
A1
A2
D5
D6
C5
B5
B1
B2
C2
C3
D1
D2
E1
E2
E3
E4
D3
D4
F5
F1
F4
F2
C1
F3
C4
A5
E5
E6
D7
E7
F7
G7
H7

AD27
AD28
AD26
AC26
AC27
AE25
Y23

AA23
AB24
AC24
AF25
AF24

P24
F6
N24
J5
J4
J6
J3
V25
AH3
AB8

H4
H3
H2
H1
G1
H6
H5

AB26
AC25
AB27
M6
N6
N7

AA24
Y24
AE24
AD25

OPT

C228

10uF

C233

0.1uF

4.7K

R221

L201

BLM18PG121SN1D

C231

10uF

R240

390
OPT

C23 8

0.1 uF

0.1 uF

C23 6

C23 9

A1.2V

A2.5V

0.1 uF

C21 8

BLM18PG121SN1D

C235

4.7uF

D3.3V

A2.5V

C234

0.1uF

C241

0.1 uF

R2221K
R2231K

LVDS_TX_1_DATA4_N
LVDS_TX_1_DATA4_P
LVDS_TX_1_DATA3_N
LVDS_TX_1_DATA3_P
LVDS_TX_1_DATA2_N
LVDS_TX_1_DATA2_P
LVDS_TX_1_DATA1_N
LVDS_TX_1_DATA1_P
LVDS_TX_1_DATA0_N
LVDS_TX_1_DATA0_P
LVDS_TX_1_CLK_N
LVDS_TX_1_CLK_P
LVDS_TX_0_DATA4_N
LVDS_TX_0_DATA4_P
LVDS_TX_0_DATA3_N
LVDS_TX_0_DATA3_P
LVDS_TX_0_DATA2_N
LVDS_TX_0_DATA2_P
LVDS_TX_0_DATA1_N
LVDS_TX_0_DATA1_P
LVDS_TX_0_DATA0_N
LVDS_TX_0_DATA0_P
LVDS_TX_0_CLK_N
LVDS_TX_0_CLK_P

0.1 uF

4.7uF

4.7uF
C3005

C29 5

C242

0.1 uF

C30 08

L203

A1.2V

BLM18PG121SN1D

BLM18PG121SN1D

C240

0.1 uF

C23 7

4.7uF

54MHz_XTAL_N
54MHz_XTAL_P

SYS_RESETb

L204

L207

4.7uF

7:D7
7:D7
7:D7
7:D7
7:D7
7:D7
7:D7
7:D7
7:D7
7:D7
7:D7
7:D7
7:E7
7:E7
7:E7
7:E7
7:E7
7:E7
7:E7
7:E7
7:E7
7:E7
7:E7
7:E7

A1.2V

A1.2V

A1.2V

9:B7

54MHz X-TAL

54MHz_XTAL_N

54MHz_XTAL_P

A2.5V

A1.2V

I2
I2

D3.3V

OPT

OPT

R224

R225

4.7K

4.7K

When usding FUNDMENTAl then series R = 0 ohm and CL = 8 pF

When usding Dip-type X-tal then series R = 22 ohm and CL = 12 pF

C230
12pF

3

12pF

C229

33pF

C3012

L8014

1008LS-272XJLC

R3027

604

R212

R211

22

21

X903

54MHz

22

CONNECT NEAR BCM CHIP

R226

R227

4.7K

4.7K

INCM

R4004

R4000

34

R4001

34

R4005

R400234R4003

34

C4001 0.1uF

C4002 0.1uF

C4003 0.1uF

R4006

34

C4004 0.1uF

C4005 0.1uF

34

C4000 0.1uF

C4006 0.1uF

C4007 0.1uF

R4007

TU_CVBS_INCM

3:T25

SIDE_CVBS_INCM

3:T19

AV1_CVBS_INCM

3:T19

34

COMP1_VID_INCM

COMP2_VID_INCM

3:T21

R_VID_INCM

3:T15

G_VID_INCM

3:T15

B_VID_INCM

34

3:T15

3:T23

5.1

R4009

R4011

R4012

5.1

R4010

5.1

R4008

SIDE_INCM

0.15uF
C4010

5.1

0.15uF
C4011

5.1

0.15uF
C4008

0.15uF
C4009

0.15uF
C4012

0.47uF
C4014

0.47uF
C4015

C4016

0.47uF

0.47uF
C4013

0.47uF
C4017

3:T18

AV1_INCM

COMP1_INCM

3:T24

COMP2_INCM
3:T22

PC_INCM

3:T14

3:T20

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

JANG.J.H

BCM (BRAZIL VENUS)

BCM3556 AUD_IN/LVDS

2009.03.23

10 15

A B C D E F G H I J

7

AG28

DS_AGCI_CTL

AH28

DS_AGCT_CTL

AA21

EDSAFE_AVSS_1

A1.2V

TP101
TP102
TP103
TP104
TP105
TP106
TP107
TP108
TP109
TP110
TP111
TP112
TP113

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

AB22

EDSAFE_AVSS_2

AF26

EDSAFE_AVSS_3

AF27

EDSAFE_AVSS_4

AF28

EDSAFE_AVSS_5

AG27

EDSAFE_AVDD2P5

AE26

EDSAFE_DVDD1P2

AE28

EDSAFE_IF_N

AE27

EDSAFE_IF_P

AD24

PLL_DS_AGND

AB19

PLL_DS_AVDD1P2

AB25

PLL_DS_TESTOUT

AB18

SD_V5_AVDD1P2

AC17

SD_V5_AVDD2P5

AB17

SD_V5_AVSS

AD14

SD_V1_AVDD1P2

AD16

SD_V1_AVDD2P5

AB15

SD_V1_AVSS_1

AC15

SD_V1_AVSS_2

AD13

SD_V2_AVDD1P2

AE13

SD_V2_AVDD2P5

AC13

SD_V2_AVSS_1

AB14

SD_V2_AVSS_2

AC14

SD_V2_AVSS_3

AC12

SD_V3_AVDD1P2

AD12

SD_V3_AVDD2P5

AB13

SD_V3_AVSS_1

AA14

SD_V3_AVSS_2

AC11

SD_V4_AVDD1P2

AD11

SD_V4_AVDD2P5

AB12

SD_V4_AVSS

AD10

SD_R

AC10

SD_INCM_R

AE9

SD_G

AF9

SD_INCM_G

AH9

SD_B

AG9

SD_INCM_B

AG15

SD_Y1

AE15

SD_PR1

AF15

SD_PB1

AH15

SD_INCM_COMP1

AG16

SD_Y2

AF16

SD_PR2

AH17

SD_PB2

AH16

SD_INCM_COMP2

AG14

SD_Y3

AE14

SD_PR3

AF14

SD_PB3

AH14

SD_INCM_COMP3

AH10

SD_L1

AG10

SD_C1

AE10

SD_INCM_LC1

AE11

SD_L2

AF11

SD_C2

AH11

SD_INCM_LC2

AH13

SD_L3

AE12

SD_C3

AF12

SD_INCM_LC3

AD9

SD_CVBS1

AG11

SD_CVBS2

AG12

SD_CVBS3

AF13

SD_CVBS4

AC9

SD_INCM_CVBS1

AF10

SD_INCM_CVBS2

AH12

SD_INCM_CVBS3

AG13

SD_INCM_CVBS4

AF17

SD_SIF1

AG17

SD_INCM_SIF1

AD15

SD_FB

AE16

SD_FS

AE17

SD_FS2

AB16

PLL_VAFE_AVDD1P2

AA15

PLL_VAFE_AVSS

AC16

PLL_VAFE_TESTOUT

AG3

RGB_HSYNC

AF4

RGB_VSYNC

A2.5V

BLM18PG121SN1D

L102

0.1uF

BLM18PG121SN1D

L104

BLM18PG121SN1D

L105
C117
1000pF

L106
BLM18PG121SN1D

C121

0.1uF

RGB_HSYNC
RGB_VSYNC

C116

4.7uF

C119

0.1uF

C120
1000pF

C118

0.01uF

C140

4.7uF

C130
C131
C132

C133
C134
C135

C110
C124
C125

C127

C128

C129

C144

0.1uF

C122

4.7uF

C123

0.01uF

C113

A1.2V

L103

BLM18PG121SN1D

75

R115

C101

10pF

A1.2V

C111

0.1uF

75

C102

R118

91

R13 5

6

14:A4

14:A4

14:A4
14:A3
14:A3
14:A3

5

14:A6
14:A5
14:A6
14:A6

COMP1_Y_IN
COMP1_Pr_IN
COMP1_Pb_IN

COMP1_VID_INCM

DSUB_R

R_VID_INCM

DSUB_G

G_VID_INCM

B_VID_INCM

91

R120

C104

DSUB_B

OPT

14:A5
14:A5
14:A5
14:A5

10pF

91

91

R127

R129

COMP2_Y_IN
COMP2_Pr_IN
COMP2_Pb_IN

COMP2_VID_INCM

4

TU_CVBS_IN

14:A6

AV1_CVBS_IN

14:A5
14:A5

SIDE_CVBS_IN
TU_CVBS_INCM

14:A6

AV1_CVBS_INCM

14:A5

SIDE_CVBS_INCM

14:A5

0.1uF

TU_SIF

3

14:A6

R128

CONNECT NEAR BCM CHIP

C106

0

R3055
240

C4020

0.1uF

120

R3056

A2.5V

R137

10K

R139
12K

A2.5V

R4020

10K

12K

R4021

10pF

C105

75

R119

OPT

C112

0.1uF

10pF

C103

91

10pF

R13 8

R142 91

OPT

R143

OPT

R141

OPT

91

75

14:A3
14:A3

A2.5V

91

R14 0

A1.2V

2

IC100

BCM3556

I2S_CLK_IN
I2S_CLK_OUT
I2S_DATA_IN

I2S_DATA_OUT

I2S_LR_IN

I2S_LR_OUT
AUD_LEFT0_N
AUD_LEFT0_P

AUD_AVDD2P5_0

AUD_AVSS_0_1
AUD_AVSS_0_2
AUD_AVSS_0_3
AUD_AVSS_0_4
AUD_AVSS_0_5
AUD_RIGHT0_N
AUD_RIGHT0_P

AUD_LEFT1_N
AUD_LEFT1_P

AUD_RIGHT1_N
AUD_RIGHT1_P

AUD_AVDD2P5_1

AUD_AVSS_1_1
AUD_AVSS_1_2
AUD_AVSS_1_3

AUD_LEFT2_N
AUD_LEFT2_P

AUD_RIGHT2_N
AUD_RIGHT2_P

AUD_AVDD2P5_2

AUD_AVSS_2_1
AUD_AVSS_2_2

AUD_SPDIF

SPDIF_AVDD2P5

SPDIF_AVSS

SPDIF_IN_N

SPDIF_IN_P

HDMI_RX_0_CEC_DAT

HDMI_RX_0_HTPLG_IN

HDMI_RX_0_HTPLG_OUT

HDMI_RX_0_DDC_SCL
HDMI_RX_0_DDC_SDA

HDMI_RX_0_RESREF

HDMI_RX_0_CLK_N

HDMI_RX_0_CLK_P
HDMI_RX_0_DATA0_N
HDMI_RX_0_DATA0_P
HDMI_RX_0_DATA1_N
HDMI_RX_0_DATA1_P
HDMI_RX_0_DATA2_N
HDMI_RX_0_DATA2_P

HDMI_RX_0_VDD3P3
HDMI_RX_0_VDD1P2
HDMI_RX_0_VDD2P5
HDMI_RX_0_AVSS_1
HDMI_RX_0_AVSS_2
HDMI_RX_0_AVSS_3
HDMI_RX_0_AVSS_4
HDMI_RX_0_AVSS_5
HDMI_RX_0_AVSS_6

HDMI_RX_0_PLL_AVSS

HDMI_RX_0_PLL_DVDD1P2

HDMI_RX_0_PLL_DVSS

HDMI_RX_1_CEC_DAT

HDMI_RX_1_HTPLG_IN
HDMI_RX_1_HTPLG_OUT

HDMI_RX_1_DDC_SCL
HDMI_RX_1_DDC_SDA

HDMI_RX_1_RESREF

HDMI_RX_1_CLK_N

HDMI_RX_1_CLK_P
HDMI_RX_1_DATA0_N

HDMI_RX_1_DATA0_P
HDMI_RX_1_DATA1_N

HDMI_RX_1_DATA1_P
HDMI_RX_1_DATA2_N

HDMI_RX_1_DATA2_P

HDMI_RX_1_VDD3P3
HDMI_RX_1_VDD1P2
HDMI_RX_1_VDD2P5
HDMI_RX_1_AVSS_1
HDMI_RX_1_AVSS_2
HDMI_RX_1_AVSS_3
HDMI_RX_1_AVSS_4
HDMI_RX_1_AVSS_5
HDMI_RX_1_AVSS_6
HDMI_RX_1_AVSS_7
HDMI_RX_1_AVSS_8
HDMI_RX_1_AVSS_9

HDMI_RX_1_PLL_AVSS

HDMI_RX_1_PLL_DVDD1P2

HDMI_RX_1_PLL_DVSS

AE18
AF18
AD17
AH19
AD18
AG18
AG26
AH26
AF23
AA20
AB21
AC22
AC23
AD23
AH25
AG25
AH23
AG23
AG24
AH24
AE22
AB20
AC21
AE23
AF21
AE21
AF22
AG22
AD21
AC20
AD22
AH2
AC6
AE4
AF3
AH1

AG1
AA6
AA5
AB3
Y6
AC4
AC1
AC2
AD1
AD2
AE1
AE2
AF1
AF2
AD3
AE3
AC3
AD4
AB5
AB6
AG2
AB4
AA7
Y8
AC5
W8

AA3
V4
U6
V5
V3
W4
W2
W3
Y1
Y2
AA2
AA1
AB2
AB1
Y3
Y4
W5
W1
U5
W6
U7
V7
W7
U8
V8
Y5
V6
AA4
Y7

R162 0

OPT

R163 0

OPT

R164

OPT

R165

OPT

R168 0

OPT

R166 0

OPT

R167 0

OPT

R169 0

OPT

R172 0

OPT

C150

0.1uF

R2036
1K

R188

10K

R152499

OPT

R2037

R153499

C145

4.7uF

10K

0

0

C158
1000pF

R146 10K

+5.0V

R2035

0

R2038 10K

SPDIF_OUT

C153

0.1uF

C151

0.01uF

10K

R2039

C146

4.7uF

C159
1000pF

C147

0.01uF

C148

0.01uF

C149

0.01uF

14:A3

R1570
R1580

HDMI0_RXC-_BCM
HDMI0_RXC+_BCM
HDMI0_RX0-_BCM
HDMI0_RX0+_BCM
HDMI0_RX1-_BCM
HDMI0_RX1+_BCM
HDMI0_RX2-_BCM
HDMI0_RX2+_BCM

C160

0.1uF

C165

10uF

D3.3V

C154

0.1uF

BCM_I2S_BIT_CLK

BCM_I2S_DATA_OUT

BCM_I2S_WORD_CLK

C155

0.1uF

C156

0.1uF

C157

0.1uF

HDMI_HPD_IN_5MA

BLM18PG121SN1D

L107

C161

0.1uF

C166

C152

10uF

0.01uF

C162

10uF

C163

10uF

C164

10uF

HDMI_SCL
HDMI_SDA

2:AA18

2:AB18

2:AB18
2:AB18
2:AC18

2:AC18

2:AC18

2:AD18

3:D3

3:D3

3:D3

G5

A3.3V

BLM18PG121SN1D

L109

A1.2V

A3.3V

BLM18PG121SN1D

L110

A1.2V

BLM18PG121SN1D

L108

A2.5V

A2.5V

2:AA19
2:AA19

HDMI_HPD_IN_5MA

C3006

0.1uF
16V

A2.5V

A2.5V

Q906

ISA1530AC1

A2.5V

A2.5V

OPT

OPT

R3041 270

R3042 470

C

B

E

HDMI_HPD_IN

9:G4;9:I3

1

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

JANG.J.H.

BRAZIL VENUS

BCM3556 VIDEO IN

2009.03.23

11

15

A B C D E F G H I J

7

+3.3V_ST

R454

2K

R451

2:AD26

2K

6

O

R494

R415

4.7K

OPT

4.7K

R407

+3.3V_ST

R414

10K

47K

GND

C

C407

Q401

2SC3875S(ALY)

E

R416 0

R41 7

R42 0

R421 4.7K

R423

OPT

R42 4 22

R42 5 22

OPT

OPT

GND

+3.3V_ST

22

22

OPT

R41 8

4.7 K

B

C403

0.1uF
16V

0

R413

4.7K

HDMI_CEC

+3.3V_ST

R488

33K

R43 0
100

HSYNC/P1.5

R42 7

4.7 K

VSYNC/P1.6

P1.7/SOGI

RST

HSCL1/P3.0/RXD

P4.3/AD3

HSDA1/P3.1/TXD

P3.2/INT0
P3.3/INT1

ISDA/P3.4/T0

ISCL/P7.5

15K

C415

0.1uF
16V

R429
OPT

OPT

R42 8

GND

+3.3V_ST

R489
33K

GND

1
2
3
4
5
6
7
8
9
10
11

4.7K

4.7K

R495

R496

+3.3V_ST

R401

1K

5

OPT

OPT

R402

GND

14:H2

14:I1

IC405

A0

A1

A2

VSS

DDC_SCL

DDC_SDA

IR

UCOM_RX

UCOM_TX

24LC16BT-I/SN

1

2

3

4

9:G7;14:A4

9:G7;14:A4

14:A3;14:E6

4

+5V_ST

R482
30K
OPT

R486

+24V

R484
30K

R43 2

OPT

0

R491

5.1K

47K

GND

C

E

OPT

R481

Q405
2SC3052

0

+3.3V_ST

R487

100K

OPT

R485
10K

9:A7;I4

RESET

POWER_DET

R490
0

IC1003

NCP803SN293

2

1

GND

OPT

VCC

3

POWER DETECT

+5.0V

+12V

R476

6.8K

15K

R477

R492
0

OPT

3

R478

OPT

10K

C

OPT

Q404

B

2SC3052

E

OPT

R479

OPT

B

1K

R480

2.2K

OPT

R483

0

IC402

KIA7029AF

I

3

1

2

R406

VCC

WP

SCL

SDA

4.7K

R405
220

R404
220

0.1uF

+3.3V_ST

+3.3V_ST

C406

16V

GND

M5V_ON

G

R403

R499

4.7K

C402

0.1uF
16V

GND

8

7

6

5

14:E6

14:E7

14:E5

UCOM_SDA_3.3V

UCOM_SCL_3.3V

LED_WARM_STBY

100

100

R471 100

R464

R470

P1.1/DA0

P1.2/DA1

P1.3/DA2

P1.4/DA3

41

42

43

44

MTV416GMF

12

13

14X215X116

HSDA2/P7.4

HSCL2/P7.3

X401

24MHz

C408
22pF
50V

R43 6 22

R43 4 22

GND

SDA2_3.3V

SCL2_3.3V

14:E5

4:C5

ERROR_OUT

LED_POWER_ON

100

R44 0 1 00

R474

VDD

P4.2/AD2

P1.0/ET2

38

39

40

IC406

17

18

VSS

P4.0/AD0

P6.0/CLKO1

GND

100

C409

R44 1

22pF
50V

D3.3V

OPT

OPT

4.7 K
R43 5

OPT

0

R44 4 10 0

R44 2

P5.3

P5.2

P5.1

P5.0

35

36

37

19

P6.120P6.221P6.322P6.4

0

22

R44 6

R44 5 0

R44 3

OPT

OPT

OPC_EN

AMP_MUTE

3:E3

7:I5

R43 90

R435 : READY FO 1.2V BCM ENABLE

C410

0.1uF

34

P5.4

33

P5.5

32

P5.6

31

P5.7/CLKO2

30

P7.0/HBLANK

29

P4.1/AD1

28

P7.1/VBLANK

27

P7.2/HCLAMP

26

P6.7

25

P6.6

24

P6.5

23

R447 4.7K

OPT

R452

47K

GND

READY FO 1.2V BCM ENABLE

+3.3V_ST

16V

GND

R450

OPT

C412

0.1uF
OPT

+3.3V_ST

1K

R45 3

R455

4.7K

OPT

C411
100uF
16V

100

OPT

R459

4.7K

R465 100

OPT

100

R46 6

R468 100

R467

22

100

R431

OPT

R475 1K

R449 100

OPT

68K

R46 0

6.8K

R461

OPT

GND

C413

0.1uF

R462
100

R456
100

C414

0.1uF

16V

GND

KEY2

KEY1

B

14:E6

14:E6

AMP_RST

+5.0V

R472

4.7K

C

Q402
RT1N141C-T112-1

E

GND

PANEL_CTL

FLASH_WP_1

INV_ON/OFF

RL_ON

RESET

POWER_DET

9:G7;9:I3;3:C5

EDID_WP

4:H1

4:C5

4:C5

4:C7;14:E5

9:A7

9:C1

14:A4

2

9:B5;9:I4

9:B5;9:I4

1

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

LIM.K.R

BCM (BRAZIL VENUS)

MICOM

2009.03.23

12 15

A B C D E F G H I J

7

D1.2V

C243

C249

C250

0.1uF

4.7uF

1000pF

C251

0.01uF

6

C244
1000pF

5

0.01uF

C245

4.7uF

0.1uF

C255
1000pF

C216

0.1uF

C258

4.7uF

C257

0.01uF

C268
1000pF

C259
1000pF

C261

0.1uF

C269

0.01uF

C256

C246

4

C247

0.1uF

C248
1000pF

0.1uF

C281
1000pF

0.1uF

C282
1000pF

C275

C272

3

C276

0.1uF

C262

0.01uF

C283
1000pF

C252

0.1uF

C263

4.7uF

C270

0.1uF

C253

C278

4.7uF

C284

0.01uF

10uF

C265

0.1uF

C264
1000pF

C271

4.7uF

C254

C266

4.7uF

C280

4.7uF

C285

0.01uF

10uF

C267

0.01uF

C292
1000pF

C286
33uF

C288
1000pF

C289

0.1uF

C293

0.01uF

C297

4.7uF

C2005

0.01uF

D1.2V

D3.3V

D3.3V

D1.8V

D1.8V

C287

33uF

C290

0.01uF

C291

10uF

C294

0.1uF

C2004

33uF

C2006

0.01uF

R205

C2003

0.1uF

20

A3.3V

D1.2V

D3.3V

D1.8V

AH27

AA12
AA13
AA18
AA19

AB28

IC100

BCM3556

IC100

BCM3556

H8

VDDC_1

J8

VDDC_2

K8

VDDC_3

L8

VDDC_4

M8

VDDC_5

N8

VDDC_6

P8

VDDC_7

R8

VDDC_8

AA8

VDDC_9

H9

VDDC_10

H10

VDDC_11

H11

VDDC_12

H12

VDDC_13

H13

VDDC_14

H14

VDDC_15

H15

VDDC_16

H16

VDDC_17

H17

VDDC_18

H18

VDDC_19

H19

VDDC_20

H21

VDDC_21

J21

VDDC_22

K21

VDDC_23

L21

VDDC_24

M21

VDDC_25

N21

VDDC_26

P21

VDDC_27

R21

VDDC_28

T21

VDDC_29

U21

VDDC_30

V21

VDDC_31

W21

VDDC_32

Y21

VDDC_33

AGC_VDDO

VDDO_1
VDDO_2
VDDO_3
VDDO_4

E28

VDDO_5

L28

VDDO_6

U28

VDDO_7
VDDO_8

A9

DDRV_1

G9

DDRV_2

G11

DDRV_3

G13

DDRV_4

A14

DDRV_5

G15

DDRV_6

G17

DDRV_7

A19

DDRV_8

G19

DDRV_9

AD5

DVSS_1

AD6

DVSS_2

J7

DVSS_3

K7

DVSS_4

L7

DVSS_5

M7

DVSS_6

AB7

DVSS_7

AC7

DVSS_8

G8

DVSS_9

D9

DVSS_10

AA9

DVSS_11

G10

DVSS_12

A11

DVSS_13

L11

DVSS_14

M11

DVSS_15

N11

DVSS_16

P11

DVSS_17

R11

DVSS_18

T11

DVSS_19

U11

DVSS_20

V11

DVSS_21

D12

DVSS_22

G12

DVSS_23

L12

DVSS_24

M12

DVSS_25

N12

DVSS_26

P12

DVSS_27

R12

DVSS_28

T12

DVSS_29

U12

DVSS_30

V12

DVSS_31

L13

DVSS_32

M13

DVSS_33

N13

DVSS_34

P13

DVSS_35

R13

DVSS_36

T13

DVSS_37

U13

DVSS_38

V13

DVSS_39

G14

DVSS_40

L14

DVSS_41

M14

DVSS_42

N14

DVSS_43

P14

DVSS_44

R14

DVSS_45

T14

DVSS_46

U14

DVSS_47

V14

DVSS_48

L15

DVSS_49

M15

DVSS_50

N15

DVSS_51

P15

DVSS_52

R15

DVSS_53

T15

DVSS_54

U15

DVSS_55

V15

DVSS_56

A16

DVSS_57

G16

DVSS_58

L16

DVSS_59

M16

DVSS_60

N16

DVSS_61

DVSS_62
DVSS_63
DVSS_64
DVSS_65
DVSS_66
DVSS_67
DVSS_68
DVSS_69
DVSS_70
DVSS_71
DVSS_72
DVSS_73
DVSS_74
DVSS_75
DVSS_76
DVSS_77
DVSS_78
DVSS_79
DVSS_80
DVSS_81
DVSS_82
DVSS_83
DVSS_84
DVSS_85
DVSS_86
DVSS_87
DVSS_88
DVSS_89
DVSS_90
DVSS_91
DVSS_92
DVSS_93
DVSS_94
DVSS_95
DVSS_96
DVSS_97
DVSS_98

DVSS_99
DVSS_100
DVSS_101
DVSS_102
DVSS_103
DVSS_104
DVSS_105
DVSS_106
DVSS_107
DVSS_108
DVSS_109
DVSS_110
DVSS_111
DVSS_112
DVSS_113
DVSS_114
DVSS_115
DVSS_116
DVSS_117

P16
R16
T16
U16
V16
AA16
D17
L17
M17
N17
P17
R17
T17
U17
V17
AA17
AC19
G18
L18
M18
N18
P18
R18
T18
U18
V18
D20
G20
H20
A21
E21
F21
G21
E22
F22
G22
H22
J22
K22
L22
M22
N22
P22
R22
T22
U22
V22
W22
Y22
AA22
W23
AB23
F28
M28
T28
AC28

D1.8V

C365

0.1uF

C364

0.1uF
16V

16V

C363

0.1uF

C357

C356

10uF

16V

0.1uF

10V

16V

C348

0.1uF

C320

0.1uF
16V

16V

C319

0.1uF

C318

C304

0.1uF

0.1uF

16V

16V

16V

2

1

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

JANG.J.H

BRAZIL DVR DV

BCM3549 POWER

2009.03.23

1513

A B C D E F G H I J

7

6

5

CONTROL IR & LED

P701

12507WS-12L

SCL

1

SDA

2

GND

D701

3

KEY1

4

KEY2

5

5V_ST

6

GND

7

WARM_ST

8

IR

9

GND

10

3.3V_ST

11

POWER_ON

12

13

GND

CDS 3C05 HDMI 1

ZD701

OPT

ZD702

C701

0.1uF

USB JACK & USB +5V Current Protection

D3.3V

BCM Tolerance

R721

D704

5.6V
OPT

USB_DM2

USB_DP2

R718

2.7K

10:D4

10:D4

2.7K

USB_CTL1

10:D5

USB_POWER_OUT_2

C714
100uF

VOUT

1234

IC701

MIC2009YM6-TR

VIN

6

5

4

1

GND

2

ENABLE

3

R717

47

Make this trace minimum 12 mil

D703

CDS3C05GTA

CDS3C05GTA

5.6V
OPT

USB_POWER_OUT_2

UCOM_SCL_3.3V

C709

0.1uF
16V

L705

C710

0.1uF
16V

2SC3052

+3.3V_ST

Q701

UCOM_SDA_3.3V

2SC3052

R707

10K

C

E

L703

BG2012B080TF

L704

BG2012B080TF

IR

12:D4;A3

+3.3V_ST

OPT

C707
1000pF
50V

C708

0.1uF

CB3216PA501E

OPT

C705

C703

50V

0.1uF

1000pF
50V

C706

0.1uF

L701

BG2012B080TF

L702

CB3216PA501E

D702

CDS 3C05 HDMI 1

C704

ZD703

C702

100pF

1000pF

OPT

Q702

B

R710

OPT

0
R708

C

E

R709

4.7K

10K

12:F6

12:F6

KEY1

KEY2

+5V_ST

+3.3V_ST

B

R712
0

R711
0

OPT

12:H3

12:H3

OPT

0
R714

R713
0

R715

120K

OPT

LED_WARM_STBY

RL_ON

LED_POWER_ON

R716
130

ILIMIT

FAULT/

KJA-UB-4-0004

JK702

USB DOWN STREAM

5

+5V_ST

L709

USB_5VST

C716

0.1uF
16V

USB_OCD1

L708

BLM18PG121SN1D

C715

100uF
16V

Not enough space

+5.0V

L710

USB_+5V

MLB-201209-0120P-N2

10:D4

MLB-201209-0120P-N2

4

JP715

JP716

JP712

JP711

D705

CDS3C05GTA

5.6V
OPT

R719
0

D3.3V

R720
0

L707

JP713

CB3216PA501E

C713

10uF
16V

D706

CDS3C05GTA

5.6V
OPT

R722
27

R723
27

BLUETOOTH_RESET

VREG_CTRL

USB_DM1

USB_DP1

10:D4

10:D4

RS232_SWITCHING

R702
0

RS232_BYPASS

IC702

MC14053BDR2G

0ISTL00024A

R701

3

BCM_RX

9:G6

UCOM_RX

12:D4

0

Y1

1

Y0

2

Z1

3

Z

4

Z0

5

INH

6

VEE

7

VSS

8

VDD

16

R705

0

A3

RS232C_RxD

RS232C_TxD

BCM_TX

UCOM_TX

A3

9:G6

12:D4

16V

+5.0V

Y

15

X

14

13

12

11

10

9

RS232_BYPASS

R703

X1

0

X0

A

B

C

R706

4.7K

R_RS232_SWITCHING

R704
100K

C711

0.1uF

MLB-201209-0120P-N2

C712

47uF
16V

+5V_ST

L706

Blue Tooth

11

12507WR-10L

P702

10

9

8

7

6

5

4

3

2

1

2

1

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

DO.J.G

CONTROL IR/BT/USB

2009.03.23BRAZIL VENUS

1514

A B C D E F G H I J

7

0

R5014
0
R5013

L5002

C5010
22uF

D3.3V

OPT

R5015

4.7K

RF_SWITCH

D2.5V

C5011

0.1uF

TUNER_RESETb
SDA0_3.3V
SCL0_3.3V

TU_SYNC

TU_SDATA

TU_SCLK

GAIN_SWITCH

C5012

0.01uF

3:T26

3:T26

3:T26

3:T27

3:T27

3:T27

RF_SWITCH

GAIN_SWITCH

L5005

C5016

C5014

22uF

0.1uF

D3.3V

L5004

C5015
22uF

3:T24

3:T24

Place close to Pin

C5017

0.1uF

D1.2V

L5006

C5020

C5018

0.1uF

22uF

R5020

12K

C5019

0.01uF

R5021

10K

TU_+5.0V

TU_+5.0V

R5022

R5024

0

OPT

B

A1[RD]
A2[GN]

R5023

1K

L5007

C5021

470

0.01uF

E

2SA1530A-T112-1R

Q5000

C

LD5000
SAM2333

SAM2333

LD5001

C

C

A1[RD]
A2[GN]

R5025

TU_SIF

330

D3.3V

3:T25

TU_+5.0V

LGIT

CTR

1

RF-GAIN_SW

2

B0[+5V]

3

R50010

VTU

4

RF_AGC

5

LGIT

B1[+5V]

6

24

SHIELD

NC_1

7

SIF

8

VIDEO_OUT

9

NC_2

10

NC_3

11

AIF

12

B2[2.5V]

13

B3[3.3V]

14

B4[1.2V]

15

RESET[SYRSTN]

16

SDA

17

SCL

18

RSEORF

19

SBYTE

20

SPBVAL

21

SRDT

22

SRCK

23

TU102

TDYR-H071F

6

5

R50020

R50000

LGIT

LGIT

LGIT

22uF
C5000
LGIT

L5000

C5002

16V

C5001
22pF
50V

LGIT

0.1uF
50V
LGIT

C5003
22pF
50V

LGIT

19

SHIELD

SHARP

TU101
VA1G5BF8005

C5005-*1

0.1uF
50V
LGIT

C5005
2200pF
50V

C5007
2200pF

0
R5004

22

22

22

R5005

R5006

R5007

R500822

R500922

R501022

50V

0
R5012

RF_SW

1

GAIN_SW

2

BB

3

B1

4

AFT

5

SIF

6

VIDEO

7

B2

8

B3

9

B4

10

RESET

11

SDA

12

SCL

13

RSEORF

14

SBYTE

15

SPBVAL

16

SRDT

17

SRCK

18

16V

10uF

4

C5004
91pF
50V

FI-C3216-103KJT

OPT

L5001

82

OPT

OPT

R5003

C5009

R5018
56

R5019

56

OPT

GND

TU_CVBS_IN

3:T25

3

C5035
100uF
16V

C5036
100uF
16V

+5V

TU_+5.0V

L5009

C5030

0.01uF
50V

MLB-201209-0120P-N2

L5010

MLB-201209-0120P-N2

C5031

0.1uF
16V

C5032

0.1uF
16V

OPT

C5033

4.7uF
10V

C5034

4.7uF
10V
OPT

D3.3V

C5026

0.33uF
16V

1

VIN

100

R50 26

+12V

2

C5022

0.1uF
16V

C5023
100uF
16V

INPUT

IC5002

AS7809DTRE1

1

2

GND

OUTPUT

3

C5024

0.1uF
50V

L5008

MLB-201209-0120P-N2

C5025

100uF

16V

2VC3

C5027

0.1uF
50V

6

VOUT

GND2

IC5001
KIA78R05F

4NC5

GND1

C5028

47uF
16V

C5029

0.1uF
50V

1

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

DO.J.G

TUNER

2009.03.23BRAZIL VENUS

1515

Block Diagram

Overall Block Diagram
for Brazil DTV (LH70)

TU_SCLK, TU_SDATA, TU_SYNC

VA1G5BF8005

RF_Switch, Gain_Switch

TU_CVBS_IN
TU_SIF

SDA0/SCL0_3.3V

LVDS

DDR2(256Mbit)

Qimonda/Hynix

FRC IC

(MST7323S)

LCD Module

(FHD, 120Hz)

JACK BACK

JACK BACK

at REAR

at REAR

AV1
AV2

Component 1
Component 2

D-sub RGB

Audio L/R (for RGB)

HDMI 1
HDMI 2
HDMI 3

Digital Audio (Optic)

RS-232C (Ctrl./SVC)

Bluetooth Module

USB

CVBS, L/R, AV_DET

SIDE_CVBS, SIDE_L/R, SIDE_DET

Y Pb Pr, L/R, DET
Y Pb Pr, L/R, DET

RGB/H/V

Audio L/R

3x1

HDMI Switch

SPDIF

RX/TX RX/TX

MAX3232

DP1/DM1

DP2/DM2

O.C. Protector

+5V+5V

USB_DM1
USB_DP1

USB_DM2
USB_DP2

BCM3556

BCM3556

(Brazil)

(Brazil)

DDR_Data[0:15], DQS, DM …

Addr.[0:13], ctrl. data

Data[16:31]

Data [0 … 7]

CS ,RE,WE……

I2S

SCL, SDA_3.3V

FRC Block

FRC Block

X-tal

12MHz

DDR2 (1Gbit)

DDR2 (1Gbit)

NAND Flash

(512Mbit)

Digital AMP

NTP3100L

NVRAM

Elpida/Hynix

Elpida/Hynix

Reset Switch

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

Reset IC

X-tal

54MHz

SCL, SDA_3.3V

CLK,TDI,TDO,MS,RST

MICOM

(MTV416GMF)

JTAG

X-tal

24MHz

LGE Internal Use Only

Block Diagram

I2C & RS232 Communication

I2C & RS232 Communication

VA1G5BF8005

MAX3232

Sub B/D

47PF

RS232C_RxD

RS232C_TxD

22 ohm

22 ohm

47PF

+5V_ST

4.7k ohm

4.7k ohm

D3.3V

4.7k ohm

4.7k ohm

P

7
0

22 ohm
22 ohm

Main B/D

SCL0

SDA0

SCL1

SDA1

22 ohm
22 ohm

D3.3V

4.7k ohm

4.7k ohm

+3.3V_HDMI

2.7k ohm

2.7k ohm

0 ohm
0 ohm

HDMI

S/W

1

100 ohm

100 ohm

NTP3100L

33PF

D3.3V

BCM3556

SCL3

P

7
0

100 ohm
100 ohm

SDA3

2

22 ohm

22 ohm

4.7k ohm

D3.3V

4.7k ohm

22 ohm

22 ohm

33PF

MICOM

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

SCL2

SDA2

22 ohm

22 ohm

4.7k ohm

4.7k ohm

100 ohm
100 ohm

MST7323

LGE Internal Use Only

Block Diagram

• I2C channel [LH70]

CH0

CH1

BCM3556

BCM3556

CH2

CH3

TUNER 1

TUNER 1

0xC2

0xC2

Demod(0x30)

Demod(0x30)

QPSK(0x32)

QPSK(0x32)

AMP

AMP

NTP3100L

NTP3100L

0x54

0x54

EEPROM

EEPROM

AT24C512

AT24C512

0xA6

0xA6

FRC

FRC

MST7323

MST7323

HDMI SW

HDMI SW

TDA9996

TDA9996

Micom

Micom

MTV416

MTV416

0x50

0x50

CH0 (+3.3V)

(+ 3.3V)

CH1

CH2 (+3.3V)

(+3.3V)

CH3

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

LGE Internal Use Only

Block Diagram

Jack

Jack

Board

Board

D1.2V, D2.5V, +3.3V, +5.0V_ST

SPDIF , EDID_WP ….

SCL0_3.3V, SDA0_3.3V, DDC_SCL, DDC_SDA

CVBS, SIF, AV, RGB ,COMPONENT, R/L,

TU_SCLK, TU_DATA, TU_SYNK’’..

MAIN

MAIN

Board

Board

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

< Signal Interface >

LGE Internal Use Only

1. Power-Up Boot Fail Trouble Shooting

Overall Block Diagram
for Brazil DTV (LH70)

VA1G5BF8005

TU_SCLK, TU_SDATA, TU_SYNC

SDA0/SCL0_3.3V

RF_Switch, Gain_Switch

TU_CVBS_IN
TU_SIF

LVDS

DDR2(256Mbit)

Qimonda/Hynix

FRC IC

(MST7323S)

LCD Module

(FHD, 120Hz)

JACK BACK

JACK BACK

at REAR

at REAR

AV1
AV2

Component 1
Component 2

D-sub RGB

Audio L/R (for RGB)

HDMI 1
HDMI 2
HDMI 3

Digital Audio (Optic)

RS-232C (Ctrl./SVC)

Bluetooth Module

USB

CVBS, L/R, AV_DET

SIDE_CVBS, SIDE_L/R, SIDE_DET

Y Pb Pr, L/R, DET
Y Pb Pr, L/R, DET

RGB/H/V

Audio L/R

3x1

HDMI Switch

SPDIF

RX/TX RX/TX

MAX3232

DP1/DM1

DP2/DM2

O.C. Protector

+5V+5V

USB_DM1
USB_DP1

USB_DM2
USB_DP2

BCM3556

BCM3556

(Brazil)

(Brazil)

DDR_Data[0:15], DQS, DM …

Addr.[0:13], ctrl. data

Data[16:31]

Data [0 … 7]

CS ,RE,WE……

I2S

SCL, SDA_3.3V

FRC Block

FRC Block

X-tal

12MHz

DDR2 (1Gbit)

DDR2 (1Gbit)

NAND Flash

(512Mbit)

Digital AMP

NTP3100L

NVRAM

Elpida/Hynix

Elpida/Hynix

Reset Switch

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

Reset IC

X-tal

54MHz

SCL, SDA_3.3V

CLK,TDI,TDO,MS,RST

MICOM

(MTV416GMF)

JTAG

X-tal

24MHz

LGE Internal Use Only

1. Power-Up Boot Fail Trouble Shooting

Check P801 All Voltage Level

(24V, 12V, 5V_ST)

Y

Check All Voltage Level

at L805/L807/L808

Y

Check Voltage Level 3.3V at L830

Y

Check Voltage Level 2.5V at L827

Y

Check Voltage Level 1.8V

at IC802 #2 pin or L815

Y

Check Voltage Level 1.2V at L821

Y

Check X903 Clock 54MHz

NY

N

N

N

N

N

N

Check Power connector

Replace one of L805/L807/L808

& Recheck

Replace one of

IC809/Q812/L828/L829/L830/L822

& Recheck

Replace one of IC803/L824/L827

& Recheck

Replace one of IC802/IC805/L815

& Recheck

Replace one of

IC804/Q809/L811/L817/L821

& Recheck

Replace X903

N

N

N

N

Replace Power board

Check Micom IC406

Redownload or replace

Y

Check signal transition

at IC101 #9 pin

Y

Replace IC101 Flash Memory

N

Maybe BCM3556 has troubles

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

LGE Internal Use Only

2. No OSD Trouble Shooting

Overall Block Diagram
for Brazil DTV (LH70)

TU_SCLK, TU_SDATA, TU_SYNC

VA1G5BF8005

RF_Switch, Gain_Switch

TU_CVBS_IN
TU_SIF

SDA0/SCL0_3.3V

LVDS

DDR2(256Mbit)

Qimonda/Hynix

FRC IC

(MST7323S)

LCD Module

(FHD, 120Hz)

JACK BACK

JACK BACK

at REAR

at REAR

AV1
AV2

Component 1
Component 2

D-sub RGB

Audio L/R (for RGB)

HDMI 1
HDMI 2
HDMI 3

Digital Audio (Optic)

RS-232C (Ctrl./SVC)

Bluetooth Module

USB

CVBS, L/R, AV_DET

SIDE_CVBS, SIDE_L/R, SIDE_DET

Y Pb Pr, L/R, DET
Y Pb Pr, L/R, DET

RGB/H/V

Audio L/R

3x1

HDMI Switch

SPDIF

RX/TX RX/TX

MAX3232

DP1/DM1

DP2/DM2

O.C. Protector

+5V+5V

USB_DM1
USB_DP1

USB_DM2
USB_DP2

BCM3556

BCM3556

(Brazil)

(Brazil)

DDR_Data[0:15], DQS, DM …

Addr.[0:13], ctrl. data

Data[16:31]

Data [0 … 7]

CS ,RE,WE……

I2S

SCL, SDA_3.3V

FRC Block

FRC Block

X-tal

12MHz

DDR2 (1Gbit)

DDR2 (1Gbit)

NAND Flash

(512Mbit)

Digital AMP

NTP3100L

NVRAM

Elpida/Hynix

Elpida/Hynix

Reset Switch

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

Reset IC

X-tal

54MHz

SCL, SDA_3.3V

CLK,TDI,TDO,MS,RST

MICOM

(MTV416GMF)

JTAG

X-tal

24MHz

LGE Internal Use Only

2. No OSD Trouble Shooting

Check 12V Voltage Level

at P801 #13 Pin

Y

Check 12V Voltage Level

at L801

Y

Check 12V Voltage Level at L909

Y

Check Voltage Level 2.5V at L827

Y

Check Voltage Level 1.8V

at IC802 #2 pin or L815

Y

Check Voltage Level 1.26V

at IC807 #6 pin

NY

N

N

N

N

N

Check Power connector

Replace one of L801/Q804

& Recheck

Replace one of

Q802/Q803/Q804/L801

& Recheck

Replace one of IC803/L824/L827

& Recheck

Replace one of IC802/IC805/L815

& Recheck

Replace IC807

& Recheck

Replace Power board

Y

Check P903

#16(TXAC-), #17(TXAC+),

#32(TXBC-), #33(TXBC+)

Y

Check LVDS Cable

Y

Check Voltage LCD Module

N

N

Maybe BCM3556(IC100) or

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

7329A(IC901)

has troubles

Replace Cable

LGE Internal Use Only

3. Digital TV Video Trouble Shooting

Overall Block Diagram
for Brazil DTV (LH70)

VA1G5BF8005

TU_SCLK, TU_SDATA, TU_SYNC

TU_CVBS_IN
TU_SIF

SDA0/SCL0_3.3V

RF_Switch, Gain_Switch

LVDS

DDR2(256Mbit)

Qimonda/Hynix

FRC IC

(MST7323S)

LCD Module

(FHD, 120Hz)

JACK BACK

JACK BACK

at REAR

at REAR

AV1
AV2

Component 1
Component 2

D-sub RGB

Audio L/R (for RGB)

HDMI 1
HDMI 2
HDMI 3

Digital Audio (Optic)

RS-232C (Ctrl./SVC)

Bluetooth Module

USB

CVBS, L/R, AV_DET

SIDE_CVBS, SIDE_L/R, SIDE_DET

Y Pb Pr, L/R, DET
Y Pb Pr, L/R, DET

RGB/H/V

Audio L/R

3x1

HDMI Switch

SPDIF

RX/TX RX/TX

MAX3232

DP1/DM1

DP2/DM2

O.C. Protector

+5V+5V

USB_DM1
USB_DP1

USB_DM2
USB_DP2

BCM3556

BCM3556

(Brazil)

(Brazil)

DDR_Data[0:15], DQS, DM …

Addr.[0:13], ctrl. data

Data[16:31]

Data [0 … 7]

CS ,RE,WE……

I2S

SCL, SDA_3.3V

FRC Block

FRC Block

X-tal

12MHz

DDR2 (1Gbit)

DDR2 (1Gbit)

NAND Flash

(512Mbit)

Digital AMP

NTP3100L

NVRAM

Elpida/Hynix

Elpida/Hynix

Reset Switch

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

Reset IC

X-tal

54MHz

SCL, SDA_3.3V

CLK,TDI,TDO,MS,RST

MICOM

(MTV416GMF)

JTAG

X-tal

24MHz

LGE Internal Use Only

3. Digital TV Video Trouble Shooting

Check RF Cable

Y

Check Tuner(TU101) Power

(5.0V, 2.5V, 3.3V, 1.2V)

Y

Check TP Clock, Data, Sync

R107, R108, R109

Y

Check cable between P203 at Jack

Board and P701 at Main Baord

Y

Maybe BCM3556(IC100)

has problems

Replace one of IC101, IC102 at

N

N

N

Jack Board or IC803/ IQ812/ C804/

Q809/+5V_ST and +12V of P801 at

Main Board& Recheck

Maybe Tuner(TU101) has problems

Maybe Cable Pin has problems

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

LGE Internal Use Only

4. Analog TV Video Trouble Shooting

Overall Block Diagram
for Brazil DTV (LH70)

VA1G5BF8005

TU_SCLK, TU_SDATA, TU_SYNC

TU_CVBS_IN
TU_SIF

SDA0/SCL0_3.3V

RF_Switch, Gain_Switch

LVDS

DDR2(256Mbit)

Qimonda/Hynix

FRC IC

(MST7323S)

LCD Module

(FHD, 120Hz)

JACK BACK

JACK BACK

at REAR

at REAR

AV1
AV2

Component 1
Component 2

D-sub RGB

Audio L/R (for RGB)

HDMI 1
HDMI 2
HDMI 3

Digital Audio (Optic)

RS-232C (Ctrl./SVC)

Bluetooth Module

USB

CVBS, L/R, AV_DET

SIDE_CVBS, SIDE_L/R, SIDE_DET

Y Pb Pr, L/R, DET
Y Pb Pr, L/R, DET

RGB/H/V

Audio L/R

3x1

HDMI Switch

SPDIF

RX/TX RX/TX

MAX3232

DP1/DM1

DP2/DM2

O.C. Protector

+5V+5V

USB_DM1
USB_DP1

USB_DM2
USB_DP2

BCM3556

BCM3556

(Brazil)

(Brazil)

DDR_Data[0:15], DQS, DM …

Addr.[0:13], ctrl. data

Data[16:31]

Data [0 … 7]

CS ,RE,WE……

I2S

SCL, SDA_3.3V

FRC Block

FRC Block

X-tal

12MHz

DDR2 (1Gbit)

DDR2 (1Gbit)

NAND Flash

(512Mbit)

Digital AMP

NTP3100L

NVRAM

Elpida/Hynix

Elpida/Hynix

Reset Switch

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

Reset IC

X-tal

54MHz

SCL, SDA_3.3V

CLK,TDI,TDO,MS,RST

MICOM

(MTV416GMF)

JTAG

X-tal

24MHz

LGE Internal Use Only

4. Analog TV Video Trouble Shooting

Check RF Cable

Y

Check Tuner(TU101) Power

(5.0V, 2.5V, 3.3V, 1.2V)

Y

Check CVBS Signal

TU101 #7 Pin and R118

Y

N

N

Replace one of IC101, IC102 at

Jack Board or IC803/ Q812/ IC804/

IC809/Q809/+5V_ST and +12V of

P801 at Main Board& Recheck

Maybe Tuner(TU101) has problems

Check cable between P203 at Jack

Board and P701 at Main Baord

Y

Check CVBS Signal

R703 and C110 at Main Baord

Y

Maybe BCM3556(IC100)

has problems

N

N

Maybe Cable Pin has problems

Replace one of R703 and C110

& Recheck

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

LGE Internal Use Only

5. Component Video Trouble Shooting

Overall Block Diagram

Overall Block Diagram

for Brazil DTV (LH70))

for Brazil DTV (

VA1G5BF8005

TU_SCLK, TU_SDATA, TU_SYNC

TU_CVBS_IN
TU_SIF

SDA0/SCL0_3.3V

RF_Switch, Gain_Switch

LVDS

DDR2(256Mbit)

Qimonda/Hynix

FRC IC

(MST7323S)

LCD Module

(FHD, 120Hz)

JACK BACK

JACK BACK

at REAR

at REAR

AV1
AV2

Component 1
Component 2

D-sub RGB

Audio L/R (for RGB)

HDMI 1
HDMI 2
HDMI 3

Digital Audio (Optic)

RS-232C (Ctrl./SVC)

Bluetooth Module

USB

CVBS, L/R, AV_DET

SIDE_CVBS, SIDE_L/R, SIDE_DET

Y Pb Pr, L/R, DET
Y Pb Pr, L/R, DET

RGB/H/V

Audio L/R

3x1

HDMI Switch

SPDIF

RX/TX RX/TX

MAX3232

DP1/DM1

DP2/DM2

O.C. Protector

+5V+5V

USB_DM1
USB_DP1

USB_DM2
USB_DP2

BCM3556

BCM3556

(Brazil)

(Brazil)

DDR_Data[0:15], DQS, DM …

Addr.[0:13], ctrl. data

Data[16:31]

Data [0 … 7]

CS ,RE,WE……

I2S

SCL, SDA_3.3V

FRC Block

FRC Block

X-tal

12MHz

DDR2 (1Gbit)

DDR2 (1Gbit)

NAND Flash

(512Mbit)

Digital AMP

NTP3100L

NVRAM

Elpida/Hynix

Elpida/Hynix

Reset Switch

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

Reset IC

X-tal

54MHz

SCL, SDA_3.3V

CLK,TDI,TDO,MS,RST

MICOM

(MTV416GMF)

JTAG

X-tal

24MHz

LGE Internal Use Only

5. Component Video Trouble Shooting

Check Signal Format

Is it supported signal?

Y

Check Component Cable

Y

Check Component Jack JK209 at

Jack Board

Y

Check Component Signal

R292, R293, R294
R295, R296, R297

at Jack Board

Y

N

N

Replace Jack at Jack board

R292, R293, R294, R295, R296, R297

L212, L213, L214, L215, L216, L217

Replace one of

& Recheck

Check cable between P203 at Jack

Board and P701 at Main Baord

Y

Check Component Signal

C130, C131, C132
C133, C134. C135

Y

Maybe BCM3556(IC100)

has problems

N

N

Maybe Cable Pin has problems

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

Replace it

LGE Internal Use Only

6. RGB Video Trouble Shooting

Overall Block Diagram
for Brazil DTV (LH70)

TU_SCLK, TU_SDATA, TU_SYNC

VA1G5BF8005

RF_Switch, Gain_Switch

TU_CVBS_IN
TU_SIF

SDA0/SCL0_3.3V

LVDS

DDR2(256Mbit)

Qimonda/Hynix

FRC IC

(MST7323S)

LCD Module

(FHD, 120Hz)

JACK BACK

JACK BACK

at REAR

at REAR

AV1
AV2

Component 1
Component 2

D-sub RGB

Audio L/R (for RGB)

HDMI 1
HDMI 2
HDMI 3

Digital Audio (Optic)

RS-232C (Ctrl./SVC)

Bluetooth Module

USB

CVBS, L/R, AV_DET

SIDE_CVBS, SIDE_L/R, SIDE_DET

Y Pb Pr, L/R, DET
Y Pb Pr, L/R, DET

RGB/H/V

Audio L/R

3x1

HDMI Switch

SPDIF

RX/TX RX/TX

MAX3232

DP1/DM1

DP2/DM2

O.C. Protector

+5V+5V

USB_DM1
USB_DP1

USB_DM2
USB_DP2

BCM3556

BCM3556

(Brazil)

(Brazil)

DDR_Data[0:15], DQS, DM …

Addr.[0:13], ctrl. data

Data[16:31]

Data [0 … 7]

CS ,RE,WE……

I2S

SCL, SDA_3.3V

FRC Block

FRC Block

X-tal

12MHz

DDR2 (1Gbit)

DDR2 (1Gbit)

NAND Flash

(512Mbit)

Digital AMP

NTP3100L

NVRAM

Elpida/Hynix

Elpida/Hynix

Reset Switch

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

Reset IC

X-tal

54MHz

SCL, SDA_3.3V

CLK,TDI,TDO,MS,RST

MICOM

(MTV416GMF)

JTAG

X-tal

24MHz

LGE Internal Use Only

6. RGB Video Trouble Shooting

Check Signal Format

Is it supported signal?

Y

Check RGB Cable

Y

Check RGB Jack JK208 at Jack

Board

Y

Check RGB Signal

L207, L208, L209 at Jack Board

Y

N

N

Replace JK208 at Jack board

Replace one of L207, L208, L209

at Jack Board & Recheck

Check cable between P203 at Jack

Board and P701 at Main Board

Y

Check RGB Signal

C127, C128, C129 at Main Board

Y

Maybe BCM3556(IC100)

has problems

N

N

Maybe Cable Pin has problems

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

Replace it

LGE Internal Use Only

7. AV Video Trouble Shooting

Overall Block Diagram
for Brazil DTV (LH70)

TU_SCLK, TU_SDATA, TU_SYNC

VA1G5BF8005

RF_Switch, Gain_Switch

TU_CVBS_IN
TU_SIF

SDA0/SCL0_3.3V

LVDS

DDR2(256Mbit)

Qimonda/Hynix

FRC IC

(MST7323S)

LCD Module

(FHD, 120Hz)

JACK BACK

JACK BACK

at REAR

at REAR

AV1
AV2

Component 1
Component 2

D-sub RGB

Audio L/R (for RGB)

HDMI 1
HDMI 2
HDMI 3

Digital Audio (Optic)

RS-232C (Ctrl./SVC)

Bluetooth Module

USB

CVBS, L/R, AV_DET

SIDE_CVBS, SIDE_L/R, SIDE_DET

Y Pb Pr, L/R, DET
Y Pb Pr, L/R, DET

RGB/H/V

Audio L/R

3x1

HDMI Switch

SPDIF

RX/TX RX/TX

MAX3232

DP1/DM1

DP2/DM2

O.C. Protector

+5V+5V

USB_DM1
USB_DP1

USB_DM2
USB_DP2

BCM3556

BCM3556

(Brazil)

(Brazil)

DDR_Data[0:15], DQS, DM …

Addr.[0:13], ctrl. data

Data[16:31]

Data [0 … 7]

CS ,RE,WE……

I2S

SCL, SDA_3.3V

FRC Block

FRC Block

X-tal

12MHz

DDR2 (1Gbit)

DDR2 (1Gbit)

NAND Flash

(512Mbit)

Digital AMP

NTP3100L

NVRAM

Elpida/Hynix

Elpida/Hynix

Reset Switch

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

Reset IC

X-tal

54MHz

SCL, SDA_3.3V

CLK,TDI,TDO,MS,RST

MICOM

(MTV416GMF)

JTAG

LGE Internal Use Only

X-tal

24MHz

7. AV Video Trouble Shooting

Check Signal Format

Is it supported signal?

Y

Check AV Cable

Y

Y

Check AV Jack JK209 at Jack

Board

Y

Check AV Signal

R203, R204, R214, R215 at Jack

Board

Y

N

N

Replace JK209 at Jack board

Replace one of R203, R204, R214,

R215 at Jack Board

& Recheck

Check cable between P203 at Jack

Board and P701 at Main Board

Y

Check AV Signal

C124, C125 at Main Board

Y

Maybe BCM3556(IC100)

has problems

N

N

Maybe Cable Pin has problems

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

Replace it

LGE Internal Use Only

8. HDMI Video Trouble Shooting

Overall Block Diagram
for Brazil DTV (LH70)

TU_SCLK, TU_SDATA, TU_SYNC

VA1G5BF8005

RF_Switch, Gain_Switch

TU_CVBS_IN
TU_SIF

SDA0/SCL0_3.3V

LVDS

DDR2(256Mbit)

Qimonda/Hynix

FRC IC

(MST7323S)

LCD Module

(FHD, 120Hz)

JACK BACK

JACK BACK

at REAR

at REAR

AV1

AV2

Component 1
Component 2

D-sub RGB

Audio L/R (for RGB)

HDMI 1
HDMI 2
HDMI 3

Digital Audio (Optic)

RS-232C (Ctrl./SVC)

Bluetooth Module

USB

CVBS, L/R, AV_DET

SIDE_CVBS, SIDE_L/R, SIDE_DET

Y Pb Pr, L/R, DET
Y Pb Pr, L/R, DET

RGB/H/V

Audio L/R

3x1

HDMI Switch

SPDIF

RX/TX RX/TX

MAX3232

DP1/DM1

DP2/DM2

O.C. Protector

+5V+5V

USB_DM1
USB_DP1

USB_DM2
USB_DP2

BCM3556

BCM3556

(Brazil)

(Brazil)

DDR_Data[0:15], DQS, DM …

Addr.[0:13], ctrl. data

Data[16:31]

Data [0 … 7]

CS ,RE,WE……

I2S

SCL, SDA_3.3V

FRC Block

FRC Block

X-tal

12MHz

DDR2 (1Gbit)

DDR2 (1Gbit)

NAND Flash

(512Mbit)

Digital AMP

NTP3100L

NVRAM

Elpida/Hynix

Elpida/Hynix

Reset Switch

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

Reset IC

X-tal

54MHz

SCL, SDA_3.3V

CLK,TDI,TDO,MS,RST

MICOM

(MTV416GMF)

JTAG

X-tal

24MHz

LGE Internal Use Only

8. HDMI Video Trouble Shooting

Check Signal Format

Is it supported signal?

Y

Check HDMI Cable

Y

Check HDMI Jack

JK600, JK601, JK602

Y

Check IC601 Voltage Level
+1.8V_HDMI, +5.0V_HDMI

Y

Check I2C Signal

R624/R625/R157/R158

Y

N

N

N

Replace Jack

Replace one of

L601/L602/R619/R615

Replace It & Recheck

Maybe BCM3556(IC100)

has problems

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

LGE Internal Use Only

9. All Source Audio Trouble Shooting

Overall Block Diagram
for Brazil DTV (LH70)

VA1G5BF8005

TU_SCLK, TU_SDATA, TU_SYNC

TU_CVBS_IN
TU_SIF

SDA0/SCL0_3.3V

RF_Switch, Gain_Switch

LVDS

DDR2(256Mbit)

Qimonda/Hynix

FRC IC

(MST7323S)

LCD Module

(FHD, 120Hz)

JACK BACK

JACK BACK

at REAR

at REAR

AV1
AV2

Component 1
Component 2

D-sub RGB

Audio L/R (for RGB)

HDMI 1
HDMI 2
HDMI 3

Digital Audio (Optic)

RS-232C (Ctrl./SVC)

Bluetooth Module

USB

CVBS, L/R, AV_DET

SIDE_CVBS, SIDE_L/R, SIDE_DET

Y Pb Pr, L/R, DET
Y Pb Pr, L/R, DET

RGB/H/V

Audio L/R

3x1

HDMI Switch

SPDIF

RX/TX RX/TX

MAX3232

DP1/DM1

DP2/DM2

O.C. Protector

+5V+5V

USB_DM1
USB_DP1

USB_DM2
USB_DP2

BCM3556

BCM3556

(Brazil)

(Brazil)

DDR_Data[0:15], DQS, DM …

Addr.[0:13], ctrl. data

Data[16:31]

Data [0 … 7]

CS ,RE,WE……

I2S

SCL, SDA_3.3V

FRC Block

FRC Block

X-tal

12MHz

DDR2 (1Gbit)

DDR2 (1Gbit)

NAND Flash

(512Mbit)

Digital AMP

NTP3100L

NVRAM

Elpida/Hynix

Elpida/Hynix

Reset Switch

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

Reset IC

X-tal

54MHz

SCL, SDA_3.3V

CLK,TDI,TDO,MS,RST

MICOM

(MTV416GMF)

JTAG

X-tal

24MHz

LGE Internal Use Only

9. All Source Audio Trouble Shooting

Make sure you can’t hear any audio

Y

Check Speaker

Y

Check Connector P501

Y

Check Signal

L504, L505

Y

Check IC501 Power

24V, 3.3V, 1.8V

L511, L503, L501

Y

Check BCM3556 I2S Output

R505, R506, R507

Y

Maybe BCM3556(IC100)

has problems

N

N

N

N

N

Replace Speaker

Replace Connector

Replace one of

L508/L509/L510/L507/L504/L505

& Recheck

Replace one of

L511L503/L501 and IC503

& Recheck

Replace It & Recheck

N

N

N

N

Maybe NTP3100 has problems.

Replace It

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

LGE Internal Use Only

10. Digital TV Audio Trouble Shooting

Overall Block Diagram
for Brazil DTV (LH70)

VA1G5BF8005

TU_SCLK, TU_SDATA, TU_SYNC

RF_Switch, Gain_Switch

TU_CVBS_IN
TU_SIF

SDA0/SCL0_3.3V

LVDS

DDR2(256Mbit)

Qimonda/Hynix

FRC IC

(MST7323S)

LCD Module

(FHD, 120Hz)

JACK BACK

JACK BACK

at REAR

at REAR

AV1
AV2

Component 1
Component 2

D-sub RGB

Audio L/R (for RGB)

HDMI 1
HDMI 2
HDMI 3

Digital Audio (Optic)

RS-232C (Ctrl./SVC)

Bluetooth Module

USB

CVBS, L/R, AV_DET

SIDE_CVBS, SIDE_L/R, SIDE_DET

Y Pb Pr, L/R, DET
Y Pb Pr, L/R, DET

RGB/H/V

Audio L/R

3x1

HDMI Switch

SPDIF

RX/TX RX/TX

MAX3232

DP1/DM1

DP2/DM2

O.C. Protector

+5V+5V

USB_DM1
USB_DP1

USB_DM2
USB_DP2

BCM3556

BCM3556

(Brazil)

(Brazil)

DDR_Data[0:15], DQS, DM …

Addr.[0:13], ctrl. data

Data[16:31]

Data [0 … 7]

CS ,RE,WE……

I2S

SCL, SDA_3.3V

FRC Block

FRC Block

X-tal

12MHz

DDR2 (1Gbit)

DDR2 (1Gbit)

NAND Flash

(512Mbit)

Digital AMP

NTP3100L

NVRAM

Elpida/Hynix

Elpida/Hynix

Reset Switch

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

Reset IC

X-tal

54MHz

SCL, SDA_3.3V

CLK,TDI,TDO,MS,RST

MICOM

(MTV416GMF)

JTAG

X-tal

24MHz

LGE Internal Use Only

10. Digital TV Audio Trouble Shooting

Check video output

Y

Follow procedure All source audio

trouble shooting

N

N

Follow procedure digital TV video

trouble shooting

Maybe BCM3556 internal audio

DSP has problems. Replace It

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

LGE Internal Use Only

11. Analog TV Audio Trouble Shooting

Overall Block Diagram
for Brazil DTV (LH70)

VA1G5BF8005

TU_SCLK, TU_SDATA, TU_SYNC

RF_Switch, Gain_Switch

TU_CVBS_IN
TU_SIF

SDA0/SCL0_3.3V

LVDS

DDR2(256Mbit)

Qimonda/Hynix

FRC IC

(MST7323S)

LCD Module

(FHD, 120Hz)

JACK BACK

JACK BACK

at REAR

at REAR

AV1
AV2

Component 1
Component 2

D-sub RGB

Audio L/R (for RGB)

HDMI 1
HDMI 2
HDMI 3

Digital Audio (Optic)

RS-232C (Ctrl./SVC)

Bluetooth Module

USB

CVBS, L/R, AV_DET

SIDE_CVBS, SIDE_L/R, SIDE_DET

Y Pb Pr, L/R, DET
Y Pb Pr, L/R, DET

RGB/H/V

Audio L/R

3x1

HDMI Switch

SPDIF

RX/TX RX/TX

MAX3232

DP1/DM1

DP2/DM2

O.C. Protector

+5V+5V

USB_DM1
USB_DP1

USB_DM2
USB_DP2

BCM3556

BCM3556

(Brazil)

(Brazil)

DDR_Data[0:15], DQS, DM …

Addr.[0:13], ctrl. data

Data[16:31]

Data [0 … 7]

CS ,RE,WE……

I2S

SCL, SDA_3.3V

FRC Block

FRC Block

X-tal

12MHz

DDR2 (1Gbit)

DDR2 (1Gbit)

NAND Flash

(512Mbit)

Digital AMP

NTP3100L

NVRAM

Elpida/Hynix

Elpida/Hynix

Reset Switch

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

Reset IC

X-tal

54MHz

SCL, SDA_3.3V

CLK,TDI,TDO,MS,RST

MICOM

(MTV416GMF)

JTAG

X-tal

24MHz

LGE Internal Use Only

11. Analog TV Audio Trouble Shooting

Check video output

Y

Check Tuner(TU101) Power

(5.0V, 2.5V, 3.3V, 1.2V)

Y

Check SIF Signal

TU101 #6 Pin and R118 at Jack

Board

Y

Check SIF Signal

IC501 #4 Pin

Y

Check SIF Signal

C128 at Jack Board

Y

Check cable between P203 at Jack

Board and P701 at Main Baord

Y

N

N

N

N

N

N

Follow procedure analog TV video

trouble shooting

Replace one of IC101, IC102 at

Jack Board or IC803/ Q812/ IC804/

IC809/Q809/+5V_ST and +12V of

P801 at Main Board& Recheck

Maybe Tuner(TU101) has problems

Replace one of

L505/L514/C502/C511/Q500/Q502

IC501 & Recheck

Replace one of C123, R120, R121,

R124, L109, Q101, C128

& Recheck

Maybe Cable Pin has problems

Check SIF Signal

R704 and C106 at Main Board

Y

Follow procedure All source audio

trouble shooting

N

N

Replace one of R704/R128/C106

Maybe BCM3556 audio block has

problems. Replace It

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

& Recheck

LGE Internal Use Only

12. Component / RGB / AV Audio Trouble Shooting

Overall Block Diagram
for Brazil DTV (LH70)

VA1G5BF8005

TU_SCLK, TU_SDATA, TU_SYNC

TU_CVBS_IN
TU_SIF

SDA0/SCL0_3.3V

RF_Switch, Gain_Switch

LVDS

DDR2(256Mbit)

Qimonda/Hynix

FRC IC

(MST7323S)

LCD Module

(FHD, 120Hz)

JACK BACK

JACK BACK

at REAR

at REAR

AV1
AV2

Component 1
Component 2

D-sub RGB

Audio L/R (for RGB)

HDMI 1
HDMI 2
HDMI 3

Digital Audio (Optic)

RS-232C (Ctrl./SVC)

Bluetooth Module

USB

CVBS, L/R, AV_DET

SIDE_CVBS, SIDE_L/R, SIDE_DET

Y Pb Pr, L/R, DET
Y Pb Pr, L/R, DET

RGB/H/V

Audio L/R

3x1

HDMI Switch

SPDIF

RX/TX RX/TX

MAX3232

DP1/DM1

DP2/DM2

O.C. Protector

+5V+5V

USB_DM1
USB_DP1

USB_DM2
USB_DP2

BCM3556

BCM3556

(Brazil)

(Brazil)

DDR_Data[0:15], DQS, DM …

Addr.[0:13], ctrl. data

Data[16:31]

Data [0 … 7]

CS ,RE,WE……

I2S

SCL, SDA_3.3V

FRC Block

FRC Block

X-tal

12MHz

DDR2 (1Gbit)

DDR2 (1Gbit)

NAND Flash

(512Mbit)

Digital AMP

NTP3100L

NVRAM

Elpida/Hynix

Elpida/Hynix

Reset Switch

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

Reset IC

X-tal

54MHz

SCL, SDA_3.3V

CLK,TDI,TDO,MS,RST

MICOM

(MTV416GMF)

JTAG

X-tal

24MHz

LGE Internal Use Only

12. Component / RGB / AV Audio Trouble Shooting

Check Video Output

Y

Check Jack JK208/JK209

Y

Check Signal
R235, R236 (Comp1)
R216, R217 (Comp2)

R249, R250 (RGB)

R219, R221 (AV1)
R218, R220 (AV2)

at Jack Board

Y

Check cable between P203 at Jack

Board and P701 at Main Baord

Y

Check Signal

C206, C210, C211, C232, C220,

C221, C224, C225, C226, C227

at Main Board

Y

Follow procedure All source audio

trouble shooting

N

N

N

N

N

N

Follow procedure external input

video trouble shooting

Replace Jack

Replace one of
R235/R236/C231/C232 (Comp1)
R216/R217/C207/C208 (Comp2)

R219/R221/C210/C212 (AV1)
R218/R220/C209/C211 (AV2)
R249/R250/C246/C247 (RGB)

& Recheck at Jack Board

Maybe Cable Pin has problems

Replace one of
R215/R228/C211/C232 (Comp1)
R229/R230/C220/C221 (Comp2)

R204/R214/C206/C210 (AV1)
R231/R232/C224/C225 (AV2)
R233/R234/C226/C227 (RGB)

& Recheck at Main Board

Maybe BCM3556 audio block has

problems. Replace It

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

LGE Internal Use Only

13. HDMI Audio Trouble Shooting

Overall Block Diagram
for Brazil DTV (LH70)

VA1G5BF8005

TU_SCLK, TU_SDATA, TU_SYNC

TU_CVBS_IN
TU_SIF

SDA0/SCL0_3.3V

RF_Switch, Gain_Switch

LVDS

DDR2(256Mbit)

Qimonda/Hynix

FRC IC

(MST7323S)

LCD Module

(FHD, 120Hz)

JACK BACK

JACK BACK

at REAR

at REAR

AV1
AV2

Component 1
Component 2

D-sub RGB

Audio L/R (for RGB)

HDMI 1
HDMI 2
HDMI 3

Digital Audio (Optic)

RS-232C (Ctrl./SVC)

Bluetooth Module

USB

CVBS, L/R, AV_DET

SIDE_CVBS, SIDE_L/R, SIDE_DET

Y Pb Pr, L/R, DET
Y Pb Pr, L/R, DET

RGB/H/V

Audio L/R

3x1

HDMI Switch

SPDIF

RX/TX RX/TX

MAX3232

DP1/DM1

DP2/DM2

O.C. Protector

+5V+5V

USB_DM1
USB_DP1

USB_DM2
USB_DP2

BCM3556

BCM3556

(Brazil)

(Brazil)

DDR_Data[0:15], DQS, DM …

Addr.[0:13], ctrl. data

Data[16:31]

Data [0 … 7]

CS ,RE,WE……

I2S

SCL, SDA_3.3V

FRC Block

FRC Block

X-tal

12MHz

DDR2 (1Gbit)

DDR2 (1Gbit)

NAND Flash

(512Mbit)

Digital AMP

NTP3100L

NVRAM

Elpida/Hynix

Elpida/Hynix

Reset Switch

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

Reset IC

X-tal

54MHz

SCL, SDA_3.3V

CLK,TDI,TDO,MS,RST

MICOM

(MTV416GMF)

JTAG

X-tal

24MHz

LGE Internal Use Only

13. HDMI Audio Trouble Shooting

Check video output

Y

Re-download EDID data

Y

Follow procedure All source audio

trouble shooting

N

N

N

Follow procedure HDMI video

trouble shooting

Replace IC601

Maybe BCM3556 audio block has

problems. Replace it

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

LGE Internal Use Only

14. USB Trouble Shooting

Overall Block Diagram
for Brazil DTV (LH70)

TU_SCLK, TU_SDATA, TU_SYNC

VA1G5BF8005

RF_Switch, Gain_Switch

TU_CVBS_IN
TU_SIF

SDA0/SCL0_3.3V

LVDS

DDR2(256Mbit)

Qimonda/Hynix

FRC IC

(MST7323S)

LCD Module

(FHD, 120Hz)

JACK BACK

JACK BACK

at REAR

at REAR

AV1
AV2

Component 1
Component 2

D-sub RGB

Audio L/R (for RGB)

HDMI 1
HDMI 2
HDMI 3

Digital Audio (Optic)

RS-232C (Ctrl./SVC)

Bluetooth Module

USB

CVBS, L/R, AV_DET

SIDE_CVBS, SIDE_L/R, SIDE_DET

Y Pb Pr, L/R, DET
Y Pb Pr, L/R, DET

RGB/H/V

Audio L/R

3x1

HDMI Switch

SPDIF

RX/TX RX/TX

MAX3232

DP1/DM1

DP2/DM2

O.C. Protector

+5V+5V

USB_DM1
USB_DP1

USB_DM2
USB_DP2

BCM3556

BCM3556

(Brazil)

(Brazil)

DDR_Data[0:15], DQS, DM …

Addr.[0:13], ctrl. data

Data[16:31]

Data [0 … 7]

CS ,RE,WE……

I2S

SCL, SDA_3.3V

FRC Block

FRC Block

X-tal

12MHz

DDR2 (1Gbit)

DDR2 (1Gbit)

NAND Flash

(512Mbit)

Digital AMP

NTP3100L

NVRAM

Elpida/Hynix

Elpida/Hynix

Reset Switch

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

Reset IC

X-tal

54MHz

SCL, SDA_3.3V

CLK,TDI,TDO,MS,RST

MICOM

(MTV416GMF)

JTAG

X-tal

24MHz

LGE Internal Use Only

14. USB Trouble Shooting

Check USB 2.0 Cable

Y

Check USB device

If devuce is 2.5 inch HDD,

Check power adaptor

Y

Check P704

Y

Check 5V voltage level at L703

Y

Maybe BCM3556(IC100)

has problems. Replace It.

N

N

Replace Jack

Replace one of

IC701/L703/IC806/Q810/L819

& Recheck

• Exception

- USB power could be disabled by inrushing current

- In this case, remove the device and try to reboot the TV (AC power off/on)

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

LGE Internal Use Only

14. Bluetooth Trouble Shooting

Overall Block Diagram
for Brazil DTV (LH70)

TU_SCLK, TU_SDATA, TU_SYNC

VA1G5BF8005

RF_Switch, Gain_Switch

TU_CVBS_IN
TU_SIF

SDA0/SCL0_3.3V

LVDS

DDR2(256Mbit)

Qimonda/Hynix

FRC IC

(MST7323S)

LCD Module

(FHD, 120Hz)

JACK BACK

JACK BACK

at REAR

at REAR

AV1
AV2

Component 1
Component 2

D-sub RGB

Audio L/R (for RGB)

HDMI 1
HDMI 2
HDMI 3

Digital Audio (Optic)

RS-232C (Ctrl./SVC)

Bluetooth Module

USB

CVBS, L/R, AV_DET

SIDE_CVBS, SIDE_L/R, SIDE_DET

Y Pb Pr, L/R, DET
Y Pb Pr, L/R, DET

RGB/H/V

Audio L/R

3x1

HDMI Switch

SPDIF

RX/TX RX/TX

MAX3232

DP1/DM1

DP2/DM2

O.C. Protector

+5V+5V

USB_DM1
USB_DP1

USB_DM2
USB_DP2

BCM3556

BCM3556

(Brazil)

(Brazil)

DDR_Data[0:15], DQS, DM …

Addr.[0:13], ctrl. data

Data[16:31]

Data [0 … 7]

CS ,RE,WE……

I2S

SCL, SDA_3.3V

FRC Block

FRC Block

X-tal

12MHz

DDR2 (1Gbit)

DDR2 (1Gbit)

NAND Flash

(512Mbit)

Digital AMP

NTP3100L

NVRAM

Elpida/Hynix

Elpida/Hynix

Reset Switch

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

Reset IC

X-tal

54MHz

SCL, SDA_3.3V

CLK,TDI,TDO,MS,RST

MICOM

(MTV416GMF)

JTAG

X-tal

24MHz

LGE Internal Use Only

14. USB Trouble Shooting

Check Bluetooth Module

Y

Check Cable between Bluetooth

and Main Board

Y

Check P705

Y

Check Signal

R3022, R3023

Y

Maybe BCM3556(IC100)

has problems. Replace It.

N

N

N

N

Replace Bluetooth

Replace cable

Replace Jack

Replace one of

R3022, R3023

& Recheck

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

LGE Internal Use Only

15. Digital TV Recording Fail Trouble Shooting

Overall Block Diagram
for Brazil DTV (LH70)

VA1G5BF8005

TU_SCLK, TU_SDATA, TU_SYNC

TU_CVBS_IN
TU_SIF

SDA0/SCL0_3.3V

RF_Switch, Gain_Switch

LVDS

DDR2(256Mbit)

Qimonda/Hynix

FRC IC

(MST7323S)

LCD Module

(FHD, 120Hz)

JACK BACK

JACK BACK

at REAR

at REAR

AV1
AV2

Component 1
Component 2

D-sub RGB

Audio L/R (for RGB)

HDMI 1
HDMI 2
HDMI 3

Digital Audio (Optic)

RS-232C (Ctrl./SVC)

Bluetooth Module

USB

CVBS, L/R, AV_DET

SIDE_CVBS, SIDE_L/R, SIDE_DET

Y Pb Pr, L/R, DET
Y Pb Pr, L/R, DET

RGB/H/V

Audio L/R

3x1

HDMI Switch

SPDIF

RX/TX RX/TX

MAX3232

DP1/DM1

DP2/DM2

O.C. Protector

+5V+5V

USB_DM1
USB_DP1

USB_DM2
USB_DP2

BCM3556

BCM3556

(Brazil)

(Brazil)

DDR_Data[0:15], DQS, DM …

Addr.[0:13], ctrl. data

Data[16:31]

Data [0 … 7]

CS ,RE,WE……

I2S

SCL, SDA_3.3V

FRC Block

FRC Block

X-tal

12MHz

DDR2 (1Gbit)

DDR2 (1Gbit)

NAND Flash

(512Mbit)

Digital AMP

NTP3100L

NVRAM

Elpida/Hynix

Elpida/Hynix

Reset Switch

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

Reset IC

X-tal

54MHz

SCL, SDA_3.3V

CLK,TDI,TDO,MS,RST

MICOM

(MTV416GMF)

JTAG

X-tal

24MHz

LGE Internal Use Only

15. Digital TV Recording Fail Trouble Shooting

Check video/audio output

Y

Check USB

N

N

Follow procedure digital TV

video/audio trouble shooting

Follow procedure USB trouble

shooting

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

LGE Internal Use Only

18. Digital TV Video Trouble Shooting while recording (Watch & Record)

Overall Block Diagram
for Brazil DTV (LH70)

VA1G5BF8005

TU_SCLK, TU_SDATA, TU_SYNC

TU_CVBS_IN
TU_SIF

SDA0/SCL0_3.3V

RF_Switch, Gain_Switch

LVDS

DDR2(256Mbit)

Qimonda/Hynix

FRC IC

(MST7323S)

LCD Module

(FHD, 120Hz)

JACK BACK

JACK BACK

at REAR

at REAR

AV1
AV2

Component 1
Component 2

D-sub RGB

Audio L/R (for RGB)

HDMI 1
HDMI 2
HDMI 3

Digital Audio (Optic)

RS-232C (Ctrl./SVC)

Bluetooth Module

USB

CVBS, L/R, AV_DET

SIDE_CVBS, SIDE_L/R, SIDE_DET

Y Pb Pr, L/R, DET
Y Pb Pr, L/R, DET

RGB/H/V

Audio L/R

3x1

HDMI Switch

SPDIF

RX/TX RX/TX

MAX3232

DP1/DM1

DP2/DM2

O.C. Protector

+5V+5V

USB_DM1
USB_DP1

USB_DM2
USB_DP2

BCM3556

BCM3556

(Brazil)

(Brazil)

DDR_Data[0:15], DQS, DM …

Addr.[0:13], ctrl. data

Data[16:31]

Data [0 … 7]

CS ,RE,WE……

I2S

SCL, SDA_3.3V

FRC Block

FRC Block

X-tal

12MHz

DDR2 (1Gbit)

DDR2 (1Gbit)

NAND Flash

(512Mbit)

Digital AMP

NTP3100L

NVRAM

Elpida/Hynix

Elpida/Hynix

Reset Switch

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

Reset IC

X-tal

54MHz

SCL, SDA_3.3V

CLK,TDI,TDO,MS,RST

MICOM

(MTV416GMF)

JTAG

X-tal

24MHz

LGE Internal Use Only

18. Digital TV Video Trouble Shooting while recording (Watch & Record)

Check RF Cable

Y

Check video/audio output

Y

Check USB

Y

Check Watch

Y

Check HDD (User)

N

N

N

N

Follow procedure digital TV

video/audio trouble shooting

Follow procedure USB trouble

shooting

Follow procedure OSD trouble

shooting

Replace Jack

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

LGE Internal Use Only

19. Digital TV Audio Trouble Shooting while recording (Watch & Record)

Overall Block Diagram
for Brazil DTV (LH70)

VA1G5BF8005

TU_SCLK, TU_SDATA, TU_SYNC

TU_CVBS_IN
TU_SIF

SDA0/SCL0_3.3V

RF_Switch, Gain_Switch

LVDS

DDR2(256Mbit)

Qimonda/Hynix

FRC IC

(MST7323S)

LCD Module

(FHD, 120Hz)

JACK BACK

JACK BACK

at REAR

at REAR

AV1
AV2

Component 1
Component 2

D-sub RGB

Audio L/R (for RGB)

HDMI 1
HDMI 2
HDMI 3

Digital Audio (Optic)

RS-232C (Ctrl./SVC)

Bluetooth Module

USB

CVBS, L/R, AV_DET

SIDE_CVBS, SIDE_L/R, SIDE_DET

Y Pb Pr, L/R, DET
Y Pb Pr, L/R, DET

RGB/H/V

Audio L/R

3x1

HDMI Switch

SPDIF

RX/TX RX/TX

MAX3232

DP1/DM1

DP2/DM2

O.C. Protector

+5V+5V

USB_DM1
USB_DP1

USB_DM2
USB_DP2

BCM3556

BCM3556

(Brazil)

(Brazil)

DDR_Data[0:15], DQS, DM …

Addr.[0:13], ctrl. data

Data[16:31]

Data [0 … 7]

CS ,RE,WE……

I2S

SCL, SDA_3.3V

FRC Block

FRC Block

X-tal

12MHz

DDR2 (1Gbit)

DDR2 (1Gbit)

NAND Flash

(512Mbit)

Digital AMP

NTP3100L

NVRAM

Elpida/Hynix

Elpida/Hynix

Reset Switch

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

Reset IC

X-tal

54MHz

SCL, SDA_3.3V

CLK,TDI,TDO,MS,RST

MICOM

(MTV416GMF)

JTAG

LGE Internal Use Only

X-tal

24MHz

19. Digital TV Audio Trouble Shooting while recording (Watch & Record)

Check video output

Y

Follow procedure All source audio

trouble shooting

N

N

Follow procedure digital TV video

trouble shooting while recording

(watch & record)

Maybe BCM3556 internal audio

DSP has problems. Replace It

Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes

LGE Internal Use Only