Page 1
North/Latin America http://aic.lgservice.com
Europe/Africa http://eic.lgservice.com
Asia/Oceania http://biz.lgservice.com
液晶电视机
维修手册
基板: LC91T
仅限内部使用
型号名: 47SL80YD
MODEL
MODEL
注意
维修电视机以前请仔细阅读本维修手册。
P/NO : MFL37893450 (0909-REV00)
47SL80YD-CA
中国制造
Page 2
目 录
目录............................................................................................................. 2
安全预防措施 ...............................................................................................3
规格性能.......................................................................................................6
调整说明.......................................................................................................9
故障诊断.....................................................................................................13
方框图.........................................................................................................16
分解图 ......................................................................................................17
SVC. SHEET ...............................................................................................
版权归LG电子所有
仅限培训和售后服务使用
- 2 -
仅限LG电子内部使用
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注：要根据改善通知来调整规格和其它事项。
No. Item Specification Remark
1 Screen Device 47” wide Color Display module LCD
2 Aspect Ratio 16:9
3 LCD Module 47” TFT LCD FHD LGD(FHD)
4 Storage Environment Temp.:-20 ~ 60 deg
Humidity : 10 ~ 90 %
5 Input Voltage AC100-240V~, 50/60Hz
6 Power Consumption Power on (Blue) LCD(Module) + Backlight(Lamp)
Typ : 230W, Max : 270W (Typ:1/8W non-clipped max. audio signal
Max: max audio signal & Input voltage
100Vac/60Hz, Color bar signal)
7 Module Size 1075.6 (H) x 620.8 (V) x 33.8 mm(D)
8 Pixel Pitch 0.5415(H) x 0.5415mm(V)
9 Back Light CCFL
10 Display Colors 1.06Billion(FHD LGD)
11 Coating 3H(Hard coating), AG
规格性能
1. 适用范围
本规格适用于使用LＣ９１Ｔ的液晶彩色电视机。
2. 测试条件
无特殊要求的情况下，试验标准如下：
(1) 温度: 25 ± 5°C(77 ± 9°F), CST : 40 ± 5°C
(2) 湿度: 65% ± 10%
(3) 电压：标准输入电压 (100-240V@50/60Hz)
* 每个型号的标准输入电压都在产品上有标注。
(4) 每个部品的规格和性能都与BOM中相应的P/NO.
的图纸和性能相同。
(5) 调整前，接收器必须先操作５分钟。
3. 测试方法
(1) 性能：根据LGE TV测试标准
(2) 其它规格要求
安全 : CE, IEC 规格
EMC: CE, IEC
4. 电子规格
版权归LG电子所有
仅限培训和售后服务使用
- 6 -
仅限LG电子内部使用
Page 7
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45 5
5. 色度和亮度
5.1 模块可视规格
6. Component Video Input (Y, C B/PB, CR/PR)
No
Specification
Remark
Resolution H-freq(kHz) V-freq(Hz)
1. 720x480 15.73 60.00 SDTV,DVD 480i
2. 720x480 15.63 59.94 SDTV,DVD 480i
3. 720x480 31.47 59.94 480p
4. 720x480 31.50 60.00 480p
5. 720x576 15.625 50.00 SDTV,DVD 625 Line
6. 720x576 31.25 50.00 HDTV 576p
7. 1280x720 45.00 50.00 HDTV 720p
8. 1280x720 44.96 59.94 HDTV 720p
9. 1280x720 45.00 60.00 HDTV 720p
10. 1920x1080 31.25 50.00 HDTV 1080i
11. 1920x1080 33.75 60.00 HDTV 1080i
12. 1920x1080 33.72 59.94 HDTV 1080i
13. 1920x1080 56.250 50 HDTV 1080p
14. 1920x1080 67.43/67.5 59.94/60 HDTV 1080p
数字 选项 规格 最小 典型 最大 备注
1. 可视角度<CR>10> Right/Left/Up/Down 89 度数
2. 亮度 亮度 (cd/m )
3. 对比度 CR 1000 1200
4. CIE Color Coordinates White WX 0.279
1) 检测环境标准 (单元为“开”)
2) 稳定的在暗室大约30分钟的 环境.25±2°
3)
特定的值大约在距离LCD表面50cm。
4) Ta=25±2°C, VLCD=12.0V, fV=200Hz, Dclk=74.25MHz VBR_A=1.65V,ExtVBR_B=85%
2
480 600
变化 - 1.3 最大/最小
WY 0.292 Typ
RED Xr 0.638 ±0.03
Yr 0.334
Green Xg 0.290
Yg 0.606
Blue Xb 0.144
Yb 0.064
Page 8
/7 7
No
Specification
Proposed Remark
Resolution H-freq(kHz) V-freq(Hz) Pixel Clock(MHz)
1. 720*400 31.468 70.08 28.321 For only DOS mode
2. 640*480 31.469 59.94 25.17 VESA
Input 848*480
60Hz, 852*480 60Hz
-> 640*480 60Hz Display
3. 800*600 37.879 60.31 40.00 VESA
4. 1024*768 48.363 60.00 65.00 VESA(XGA)
5. 1280*768 47.78 59.87 79.5 WXGA
6. 1360*768 47.72 59.8 84.75 WXGA
7. 1280*1024 63.595 60.0 108.875 SXGA FHD model
8. 1920*1080 66.587 59.93 138.5 WUXGA FHD model
7. RGB (PC)
8. HDMI Input (PC/DTV)
(1) DTV Mode
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1. 720*400 31.468 70.08 28.321 HDCP
2. 640*480 31.469 59.94 25.17 VESA HDCP
3. 800*600 37.879 60.31 40.00 VESA HDCP
4. 1024*768 48.363 60.00 65.00 VESA(XGA) HDCP
5. 1280*768 47.78 59.87 79.5 WXGA HDCP
6. 1360*768 47.72 59.8 84.75 WXGA HDCP
7. 1280*1024 63.595 60.0 108.875 SXGA HDCP
8. 1920*1080 67.5 60 148.5 WUXGA HDCP
(2) PC Mode
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1. 720*480 31.469 /31.5 59.94 /60 27.00/27.03 SDTV 480P
2. 720*576 31.25 50 54 SDTV 576P
3. 1280*720 37.500 50 74.25 HDTV 720P
4. 1280*720 44.96 /45 59.94 /60 74.17/74.25 HDTV 720P
5. 1920*1080 33.72 /33.75 59.94 /60 74.17/74.25 HDTV 1080I
6. 1920*1080 28.125 50.00 74.25 HDTV 1080I
7. 1920*1080 26.97 /27 23.97 /24 74.17/74.25 HDTV 1080P
8. 1920*1080 33.716 /33.75 29.976 /30.00 74.25 HDTV 1080P
9. 1920*1080 56.250 50 148.5 HDTV 1080P
10. 1920*1080 67.43 /67.5 59.94 /60 148.35/148.50 HDTV 1080P
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Page 9
- 9 -
调整说明
1. 适用范围
此规格页适用于所有LCD TV LC91A ch as si s。
2. 指示
1) 此调整根据指定的和必须执行的 命令 ，仅 在许可的情况下
才能变更。
2) 电源调整：自由电压Voltage。
3) 磁性区域条件： Nil.
4) 输入信号单元：产品规格标准
5) 操作准备：大约五分钟(Heat Run)
温度： 25±5ºC
湿度： 65±10%
输入电压： 220V, 60Hz
6) 调整仪器： 颜 色分析器(
CA-210 or CA-110）
信号发生器(MSPG-925L or Equivalent), DDC
调整夹具仪器, SVC遥控装置
7) 按下“IN STOP KEY” - 初始化
3. 主PCB检查流程
* APC - 手册输入,执行APC
* 导入文件下载
(1) 执行ISP程序“Mstar ISP Utility”然后点击
“Config” tab.
(2) 设置如下，然后点击“Auto Detect”和“OK”
如果“Erro r” 出现 ，检 查电脑，夹 具和 电视 的连接。
(3) 点击“Read”,然后现在文件(XXXX.bin)，然后点击“Read”
(4) 点击“ Co nn ect”，如果“C an ’t ”出 现，检 查
电脑，夹具和电视的连接。
(5) 点击“Auto”
(6) 点击“Run”
(7) 下载后，点击“OK”
* USB下载(*.epk文件下载)
(1) 将USB插入USB端口
(2) 自动检测到USB里面的升级文件
- 如果你下载的程序文件版本是低版本,则不工作。如果你下载的
版本高，USB数据自动检测。
(3) 显示“Copying files from memory”
f il ex xx .bi n
(7 ) ... ..... .OK
(6)
(5)
(1)
请检查速度:使用200KHz到400KHz之间的速度
(2)
filexxx.bin
(3) (4)
Case1 : 软件升级
1. 通过USB下载S/W by USB,电视会自动重启。
2. 按下“In-stop”键
3. 按下“Power on”键
4. 功能观察
5. 功能观察后，按“I n-stop”键
Case2 : 装配线上进行功能检查
1. 当电视进入装配线，首先按“In-stop”键
2. 按“Power on”键打开电视
-> 如果你按“Power on”键，电视会自动搜台。
3. 当功能观察后，按“In-stop”键
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Page 10
(4) 升级开始
(5) 升级结束后，电视会自动重启
(6) 如果电视开，检查你升级的版本和选项。
(参考下一页的tool option)
* 如果下载的程序版本高于你的电视里面的版本，电视会丢
失所有的频道信息。这样，你需要重新搜台。
如果频道信
息清除后，生产线上你没有DTV/ATV的测试。
* After downloading, have to adjust Tool Option again.
(1) 按‘ADJ’键，进入‘EZ ADJUST’模式
(2) 选择‘Tool Option(1~4)’然后按‘OK’ 或 ‘
G ’键
(3) 检查数字(每个型号有自己的数字)
* Tool Option4要设置为‘35456’作为工厂默认值。
* ‘IN-STOP’进入船运条件, 自 动设置为
‘2688’
(4) 检查Tool option结束
3.1. ADC流程
• 输入信号: Component 480i
• 信号仪器显示
- Component 480I
型号: 209信号发生器(480i Mode)
PATTERN : 65信号发生器(MSPG-925 SERIES)
* 你不需要连接RGB(D-sub)线。因为ADC在RGB
PC模式下适用
电视内部图案。
• 按‘ADJ’进入‘EZ ADJUST’模式。
‘ADC Calibration’模式。
• 选择‘5. ADC Calibration’后，按‘G’或‘OK’键进入
<注意>按‘POWER ON’或‘P-ONLY’键，打开电视
* ADC Calibration Protocol (RS232)
调整次序
• aa 00 00 [Enter Adjust Mode]
• xb 00 40 [Component1 Input (480i)]
• ad 00 10 [Adjust 480i Comp1]
• xb 00 60 [RGB Input (1024*768)]
• ad 00 10 [Adjust 1024*768 RGB]
• aa 00 90 End Adjust mode
* Required equipment : factory Service Remote control
3.2. 功能检测
(1) 检测显示和声音
- 检测输入和信号 (cf. work instructions)
1) TV
2) AV 1/2
3) COMPONENT 1/2 (480i)
4) RGB (PC : 1024 x 768 @ 60hz)
5) HDMI 1/2/3
6) PC Audio In
* 显示和声音通过遥控器执行
- 10 -
Item CMD1 CMD2 Data0
Adjust A A 0 0 When transfer the ‘Mode In’,
‘Mode In’ Carry the command.
ADC Adjust A D 1 0 Automatically adjustment
(The use of a internal pattern)
调整模式
!" #!"$% &’
() *+,-./012
()!"$%3412
ADC Calibration
ADC Comp 480i
NG
ADC Comp 1080p
NG
ADC RGB
NG
Start Reset
EZ ADJUST
0. Tool Option1
1. Tool Opti on2
2. Tool Option3
3. Tool Option4
4. Country Group
5. ADC Calibration
6. White B alance
7. Test Pattern
8. EDID D/L
9. Sub B/C
Model Tool option1 Tool option2 Tool option3 Tool option4
47SL80YD 34305 3144 55974 38576
Page 11
4.所有装配线流程
4.1. 调整准备
· W/B 仪器条件
CA210 : CH 9, 检测信号 : Inner pattern (85IRE)
· 在inner pattern里，大约五分钟H/run.
（按‘POWER ON’或‘P-ONLY’键打开电视)
* 连接测量工具的图片
(自动控制)
当W/B控制时，内部PATTERN使用。连接自动控制或按调整
R/C POWER ON ->
进入白平衡，pattern会出现
* 自动控制界面和方向
(照明低于10ux).
2) 粘着靠近颜色分析器（CA210)到模块低于10cm，保持它和模块
表面和颜色分析器垂直（80~1
00°）
3) 老化期
- 老化开始后，保持电源开(电
源不终止）和heat-run大约15分钟。
- 使用 ‘no signal’ 或 ‘full white pattern’ 或其他,
检测背光。
• 自动调整图(RS-232C)
** 注意 **
颜色温度: 冷,中,暖.
R Gain/G Gain/ B Gain之一需要保持0xC0,然后调整其他的2个
低于C0.
(当
R/G/B Gain都为C0时, 模块是全
动态范围）
* 手动使用遥控器控制W/B流程
• 按“ADJ”键进入维修模式
• 按“G”键，进入白平衡。
* 所有调整结束后，按 “IN START”键和对比Tool option值和BOM里
面的值， 是否拔掉AC线后
正确。
如果不一样，将其改为和bom一样，然后拔掉AC线。
为纠正其为型号模块的工厂JIG model.
* 全检查过后，按“IN STOP KEY”
4.2. 写DDC EDID(RGB 128Byte )
• 连接D-sub信号线到D-sub端口
• 使用DDC2B协议，写EDID数据到EEPROM(24C02)
• 检测写入的EDID数据正确与否
* For SVC main Ass’y, EDID have to be downloaded to Insert
Process in advance.
4.3. 写DDC EDID(HDMI 256Byte)
• 连接HDMI信号线到HDMI端口
• 使用DDC2B协议，写Write EDID数据到EEPROM(24C02)
• 检测写入的EDID数据正确与否
* For SVC main Ass’y, EDID have to be downloaded to Insert
Process in advance.
- 11 -
Cool 11,000k ºK X=0.276(±0.002)
Y=0.283(±0.002) <Test Signal>
Medium 9,300k ºK X=0.285(±0.002) Inner pattern
Y=0.293(±0.002) (216gray,85IRE)
Warm 6,500k ºK X=0.313(±0.002)
Y=0.329(±0.002)
1) 调整灯光流入的地方
Full White Pattern
COLOR
ANALYZER
TYPE: CA-210
RS-232C Communication
CA-210
RS-232C COMMAND MIN CENTER MAX
[CMD ID DATA] (DEFAULT)
Cool Mid Warm Cool Mid Warm
R Gain jg Ja jd 00 172 192 192 255
G Gain jh Jb je 00 172 192 192 255
B Gain ji Jc jf 00 192 192 172 255
R Cut 64 64 64 128
G Cut 64 64 64 128
B Cut 64 64 64 128
Index Equipment -> Wireless unit Wireless unit -> Set
CMD1 CMD2 Set ID Data CMD1 CMD2 CMD3 CMD4
Start w b 0 00 1F 04 00 00
Gain start w b 0 10 1F 04 00 10
Gain End w b 0 1F 1F 04 00 1F
Offset Start w b 0 20 1F 04 00 20
Offset End w b 0 2F 1F 04 00 2F
End w b 0 FF 1F 04 00 FF
!" #!"$% &’
() *+,-./012
()!"$% 3412
White Balance
Color Temp.
Cool
R-Gain
172
G-Gain
172
B-Gain
192
R-Cut
64
G-Cut
64
B-Cut
64
Test-Pattern
ON
Reset
To Set
EZ ADJUST
0. Tool Option1
1. Tool Option2
2. Tool Option3
3. Tool Option4
4. Country Group
5. ADC Calibration
6. White B alance
7. Test Pattern
8. EDID D/L
9. Sub B/C
Page 12
4.4. EDID数据
1) 所有数据 : HEXA Value
2) 可变数据 :
*: 序列号 : Controlled / Data:01
**: 月 : Controlled / Data:00
***:年 : Controlled
****:Check sum
- 自动下载
• 按“ADJ”键，进入维修模式
• 进入EDID D/L模式
• 按“OK”键进入“START”
<注意> 自动下载时，不要连接HDMI和D-sub线
* EDID data and Model option download (RS232)
- 手动下载
* 注意
1) 使用合适的信号线来下载EDID
- Analog EDID : Pin3 exists
- Digital EDID : Pin3 exists
2) 不同时连接HDMI和D-sub线
3) 使用合适的线来写EDID
4) 分开下载HDMI1, HDMI2, HDMI3，因为每一个数据不一样
* 具体EDID选项如下
Product ID
序列号: 制造线上控制
月,年:制造线上控制:
ex) 月 : ‘09’ -> ‘09’
年 : ‘2006’ -> ‘10’
型号名(Hex):
Checksum: Changeable by total EDID data.
Vendor Specific(HDMI)
Model Name HEX EDID Table DDC Function
FHD Model 0001 01 00 Analog/Digital
MODEL MODEL NAME(HEX)
all 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20
Item CMD1 CMD2 Data0
Download A A 0 0 When transfer the ‘Mode In’,
‘Mode In’ Carry the command.
Download A E 00 10 Automatically Download
(The use of a internal pattern)
D-sub to D-sub DVI-D to HDMI or HDMI to HDMI
For HDMI EDIDFor Analog EDID
!" #!"$% &’
() *+,-./012
()!"$% 3412
EZ ADJUST
0. Tool Option1
1. Tool Option2
2. Tool Option3
3. Tool Option4
4. Country Group
5. ADC Calibration
6. White B alance
7. Test Pattern
8. EDID D/L
9. Sub B/C
HDMI1 NG
HDMI2 NG
HDMI3 NG
RGB NG
Start Reset
EDID D/L
HDMI1 OK
HDMI2 OK
HDMI3 OK
RGB OK
Start Reset
EDID D/L
012 3 4 5 67 8 9A BCD EF
00 00 FF FF FF FF FF FF 00 1E 6D ⓐⓑ
10 ⓒ 01 03 80 73 41 78 0A CF 74 A3 57 4C B0 23
20 09 48 4C A1 08 00 81 80 61 40 45 40 31 40 01 01
30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 45 00 7E 8A 42 00 00 1E 01 1D 00 72 51 D0 1E 20
50 6E 28 55 00 7E 8A 42 00 00 1E 00 00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 ⓓ
70 ⓓ 01 ⓔ
80 02 03 26 F1 4E 10 1F 84 13 05 14 03 02 12 20 21
90 22 15 01 26 15 07 50 09 57 07 ⓕ
A0 ⓕ E3 05 03 01 01 1D 80 18 71 1C 16 20 58 2C
B0 25 00 7E 8A 42 00 00 9E 01 1D 00 80 51 D0 0C 20
C0 40 80 35 00 7E 8A 42 00 00 1E 02 3A 80 18 71 38
D0 2D 40 58 2C 45 00 7E 8A 42 00 00 1E 66 21 50 B0
E0 51 00 1B 30 40 70 36 00 7E 8A 42 00 00 1E 00 00
F0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ⓔ
Item
Manufacturer ID
Version
Revision
Condition
GSM
Digital : 1
Digital : 3
Data(Hex)
1E6D
01
03
012 3 4 5 67 8 9A BCD EF
00 00 FF FF FF FF FF FF 00 1E 6D ⓐⓑ
10 ⓒ 01 03 68 73 41 78 0A CF 74 A3 57 4C B0 23
20 09 48 4C A1 08 00 81 80 61 40 45 40 31 40 01 01
30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 45 00 7E 8A 42 00 00 1E 01 1D 00 72 51 D0 1E 20
50 6E 28 55 00 7E 8A 42 00 00 1E 00 00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 ⓓ
70 ⓓ 00 ⓔ
(1) FHD RGB EDID data
(2) FHD HDMI EDID data
ⓐ
ⓑ
ⓒ
ⓓ
ⓔ
ⓕ
INPUT MODEL NAME(HEX)
HDMI1 67 03 0C 00 10 00 B8 2D
HDMI2 67 03 0C 00 20 00 B8 2D
HDMI3 67 03 0C 00 30 00 B8 2D
HDMI4 67 03 0C 00 40 00 B8 2D
- 12 -
Page 13
- 13 -
LGE Internal Use OnlyCopyright ©2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
4.5. 蓝牙
- 通过svc遥控器(MKJ39170828)按蓝牙键，显示如下信息。
-> 红框处改变。检查检测结果。
4.6. 流出条件配置
- 通过SVC遥控器按IN-STOP键,红色LED闪烁，然后自动关闭。
(当闪烁时，AC电源不能关闭)
4.7. 内压
确认当电源 板ac block和G ND impacked 之前在1.5kV(dc)一秒是否正常。
Page 14
1. TV/CATV不显示
!" #!"$% &’
() *+,-./012
()!"$% 3412
故障诊断
检测TU1100
能否见正常的波形图?
是
检测(Q1102)输出
能否见正常的波形图?
是
检测主IC(IC100)输出
特别要检测行/场同步和时钟
能否见正常的波形图?
是
此板子因为主IC(IC100)的一些问题而存在大问题
再次彻底检查所有的路径后，决定是否要更换主板
否
否
否
能否检测TU1100和IIC线的电压？
都正常否?
是
你可以替换主板
你可以决定是否替换TR (Q1102)
检测主IC(IC100)电源后，决定是否要更换一个主IC
否
你需要检测电源线和ICC线
2. DTV不显示
能否检测IC1804,IC1502和IIC线的电压？
都正常否?
是
检测TU1100脚20,21,22输出
能否看到正常的信号?
是
检测主IC(IC100)输
特别要检测行/场同步和时钟
能否见正常的波形图?
此板子因为主IC(IC100)的一些问题而存在大问题
再次彻底检查所有的路径后，决定是否要更换主板
出
是
否
你需要检测电源线和ICC线
否
否
能否检测TU1100和IIC线的电压？
都正常否?
是
你可以替换主板
检测主IC(IC100)电源后，决定是否要更换一个主IC
否
你需要检测电源线和ICC线
- 13 -
Page 15
3. Component1/2, AV1/2, S-Video不显示
!" #!"$% &’
() *+,-./012
()!"$% 3412
检测JK502,JK503,JK504,P500
能否见正常的波形图?
是
检测主IC(IC100)输出
特别要检测行/场同步和时钟
能否见正常的波形图?
是
此板子因为主IC(IC100)的一些问题而存在大问题
再次彻底检查所有的路径后，决定是否要更换主板
4. RGB PC不显示
检测JK404
能否见正常的波形图?
否
JK502,JK503,JK504,P500也许有问题，更换这个插孔
否
检测主IC(IC100)电源后，决定是否要更换一个主IC
否
JK404也许有问题，更换这个插孔
是
C(IC100)输
检测主I
特别要检测行/场同步和时钟
能否见正常的波形图?
此板子因为主IC(IC100)的一些问题而存在大问题
再次彻底检查所有的路径后，决定是否要更换主板
出
是
否
检测主IC(IC100)电源后，决定是否要更换一个主IC
- 14 -
Page 16
5. HDMI不显示
检查输入连接JK600,JK601,JK602,JK603
能否见正常的波形图?
是
检测HDMI开关输入/输出
(IC603）和DDC线
是
检测DDC通讯线
(IC600,IC601,IC602,IC604)
是
检测HDCP通讯线(IC107)
是
检测主IC(IC100)输出
特别要检测行/场同步和时钟
能否看到正常的波形图
这个板子因为主IC(IC100)有一些问题，
因此存在大问题。
彻底再次检查所有路径后，你可以决定是否
更换一块主板。
?
是
否
否
否
否
否
检查此芯片的电源后，决定是否更换。
检查此芯片的电源后，决定是否更换。
检查此芯片的电源后，决定是否更换。
检查主IC(IC100)电源后，决定是否更换主IC。
JK600,JK601,JK602,JK603
有问题，更换此插孔
- 16 -
Page 17
LGE Internal Use OnlyCopyright ©2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 17 -
BLOCK DIAGRAM
CI SlotCI Slot
11 11 : TS_TS_PARALLEL, …
LCD modul eLCD modul e
(FHD 100/120Hz)(FHD 100/120Hz)
24/224/2 4 :LVDS :LVDS datadata 100/1100/1 20Hz
BufferBuffer
4 4 : TS_TS_SERERIAL, L, …
Saturn6Saturn6
FRCFRC
(LGE7329A, IC900)(LGE7329A, IC900)
DDR2DDR2
(512M, IC1000)(512M, IC1000)
DDR2DDR2
(512M, IC1001)(512M, IC1001)
45 45 : DDR2_DDR2_D[ 0:15] ,…
45 45 : DDR2_DDR2_D[ 0:15] ,…
24: 24: LVDS VDS datdata 50/650/60Hz0Hz
DVBDVB--CC
Demodul atorDemodul ator
(CE6210, IC1502)(CE6210, IC1502)
2 2 : FE_FE_DEMEMOD_
SCL/SCL/SDA
LGE3369ALGE3369A
(IC100)(IC100)
DTMBDTMB
Demodul atorDemodul ator
2 2 : TU_TU_IF_OUT+/-
TUNERTUNER
(TDFR(TDFR--Z751D,Z751D,
TU1100)TU1100)
BufferBuffer
2 2 : FE_FE_DEMEMOD_
Demodul atorDemodul ator
(LGS8G75, IC1804)(LGS8G75, IC1804)
1 1 : FE_FE_MAIN(CVBS)
1 1 : FE_FE_SIF
SCL/SCL/SDA
Bluetooth Bl uetooth
Modul eModul e
4 : BT_OF/OFOFF,F,DMDM,DP,P,LOUT_LOUT_AMP
Page 18
- 18 -
LGE Internal Use OnlyCopyright ©2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
Audi o AMPAudi o AMP
(NTP3100, IC701)(NTP3100, IC701)
6 : I2S, MCLK, …
2 : SCL, SDA_SUB/AMP
HDMI 1
EEPROM
(2K, IC600)
1 : EDID_WP
12 : DATA+/- X3, CLK+/ - , V_HDMI1, DDC_SCL1/SDA1
2 : DDC_SCL1/SDA1
SwitchSw itch
(BU16027KV, IC603)(BU16027KV, IC603)
EEPROMEEPROM
HDMI 4
(SIDE)
EEPROMEEPROM
(2K, IC601)(2K, IC601)
12 : DATA+/- X3, CLK+/- , HPD3, 5V_HDMI3 DDC_SCL3/SDA3
2 : DDC_SCL3/SDA3
SubSub
(IR/LED, Contr ol)(IR/LED, Contr ol)
1 : LED_ON
2 : SCL, SDA_SUB/AMP
3 : IR, KEY1/2
HDMI 2
HDMI 3
(2K, IC602)
EEPROM
(2K, IC604)
Saturn6Saturn6
DDR2DDR2
45 : DDR2_D[ 0:15] ,…
DDR2DDR2
(1G, IC300)(1G, IC300)
45 : DDR2_D[ 0:15] ,…
Comp 1
Comp 2
AV 1
AV 2(SIDE)
G
2 : CVBS, DET
2 : CVBS, DET
4 : Y, Pb, Pr, DET
4 : Y, Pb, Pr, DET
:
,R,
G,
,B,
SVS
C,
,DET,
S
LGE3369ALGE3369A
(IC100)(IC100)
NAND FLASHNAND FLA SH
(512M, IC102)(512M, IC102)
14 : PCM_A[ 0:7] ,…
(512M, IC301)(512M, IC301)
R
G
B
Com
p
1
AV 1
AV 2(SIDE)
EEPROMEEPROM
(2K, IC400)(2K, IC400)
1 : EDID_WP
_
RXD/TXD
2 : ISP_RXD/TXD
2 : L/R
2 2 : L/L/ R
2 : L/R
Serial FLASH for bootSerial FLASH for boot
(32M, IC103)(32M, IC103)
5 : SPI, Flash_WP_1
EEPROMEEPROM
2 2 : EEPROM_SCL, SDA
p
Comp 2
Digita l Audio (Optic )
Phone (for RGB)
2 : L/R
2 : L/R
1 : SPDIF_OUT
:
SIDE USB DM/DP
(512K, IC105)(512K, IC105)
HDCP EEPROMHDCP EEPROM
(8K, IC107)(8K, IC107)
2 2 : EEPROM_SCL, SDA
USB 2.0(SIDE)
RS-232C :
Ctrl& SVC
OCP
(MP6211,IC402)(M 2)
MAX3232CDRMA
(IC403)
2 : DBG_
RX/TX
SIDE
_
USB
_
DM/DP
2 : DBG_
RX/TX
1 : 5V_USB
2 : USB_CTL,
USB_OCD
P RXD/TXD
I
DET
YN
H/ V
B
R
Page 19
- 19 -
LGE Internal Use OnlyCopyright LG Electronics. Inc. All right reserved.
Only for training and service purposes
300
510
310
580
120
122
A2
LV1
LV2
A10
200
200N
200T
803
802
550
806
801
804
805
811
810
530
540
910
900
400
500
812
520
EXPLODED VIEW
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
IMPORTANT SAFETY NOTICE
Page 20
NAND FLASH MEMORY
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
/PF_CE0
H : Serial Flash
L : NAND Flash
/PF_CE1
H : 16 bit
L : 8 bit
R1509
R101 0
Flash_WP_1
R102
OPT
R151
0
KRC103S
PF_WP
Serial FLASH MEMORY
for BOOT
HDCP EEPROM
R158
4.7K
I2C
7:F12;11:AG10
7:F13;11:AG9
POWER DETECT
OPT
+3.3V
B
Q101
OPT
CAT24WC08W-T
A0
$0.199
A1
A2
VSS
10:I12
10:I12
11:J8
11:Q8
/F_RB
/PF_OE
/PF_CE0
/PF_CE1
0
0
10K
R104
IC107
1
2
3
4
C
E
PF_ALE
/PF_WE
+3.3V
R103
B
SPI_CS
SPI_DO
8
7
6
5
FE_DEMOD_SDA
FE_DEMOD_SCL
MEMC_SDA
MEMC_SCL
SDA_SUB/AMP
SCL_SUB/AMP
C
E
VCC
WP
SCL
SDA
10K
Q100
KRC103S
OPT
+3.3V
+24V
3.6K
R1527
OPT
R1539
R1533
R1530
32
R1521
32
R1522
32
1%
R105 1K
1K
33
0
1K
R1540
OPT
R112 1K
4.7K
CS
DO
WP
GND
R180
4.7K
R122 0
R123 0
R130 0
R131 0
R128 0
R129 0
1K
+3.3V
R111 3.9K
C103
0.1uF
IC103
W25X32VSSIG
1
$0.76
2
3
4
SW_SPI_BOOT
+3.3V
22
R161
R171 22
+12V
37~55
R1528
2.7K
1%
R1529
1.8K
37~55
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
VCC_1
VSS_1
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
R1506
R/B
RE
CE
CLE
ALE
WE
WP
0.1uF
C114
4.7K
8
7
6
5
I
SW_NAND_S6_HYNIX
HY27US08121B-TPCB
1
2
3
4
5
6
7
1386 WON
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
+3.3V
L102
VCC
HOLD
CLK
DIO
Addr:10101--
E16;T19;Y13
E16;T19;Y14
R1507
4.7K
R1503
2.2K
IC1500
KIA7042AF
1
2
G
IC102
EEPROM_SCL
EEPROM_SDA
+3.3V
R1502
2.2K
O
3
R1541
10K
OPT
0.1uF
SPI_CK
SPI_DI
R124
R1546
C104
4.7K
0
R1542
1K
OPT
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
R125
R1543
NC_28
NC_27
NC_26
NC_25
I/O7
I/O6
I/O5
I/O4
NC_24
NC_23
PRE
VCC_2
VSS_2
NC_22
NC_21
NC_20
I/O3
I/O2
I/O1
I/O0
NC_19
NC_18
NC_17
NC_16
4.7K
10K
B
10uF 6.3V
C106 0.1uF
EEPROM
E0
E1
E2
R100
VSS
0
MCU BOOT STRAP
10 : BOOT 51
11 : BOOT RISC
R198
1K
R199
1K
OPT
+3.3V_ST
C
Q1500
2SC3052
OPT
E
+3.3V
C105
AR102
AR103
IC105
M24512-WMW6
1
$0.418
2
3
4
EEPROM_ST_A
+3.3V
EEPROM_SDA
EEPROM_SCL
SDA0
SCL0
SDA0
SCL0
SDA1
SCL1
POWER_DET
R1501
1K
R1500
1K
OPT
PCM_A[7]
PCM_A[6]
PCM_A[5]
PCM_A[4]
22
PCM_A[3]
PCM_A[2]
PCM_A[1]
PCM_A[0]
22
VCC
8
WC
7
SCL
6
SDA
5
E16;E20;Y14
E16;E19;Y13
T21;Y14
T21;Y14
T21;Y14
T21;Y14
AK12
AK12
PWM0
PWM1
SW_NAND_S6_Numonyx
NAND512W3A2CN6E
NC_1
1
NC_2
PCM_A[0-7]
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
VDD_1
VSS_1
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
2
3
4
5
6
RB
7
R
8
E
9
10
11
12
13
14
15
CL
16
AL
17
W
18
WP
19
20
21
22
23
24
IC105: EAN43352801(ATMEL SHRINK)
0IMMRMP008A(MICROCHIP)
+3.3V
C100
0.1uF
R118
C108
8pF
OPT
R119 22
C107
8pF
OPT
DIMMING
A_DIM
PWM_DIM
C1500
1uF
OPT
MODEL OPTION
SEL2_HDMI_SW
MEMC_RESET
RF_SWITCH_SEL
RESET_LGS8G75
H
L
IC102-*1
22
C1501
2.2uF
OPT
OPT_0
LCD
PDP
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
EEPROM_SCL
EEPROM_SDA
R1614
R1612
R1600 100
R1601 100
R1611 0
R1613
NC_29
NC_28
NC_27
NC_26
I/O7
I/O6
I/O5
I/O4
NC_25
NC_24
NC_23
VDD_2
VSS_2
NC_22
NC_21
NC_20
I/O3
I/O2
I/O1
I/O0
NC_19
NC_18
NC_17
NC_16
R1545
100
R1544
100
OPT
R1603
3.3K
3.3K
100
OPT
OPT
R1604
3.3K
3.3K
FHD HD
FRC
No FRC
IC105-*1
M24512-WMW6G(REV.B)
E0
1
EEPROM_ST_B
E1
2
E2
3
VSS
4
PWM0
PWM2
+3.3V
OPT
R1607
R1605
3.3K
3.3K
OPT
OPT
R1606
R1608
3.3K
3.3K
OPT_1
SWAP_B LVDS
SWAP_A LVDS
+3.3V_ST
470
R107
VCC
C101
16V
VCC
8
WC
7
SCL
6
SDA
5
MODEL_OPT_0
MODEL_OPT_1
MODEL_OPT_2
MODEL_OPT_3
MODEL_OPT_4
OPT_2
LED Nomal
Soft touch
VOLTAGE DETECTOR
12
4 3
C102 10uF
6.3V
IC101
KIA7427F
3
1
2
GND
/PF_CE0
C4
/PF_CE1
D6
C4
D7
D6
A7
C3
E16;E19;T19
E16;E20;T19
H
H
H
H
SW100
JTP-1127WEM
OUT
/PF_OE
/PF_WE
PF_ALE
PF_WP
/F_RB
OPT_3
*Mstar reset:Active high reset
0.022uF
R1609
3.3K
PULL UP is applied on the FRC
OPT
R1610
3.3K
LED Moving
R115
10K
+3.3V
NON_CI
NON_CI
+3.3V
NON_CI
+5V_GENERAL
FHD
HD
R109
10K
R110
10K
R120
1K
NON_CI
NON_CI
R121
10K
R134
10K
AR101
EEPROM_SCL
EEPROM_SDA
ISP_RXD
ISP_TXD
DBG_RX
DBG_TX
+3.3V
OPT
R135
10K
NTP_MUTE
PCM_A[0-14]
PCM_D[5]
PCM_D[6]
PCM_A[10]
22
SDA0
SCL0
HDMI_EQ_SEL
LED_ON
SB_MUTE
PCM_D[0-7]
AR100
PWM0
PWM1
PWM2
11:Y9
11:Y10
11:X16;11:AD14
MODEL_OPT_4
7:F6
8:C6
PCM_RST
/PCM_CD
/PCM_OE
/PCM_REG
/PCM_WAIT
/PCM_IRQA
/PCM_WE
/PCM_IOWR
/PCM_IORD
/PCM_CE
22
KEY1
KEY2
IR
AMP_RST
MODEL_OPT_1
MODEL_OPT_2
ERROR_OUT
MODEL_OPT_0
COMP2_DET
DSUB_DET
DVB-CI
DVB-CI
DVB-CI
DVB-CI
DVB-CI
DVB-CI
DVB-CI
DVB-CI
DVB-CI
DVB-CI
R140
R141 22
R142 22
R143 22
+3.3V_ST
R136
10K
R146 0
China MAIN(LC91T)
42/47/55SL80
080923_Time Delay
R1160
PCM_D[0]
PCM_D[1]
PCM_D[2]
PCM_D[3]
PCM_D[4]
PCM_D[5]
PCM_D[6]
PCM_D[7]
PCM_A[0]
PCM_A[1]
PCM_A[2]
PCM_A[3]
PCM_A[4]
PCM_A[5]
PCM_A[6]
PCM_A[7]
PCM_A[8]
PCM_A[9]
PCM_A[10]
PCM_A[11]
PCM_A[12]
PCM_A[13]
PCM_A[14]
R1510 33
R1511 33
R1512 33
R1513 33
R1514 33
R1515 33
R1516 33
R1517 33
R1518 33
R1519 33
R162
R163
R164
R165
22
R150 0
R1550 100
R117 0
OPT
R156
R157
R189 0
R168 0
R160
R166 100
R126 0
R148 100
R147 100
LGE3369A (Saturn6 Non RM)
D4
AC16
AA15
AA16
AC6
Y10
Y11
Y12
Y13
AB16
AC15
AC14
AB14
AC12
AB8
AC13
AA9
AB5
AA4
V4
Y4
AB9
AA7
AD6
AA14
AB18
Y5
AB15
AA10
AC8
AC7
AA5
W4
T4
AE6
AF6
AA12
AA11
AC9
Y14
AB11
0
F8
0
D11
0
AB21
0
AC21
J1
J2
W5
V5
AB13
AB12
AD12
AA13
OPT
A4
B4
F4
E4
C4
AC11
100
D9
100
D10
D7
E11
100
E8
E10
D6
D5
C5
IC100
HWRESET
PCMD0/CI_D0
PCMD1/CI_D1
PCMD2/CI_D2
PCMD3/CI_D3
PCMD4/CI_D4
PCMD5/CI_D5
PCMD6/CI_D6
PCMD7/CI_D7
PCM_A0/CI_A0
PCM_A1/CI_A1
PCM_A2/CI_A2
PCM_A3/CI_A3
PCM_A4/CI_A4
PCM_A5/CI_A5
PCM_A6/CI_A6
PCM_A7/CI_A7
PCM_A8/CI_A8
PCM_A9/CI_A9
PCM_A10/CI_A10
PCM_A11/CI_A11
PCM_A12/CI_A12
PCM_A13/CI_A13
PCM_A14/CI_A14
PCM_RST/CI_RST
PCM_CD/CI_CD
/PCM_OE
PCM_REG/CI_CLK
PCM_WAIT/CI_WACK
/PCM_IRQA
/PCM_WE
PCM_IOWR/CI_WR
PCM_IOR/CI_RD
/PCM_CE
/PF_CE0
/PF_CE1
/PF_OE
/PF_WE
PF_ALE
PF_AD15
F_RBZ
UART2_TX/SCKM
UART2_RX/SDAM
DDCR_DA
DDCR_CK
DDCA_CLK
DDCA_DA
UART_RX2
UART_TX2
PWM0
PWM1
PWM2
PWM3
SAR0
SAR1
SAR2
SAR3
IRIN
GPIO44
GPIO96
GPIO88
GPIO90/I2S_OUT_MUTE
GPIO91
GPIO97
GPIO98
GPIO99
GPIO103/I2S_OUT_SD3
GPIO102
XOUT
TESTPIN/GND
SPI_DI
SPI_DO
/SPI_CS
SPI_CK
USB_DP_1
USB_DM_1
USB_DM_2
USB_DP_2
GPIO_PM0/GPIO134
GPIO_PM1/GPIO135
GPIO_PM2/GPIO136
GPIO_PM3/GPIO137
GPIO_PM4/GPIO138
GPIO_PM5/INT1/GPIO139
GPIO_PM6/INT2/GPIO140
GPIO131/LDE/SPI_WPn1
GPIO130/LCK
GPIO132/LHSYNC/SPI_WPn
GPIO60/PCM2_RESET/RX1
GPIO62/PCM2_CD_N/TX1
LHSYNC2/I2S_OUT_MUTE/RX1
LVSYNC/GPIO133
GPIO79/LVSYNC2/TX1
UART2_RX/GPIO84
UART2_TX/GPIO85
UART1_RX/GPIO86
UART1_TX/GPIO87
GPIO42/PCM2_CE_N
GPIO43/PCM2_IRQA_N
TS0_D0
TS0_D1
TS0_D2
TS0_D3
TS0_D4
TS0_D5
TS0_D6
TS0_D7
TS0_SYNC
TS0_VLD
TS0_CLK
TS1_D0
TS1_SYNC
TS1_VLD
TS1_CLK
ET_TXD0
ET_TXD1
ET_TX_CLK
ET_RXD0
ET_RXD1
ET_TX_EN
ET_MDC
ET_MDIO
ET_COL
GPIO67
GPIO68
B3
XIN
A3
R172 0
R173 0
E6
AE11
R1524 33
AF12
AE12
R1525 33
AD11
R1526 33
B5
R174 0
A5
R175 0
AC10
R178 0
AB10
R179 0
R132
15K
OPT
E5
R176
F5
R184
G5
R185
H5
F6
R186 100
G6
H6
AC17
R188 100
AB17
R167 100
AF11
R159
AA18
R1535 0
AA17
R1536 0
E7
OPT
R1537 22
R1534
R1538
R108
R169
R170
R127 100
CI_TS_DATA[0]
CI_TS_DATA[1]
CI_TS_DATA[2]
CI_TS_DATA[3]
CI_TS_DATA[4]
CI_TS_DATA[5]
CI_TS_DATA[6]
CI_TS_DATA[7]
R154 100
R177 100
R183
R196
R194 10K
R190 100
R191 100
R114 0
R153 100
R192 100
R155
100
100
100
100
100
AC18
C6
F9
F10
A6
B6
AF5
AF10
AA8
Y8
Y9
AB7
AA6
AB6
U4
AC5
AC4
AD5
AB4
AB19
AA20
AC19
AA19
C10
B11
A9
C11
C9
B10
A10
B9
A11
A7
B8
X100
C111
12MHz
SPI_DI
SPI_DO
SPI_CS
SPI_CK
+3.3V_ST
BT_ON/OFF
LVDS_SEL
FE_BOOSTER_CTL
Flash_WP_1
SDA1
SCL1
CI_TS_SYN
CI_TS_VAL
CI_TS_CLK
FE_TS_SERIAL_DATA
FE_TS_SYN
FE_TS_VAL_ERR
FE_TS_CLK
AV2_DET
SEL_CE6210
HPD3
(HP_DET)
EDID_WP
BIT_SEL
MODEL_OPT_3
COMP1_DET
USB_CTL
RESET_CE6210
R195
20pF
C112
20pF
G12
BT_DP
BT_DM
10K
4:AG3
011:E25
4:M4
R193
1M
R133
15K
OPT
100
100
100
100
OPC_EN
SEL_LGS8G75
100
5V_HDMI_3
USB_OCD
5V_HDMI_1
5V_HDMI_2
PCM_5V_CTL
AV1_DET
OPT
100
100
+3.3V
R152
4.7K
OPT
SIDE_USB_DM
SIDE_USB_DP
SIDE_USB
PM GPIO Assignment Recommended by MStar
R1520
100
OPT
100
R182
100
R1523
OPT
R187 100
CI_TS_DATA[0-7]
6:AI16;6:AL7;6:AL12
005:D10
005:D10
005:D10
4:AL4
INV_CTL
PANEL_CTL
POWER_ON/OFF1
DBG_RX
Interrupt for ISP Wake up in STB Mode
9:AI24
4:AJ6
4:AJ5
DBG_TX
POWER_DET
POWER_DET
ISP_TXD
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
EAX60737402
MAIN_1
2009. 1.15.
1 13
Page 21
C2028
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
10uF
C2002
10uF
+1.26V_VDDC
C243
0.1uF
C246
0.1uF
C249
0.1uF
C252
0.1uF
C257
0.1uF
C264
0.1uF
C275
0.1uF
C281
0.1uF
C289
0.1uF
C294
0.1uF
C297
0.1uF
C2000
0.1uF
C2001
0.1uF
C2003
0.1uF
C2005
0.1uF
C219
0.1uF
C220
0.1uF
C261
0.1uF
C268
0.1uF
C270
0.1uF
C278
0.1uF
C280
0.1uF
C282
0.1uF
C290
0.1uF
C295
0.1uF
C298
0.1uF
C299
0.1uF
6:X15
6:X14
6:X15
6:X15
6:X16
6:X16
6:X17
6:X17
6:X13;6:AL14
6:X13;6:AL13
6:J6
6:J6
6:X15
6:X14
6:X15
6:X15
6:X16
6:X16
6:X17
6:X17
6:X13;6:AL14
6:X13;6:AL13
6:W11
6:AM25
9:J6
9:J8
9:J9
4:C22
4:C22
4:C26
4:C24
4:C23
4:K13
4:K11
4:K12
9:AE2
4:M2
10:AA8
CK+_HDMI_SW
CK-_HDMI_SW
D0+_HDMI_SW
D0-_HDMI_SW
D1+_HDMI_SW
D1-_HDMI_SW
D2+_HDMI_SW
D2-_HDMI_SW
DDC_SDA_SW
DDC_SCL_SW
HDMI
COMP1_Pr_IN
COMP1_Y_IN
COMP1_Pb_IN
COMP1
DSUB_HSYNC
DSUB_VSYNC
DSUB
COMP2_Pr_IN
COMP2_Y_IN
COMP2_Pb_IN
COMP2
AV2_CVBS_IN
AV1_CVBS_IN
CVBS1/2
S-VHS
FE_VMAIN
TV/MNT
HPD1
HPD2
CK+_HDMI4
CK-_HDMI4
D0+_HDMI4
D0-_HDMI4
D1+_HDMI4
D1-_HDMI4
D2+_HDMI4
D2-_HDMI4
DDC_SDA_4
DDC_SCL_4
HPD4
HDMI_CEC
DSUB_R
DSUB_G
DSUB_B
R243
10K
R207 0
R208 0
R247
R202 0
R203 0
R201
R248 0
R249 0
R200
R204
R211
R212 47
R213
R214
R215
R216 47
R217
R244
10K
R218
R219
R220 47
R221
R222
R223 47
R224
R225
R205 47
R206 47
R226 47
R227 47
OPT
R286 47
OPT
R228
R209
100
100
100
100
47
47
470
47
47
47
47
470
47
47
470
100
100
OPT
OPT
R246 22
R245 22
C200 0.047uF
C201
0.047uF
0.047uF
C202
1000pF
C203
C204 0.047uF
C205
0.047uF
0.047uF
C206
0.047uF
C212
C207
0.047uF
0.047uF
C213
1000pF
C208
0.047uF
C214
C215
0.047uF
0.047uF
C216
1000pF
C209
C210 0.047uF
0.047uF
C211
C217 0.047uF
C218 0.047uF
R287 0.047uFR285 47
R288 0.047uF
C2024 0.047uFR235 47
C2019 0.047uFR236 47
C221 0.047uF
C222 0.047uF
LGE3369A (Saturn6 Non RM)
F1
RXACKP
F2
RXACKN
G2
RXA0P
G3
RXA0N
H3
RXA1P
G1
RXA1N
H1
RXA2P
H2
RXA2N
A1
DDCD_A_DA
B2
DDCD_A_CK
A2
HOTPLUG_A
C3
RXBCKP
B1
RXBCKN
C1
RXB0P
C2
RXB0N
D2
RXB1P
D3
RXB1N
E3
RXB2P
D1
RXB2N
E1
DDCD_B_DA
F3
DDCD_B_CK
E2
HOTPLUG_B
AE8
RXCCKP
AD8
RXCCKN
AD9
RXC0P
AF8
RXC0N
AF9
RXC1P
AE9
RXC1N
AE10
RXC2P
AD10
RXC2N
AE7
DDCD_C_DA
AF7
DDCD_C_CK
AD7
HOTPLUG_C
J3
CEC
N2
HSYNC0/SC1_ID
N1
VSYNC0/SC1_FB
P2
RIN0P/SC1_R
R3
GIN0P/SC1_G
R1
BIN0P/SC1_B
P3
SOGIN0/SC1_CVBS
P1
RINM
T3
BINM
R2
GINM
K3
HSYNC1/DSUB_HSYNC
K2
VSYNC1/DSUB_VSYNC
L1
RIN1P/DSUB_R
L3
GIN1P/DSUB_G
K1
BIN1P/DSUB_B
L2
SOGIN1
V1
RIN2P/COMP_PR+
V2
GIN2P/COMP_Y+
U1
BIN2P/COMP_PB+
V3
SOGIN2
J5
VSYNC2
U3
CVBS1/SC1_CVBS
U2
CVBS2/SC2_CVBS
T1
CVBS3/SIDE_CVBS
T2
VCOM1
M1
CVBS4/S-VIDEO_Y
M2
CVBS6/S-VIDEO_C
N3
CVBS5
M3
CVBS7
W1
CVBS0/RF_CVBS
Y3
VCOM0
Y2
CVBSOUT0/SC2_MNTOUT
AA2
CVBSOUT1
IC100
LVA0P
LVA0M
LVA1P
LVA1M
LVA2P
LVA2M
LVA3P
LVA3M
LVA4P
LVA4M
LVACKP
LVACKM
LVB0P
LVB0M
LVB1P
LVB1M
LVB2P
LVB2M
LVB3P
LVB3M
LVB4P
LVB4M
LVBCKP
LVBCKM
AUR0
AUL0
AUR1
AUL1
AUR2
AUL2
AUR3
AUL3
AUR4
AUL4
AUR5
AUL5
SIF0P
SIF0M
SPDIF_IN
SPDIF_OUT
AUOUTR0/HP_ROUT
AUOUTL0/HP_LOUT
AUOUTR1/SC1_ROUT
AUOUTL1/SC1_LOUT
AUOUTR2/SC2_ROUT
AUOUTL2/SC2_LOUT
I2S_OUT_MCK
I2S_OUT_WS
I2S_OUT_BCK
I2S_OUT_SD
I2S_IN_SD
VCLAMP
REFP
REFM
REXT
AUCOM
AUVRM
AUVRP
AUVAG
AE16
AD16
AD15
AF16
AF15
AE15
AD13
AF14
AF13
AE13
AE14
AD14
AE20
AD20
AD19
AF20
AF19
AE19
AD17
AF18
AF17
AE17
AE18
AD18
AA3
Y1
AE1
AF3
AE3
AE2
AA1
AB1
AB2
AC2
AB3
AC3
W3
W2
F11
E9
AF1
AF2
AD3
AD1
AC1
AD2
A8
B7
C7
D8
C8
K4
H4
J4
G4
AE5
AE4
AF4
AD4
100
R274
0.1uF
C223
R229 390
1%
+3.3V
Check
C224 0.1uF
C225 10uF
C226 0.1uF
C227
C228 4.7uF
Close to IC
as close as possible
C2004
0.1uF
C229 2.2uF
C230
C2006
C2007
C2008 2.2uF
C2009
C2011 2.2uF
C2012
C2013
C2014 2.2uF
C2015 2.2uF
C2016 2.2uF
C231 0.1uF
C232 0.1uF
R266 100
R230 0
OPT
R237
R238
OPT
R239
OPT
R240
OPT
R250
OPT
R251
R231 22
R232 22
R233 22
R234 22
C233
0.1uF
6.3V
1uF
+3.3V
MEMC_RXE0+
MEMC_RXE0MEMC_RXE1+
MEMC_RXE1MEMC_RXE2+
MEMC_RXE2MEMC_RXE3+
MEMC_RXE3MEMC_RXE4+
MEMC_RXE4-
MEMC_RXEC+
MEMC_RXEC-
MEMC_RXO0+
MEMC_RXO0MEMC_RXO1+
MEMC_RXO1MEMC_RXO2+
MEMC_RXO2MEMC_RXO3+
MEMC_RXO3MEMC_RXO4+
MEMC_RXO4-
MEMC_RXOC+
MEMC_RXOC-
2.2uF
2.2uF
2.2uF
2.2uF
2.2uF
2.2uF
100
100
100
100
100
100
C235 0.1uF
C234 0.1uF
L210
BLM18PG121SN1D
C2026
0.1uF
002:Z22;009:S28
002:Z22;009:S28
002:Z23;009:R28
002:Z22;009:R28
002:Z23;009:R28
002:Z23;009:R28
002:Z25;009:Q28
002:Z25;009:Q28
002:Z26;009:Q28
002:Z25;009:Q28
002:Z24;009:Q28
002:Z24;009:R28
002:Z17;009:U28
002:Z17;009:V28
002:Z18;009:U28
002:Z18;009:U28
002:Z18;009:U28
002:Z18;009:U28
002:Z20;009:T28
002:Z20;009:T28
002:Z21;009:S28
002:Z21;009:T28
002:Z19;009:T28
002:Z19;009:T28
R241
47
R242 47
C2842
0.01uF
25V
5%
1/16W
SEL1_HDMI_SW
C276
0.1uF
LVDS OUT
COMP1_R_IN
COMP1_L_IN
AV2_R_IN
AV2_L_IN
AV1_R_IN
AV1_L_IN
COMP2_R_IN
COMP2_L_IN
PC_R_IN
PC_L_IN
FE_SIF
5V_HDMI_4
22K
R2828
C236
22pF
OPT
C265
0.1uF
C237
22pF
OPT
C258
0.1uF
9:J12
9:J10
9:AE11
9:AE10
4:M6
4:M5
4:K15
4:K13
4:Z5
4:Z6
10:P13
C238
22pF
OPT
C253
0.1uF
C239
22pF
OPT
C250
0.1uF
AUDIO IN
C247
0.1uF
+3.3V_VDDP
C244
0.1uF
C241
0.1uF
SPDIF_OUT
BT_LOUT
AUDIO_MASTER_CLK
MS_LRCK
MS_SCK
MS_LRCH
4:T11
7:F7
7:F12
7:F12
7:F12
C2027
0.1uF
AUDIO OUT
+1.8V_DDR
C245
C242
0.1uF
C248
0.1uF
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
C251
0.1uF
IC100
0.1uF
LGE3369A (Saturn6 Non RM)
E16
E17
E18
F7
L9
L10
L11
L12
L13
L14
L15
L16
L17
L18
M9
M10
M11
M12
M13
M14
M15
M16
M17
M18
N4
N9
N10
N11
N12
N13
N14
N15
N16
N17
N18
P4
P9
P10
P11
P12
P13
P14
P15
P16
P17
P18
R4
R9
R10
R11
R12
R13
R14
R15
R16
R17
R18
T5
T9
T10
T11
T12
T13
T14
T15
T16
T17
T18
U5
W13
Y21
AA23
C254
0.1uF
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDDC_23
VDDC_24
VDDC_25
VDDC_26
VDDC_27
VDDP_1
VDDP_2
VDDP_3
VDDP_4
VDDP_5
VDDP_6
VDDP_7
VDDP_8
AVDD_AU
AVDD_DDR_1
AVDD_DDR_2
AVDD_DDR_3
AVDD_DDR_4
AVDD_DDR_5
AVDD_DDR_6
AVDD_DDR_7
AVDD_DDR_8
AVDD_DDR_9
AVDD_DDR_10
AVDD_DDR_11
AVDD_MEMPLL_1
AVDD_MEMPLL_2
AVDD_MEMPLL_3
AVDD_LPLL
AVDD_MPLL
AVDD_33_1
AVDD_33_2
AVDD_33_3
AVDD_33_4
AVDD_33_5
AVDD_DM
AVDD_USB
C266
C259
0.1uF
0.1uF
+1.26V_VDDC
D16
D17
D18
D19
D20
H18
H19
H20
J20
K20
L20
M20
P7
R7
T7
T22
U7
U20
U22
V7
V22
W11
W12
W19
W20
W22
Y22
+3.3V_VDDP
H9
H10
H11
H12
N20
P20
W9
W10
W7
+1.8V_DDR
G12
G13
H13
H14
H15
H16
W14
W15
W16
W17
W18
H17
T20
V20
C262
0.1uF
R20
H7
C2029
0.1uF
PI_080719
J7
K7
L7
M7
N7
W8
H8
AVDD_OTG : 22.96mA
C277
0.1uF
+3.3V_S6
C263
0.1uF
OPT
C255
2.2uF
16V
C283
0.1uF
VDDC : 970mA
C284
0.1uF
C269
0.1uF
+3.3V_AVDD_MPLL
C271
0.1uF
+3.3V_S6
C256
0.1uF
C291
0.1uF
VDDP : 102.3mA
+3.3V_S6
C273
0.1uF
C2025
10uF
6.3V
C260
C274
0.1uF
0.1uF
C296
0.1uF
L209
BLM18PG121SN1D
AVDD_MEMPLL : 23.77mA
+3.3V_S6
C279
0.1uF
BLM18PG121SN1D
C267
0.1uF
+3.3V_S6
C2030
0.1uF
+3.3V
AVDD_AU : 36.11mA
C293
0.1uF
AVDD_LPLL : 4.69mA
AVDD_33 : 281mA
+3.3V_AVDD
L206
C286
0.1uF
AVDD_DM : 0.03mA
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
MAIN_2
EAX60737402
MAIN_2
2009. 1.15.
2 13
Page 22
DDR2 1.8V By CAP - Place these Caps near Memory
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
+1.8V_DDR +1.8V_DDR
1G_QIMONDA
IC300-*1
HYB18TC1G160C2F-2.5
VREF
J2
A0
M8
A1
M3
A2
M7
A3
N2
A4
N8
A5
N3
A6
N7
A7
P2
A8
P8
A9
P3
A10/AP
M2
A11
P7
A12
R2
BA0
L2
BA1
L3
BA2
L1
CK
J8
CK
K8
CKE
K2
ODT
K9
CS
L8
RAS
K7
CAS
L7
WE
K3
LDQS
F7
UDQS
B7
LDM
F3
UDM
B3
LDQS
E8
UDQS
A8
NC4
R3
NC5
R7
NC1
A2
NC2
E2
NC3
R8
VSSDL
J7
VDDL
J1
C302
0.1uF
C303
10uF
C304
0.1uF
C305
0.1uF
C306
0.1uF
C307
0.1uF
C308
0.1uF
C310
0.1uF
C312
0.1uF
C313
0.1uF
C314
0.1uF
C315
0.1uF
C316
0.1uF
C317
0.1uF
C318
0.1uF
C319
0.1uF
C320
0.1uF
C321
0.1uF
C323
0.1uF
C324
10uF
C325
0.1uF
C326
0.1uF
C327
0.1uF
C328
0.1uF
C329
0.1uF
C330
0.1uF
C331
0.1uF
C332
C334
0.1uF
0.1uF
C336
0.1uF
C337
0.1uF
C338
0.1uF
C339
0.1uF
C340
0.1uF
C341
0.1uF
C342
0.1uF
Close to DDR Power Pin Close to DDR Power Pin
R343
1K
+1.8V_DDR
C333
0.1uF
1%
TDDR_A[0-12]
TDDR_BA[0]
TDDR_BA[1]
TDDR_BA[2]
OPT
R344
150
TDDR_CKE
OPT
R348 4.7K
R349
/TDDR_RAS
/TDDR_CAS
/TDDR_WE
TDDR_DQS0_P
TDDR_DQS1_P
TDDR_DQM0_P
TDDR_DQM1_P
TDDR_DQS0_N
TDDR_DQS1_N
+1.8V_DDR
R3451K1%
C335
0.1uF
TDDR_A[0]
TDDR_A[1]
TDDR_A[2]TDDR_A[10]
TDDR_A[3]
TDDR_A[4]
TDDR_A[5]
TDDR_A[6]
TDDR_A[7]
TDDR_A[8]
TDDR_A[9]
TDDR_A[10]
TDDR_A[11]
TDDR_A[12]
TDDR_MCLK
/TDDR_MCLK
OPT
4.7K
R351
A10/AP
0
VSSDL
VREF
LDQS
UDQS
LDQS
UDQS
VDDL
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A11
A12
BA0
BA1
NC4
CK
CK
CKE
ODT
CS
RAS
CAS
WE
LDM
UDM
NC5
NC6
NC1
NC2
NC3
512M_HYNIX
IC301
H5PS5162FFR-S6C
J2
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
L2
L3
L1
J8
K8
K2
K9
L8
K7
L7
K3
F7
B7
F3
B3
E8
A8
R3
R7
A2
E2
R8
J7
J1
512M_QIMONDA
VREF
LDQS
UDQS
LDQS
UDQS
VDDL
IC301-*1
DQ0
J2
A0
M8
A1
M3
A2
M7
A3
N2
A4
N8
A5
N3
A6
N7
A7
P2
A8
P8
A9
P3
M2
A11
P7
A12
R2
BA0
L2
BA1
L3
CK
J8
CK
K8
CKE
K2
ODT
K9
CS
L8
RAS
K7
CAS
L7
WE
K3
F7
B7
LDM
F3
UDM
B3
E8
A8
NC4
L1
NC5
R3
NC6
R7
NC1
A2
NC2
E2
NC3
R8
J7
J1
G8
DQ1
G2
DQ2
H7
DQ3
H3
DQ4
H1
DQ5
H9
DQ6
F1
DQ7
F9
DQ8
C8
DQ9
C2
DQ10
D7
DQ11
D3
DQ12
D1
DQ13
D9
DQ14
B1
DQ15
B9
VDD5
A1
VDD4
E1
VDD3
J9
VDD2
M9
VDD1
R1
VDDQ10
A9
VDDQ9
C1
VDDQ8
C3
VDDQ7
C7
VDDQ6
C9
VDDQ5
E9
VDDQ4
G1
VDDQ3
G3
VDDQ2
G7
VDDQ1
G9
VSS5
A3
VSS4
E3
VSS3
J3
VSS2
N1
VSS1
P9
VSSQ10
B2
VSSQ9
B8
VSSQ8
A7
VSSQ7
D2
VSSQ6
D8
VSSQ5
E7
VSSQ4
F2
VSSQ3
F8
VSSQ2
H2
VSSQ1
H8
HYB18TC512160B2F-2.5
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
VDD5
VDD4
VDD3
VDD2
VDD1
VDDQ10
VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
VSS5
VSS4
VSS3
VSS2
VSS1
VSSQ10
VSSQ9
VSSQ8
VSSQ7
VSSQ6
VSSQ5
VSSQ4
VSSQ3
VSSQ2
VSSQ1
TDDR_D[0]
TDDR_D[1]
TDDR_D[2]
TDDR_D[3]
TDDR_D[4]
TDDR_D[5]
TDDR_D[6]
TDDR_D[7]
TDDR_D[8]
TDDR_D[9]
TDDR_D[10]
TDDR_D[11]
TDDR_D[12]
TDDR_D[13]
TDDR_D[14]
TDDR_D[15]
+1.8V_DDR
TDDR_D[0-15]
A10/AP
VSSDL
G8
G2
H7
H3
H1
H9
F1
F9
C8
C2
D7
D3
D1
D9
B1
B9
A1
E1
J9
M9
R1
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
A3
E3
J3
N1
P9
B2
B8
A7
D2
D8
E7
F2
F8
H2
H8
+1.8V_DDR
1%R302 1K 1%
1K
R301
1G_HYNIX
0.1uF
SDDR_A[0]
SDDR_A[1]
SDDR_A[2]
SDDR_A[3]
SDDR_A[4]
SDDR_A[5]
SDDR_A[6]
SDDR_A[7]
SDDR_A[8]
SDDR_A[9]
SDDR_A[10]
SDDR_A[11]
SDDR_A[12]
OPT
R350
0.1uF
C301
C300
SDDR_A[5] ADDR2_A[5]
SDDR_A[3]
SDDR_A[1]
SDDR_A[10]
SDDR_A[9]
SDDR_A[12]
SDDR_A[7]
SDDR_A[0]
SDDR_A[0-12]
SDDR_A[2]
SDDR_A[4]
SDDR_A[6]
SDDR_A[11]
SDDR_A[8]
SDDR_BA[0]
SDDR_BA[1]
SDDR_BA[2]
SDDR_CK
OPT
R300
/SDDR_CK
0
R347 4.7K
150
SDDR_CKE ADDR2_CKE
OPT
+1.8V_DDR
R346 4.7K
SDDR_ODT
OPT
/SDDR_RAS
/SDDR_CAS
/SDDR_WE
SDDR_DQS0_P
SDDR_DQS1_P
SDDR_DQM0_P
SDDR_DQM1_P
SDDR_DQS0_N
SDDR_DQS1_N
+1.8V_DDR
AR300
56
AR301
AR302
56
R320 56
R30356
R30456
R30556
R30622
R30722
R30856
R30956
R31056 R334 56
R31156
R31256
R31356
R31456 R338 56
R31556
R31656
R31756
R31856
SDDR_D[11]
SDDR_D[12]
SDDR_D[9]
SDDR_D[14]
SDDR_D[4]
SDDR_D[3]
SDDR_D[1]
SDDR_D[6]
SDDR_D[15]
SDDR_D[8]
SDDR_D[10]
SDDR_D[13]
SDDR_D[7]
SDDR_D[0]
SDDR_D[2]
SDDR_D[5]
AR306
AR308
R319
56
56
56
AR307
56
56
AR309
56
IC300
HY5PS1G1631CFP-S6
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
VDD5
VDD4
VDD3
VDD2
VDD1
VDDQ10
VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
VSS5
VSS4
VSS3
VSS2
VSS1
VSSQ10
VSSQ9
VSSQ8
VSSQ7
VSSQ6
VSSQ5
VSSQ4
VSSQ3
VSSQ2
VSSQ1
DQ0
G8
DQ1
G2
DQ2
H7
DQ3
H3
DQ4
H1
DQ5
H9
DQ6
F1
DQ7
F9
DQ8
C8
DQ9
C2
D7
D3
D1
D9
B1
B9
A1
E1
J9
M9
R1
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
A3
E3
J3
N1
P9
B2
B8
A7
D2
D8
E7
F2
F8
H2
H8
DQ0
G8
DQ1
G2
DQ2
H7
DQ3
H3
DQ4
H1
DQ5
H9
DQ6
F1
DQ7
F9
DQ8
C8
DQ9
C2
DQ10
D7
DQ11
D3
DQ12
D1
DQ13
D9
DQ14
B1
DQ15
B9
VDD5
A1
VDD4
E1
VDD3
J9
VDD2
M9
VDD1
R1
VDDQ10
A9
VDDQ9
C1
VDDQ8
C3
VDDQ7
C7
VDDQ6
C9
VDDQ5
E9
VDDQ4
G1
VDDQ3
G3
VDDQ2
G7
VDDQ1
G9
VSS5
A3
VSS4
E3
VSS3
J3
VSS2
N1
VSS1
P9
VSSQ10
B2
VSSQ9
B8
VSSQ8
A7
VSSQ7
D2
VSSQ6
D8
VSSQ5
E7
VSSQ4
F2
VSSQ3
F8
VSSQ2
H2
VSSQ1
H8
SDDR_D[0]
SDDR_D[1]
SDDR_D[2]
SDDR_D[3]
SDDR_D[4]
SDDR_D[5]
SDDR_D[6]
SDDR_D[7]
SDDR_D[8]
SDDR_D[9]
SDDR_D[10]
SDDR_D[0-15]
SDDR_D[11]
SDDR_D[12]
SDDR_D[13]
SDDR_D[14]
SDDR_D[15]
+1.8V_DDR
VREF
J2
A0
M8
A1
M3
A2
M7
A3
N2
A4
N8
A5
N3
A6
N7
A7
P2
A8
P8
A9
P3
A10/AP
M2
A11
P7
A12
R2
BA0
L2
BA1
L3
BA2
L1
CK
J8
CK
K8
CKE
K2
ODT
K9
CS
L8
RAS
K7
CAS
L7
WE
K3
LDQS
F7
UDQS
B7
LDM
F3
UDM
B3
LDQS
E8
UDQS
A8
NC5
R3
NC6
R7
NC1
A2
NC2
E2
NC3
R8
VSSDL
J7
VDDL
J1
ADDR2_A[3]
ADDR2_A[1]
ADDR2_A[10]
ADDR2_A[9]
ADDR2_A[12]
ADDR2_A[7]
ADDR2_A[0]
ADDR2_A[2]
ADDR2_A[4]
ADDR2_A[6]
ADDR2_A[11]
ADDR2_A[8]
ADDR2_BA[0]
ADDR2_BA[1]
ADDR2_BA[2]
ADDR2_MCLK
/ADDR2_MCLK
ADDR2_ODT
/ADDR2_RAS
/ADDR2_CAS
/ADDR2_WE
ADDR2_DQS0_P
ADDR2_DQS1_P
ADDR2_DQM0_P
ADDR2_DQM1_P
ADDR2_DQS0_N
ADDR2_DQS1_N
ADDR2_D[11]
ADDR2_D[12]
ADDR2_D[9]
ADDR2_D[14]
ADDR2_D[4]
ADDR2_D[3]
ADDR2_D[1]
ADDR2_D[6]
ADDR2_D[15]
ADDR2_D[8]
ADDR2_D[10]
ADDR2_D[13]
ADDR2_D[7]
ADDR2_D[0]
ADDR2_D[2]
ADDR2_D[5]
+1.8V_DDR
R321
R322
1K 1%
0.1uF
1K 1%
C311
C309
ADDR2_A[0-12]
ADDR2_D[0-15]
0.1uF
LGE3369A (Saturn6 Non RM)
D15
A_MVREF
C13
ADDR2_A[0]
ADDR2_A[1]
ADDR2_A[2]
ADDR2_A[3]
ADDR2_A[4]
ADDR2_A[5]
ADDR2_A[6]
ADDR2_A[7]
ADDR2_A[8]
ADDR2_A[9]
ADDR2_A[10]
ADDR2_A[11]
ADDR2_A[12]
ADDR2_D[0]
ADDR2_D[1]
ADDR2_D[2]
ADDR2_D[3]
ADDR2_D[4]
ADDR2_D[5]
ADDR2_D[6]
ADDR2_D[7]
ADDR2_D[8]
ADDR2_D[9]
ADDR2_D[10]
ADDR2_D[11]
ADDR2_D[12]
ADDR2_D[13]
ADDR2_D[14]
ADDR2_D[15]
A22
B13
C22
A13
A23
C12
B23
B12
C23
B22
A12
A24
C24
B24
D24
B14
A14
D23
D14
D13
D12
D22
B18
C17
C18
A19
A18
B17
B15
A21
A15
B21
C21
C14
C20
C15
C16
C19
B16
B20
A20
A16
B19
A17
A_DDR2_A0
A_DDR2_A1
A_DDR2_A2
A_DDR2_A3
A_DDR2_A4
A_DDR2_A5
A_DDR2_A6
A_DDR2_A7
A_DDR2_A8
A_DDR2_A9
A_DDR2_A10
A_DDR2_A11
A_DDR2_A12
A_DDR2_BA0
A_DDR2_BA1
A_DDR2_BA2
A_DDR2_MCLK
/A_DDR2_MCLK
A_DDR2_CKE
A_DDR2_ODT
/A_DDR2_RAS
/A_DDR2_CAS
/A_DDR2_WE
A_DDR2_DQS0
A_DDR2_DQS1
A_DDR2_DQM0
A_DDR2_DQM1
A_DDR2_DQSB0
A_DDR2_DQSB1
A_DDR2_DQ0
A_DDR2_DQ1
A_DDR2_DQ2
A_DDR2_DQ3
A_DDR2_DQ4
A_DDR2_DQ5
A_DDR2_DQ6
A_DDR2_DQ7
A_DDR2_DQ8
A_DDR2_DQ9
A_DDR2_DQ10
A_DDR2_DQ11
A_DDR2_DQ12
A_DDR2_DQ13
A_DDR2_DQ14
A_DDR2_DQ15
IC100
B_DDR2_A0
B_DDR2_A1
B_DDR2_A2
B_DDR2_A3
B_DDR2_A4
B_DDR2_A5
B_DDR2_A6
B_DDR2_A7
B_DDR2_A8
B_DDR2_A9
B_DDR2_A10
B_DDR2_A11
B_DDR2_A12
B_DDR2_BA0
B_DDR2_BA1
B_DDR2_BA2
B_DDR2_MCLK
/B_DDR2_MCLK
B_DDR2_CKE
B_DDR2_ODT
/B_DDR2_RAS
/B_DDR2_CAS
/B_DDR2_WE
B_DDR2_DQS0
B_DDR2_DQS1
B_DDR2_DQM0
B_DDR2_DQM1
B_DDR2_DQSB0
B_DDR2_DQSB1
B_DDR2_DQ0
B_DDR2_DQ1
B_DDR2_DQ2
B_DDR2_DQ3
B_DDR2_DQ4
B_DDR2_DQ5
B_DDR2_DQ6
B_DDR2_DQ7
B_DDR2_DQ8
B_DDR2_DQ9
B_DDR2_DQ10
B_DDR2_DQ11
B_DDR2_DQ12
B_DDR2_DQ13
B_DDR2_DQ14
B_DDR2_DQ15
T26
AF26
T25
AF23
T24
AE23
R26
AD22
R25
AC22
AD23
R24
AE22
AC23
AC24
AB22
V25
V24
AB23
U26
U25
U24
AB24
AB26
AA26
AC25
AC26
AB25
AA25
W25
AE26
W24
AF24
AF25
V26
AE25
W26
Y26
AD25
Y25
AE24
AD26
Y24
AD24
AA24
BDDR2_A[0]
BDDR2_A[1]
BDDR2_A[2]
BDDR2_A[3]
BDDR2_A[4]
BDDR2_A[5]
BDDR2_A[6]
BDDR2_A[7]
BDDR2_A[8]
BDDR2_A[9]
BDDR2_A[10]
BDDR2_A[11]
BDDR2_A[12]
BDDR2_D[0]
BDDR2_D[1]
BDDR2_D[2]
BDDR2_D[3]
BDDR2_D[4]
BDDR2_D[5]
BDDR2_D[6]
BDDR2_D[7]
BDDR2_D[8]
BDDR2_D[9]
BDDR2_D[10]
BDDR2_D[11]
BDDR2_D[12]
BDDR2_D[13]
BDDR2_D[14]
BDDR2_D[15]
BDDR2_A[9]
BDDR2_A[3]
BDDR2_A[1]
BDDR2_A[10]
BDDR2_A[5]
BDDR2_A[12]
BDDR2_A[7] TDDR_A[7]
BDDR2_A[0]
BDDR2_A[2]
BDDR2_A[4]
BDDR2_A[0-12]
BDDR2_D[0-15]
BDDR2_A[6]
BDDR2_A[11]
BDDR2_A[8]
BDDR2_BA[0]
BDDR2_BA[1]
BDDR2_BA[2]
BDDR2_MCLK
/BDDR2_MCLK
/BDDR2_RAS
/BDDR2_CAS
BDDR2_DQS0_P
BDDR2_DQS1_P
BDDR2_DQM0_P
BDDR2_DQM1_P
BDDR2_DQS0_N
BDDR2_DQS1_N
BDDR2_D[11]
BDDR2_D[12]
BDDR2_D[9]
BDDR2_D[14]
BDDR2_D[4]
BDDR2_D[3]
BDDR2_D[1]
BDDR2_D[6]
BDDR2_D[15]
BDDR2_D[8]
BDDR2_D[10]
BDDR2_D[13]
BDDR2_D[7]
BDDR2_D[0]
BDDR2_D[2]
BDDR2_D[5]
BDDR2_CKE
BDDR2_ODT
/BDDR2_WE
R325 56
R326 56
AR311
AR313
AR304
AR310
56
AR312
56
OPT
AR303
56
AR305
56
56
TDDR_D[11]
TDDR_D[12]
TDDR_D[14]
TDDR_D[15]
TDDR_D[10]
TDDR_D[13]
TDDR_A[9]
TDDR_A[3]
TDDR_A[1]
56
TDDR_A[5]
TDDR_A[12]
TDDR_A[0]
TDDR_A[2]
TDDR_A[4]
56
TDDR_A[6]
TDDR_A[11]
TDDR_A[8]
R327 56
R328 56
R329 56
R330 22
R331 22
R332 56
+1.8V_DDR
R333 56
R335 56
R336 56
R337 56
R339 56
R340 56
R341 56
R342 56
TDDR_D[9]
TDDR_D[4]
TDDR_D[3]
TDDR_D[1]
TDDR_D[6]
TDDR_D[8]
TDDR_D[7]
TDDR_D[0]
TDDR_D[2]
TDDR_D[5]
QIMONDA
1G
HYNIX
QIMONDA
512M
HYNIX EAN55705501 H5PS5162FFR-S6C
EAN55687601 HYB18TC1G160C2F-2.5
EAN55706101 HY5PS1G1631CFP-S6
EAN54839201 HYB18TC512160B2F-2.5
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
DDR2
EAX60737402
DDR2
2009. 1.15.
3 13
Page 23
2:E18
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
2:E18
2:E19
2:E19
2:E18
DSUB_VSYNC
DSUB_HSYNC
DSUB_B
DSUB_G
DSUB_R
L401
BLM18PG600SN1D
L402
BLM18PG600SN1D
L400
BLM18PG600SN1D
C1834
68pF
50V
R443
R441
R442
75
75
75
C1833
68pF
50V
C418
C419
C420
PC RGB
+3.3V
R447
4.7K
D420
5.6V
AMOTECH
OPT
+5V_ST
R448
1K
EDID_WP
ISP_RXD
ISP_TXD
DSUB_DET
1:AJ19
DBG_TX
DBG_RX
+5V_ST
R457
6.2K
SPG09-DB-009
D400
ENKMC2838-T112
A1
C
18pF
C402
50V
D418
5.6V
OPT
RED_G ND
A2
R406
4.7K
R444
22
H_SYN C
DDC_D ATA
GND_2
BLUE_ GND
RED2GREEN3BLUE4GND_15DDC_G ND
GREEN _GND
13
12
11
8
7
6
1
JK404
SPG09-DB-010
C421
0.1uF
16V
NC
9
R412
R416
10K
100
R445
22
D419
AMOTECH
5.6V
OPT
R446
0
OPT
DDC_C LOCK
V_SYN C
SYNC_ GND
15
14
SHILE D
16
10
C400
AMOTECH
D413
30V
C401
18pF
0.1uF
16V
50V
R404
4.7K
AMOTECH
D414
30V
AMOTECH
IC400
CAT24C02WI-GT3
A0
A1
A2
VSS
OPT
OPT
OPT
VCC
8
1
WP
7
2
SCL
6
3
SDA
5
4
R437
68
R44068
D415
30V
AMOTECH
D416
30V
AMOTECH
D417
30V
AMOTECH
RS232C
C425
0.33uF
16V
DOU T28RIN 2
7
9
10
DIN 2
ROU T2
R458
6.2K
C426 220pF 50V
C427 220pF 50V
JK406
C428
0.33uF
16V
6V-5
IC403
MAX3232CDR
11
12
DIN 1
1
SIDE_USB
+5V_ST
C429
0.33uF
16V
C430
0.047uF
25V
C1-2V+
C2+
C2-
3
4
13
14
RIN 1
ROU T1
R460
100
R459
100
6
7
2
C1+
1
15
GND16VCC
DOU T1
R461
D423
0
ADUC30S03010L_AMODIODE
OPT
30V
D424
ADUC30S03010L_AMODIODE
8
9
3
4
5
IR_OUT
30V
10
C431
0.1uF
16V
OPT
OPT
1234
USB DOWN STRE AM
JK405
KJA-UB-4-0004
5
Close to JK405
C405
0.1uF
D425
CDS3C05HDMI1
5.6V
C407
100uF
D426
CDS3C05HDMI1
5.6V
IC402
MP6211DH
OUT_3
OUT_2
OUT_1
GND
1
8
IN_1
2
7
IN_2
3
6
FLAG
EN
5
4
USB_CTL
1:AI26
SIDE_USB_DM
SIDE_USB_DP
1:AL8
1:AL7
R420
10K
R403
47
+5V_USB_SIDE
C403
0.1uF
USB_OCD
1:AI14
PC AUDIO
JK401
PEJ027-01
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
E_SPRING
3
T_TERMINAL1
6A
B_TERMINAL1
7A
R_SPRING
4
T_SPRING
5
B_TERMINAL2
7B
T_TERMINAL2
6B
SHIELD_PLATE
8
D421
AMOTECH
5.6V
OPT
D422
AMOTECH
5.6V
OPT
C422
100pF
50V
C424
100pF
PC_R_IN
PC_L_IN
2:S16
2:S16
R449
470K
R450
470K
50V
R452
15K
R453
10K
R454
10K
R456
0
R455
R451
0
15K
SPDIF_OUT
2:X18
R418 22
SPDIF OUT
+5V_GENERAL +5V_GENERAL
R462
1K
OPT
AMOTECH
C408
100pF
OPT
50V
ZD403
C406
0.1uF
16V
VINPUT
JK403
JST1223-001
GND
VCC
1
2
3
Fib er Op tic
4
FIX_POLE
EAX60737402
INTERFACE_1
2009. 1.15.
4 13
Page 24
Component1/2 and AV1(rear)
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
+3.3V
R502
4.7K
AMOTECH
R500
0
D500
5.6V
AMOTECH
D504
30V
AMOTECH
AMOTECH
R503
0
D501
AMOTECH
5.6V
D502
30V
D503
30V
D513
AMOTECH
5.6V
R505
75
R509
470K
R508
R511
75
470K
R510
75
C500
1000pF
50V
JK502
PPJ-230-01
11
FIX -TER
13
10
[RD ]MONO
4
5
6
7
8
9
C503
1000pF
50V
R521
10K
R519
1K
R520
10K
R537
COMP1_DET
009:I7
R548
0
R536
12K
R538
0
12K
COMP1_L_IN
010:A2
COMP1_Pr_IN
011:A4
COMP1_Pb_IN
011:A4
COMP1_Y_IN
011:A4
COMP1_R_IN
010:A2
JK503
PPJ-230-01
11
13
4
5
6
7
8
9
10
FIX -TER
[RD ]MONO
6
8
7
5
4
R501
0
AMOTECH
D505
5.6V
AMOTECH
D509
30V
AMOTECH
AMOTECH
R504
0
D510
AMOTECH
30V
D511
AMOTECH
5.6V
D506
AMOTECH
5.6V
D507
30V
D508
30V
D514
AMOTECH
5.6V
R506
75
R514
470K
+3.3V
R512
4.7K
R513
470K
R516
75
R515
75
D515
AMOTECH
5.6V
R507
470K
R517
0
C501
1000pF
50V
+3.3V
C502
100pF
50V
C504
1000pF
50V
R523
10K
R524
4.7K
C505
0.1uF
16V
R535
10K
R522
10K
R542
R539
1K
12K
R543
75
R540
12K
R544
1K
R545
12K
R541
0
C507
47pF
50V
R549
0
COMP2_DET
009:I7
COMP2_L_IN
COMP2_Pr_IN
011:A4
COMP2_Pb_IN
COMP2_R_IN
010:A2
011:A4
COMP2_Y_IN
011:A4
AV1_CVBS_IN
011:A3
AV1_DET
009:I7
AV1_L_IN
010:A2
010:A3
To SIDE AV BOARD
P500
12507WS-08L
1
2
3
4
5
6
7
8
9
AMOTECH
D516
30V
AMOTECH
D517
5.6V
D518
5.6V
AMOTECH
R525
C538
0.1uF
16V
+3.3V
4.7K
R526
470K
R527
470K
AMOTECH
D519
30V
C539
100pF
50V
C540
100pF
50V
R528
1K
R529
10K
R530
10K
R531
0
R534
R532
12K
R533
12K
C541
47pF
75
50V
AV2_CVBS_IN
AV2_DET
AV2_L_IN
AV2_R_IN
PPJ231-01
JK504
D512
AMOTECH
5.6V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
R518
470K
C506
100pF
50V
R546
10K
12K
R547
010:A3
AV1_R_IN
EAX60737402
INTERFACE_2
2009. 1.15.
5 13
Page 25
20
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
EAG59023302
JK600
20
EAG59023302
JK601
20
EAG59023301
OPT
R657
2K
2K
R612
R613
R635
2K
0
C
R615
E
R610 22
R611
R607
0
10K
B
22
Q601
2SC3052
C600
0.1uF
16V
1K
UI_HW_PORT1
OPT
R658
0
C
R616
E
R603 22
R604
R605
0
10K
B
22
Q602
2SC3052
C601
0.1uF
16V
1K
UI_HW_PORT2
OPT
R659
0
C
Q604
R637 22
R638
R639
B
E
22
0
2SC3052
C606
0.1uF
16V
1K
5V_HDMI_1
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
R600
CK+
D0-
D0_GND
D0+
D1-
D1_GND
D1+
D2-
D2_GND
D2+
GND
5V_HDMI_2
R601
CK+
D0-
D0_GND
D0+
D1-
D1_GND
D1+
D2-
D2_GND
D2+
GND
5V_HDMI_3
R636
CK+
D0-
D0_GND
D0+
D1-
D1_GND
D1+
D2-
D2_GND
D2+
R634
10K
+3.3V_HDMI
OPT
1K
R663
K19;X14;AH25
+3.3V_HDMI
OPT
1K
R664
+3.3V_HDMI
OPT
1K
R665
OPT
10K
R667
2:E10;AL9
DDC_SCL_1
2:E10;AL9
CEC_REMOTE
2:E8
CK-_HDMI1
2:E8
CK+_HDMI1
2:E9
D0-_HDMI1
2:E8
D0+_HDMI1
2:E9
D1-_HDMI1
2:E9
D1+_HDMI1
2:E9
D2-_HDMI1
2:E9
D2+_HDMI1
OPT
10K
R668
2:E12;AL19
2:E12;AL18
DDC_SCL_2
K8;X14;AH25
CEC_REMOTE
2:E11
CK-_HDMI2
2:E10
CK+_HDMI2
2:E11
D0-_HDMI2
2:E11
D0+_HDMI2
2:E11
D1-_HDMI2
2:E11
D1+_HDMI2
2:E12
D2-_HDMI2
2:E12
D2+_HDMI2
OPT
10K
R666
DDC_SDA_1
HPD2
DDC_SDA_2
HPD3
DDC_SDA_3
DDC_SCL_3
CEC_REMOTE
CK-_HDMI3
CK+_HDMI3
D0-_HDMI3
D0+_HDMI3
D1-_HDMI3
D1+_HDMI3
D2-_HDMI3
D2+_HDMI3
HPD1
DDC_SDA_1
DDC_SCL_1
CK-_HDMI1
CK+_HDMI1
D0-_HDMI1
D0+_HDMI1
D1-_HDMI1
D1+_HDMI1
D2-_HDMI1
UI_HW_PORT1
D2+_HDMI1
SIDE HDMI
JACK_GND
20
19
18
17
16
15
14
13
12
11
CK+
10
D0-
9
D0_GND
8
EAG42025501
D0+
7
D1-
6
D1_GND
5
D1+
4
D2-
3
D2_GND
2
D2+
1
R624
4.7K
1/10W
1%
5V_HDMI_4
R614
2K
R602
HDMI EEPROM
5V_HDMI_3
R643
4.7K
5V_HDMI_4
+3.3V_ST
R628
4.7K
A2
C
R629
4.7K
A2
C
R649
4.7K
R644
4.7K
+5V_ST
A1
ENKMC2838-T112
D600
+5V_ST
A1
ENKMC2838-T112
D602
+5V_ST
A1CA2
ENKMC2838-T112
D606
+5V_ST
A1CA2
ENKMC2838-T112
D601
R630
4.7K
R631
OPT
OPT
C605
0.1uF
16V
GND
EDID_WP
DDC_SCL_1
DDC_SDA_1
EDID_WP
DDC_SCL_2
DDC_SDA_2
EDID_WP
DDC_SCL_3
DDC_SDA_3
EDID_WP
DDC_SCL_4
DDC_SDA_4
CEC_REMOTE
5V_HDMI_1
UI_HW_PORT2
R653
R623 0
R621 0
R645 0
R642 0
R647 0
R648 0
R619
0
Q600
OPT
R620 0
R622 0
10K
R626
C603
0.1uF
R654
10K
C607
0.1uF
R655
10K
C615
0.1uF
C604
0.1uF
MMBD301LT1G
DRAIN1
6
GATE2
5
SOURCE2
4
4.7K
5V_HDMI_2
R646
4.7K
R656
10K
R627
120K
D603
30V
IC600
GND
CAT24C02WI-GT3
A0
1
A1
2
A2
3
VSS
4
IC602
CAT24C02WI-GT3
A0
1
A1
2
A2
3
VSS
4
IC604
CAT24C02WI-GT3
A0
1
A1
2
A2
3
VSS
4
IC601
CAT24C02WI-GT3
A0
1
A1
2
A2
3
VSS
4
8
7
6
5
8
7
6
5
SOURCE1
GATE1
DRAIN2
VCC
R618
WP
0
SCL
SDA
VCC
R640
WP
0
SCL
SDA
VCC
8
R641
WP
0
7
SCL
6
SDA
5
VCC
8
WP
7
SCL
6
SDA
5
SSM6N15FU
1
2
3
R625 0
+3.3V
D0-_HDMI2
D0+_HDMI2
CK+_HDMI2
DDC_SDA_2
DDC_SCL_2
26Y127Z128
VCC_4
D0+_HDMI_SW
D0-_HDMI_SW
CK+_HDMI_SW
2:E14;AL14
2:E15;AL13
K19;K8;AH25
2:E13
2:E13
2:E13
2:E14
2:E14
2:E14
CK-_HDMI2
29
GND_5
SCL_SINK30SDA_SINK31HPD_SINK
CK-_HDMI_SW
DDC_SCL_SW
DDC_SDA_4
DDC_SCL_4
CEC_REMOTE
CK-_HDMI4
CK+_HDMI4
D0-_HDMI4
2:E13
D0+_HDMI4
2:E14
D1-_HDMI4
D1+_HDMI4
D2-_HDMI4
D2+_HDMI4
+5V_HDMI_SW
OPT
VDD50HPD251SDA252SCL253B2154A2155VCC_756B2257A2258GND_759B2360A2361VCC_862B2463A2464HPD3
49
32
S1
DDC_SDA_SW
HPD4
D605
30V
MMBD301LT1G
C616
0.1uF
OPT
A14
48
B14
47
VCC_6
46
A13
45
B13
44
GND_6
43
A12
42
B12
41
VCC_5
40
A11
39
B11
38
SCL1
37
SDA1
36
HPD1
35
EQ
34
S2
33
R651
4.7K
+3.3V_HDMI
R652
4.7K
C608
0.1uF
C610
0.1uF
C611
0.1uF
0.1uF
C613
0.1uF
C609
0.1uF
C612
UI_HW_PORT3
D2+_HDMI3
D2-_HDMI3
D1+_HDMI3
D1-_HDMI3
D0+_HDMI3
D0-_HDMI3
CK+_HDMI3
CK-_HDMI3
DDC_SCL_3
DDC_SDA_3
+3.3V_HDMI
OPT
OPT
R66 1
4.7 K
R66 2
4.7 K
SEL1_HDMI_SW
SEL2_HDMI_SW
SEL1
L
L
L
H DDC2, HPD2
H
H
H
L
SDA3
1
SCL3
2
GND_1
3
B31
4
A31
5
VCC_1
6
B32
GND_2
VCC_2
GND_3
VSADJ
7
A32
8
9
B33
10
A33
11
12
B34
13
A34
14
15
16
17Y418Z419
BU16027KV
BU16027KV
20Y321Z322
VCC_3
L600
BLM18PG121SN1D
C614
0.1uF
+3.3V_HDMI
OPT
R65 0
4.7 K
0
R632
OPT
R633
4.7K
L: HDMI1.3 Compliant Cable
H: 10m 28 AWG Cable
I/O SelectedSEL2
DDC1, HPD1
DDC3, HPD3
Unselected, HPD ALL
IC603-*1
23Y224Z225
26Y127Z128
29
GND_4
VCC_4
GND_5
SCL_SILK30SDA_SILK31HPD_SILK
+3.3V
BLM18PG121SN1D
RESERVE2
HPD251SDA252SCL253B2154A2155VCC_756B2257A2258GND_759B2360A2361VCC_862B2463A2464HPD3
49
50
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
S1
+3.3V_HDMI
L601
HDMI_EQ_SEL
A14
B14
VCC_6
A13
B13
GND_6
A12
B12
VCC_5
A11
B11
SCL1
SDA1
HPD1
RESERVE1
S2
C617
0.1uF
HDMI_CEC
D1+_HDMI2
D1-_HDMI2
D2+_HDMI2
D2-_HDMI2
SDA3
1
SCL3
2
GND_1
3
B31
4
A31
5
VCC_1
6
B32
7
A32
8
GND_2
9
B33
10
A33
11
VCC_2
12
B34
13
A34
14
GND_3
15
VSADJ
16
17Y418Z419
D2+_HDMI_SW
OPT
R660
0
C
Q603
E
R608
R606 22
R609
B
22
0
2SC3052
C602
0.1uF
16V
1K
TMDS351PAGR
20Y321Z322
VCC_3
D2-_HDMI_SW
D1+_HDMI_SW
D1-_HDMI_SW
R617
10K
IC603
TMDS351PAG
23Y224Z225
GND_4
OPT
1K
R669
JK603
GND
UI_HW_PORT3
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
HDMI
JK602
GND
UI_HW_PORT4
EAX60737402
HDMI
2009. 1.15.
6 13
Page 26
2:X21
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
+1.8V_AMP
L700
BLM18PG121SN1D
1uF
MCLK SDATA WCK BCK TP is necessory
2:X21
2:X21
2:X21
1:L22;11:AG10
1:L22;11:AG9
C700
10V
1:AA21
+1.8V_AMP
AMP_RST
AUDIO_MASTER_CLK
L701
R703
BLM18PG121SN1D
C702
0.1uF
16V
MS_LRCH
MS_LRCK
MS_SCK
SDA_SUB/AMP
SCL_SUB/AMP
R725
12
C741
1000pF
50V
C742
1000pF
50V
R726
12
R727
12
C743
1000pF
50V
C744
1000pF
50V
R728
12
C736
10uF
35V
R705
12
R713
12
R716
12
R719
12
SB_MUTE
NTP_MUTE
L704
DA-8580
EAP38319001
2S
1S 1F
L705
DA-8580
EAP38319001
2S
1S 1F
1:AA19;G25;9:AI24;9:AI25
1:AA22
SPK_L+
SPK_L-
SPK_R+
SPK_R-
WAFER-ANGLE
5
4
3
2
1
P700
AB10
SPEAKER_L
AB11
AB11
SPEAKER_R
AB12
C749
2F
2F
C745
0.47uF
50V
C746
0.47uF
50V
0.1uF
50V
C750
0.1uF
50V
C751
0.1uF
50V
C752
0.1uF
50V
SPK_L+
AE3
SPK_L-
AE5
SPK_R+
AE7
SPK_R-
AE9
4.7K
R731
4.7K
R732
4.7K
R733
4.7K
R734
3.3
R735
3.3
C756
0.01uF
50V
C757
0.01uF
50V
R736
3.3
R737
3.3
C758
0.01uF
50V
L706
120-ohm
L707
120-ohm
L709
120-ohm
L708
120-ohm
C755
0.01uF
50V
R730
D704
R729
10K
C720
0.01uF
50V
1N4148W
100V
OPT
D705
1N4148W
100V
OPT
D706
1N4148W
100V
OPT
D707
1N4148W
100V
OPT
AMP_VCC
C735
C734
0.1uF
0.1uF
50V
50V
D709
ENKMC2838-T112
A1
C
A2
AMP_VCC
C729
C733
0.1uF
50V
C716
22000pF
50V
R704
100
C707
1000pF
50V
R740
0
+3.3V
C709
0.1uF
C708
C705
1000pF
50V
1uF
C704
10V
100pF
50V
C706
0.1uF
16V
R708
3.3K
R722 100
R720 100
R721 100
R709 100
R710 100
0
C71 3
0.1 uF16V
C760
1uF
10V
C712
33pF
50V
BST1A
VDR1A
RESET
DVSS_1
VSS_IO
CLK_I
VDD_IO
DGND_PLL
AGND_PLL
AVDD_PLL
DVDD_PLL
TEST0
+1.8V_AMP
C714
33pF
50V
AD
LFM
C715
0.1uF
16V
1
2
3
4
5
6
7
8
9
10
11
12
13
14
OUT1A_1
OUT1A_2
PGND1A_1
PGND1A_2
54
55
56
IC701
EAN60664001
NTP-3100L
15
16
17
WCK19BCK20SDA21SCL
DVDD
SDATA
DVSS_2
53
18
PVDD1B_2
PVDD1A_1
PVDD1A_2
51
52
OUT1B_1
OUT1B_2
PVDD1B_1
47
48
49
50
22
MONITOR_023MONITOR_124MONITOR_2
C72 4
0.1 uF
16V
0.1uF
50V
PGND1B_2
46
25
FAULT26VDR2B27BST2B
C721
0.1uF
16V
R717
C726
22000pF
50V
C727
0.1uF
16V
VDR1B44BST1B45PGND1B_1
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
PGND2B_1
33K
OPT
C725
10uF
35V
NC
VDR2A
BST2A
PGND2A_2
PGND2A_1
OUT2A_2
OUT2A_1
PVDD2A_2
PVDD2A_1
PVDD2B_2
PVDD2B_1
OUT2B_2
OUT2B_1
PGND2B_2
R718 100
C73 0
0.1 uF
16V
C731
22000pF
50V
R724
10K
Q701
2SC3052
C732
22000pF
50V
+3.3V_ST
C
E
C728
0.1uF
50V
B
2A => 5A
BLUETOOTH BLUETOOTH Audio TR Amp
+5V_GENERAL
C761 1uF
R747
R751
0
47K
2SC3052
Q703
R744
0
C
E
BT_LOUT_AMP
B
BT_DM
BT_DP
S
R749
4.7K
BT_ON/OFF
G
D
Q702
RTR030P02
R746
0
R750
0
OPT
R748
0
12507WR-08L
R757
47K
OPT
C766
22uF
16V
Q706
E
C
2SA1504S
P701
1
2
3
4
5
6
7
8
9
BT_LOUT_AMP
B
2SC3052
R758
3K
R756
3K
Q704
+5V_GENERAL
L711
CIC21J501NE
C773
OPT
0.1uF
L710
CIC21J501NE
C764
0.1uF
16V
BT_LOUT
16V
+12V
C765
0.1uF
C762
10uF
6.3V
C763
0.1uF
16V
16V
OPT
R752
1K
R754
R753
470
47K
B
R755
15K
C
E
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
AMP
EAX60737402
AMP
2009. 1.15.
7 13
Page 27
FROM LIPS & POWER B/D
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
+3.3V_ST
INV_CTL
R823
10K
OPT
ERROR_OUT
A_DIM
+12V
C1816
22uF
Placed on SMD-TOP
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
POWER
+5V_GENERAL
R818
BackLight On/Off
B
OPT
C821
68uF
35V
R841
0
R851
R1802
10K
R2
1/8W
1%
D801
100V
1N4148W_DIODES
C
E
C807
0.1uF
OPT
4.7K
3.3K
Q802
2SC3052
16V
C813
0.1uF
50V
FB
GND
IN
BS
C1806
100uF
16V
R815
6.8K
OPT
CB3216UA121
R1803
10K
1/10W
1
2
3
4
+6V_DTMB
R822
10K
R821
10K
+24V
C832
68uF
35V
L1802
CIC21J501NE
Close to IC
C1817
OPT
3.3V_DEMOD/1.2V_DTMB
+3.3V_DEMOD
C1805
0.1uF
16V
C1808
10uF
10V
+3.3V_DEMOD
L804
IC808
MP2212DN
$0.24
DEVELOPE
R1804 0
1/10W
5%
R814
100
PWM_DIM2
C818
10V
1uF
C1818
OPT
1000pF
R1805
1% R1809
62K
EN/SYNC
8
SW_2
7
SW_1
6
VCC
5
C1812
100uF
16V
C1811
0.1uF
50V
NC_1
EN
VIN
NC_2
L1813
BLM18PG121SN1D
FM20020-24
NC
1
GND
3
GND
5
5.2V
7
5.2V
9
GND
11
12V
13
GND
15
20V
17
NC
19
A_DIM
21
23
R801
R816
0
OPT
Close to IC
R1
+3.3V
R1807
10
1/10W
1%
R1806
0
C1819
1uF
10V
IC1802
SC4215ISTRT
1
2
3
4
C1809
0.1uF
P800
25
22
R1808
2K
1/10W
4.9A 0.0150OHM 34MHZ
NR8040T3R6N
C1813
0.1uF
50V
2
4
6
8
10
12
14
16
18
20
22
24
1%
5.1K
$0.07
L1803
3.6uH
C1820
0.47uF
16V
GND
8
ADJ
7
VO
6
NC_3
5
+3.3V_DVBC
PWR_ON
GND
GND
5.2V
5.2V
GND
12V
GND
20V
INV_ON
ERROR_OUT
PWM_DIM1
OPC_OUT2
C1821
22uF
10V
3216
Vout=0.8*(1+R1/R2)
C1810
22uF
16V
OPT
C1822
0.1uF
16V
R1800
9.1K
R1801
4.7K
RT1P141C-T112
Q801
3
R807
33K
2
OPT
C802
0.1uF
16V
CB3216UA121
C820
0.1uF
16V
BLM18PG121SN1D
0.1uF
16V
C1823
0.1uF
16V
PI Result
VIN
VC
VOUT
NC
GND1
+1.2V_DTMB
+5V_ST
+3.3V_ST
1
R805
10K
C
Q800
2SC3052
E
L806
CB3216UA121
0.1uF
L807
C865
0.1uF
16V
22R859
OPT
L828
+6V_FE
1
2
3
6
GND2
4
5
KIA78R033F
C1814
0.1uF
16V
+1.8V_DDR
R804
10K
R802
10K
B
C885
16V
+12V
PWM_DIM
OPC_OUT1
BLM18PG121SN1D
L1804
BLM18PG121SN1D
L1805
IC1803
C1815
47uF
10V
C824
220uF
16V
C826
100uF
16V
R806
R810 0
+5V_ST
C1825
0.1uF
16V
C1824
0.1uF
16V
0
OPT
POWER_ON/OFF1
+6V_TUNER
+6V_DTMB
PANEL_CTL
1:AK10
+5V
Vout=0.8*(1+R1/R2)
R1
R2
+5V_ST
BLM18PG121SN1D
1:AK11
POWER_ON/OFF1
Placed on SMD-TOP
C838
C IN
22uF
+12V
R809
10.5K
1%
R871
8.2K
1%
L817
+6V_TUNER
+5V_ST
BLM18PG121SN1D
10V
L810
BLM18PG121SN1D
C845
C842
C841
0.01uF
25V
R837
22K
OPT
R832
10K
C
R833
10K
B
22uF
C876
10uF
C878
10uF
C879
22uF
C880
GND
+3.3V_ST
R856
4.7K
C894
C895
47uF
0.1uF
16V
50V
Q804
2SC3052
E
L826
2.2uH
PGND2_1
PVCC_1C892
PVCC_2
PVCC_3
PGND1_1
2.2uH
L827
R839
22K
1
2
3
4
5
VCC
0.1uF
16V
R842
10K
B
SW2_2
PGND2_2
19
20
IC806
BD9150MUV
7
6
SW1_1
PGND1_2
R800
10K
10uF
C866
BA50BC0WFP-E2
2
1
C
E
CTL
R843
1.8K
8
SW1_2
IC811
10uF
16V
OPT
Q805
2SC3052
+3.3V
10K
9
EN110FB1
3
GND
S6 core 1.26 volt
465 mA @85% efficiency
FB
GND
IN
BS
Replaced Part
OPT
R830
10K
1/16W
IC805
MP2212DN
1
2
$0.24
DEVELOPE
3
4
R826
10
R862 47
1/10W
1%
Close to IC
R825
EN/SYNC
8
SW_2
7
SW_1
6
VCC
5
C837
22uF
OPT
L812
Close to IC
Vout=0.8*(1+R1/R2)
R824
22K
R1
1%
R827
75K
R2
1/8W
1%
PANEL Power
Q806
RSR025P03
S
D
G
C853
1uF
25V
+1.8V_DDR
C877
0.1uF
16V
+1.8V_DDR
R873
56000
5%
C882
330pF
GND
C825
0.1uF
16V
R872
FB217EN218SW2_1
C847
4.7uF
16
16V
C1130
15
14
13
12
11
ITH2
AVCC
NC
AGND
ITH1
C829
1uF
6.3V
+3.3V
+5V_TUNER
OUT
4
5
NC
+3.3V
MAX 3A
R831
1/16W
10K
C891
0.47uF
22K 1%
6.3V
C840
1uF
25V
$0.07
4.9A 0.0150OHM 34MHZ
L813
3.6uH
NR8040T3R6N
C836
10nF
50V
450 mA
+3.3V /
R874
75K
5%
C883
330pF
BLM18PG121SN1D
BLM18PG121SN1D
+5V_TUNER
C897
C896
100uF
4.7uF
16V
10V
C843
22uF
10V
Placed on SMD-TOP
PANEL_POWER
L805
L1812
C898
0.1uF
50V
1600 mA
C849
22uF
10V
C859
0.1uF
16V
+3.3V_AVDD
C811
0.1uF
16V
+3.3V_CI
C2860
0.1uF
+1.26V_VDDC
C856
0.1uF
+12V
+12V
C868
C867
0.47uF
22uF
25V
16V
+12V
+3.3V_MEMC
415 mA @85% efficiency
+24V
BLM18PG121SN1D
+5V_GENERAL
R852
100K
C860
0.01uF
25V
C861
22uF
16V
C886
10uF
6.3V
BS
IN
SW
GND
IC802
MP2305DS
1
$0.28
2
3
4
L830
22UH
Placed on SMD-TOP
C863
0.01uF
25V
C862
0.47uF
25V
C887
0.1uF
16V
R857
100K
SS
8
EN
7
COMP
6
FB
5
C869
22uF
16V
BS
1
IN
2
SW
3
GND
4
R853
R1
56K
1%
Vout=0.923*(1+R1/R2)
C831
22uF
16V
3225
IC812
MP2305DS
$0.28
L831
22UH
Placed on SMD-TOP
R864
18K
C888
330pF
50V
C830
1000pF
OPT
C870
0.1uF
16V
C871
5600pF
50V
8
7
6
5
+1.8V_MEMC for DDR
+3.3V_MEMC
NC_1
L821
+5V_ST
C803
0.1uF
16V
AMP_VCC
C846
100uF
16V
C812
0.01uF
50V
R836
10K
C851
0.1uF
16V
Replaced Part
IC801
AP1117E33G-13
$0.048
3IN1
OUT
EN
VIN
NC_2
R861
1uF
10V
ADJ/GND
2
+3.3V
C800
100uF
16V
EAX60737402
HDMI/USB
R854
9.1K
R855
R2
12.4K
1%
C833
1000pF
OPT
C864
0.1uF
R1
1
2
3
4
IC807
$0.195
33K
R85 8
BD9130EFJ-E2
$0.23
16V
C858
R860
5600pF
50V
9.1K
R863
R2
12.4K
1%
1%
Vout=0.923*(1+R1/R2)
C834
22uF
16V
3225
+1.26V_MEMC Core
IC813
EN
8
C320 MUST BE PLACED NEAR PVCC PIN
PVCC
7
SW
6
PGND
5
GND
8
ADJ
7
VO
6
NC_3
5
R838
1%
12K
1/1 0W
SS
EN
COMP
FB
C857
22uF
16V
ADJ
VCC
ITH
GND
SC4215ISTRT
1
2
3
4
Stand-by +3.3V
+3.3V_ST
C808
C806
0.1uF
100uF
16V
16V
Replaced Part
IC803
AP1117E18G-13
$0.048
IN
C814
0.1uF
16V
POWER
ADJ/GND
3
1
2
OUT
+5V_GENERAL
C87 2
0.1 uF
16V
+3.3V_MEMC
BLM18PG121SN1D
L819
Vout=0.8*(1+R1/R2)
R865
10K
C889
10uF
L832
6.3V
2.2uH
R866
10K
1%
R867
17.4K
1%
R2
+1.8V_FRC_DDR
R1
1/10W
1%
C854
100uF
R2
16V
9.1 K
R84 0
+3.3V_ST
L803
BLM18PG121SN1D
C822
100uF
16V
2009. 1.15.
+5V_HDMI_SW
BLM18PG121SN1D
L820
C873
0.1uF
16V
C874
16V
+5V_USB_SIDE
C875
0.1uF
16V
+3.3V_MEMC
BLM18PG121SN1D
L818
470uF
C88 1
0.1 uF
16V
600mA
+1.26V_MEMC
C890
C893
0.1uF
R1
22uF
16V
16V
400 mA
Vout=0.8*(1+R1/R2)
R1/R2 : 27K / 20K => Vout=1.88
R1/R2 : 15K / 12K => Vout=1.80
R1/R2 : 12K / 9.1K => Vout=1.85
R1/R2 : 18K / 13K => Vout=1.90
C855
0.1uF
16V
+3.3V_AVDD_MPLL
C815
0.1uF
16V
1.8V_AMP
+1.8V_AMP
50 mA
C827
0.1uF
16V
8 13
Page 28
SPI FLASH
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
M_SPI_CZ
M_SPI_DO
WP_FLASH_MEMC
10K
R927
R925 56
R926 56
CS
DO
WP
GND
SW_SPI_FRC
IC902
W25X20AVSNIG
1
2
3
4
VCC
8
HOLD
7
CLK
6
DIO
5
+3.3V_MEMC
R947 56
R948 56
C90 3
0.1 uF
+1.26V_MEMC
M_SPI_CK
M_SPI_DI
Placed on SMD-TOP
C912 22uF
16V
+3.3V_MEMC
C914 10uF
0.1uF
C956
BLM18PG121SN1D
L904
C908
+3.3V_MEMC_AVDD
10uF 10V
+3.3V_MEMC
R992
R993
GPIO14
LOW
HIGH
LOW
URSA_DQ[20]
URSA_DQ[19]
URSA_DQ[17]
URSA_DQ[22]
URSA_DQ[0-31]
URSA_DQ[27]
URSA_DQ[28]
URSA_DQ[25]
URSA_DQ[30]
URSA_DQ[31]
URSA_DQ[24]
URSA_DQ[26]
URSA_DQ[29]
URSA_DQ[23]
URSA_DQ[16]
URSA_DQ[18]
URSA_DQ[21]
100
100
OPT
R941
R957
+3.3V_MEMC
1K
R940
OPT
R956
1K
1K
1K
C919
C920 0.1uF
C921
C925
C9220.1uF
C928
0.1uF
C929
0.1uF
0.1uF
C926
0.1uF
C927 0.1uF
0.1uF
0.1uF
CONTACT TO MODULE FOR EMI
M1
MDS61887702
M2
MDS61887702
M3
MDS61887702
M4 OPT
MDS61887702
M5
MDS61887702
+3.3V_MEMC
R949 1K
R950 1K
OPT
+3.3V_MEMC
+1.8V_FRC_DDR
BLM18PG121SN1D
L903
URSAII MINI LVDS TYPE
M+S NORMAL 42"(MST7327N)
URSAII MINI LVDS TYPE
M+S NORMAL 47"(MST7327N)
URSAII MINI LVDS TYPE
M+S GIP 37"(MST7327N)
L902
BLM18PG121SN1D
C913
10uF
MEMC_SDA
MEMC_SCL
URSAII LVDS TYPE
VENUS (MST7329N)
10V
10uF
10uF
C917
C916
Placed on SMD-TOP
C909 22uF
URSA_DQM3
URSA_DQM2
URSA_DQS2
URSA_DQSB2
URSA_DQS3
URSA_DQSB3
URSA_MCLK
URSA_MCLKZ
URSA_ODT
GPIO12
LOW
LOW
HIGH
HIGH HIGH
16V
0.1uF
C923
XTAL
C900
20pF
R934 1M
X900
12MHz
C902
20pF
M_XTALIM_XTALO
10K
R951
1uF
C91 8
10K
0.1 uF
R952
C924
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
GPIO[8]
GPIO[9]
GPIO[10]
GPIO[11]
GPIO[12]
GPIO[13]
GPIO[22]
GPIO[23]
GPIO[14]
GPIO[15]
GPIO[16]
GPIO[17]
GPIO[18]
GPIO[19]
GPIO[20]
GPIO[21]
MDATA[20]
MDATA[19]
MDATA[17]
MDATA[22]
MDATA[27]
MDATA[28]
MDATA[25]
MDATA[30]
AVDD_DDR_2
DQSB[2]
AVDD_DDR_4
DQSB[3]
AVDD_DDR_5
MDATA[31]
MDATA[24]
MDATA[26]
MDATA[29]
AVDD_DDR_6
MDATA[23]
MDATA[16]
MDATA[18]
MDATA[21]
MCLK[0]
MCLKZ[0]
AVDD_MEMPLL
C93 2
0.1uF
0.1uF
SDAS
SCLS
GND_14
VDDC_1
VDDP_2
GND_7
GND_15
VDDC_2
DQM[3]
DQM[2]
GND_10
DQS[2]
VDDP_3
GND_8
DQS[3]
GND_11
GND_1
MVREF
C93 3
ODT
C93 4
0.1uF
E1
D1
F1
G1
K8
E5
E2
F2
F3
G2
M4
M5
G3
E4
F4
G4
H4
J4
K4
L4
J6
H9
K9
F6
H1
H2
H3
J1
J2
J3
K1
K2
K6
K3
L1
J8
L2
L3
L6
L8
H10
M1
M2
L7
M3
N1
J9
N2
N3
L10
P1
R1
T1
T2
R2
P2
G7
L9
N5
N4
T3
RASZR3CASZ
0.1uF
URSA_RASZ
URSA_CASZ
MEMC_RXE3+
MEMC_RXE3-
MEMC_RXE4+
MEMC_RXE4-
P3
GND_12
MADR[0]T4MADR[2]R4MADR[4]
C93 5
0.1uF
URSA_A[0]
URSA_A[2]
URSA_A[4]
MEMC_RXE2+
MEMC_RXEC+
MEMC_RXEC-
[E1]
[D1]
J10
P4
MADR[6]T5MADR[8]
C93 6
URSA_A[6]
URSA_A[8]
MEMC_RXE1+
MEMC_RXE1-
MEMC_RXE2-
[N5]
[N4]
R5
P5
T6
WEZ
BADR[1]R6BADR[0]P6MADR[1]
MADR[11]
URSA_A[11]
URSA_WEZ
URSA_BA1
MEMC_RXE0+
MEMC_RXE0-
R928
100
R930
100
R935
100
R945
100
R938
100
R942
100
AVDD_LVDS_1
RE0NA4RE0PC4RE1NC3RE1PA3RE2NB3RE2PB2RECKNA2RECKPC2RE3NC1RE3PA1RE4NB1RE4P
B4
F11
[L9]
T7
MADR[10]
URSA_A[1]
URSA_A[10]
URSA_BA0
MEMC_RXO4+
C93 7
0.1 uF
L11
R7
MADR[5]P7MADR[9]
AVDD_DDR_7
URSA_A[5]
URSA_A[9]
MEMC_RXO4-
MEMC_RXO3+
MEMC_RXOC+
MEMC_RXO3-
T8
R8
MADR[7]P8MADR[3]
MADR[12]
URSA_A[12]
URSA_A[7]
URSA_A[3]
MEMC_RXO0-
MEMC_RXO1-
MEMC_RXO1+
MEMC_RXO0+
MEMC_RXOC-
MEMC_RXO2+
MEMC_RXO2-
R929
100
R931
100
R936
100
R946
100
R939
100
R943
100
C93 9
GND_5
AVDD_LVDS_2
RO0NA8RO0PC8RO1NC7RO1PA7RO2NB7RO2PB6ROCKNA6ROCKPC6RO3NC5RO3PA5RO4NB5RO4PH8GND_6
H7
B8
G11
IC900
LGE7329A
N8
K10
T9
K7
P9
T10
K11
MCLKE
GND_16F7VDDC_3
GND_13
MDATA[4]R9MDATA[3]
MDATA[1]
MDATA[6]
AVDD_DDR_3
C93 8
0.1 uF
URSA_DQ[4]
URSA_DQ[3]
URSA_DQ[1]
URSA_DQ[6]
URSA_MCLKE
URSA_A[0-12]
M_XTALO
M_XTALI
+3.3V_MEMC
0.1 uF
XIND4XOUT
GPIO_14
GPIO_13
D3
K16
K15
R10
P10
T11
MDATA[9]
MDATA[11]
MDATA[12]
URSA_DQ[11]
URSA_DQ[12]
URSA_DQ[9]
BLM18PG121SN1D
L905
GPIO[25]
SCLMD5SDAM
GPIO_1
GPIO_2
N7
D6
A14
B14
R11
J11
P11
T12
DQM[1]
DQM[0]
MDATA[14]
AVDD_DDR_1
URSA_DQ[14]
URSA_DQM1
URSA_DQM0
C90 4
GPIO_9
GPIO_12
E11
R12
DQS[0]
DQSB[0]
URSA_DQS0
C906
0.1 uF
GND_2
GPIO_8
G8
D11
D13
P12
H11
J7
GND_9
VDDP_1
C94 1
URSA_DQSB0
1uF
AVDD_PLL
F10
T13
DQS[1]
URSA_DQS1
URSA_A0P
URSA_A0M
URSA_A1P
R13
DQSB[1]
0.1 uF
URSA_DQSB1
URSA_A1M
URSA_A2P
URSA_A2M
LVA2M
LVA2P
LVA1MC9LVA1PA9LVA0MB9LVA0P
B10
A10
C10
P13
T14
R14
MDATA[8]
MDATA[15]
MDATA[10]
C94 5 0.1 uF
URSA_DQ[15]
URSA_DQ[8]
URSA_DQ[10]
URSA_A3P
URSA_ACKP
URSA_ACKM
LVA3P
LVACKM
LVACKP
C11
A11
B11
P14
T15
MDATA[7]
MDATA[13]
URSA_DQ[13]
URSA_DQ[7]
URSA_A3M
URSA_A4P
URSA_A4M
LVA4M
LVA4P
LVA3M
B12
A12
C12
R15
P15
T16
MDATA[0]
MDATA[2]
MDATA[5]
URSA_DQ[0]
URSA_DQ[2]
URSA_DQ[5]
URSA_B0P
LVB0PD7GPIO_4D9GPIO_6
B13
[N13]
[N12]
R16
P16
MCLK[1]
MCLKZ[1]N9GPIO[26]
URSA_MCLK1
URSA_MCLKZ1
URSA_B0M
URSA_B1P
URSA_B1M
LVB1M
LVB1P
LVB0M
C14
C13
A13
N10
N11
M11
RESET
GND_17
GPIO[27]
0
R953
URSA_DQ[0-31]
REXT
D12
D8
D10
E10
E3
D2
C15
B15
A15
A16
B16
C16
D15
D16
F9
G10
E15
E16
E14
F14
F16
F15
G15
G16
G14
H14
H16
H15
J15
J16
J14
K14
G9
L14
L15
L16
M16
F8
M15
M14
N16
N15
H6
N6
E12
D14
F12
E13
F13
G13
H13
J13
K12
L12
K13
M12
M13
L13
N14
N13
N12
G6
VDDC_4
R954
820
GPIO_5
GPIO_7
GPIO_11
GPIO_10
GPIO_3
LVB2P
LVB2M
LVBCKP
LVBCKM
LVB3P
LVB3M
LVB4P
LVB4M
AVDD_33_2
GND_4
LVC0P
LVC0M
LVC1P
LVC1M
LVC2P
LVC2M
LVCCKP
LVCCKM
LVC3P
LVC3M
LVC4P
LVC4M
LVD0P
LVD0M
LVD1P
LVD1M
GND_3
LVD2P
LVD2M
LVDCKP
LVDCKM
AVDD_33_1
LVD3P
LVD3M
LVD4P
LVD4M
VDDC_5
GPIO[24]
GPIO[7]
GPIO[6]
GPIO[5]
GPIO[4]
GPIO[3]
GPIO[2]
GPIO[1]
GPIO[0]
PWM0
PWM1
CSZ
SDO
SDI
SCK
GPIO[30]
GPIO[29]
GPIO[28]
C94 4
PANEL_POWER
H
Enable
H
JEIDA
H L
H / NC L
10bit(D) 8bit
C907
C905
10uF
+3.3V_MEMC_AVDD
Reverse
51 [1]
LVDS_SEL
45 [7]
OPC_EN
42 [10]
BIT_SEL
25 [27]
10uF 10V
OPT
R955
22
SCANNING_ENABLE
OPT
OPT
C958
0.1uF
OPT
OPT
C960
0.1uF
C959
0.1uF
0.1uF
C949
0.1uF
URSA_B2P
URSA_B2M
URSA_BCKP
URSA_BCKM
URSA_B3P
URSA_B3M
URSA_B4P
URSA_B4M
URSA_C0P
URSA_C0M
URSA_C1P
URSA_C1M
URSA_C2P
URSA_C2M
URSA_CCKP
URSA_CCKM
URSA_C3P
URSA_C3M
URSA_C4P
URSA_C4M
URSA_D0P
URSA_D0M
URSA_D1P
URSA_D1M
BIT_SEL
OPC_OUT2
OPC_EN
OPC_OUT1
PWM_DIM
LVDS_SEL
C957
C950
+3.3V_MEMC
10K
R994
URSA_D2P
URSA_D2M
URSA_DCKP
URSA_DCKM
URSA_D3P
URSA_D3M
URSA_D4P
URSA_D4M
M_SPI_CZ
M_SPI_DO
M_SPI_DI
M_SPI_CK
WP_FLASH_MEMC
OPT
+3.3V_MEMC
1K
R959
1K
R960
EEPROM
R963
R964
I2C
SPI
1K
1K
OPT
GPIO8
PWM1 PWM0
HIGH
LOW
HIGH
HIGH
HIGH
HIGH HIGH
0.1uF
C947
0.1uF
OPT
R933
0
0.1 uF
R932
R969
R965
R966
22
510
22
22
R967
22
OPT
HIGH
LOW
L / NC
Disable
L / NC
VESA
DisableEnable
+3.3V_MEMC
OPT
R970 3.3K
R972 510
OPT
0
R971 0
R973
OPT
R978 3.3K
OPT
0
0
R979
SCANNING_DISABLE
R937
L907
CB3216PA501E
C953
C952
C951
220uF
16V
0.1uF
1000pF
P900
TF05-51S
1
2
3
4
5
6
7
8
9
0.1uF
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
TF05-41S
52
P901
42
URSA_B4M
URSA_B4P
URSA_B3M
URSA_B3P
URSA_BCKM
URSA_BCKP
URSA_B2M
C961
OPT
URSA_B2P
URSA_B1M
URSA_B1P
URSA_B0M
URSA_B0P
URSA_A4M
URSA_A4P
URSA_A3M
URSA_A3P
URSA_ACKM
URSA_ACKP
URSA_A2M
URSA_A2P
URSA_A1M
URSA_A1P
URSA_A0M
URSA_A0P
OPT
C962
0.1uF
URSA_D4M
URSA_D4P
URSA_D3M
URSA_D3P
URSA_DCKM
URSA_DCKP
URSA_D2M
URSA_D2P
URSA_D1M
URSA_D1P
URSA_D0M
URSA_D0P
URSA_C4M
URSA_C4P
URSA_C3M
URSA_C3P
URSA_CCKM
URSA_CCKP
URSA_C2M
URSA_C2P
URSA_C1M
URSA_C1P
URSA_C0M
URSA_C0P
C963
0.1uF
OPT
OPT
C964
0.1uF
OPT
MEMC_RESET
ISP Port for FRC
P902
12507WR-04L
1
2
3
4
MEMC_SCL
MEMC_SDA
001:F38;001:AE31
001:F38;001:AE31
5
EAX60737402
2009. 1.15.
MST7329N(FRC) MAIN 139
Page 29
DDR2 1.8V By CAP - Place these Caps near Memory
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
0.1uF
C1017
0.1uF
C1018
+1.8V_FRC_DDR
0.1uF
0.1uF
C1020
C1019
0.1uF
+1.8V_FRC_DDR +1.8V_FRC_DDR
C1001
0.1uF
0.1uF
C1007
C1009
0.1uF
0.1uF
0.1uF
0.1uF
C1002
10uF
C1004
C1005
C1003
10uF 10V
C1006
C1011
0.1uF
C1012
0.1uF
C1013
0.1uF
C1014
0.1uF
C1015
0.1uF
C1016
C1022
+1.8V_FRC_DDR
C1026
C1024
C1025
0.1uF
0.1uF
0.1uF
C1023
10uF
10uF 10V
C1027
0.1uF
C1028
10uF
C1029
0.1uF
C1031
0.1uF
C1033
0.1uF
C1034
0.1uF
C1035
0.1uF
C1036
0.1uF
C1037
0.1uF
C1038
C1039
0.1uF
0.1uF
C1040
0.1uF
C1041
0.1uF
010:AL20;009:AB4
URSA_DQ[0-31]
URSA_DQ[27]
URSA_DQ[28]
URSA_DQ[25]
URSA_DQ[30]
URSA_DQ[22]
URSA_DQ[17]
URSA_DQ[19]
URSA_DQ[20]
URSA_DQ[31]
URSA_DQ[24]
URSA_DQ[26]
URSA_DQ[29]
URSA_DQ[23]
URSA_DQ[16]
URSA_DQ[18]
URSA_DQ[21]
56
56
56
56
AR1000
AR1001
AR1002
AR1003
DDR_DQ[27]
DDR_DQ[28]
DDR_DQ[25]
DDR_DQ[30]
DDR_DQ[22]
DDR_DQ[17]
DDR_DQ[19]
DDR_DQ[20]
DDR_DQ[31]
DDR_DQ[24]
DDR_DQ[26]
DDR_DQ[29]
DDR_DQ[23]
DDR_DQ[16]
DDR_DQ[18]
DDR_DQ[21]
+1.8V_FRC_DDR
DDR_DQ[16]
DDR_DQ[17]
DDR_DQ[18]
DDR_DQ[19]
DDR_DQ[20]
DDR_DQ[21]
DDR_DQ[22]
DDR_DQ[23]
DDR_DQ[24]
DDR_DQ[16-31]
DDR_DQ[25]
DDR_DQ[26]
DDR_DQ[27]
DDR_DQ[28]
DDR_DQ[29]
DDR_DQ[30]
DDR_DQ[31]
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
VDD5
VDD4
VDD3
VDD2
VDD1
VDDQ10
VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
VSS5
VSS4
VSS3
VSS2
VSS1
VSSQ10
VSSQ9
VSSQ8
VSSQ7
VSSQ6
VSSQ5
VSSQ4
VSSQ3
VSSQ2
VSSQ1
DQ0
G8
DQ1
G2
DQ2
H7
DQ3
H3
DQ4
H1
DQ5
H9
DQ6
F1
DQ7
F9
DQ8
C8
DQ9
C2
D7
D3
D1
D9
B1
B9
A1
E1
J9
M9
R1
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
A3
E3
J3
N1
P9
B2
B8
A7
D2
D8
E7
F2
F8
H2
H8
IC1000
H5PS5162FFR-S6C
A_URSA_RASZ
A_URSA_CASZ
R1024 22R1005 22
R1025 22
A_URSA_MCLKE
R1027 22R1008 22
R1031 56
R1032 56
R1033 56
R1034 56
R1035 56R1016 56
R1036 56R1017 56
+1.8V_FRC_DDR
R1037
1K1%
R1038
1K1%
DDRA_A[0-12]
A_URSA_BA0
A_URSA_BA1
+1.8V_FRC_DDR
C1030
0.1uF
DDRA_A[0]
DDRA_A[1]
DDRA_A[2]
DDRA_A[3]
DDRA_A[4]
DDRA_A[5]
DDRA_A[6]
DDRA_A[7]
DDRA_A[8]
DDRA_A[9]
DDRA_A[10]
DDRA_A[11]
DDRA_A[12]
150
R1039
A10/AP
OPT
H5PS5162FFR-S6C
VREF
J2
A0
M8
A1
M3
A2
M7
A3
N2
A4
N8
A5
N3
A6
N7
A7
P2
A8
P8
A9
P3
M2
A11
P7
A12
R2
BA0
L2
BA1
L3
CK
J8
CK
K8
CKE
K2
ODT
K9
CS
L8
RAS
K7
CAS
L7
WE
K3
LDQS
F7
UDQS
B7
LDM
F3
UDM
B3
LDQS
E8
UDQS
A8
NC4
L1
NC5
R3
NC6
R7
NC1
A2
NC2
E2
NC3
R8
VSSDL
J7
VDDL
J1
IC1001
URSA_DQ[0-31]
DDR_DQ[15]
DQ0
DDR_DQ[0]
G8
DQ1
DDR_DQ[1]
G2
DQ2
DDR_DQ[2]
H7
DQ3
DDR_DQ[3]
H3
DQ4
DDR_DQ[4]
H1
DQ5
DDR_DQ[5]
H9
DQ6
DDR_DQ[6]
F1
DQ7
DDR_DQ[7]
F9
DQ8
DDR_DQ[8]
C8
DQ9
DDR_DQ[9]
C2
DQ10
DDR_DQ[10]
D7
DQ11
DDR_DQ[11]
D3
DQ12
DDR_DQ[12]
D1
DQ13
DDR_DQ[13]
D9
DQ14
DDR_DQ[14]
B1
DQ15
DDR_DQ[15]
B9
VDD5
A1
VDD4
E1
VDD3
J9
VDD2
M9
VDD1
R1
VDDQ10
A9
VDDQ9
C1
VDDQ8
C3
VDDQ7
C7
VDDQ6
C9
VDDQ5
E9
VDDQ4
G1
VDDQ3
G3
VDDQ2
G7
VDDQ1
G9
VSS5
A3
VSS4
E3
VSS3
J3
VSS2
N1
VSS1
P9
VSSQ10
B2
VSSQ9
B8
VSSQ8
A7
VSSQ7
D2
VSSQ6
D8
VSSQ5
E7
VSSQ4
F2
VSSQ3
F8
VSSQ2
H2
VSSQ1
H8
DDR_DQ[0-15]
+1.8V_FRC_DDR
DDR_DQ[13]
DDR_DQ[7]
DDR_DQ[0]
DDR_DQ[2]
DDR_DQ[5]
DDR_DQ[11]
DDR_DQ[12]
DDR_DQ[9]
DDR_DQ[14]
DDR_DQ[6]
DDR_DQ[1]
DDR_DQ[3]
DDR_DQ[4]
AR1004
AR1005
AR1006
AR1007
URSA_DQ[15]
URSA_DQ[8]DDR_DQ[8]
56
URSA_DQ[10]DDR_DQ[10]
URSA_DQ[13]
URSA_DQ[7]
URSA_DQ[0]
56
URSA_DQ[2]
URSA_DQ[5]
URSA_DQ[11]
URSA_DQ[12]
56
URSA_DQ[9]
URSA_DQ[14]
URSA_DQ[6]
URSA_DQ[1]
56
URSA_DQ[3]
URSA_DQ[4]
010:E20;009:AB4
+1.8V_FRC_DDR
1K1%
R1001
AR1016
AR1018
22
22
URSA_A[0-12]
URSA_A[1]
URSA_A[10]
URSA_A[9]
URSA_A[12]
URSA_A[7]
URSA_A[5]
URSA_A[2]
URSA_A[0]
URSA_A[6]
URSA_A[4]
URSA_RASZ
URSA_CASZ
URSA_A[8]
URSA_A[11]
009:AB4
009:AB4
010:Q14;009:J10
010:X16
010:X16
010:V8
009:X4
009:Y4
009:X4
009:W4
009:X4
009:Y4
URSA_BA0
URSA_BA1
URSA_MCLKE
URSA_WEZ
A_URSA_BA0
A_URSA_BA1
A_URSA_MCLKE
A_URSA_WEZ
AR1010
22
AR1011
22
AR1012
22
AR1019
22
URSA_MCLK1
URSA_MCLKZ1
010:V9
URSA_ODT
A_URSA_RASZ
A_URSA_CASZ
A_URSA_WEZ
URSA_DQS0
URSA_DQS1
URSA_DQM0
URSA_DQM1
URSA_DQSB0
URSA_DQSB1
010:T9;009:S4
010:T9;009:R4
010:T9;009:T4
010:T8;009:R4
010:AA15
010:AA15
010:Z14
010:Y13
DDRA_A[3]URSA_A[3]
DDRA_A[1]
DDRA_A[10]
DDRA_A[9]
DDRA_A[12]
DDRA_A[7]
DDRA_A[5]
DDRA_A[2]
DDRA_A[0]
DDRA_A[6]
DDRA_A[4]
DDRA_A[8]
DDRA_A[11]
1K 1%
R1002
C1010
0.1uF
VREF
J2
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
BA0
BA1
CK
CK
CKE
ODT
CS
RAS
CAS
WE
LDQS
UDQS
LDM
UDM
LDQS
UDQS
NC4
NC5
NC6
NC1
NC2
NC3
VSSDL
VDDL
DDRB_A[0]
DDRB_A[1]
DDRB_A[2]
DDRB_A[3]
DDRB_A[4]
DDRB_A[5]
DDRB_A[6]
DDRB_A[7]
DDRB_A[8]
DDRB_A[9]
DDRB_A[10]
DDRB_A[11]
DDRB_A[12]
OPT
R1000
+1.8V_FRC_DDR
B_URSA_BA0
B_URSA_BA1
150
R1006 22
R1012 56
R1013 56
R1014 56
R1015 56
DDRB_A[0-12]
B_URSA_RASZ
B_URSA_CASZ
DDRB_A[10]
DDRB_A[1]
DDRB_A[9]
DDRB_A[12]
DDRB_A[7]
DDRB_A[5]
DDRB_A[0]
DDRB_A[2]
DDRB_A[4]
DDRB_A[6]
DDRB_A[11]
DDRB_A[8]
URSA_MCLK
URSA_MCLKZ
B_URSA_MCLKE
URSA_ODT
B_URSA_RASZ
B_URSA_CASZ
B_URSA_WEZ
URSA_DQS2
URSA_DQS3
URSA_DQM2
URSA_DQM3
URSA_DQSB2
URSA_DQSB3
010:Q14
010:Q13
010:V10;009:S4
010:V10;009:R4
010:V10;009:T4
010:V10;009:R4
AR1013
22
AR1014
22
AR1015
22
AR1017
22
009:J11
009:J10
010:T10
010:Y14;009:J10
010:R16
010:R16
010:T10
009:J14
009:J13
009:J15
009:J15
009:J14
009:J13
B_URSA_BA0
B_URSA_BA1
B_URSA_MCLKE
B_URSA_WEZ
URSA_BA0
URSA_BA1
URSA_MCLKE
URSA_WEZ
URSA_A[10]
URSA_A[1]
URSA_A[3]DDRB_A[3]
URSA_A[9]
URSA_A[12]
URSA_A[7]
URSA_A[5]
URSA_A[0]
URSA_A[2]
URSA_A[4]
URSA_A[6]
URSA_RASZ
URSA_CASZ
URSA_A[11]
URSA_A[8]
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
L2
L3
J8
K8
K2
K9
L8
K7
L7
K3
F7
B7
F3
B3
E8
A8
L1
R3
R7
A2
E2
R8
J7
J1
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
EAX60737402
MST7327N DDR2
2009. 1.15.
10
13
Page 30
+5V_TUNER
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
0
R1114
TUNER TDFR-Z752D
RF_SWITCH_SEL
CTR
1
GAIN-SW
2
+B1
3
VTU
4
RF_AGC
5
+B2
6
NC_1
7
SIF
8
VIDEO
9
NC_2
24
10
11
12
13
14
15
16
17
18
19
20
21
22
23
SHIELD
NC_3
TU_IF
NC_4
GND
NC_5
NC_6
SDA
SCL
NC_7
IF_AGC
DIF1
DIF2
NC_8
TU1100
TDFR-Z752D
R1100
47
C1100
0.1uF
16V
BOOSTER
OPT
R2827
0
R1121
0
R1101
R1102 0
C1116
10pF
C2841
0.1uF
16V
0
Close to tuner
010:F6
RF_AGC_CE6210
R1103
C1102
47pF
50V
C1101
0.1uF
16V
0
C1105
100pF 50V
C1103
47pF
50V
L1100
MLB-201209-0120P-N2
C1104
220uF
16V
R1104 47
R1105
47
+5V_TUNER
C1106
C1107
0.1uF
220uF
16V
16V
DIF_FILTER
L1102
220nH
R1122
0
R1123
0
+5V_TUNER
+5V_TUNER
L1101
MLB-201209-0120P-N2
B
R1106
4.7K
R1107
OPT
TU_SDA_5V
TU_SCL_5V
TU_IF_AGC
001:F3
R1108
0
240
R1109
240
R1110
E
C
82
2SA1530A-T112-1R
Q1100
001:C6
001:C5
R1111 0
ROUTE SYMMETRICALLY
DIF_FILTER
L1104
CM2012FR47KT
0.47uH
DIF_FILTER
C1110
39pF
50V
BOOSTER
C1111
0.01uF
25V
R1112
0
TU_DIF1
TU_DIF2
OPT
R1113
2SA1504S
C1112
0.01uF
25V
FE_SIF
001:F2
001:F2
Q1101
E
B
C
C1113
100uF
16V
R1115
2.2K
Q1103
2SC3875S(ALY)
+5V_TUNER
OPT
R1116
C1114
0.1uF
16V
C
B
E
0
E
B
C
R1119
10K
1/16W
5%
R1117
270
R1118
270
2SA1530A-T112-1R
Q1102
FE_BOOSTER_CTL
R1120
0
C1115
220pF
50V
OPT
FE_VMAIN
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
TUNER
L1103
220nH
DIF_FILTER
EAX60737402
TUNER
2009. 1.15.
11 13
Page 31
IR_OUT
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
CONTROL
IR & LED
R1321
C1307
0.1uF
L1314
BLM18PG121SN1D
L1302
SCL_SUB/AMP
SDA_SUB/AMP
ZD1302
AMOTECH
C1310
0.1uF
16V
+3.3V_ST
OPT
OPT
C1314
0.1uF
16V
R1320
4.7K
BLM18PG121SN1D
BLM18PG121SN1D
C1315
1000pF
50V
C1309
100pF
50V
LED_ON
L1301
L1303
ZD1303
5.6V
AMOTECH
R1323 0
0.1uF
R1324
C1305
10K
+3.3V
BLM18PG121SN1D
R1319
4.7K
R1318
+5V_ST
100
R1317
100
L1313
BLM18PG121SN1D
KEY1
KEY2
R1305
IR
+5V_ST
10K
R1302
IR-OUT
R1303
IR-OUT
Q1301
2SC3052
IR-OUT
+5V_ST
10K
C
B
E
IR-OUT
R130022
IR-OUT
R1301
IR-OUT
Q1300
2SC3052
IR-OUT
10K
C
B
E
100
R130447K
5.6V
C1313
0.1uF
C1311
1000pF
50V
100
R1322
100
ZD1304
AMOTECH
ZD1305
5.6V
AMOTECH
ZD1300
CDS3C05HDMI1
5.6V
5.6V
ZD1301
CDS3C05HDMI1
5.6V
R1325 4.7K
P1304
12507WS-12L
1
2
3
4
5
6
7
8
9
10
11
12
13
SCL
SDA
GND
KEY1
KEY2
5V_ST
GND
WARM_ST
IR
GND
3.3V
PWR_ON
Zener Diode is
close to wafer
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
IR & LED
2009. 1.15.EAX60737402
13 13
Page 32
009:U17;009:AQ6
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
AGC_CE6210
TU_DIF2
TU_DIF1
009:U18;009:AQ6
010:F6
6.8K
R1504
OPT
R1551
C1504
C1505
0
220pF
220pF
Should be placed on the Top layer
50V
OPT
50V
C1506
5600pF
50V
RF_AGC_CE6210
C1507
22pF
50V
OPT
R1505
+3.3V_DVBC
R1553
C1508
22pF
50V
0
010:F6
+3.3V_DVBC
+1.8V_TU
+3.3V_DVBC
R1558
1K
1K
R1560
R1561
0
+3.3V_DVBC
+1.8V_AVDD
TU_SCL_3.3V
TU_SDA_3.3V009:Z7
AGC1
AGC2/GPP1
AVDD
GND_7
GND_8
VDD_3
RFLEV
PLLVDD
PLLTEST
GND_6
GND_5
GPP0
CLK2
DATA2
SMTEST
CVDD_6
CVDD_5
CVDD_4
CVDD_3
CVDD_2
CVDD_1
VDD_5
VDD_4
VDD_2
VDD_1
7
1
16
VIN
30
VIN
31
40
39
28
29
32
33
34
22
21
26
23
17
45
46
25
2
55
43
27
3
11
IC1502
CE6210
36
41
13
57
42
15
44
1K
C1513
0.1uF
16V
OPT
R1508
0
10K
R1557
75K
R1559
R1554
4.7K
R15780R15790R15800R1581
R1577
0
SADD2
SADD3
SADD4
4
18
+3.3V_DVBC
0
SADD0
SADD1
5
38
37
19
9
10
Device Address 0x0E
MICLK
63
MOCLK
61
MDO0
49
MDO1
50
MDO2
51
MDO3
52
MDO4
53
MDO5
54
MDO6
59
MDO7
60
MOVAL
48
MOSTRT
47
BKERR
62
STATUS
14
SLEEP
20
IRQ
6
R1563
33
R1564
33
0
R1570
+3.3V_DVBC
C1529
0.1uF
C1523
10pF
+3.3V_DVBC
R1571
100
OPT
R15830
OPT
R1572
200
C1524
10pF
C1530
0.1uF
A1[RD]
A2[GN]
C1531
0.1uF
LD1500
SAM2333
NON_CI
R1573
22
AR1501
22
AR1502
22
AR1500
C
C1532
0.1uF
CE_TP0_DATA[0]
CE_TP0_DATA[1]
CE_TP0_DATA[2]
CE_TP0_DATA[3]
CI
CE_TP0_DATA[4]
CE_TP0_DATA[5]
CE_TP0_DATA[6]
CE_TP0_DATA[7]
CI
22
C1533
0.1uF
013:G4
CE_TP0_DATA[0-7]
CE_TP0_CLK
CE_TP0_VALID
CE_TP0_SYNC
+3.3V_DVBC
L1500
MLB-201209-0120P-N2
C1502
47uF
16V
C1503
0.1uF
SC1565IST-1.8
VIN
1
IC1501
XTO24XTI
Need to test crystal matching
Crystal’s Load Capacitance is 12pF
+1.8V_TU
VO
3
2
GND
0.1uF
C1509
C1510
100uF
16V
0.1uF
C1511
0.1uF
C1512
0.1uF
C1514
0.1uF
C1517
22pF
C1515
0.1uF
X1500
10MHz
MLB-201209-0120P-N2
C1516
C1519
22pF
L1501
GND_18GND_212GND_335GND_9
OSCMODE
+1.8V_AVDD
C1518
50V
0.01uF
C1520
10uF
16V
GND_4
GND_1058GND_13
+3.3V_DVBC
0.1uF
C1522
C1521
GND_1156GND_1264GND_14
0.1uF
+3.3V_DVBC
IC1506
MC14066BDR2G
R1585
IN1
AGC_LGS8G75
SEL_CE6210
TU_IF_AGC
AGC_CE6210
001:AJ19
009:X31
009:AQ7
010:A3
4.7K
R1584
0
R1586
0
R1587
0
R1588
0
R1589
0
OUT1
OUT2
CONTROL2
CONTROL3
1
2
3
IN2
4
5
6
VSS
7
14
13
12
11
10
9
8
4.7K
R1582
VDD
CONTROL1
CONTROL4
IN4
OUT4
OUT3
IN3
CLK1
RESET
FE_DEMOD_SCL
001:D21;009:X20
RESET_CE6210
001:AI27
+3.3V_DVBC
R1590
0
DATA1
FE_DEMOD_SDA
001:D21;009:X22
4.7K
R1591
SEL_LGS8G75 001:AJ19
SEL_CE6210
001:F8
FE_TS_DATA[0-7]
+3.3V_DVBC
FE_TS_CLK
FE_TS_VAL_ERR
FE_TS_SYN
FE_TS_SERIAL_DATA
+3.3V_DVBC
R1576
R1575
10K
B
AR1503
22
AR1504
22
AR1505
47K
CI
CI
22
C
IC1505
2SC3875S(ALY)
E
C1525
0.1uF
C1526
0.1uF
GND_1
VCC_1
GND_2
GND_3
VCC_2
GND_4
IC1504
74LVC16244ADGG
1OE
1
1Y0
2
1Y1
3
4
1Y2
5
1Y3
6
7
2Y0
8
2Y1
9
10
2Y2
11
2Y3
12
3Y0
13
3Y1
14
15
3Y2
16
3Y4
17
18
4Y0
19
4Y1
20
21
4Y2
22
4Y3
23
4OE
24
2OE
48
1A0
47
1A1
46
GND_8
45
1A2
44
1A3
43
VCC_4
42
2A0
41
2A1
40
GND_7
39
2A2
38
2A3
37
3A0
36
3A1
35
GND_6
34
3A2
33
3A3
32
VCC_3
31
4A0
30
4A1
29
GND_5
28
4A2
27
4A3
26
3OE
25
CE_TP0_DATA[0-7]
C1528
0.1uF
C1527
0.1uF
013:G4
CE_TP0_DATA[0]
CE_TP0_DATA[1]
CE_TP0_DATA[3]
CE_TP0_DATA[4]
CE_TP0_DATA[5]
CE_TP0_DATA[6]
CE_TP0_DATA[7]
CE_TP0_CLK
CE_TP0_VALID
CE_TP0_SYNC
R1562
4.7K
FE_TS_DATA[0]
FE_TS_DATA[1]
FE_TS_DATA[2]
FE_TS_DATA[3] CE_TP0_DATA[2]
FE_TS_DATA[4]
FE_TS_DATA[5]
FE_TS_DATA[6]
FE_TS_DATA[7]
CE_TP0_CLK
CE_TP0_VALID
CE_TP0_SYNC
013:F5
013:F5
013:F5
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
+3.3V_DVBC
CHINA_CI
CE6210
2008.12.29
1115
Page 33
Option : DVB-CI
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
DVB-CI SLOT
/CI_CD1
CI_TS_DATA[4]
CI_TS_DATA[5]
CI_TS_DATA[6]
CI_TS_DATA[7]
CI_IORD
CI_IOWR
CI_MDI[0]
CI_MDI[1]
CI_MDI[2]
CI_MDI[3]
CI_MDI[4]
CI_MDI[5]
CI_MDI[6]
CI_MDI[7]
PCM_RST
/PCM_WAIT
CI_TS_CLK
CI_TS_VAL
CI_TS_SYN
CI_TS_DATA[0]
CI_TS_DATA[1]
CI_TS_DATA[2]
CI_TS_DATA[3]
CI_MISTRT
CI_MIVAL_ERR
CI_MCLKI
+5V_CI_ON
+5V_GENERAL
10K
R1619
C1601
0.1uF
16V
GND
R1625
R1621
R1624
C1603
10K
R1626
C1602
0.1uF
16V
R1627 100
10K
0.1uF
10K
100
AR1600
33
R1617
47
AR1601
AR1602
47
33
33
+5V_GENERAL
R1620
10K
R1615
REG
/CI_CD2
C1606
10uF
10V
R1629 0
GND
R1630
OPT
EAG41860102
P1600
10067972-000LF
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
0
OPT
52
53
54
55
56
57
58
59
65
66
67
68
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
R1634
18
19
20
21
22
23
24
25
2660
2761
2862
2963
3064
31
32
33
34
G1G2
1
69
GND
R1635
0
OPT
GND
R1636
C1608
0.1uF
47
100
GND
CI_DATA[3]
CI_DATA[4]
CI_DATA[5]
CI_DATA[6]
CI_DATA[7]
CI_DATA[0]
CI_DATA[1]
CI_DATA[2]
CI_DATA[0-7]
CI_DATA[0-7]
R1637
10K
CI_ADDR[10]
CI_ADDR[11]
CI_ADDR[9]
CI_ADDR[8]
CI_ADDR[13]
CI_ADDR[14]
CI_ADDR[12]
CI_ADDR[7]
CI_ADDR[6]
CI_ADDR[5]
CI_ADDR[4]
CI_ADDR[3]
CI_ADDR[2]
CI_ADDR[1]
CI_ADDR[0]
/PCM_CE
CI_OE
+5V_GENERAL
CI_WE
GND
CI_ADDR[0-14]
R1638
10K
C1609
0.1uF
16V
/PCM_IRQA
DVB-CI TS INPUT
011:D14
CI_MIVAL_ERR
DVB-CI HOST I/F
PCM_A[0]
CI_ADDR[7]
PCM_A[1]
CI_ADDR[6]
PCM_A[2]
CI_ADDR[5]
PCM_A[3]
CI_ADDR[4]
CI_MDI[7]
CI_MDI[6]
CI_MDI[5]
CI_MDI[4]
CI_MDI[3]
CI_MDI[2]
CI_MDI[1]
CI_MDI[0]
CI_MISTRT
CI_MCLKI
CI_DET
33
33
AR1603
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
AR1607
AR1608
IC1601
33
1
2
3
4
5
6
7
8
9
10
TOSHIBA
0ITO742440D
TC74LCX244FT
FE_TS_DATA[7]
FE_TS_DATA[6]
FE_TS_DATA[5]
FE_TS_DATA[4]
FE_TS_DATA[3]
FE_TS_DATA[2]
FE_TS_DATA[1]
FE_TS_DATA[0]
FE_TS_SYN
FE_TS_VAL_ERR
FE_TS_CLK
VCC
20
2OE
19
1Y1
18
2A4
17
1Y2
16
2A3
15
1Y3
14
2A2
13
1Y4
12
2A1
11
+3.3V_CI
FE_TS_DATA[0-7]
FE_TS_DATA[0-7]
C1610
0.1uF
16V
CI_ADDR[0]
PCM_A[7]
CI_ADDR[1]
PCM_A[6]
CI_ADDR[2]
PCM_A[5]
CI_ADDR[3]
PCM_A[4]
DVB-CI DETECT
011:E12
/CI_CD2
/CI_CD1
011:D4
CI POWER ENABLE CONTROL
+5V_ST
C1600
0.1uF
16V
PCM_5V_CTL
R1616
33K
IC1600
74LVC1G32GW
1B 5 VCC
3GND2A4 Y
R1622
R1623
R1618
10K
B
2.2K
33
33
AR1604
AR1605
AR1609
AR1610
AR1606
PCM_D[0]
33
PCM_D[1]
PCM_D[2]
PCM_D[3]
PCM_D[4]
33
PCM_D[5]
PCM_D[6]
PCM_D[7]
33
PCM_A[8]
PCM_A[9]
PCM_A[10]
PCM_A[11]
PCM_A[12]
PCM_A[13]
PCM_A[14]
/PCM_REG
/PCM_OE
/PCM_WE
/PCM_IORD
/PCM_IOWR
PCM_D[0-7]
PCM_D[0-7]
CI_DATA[0]
CI_DATA[1]
CI_DATA[2]
CI_DATA[3]
+3.3V_CI
C16 05
GND
Q1601
RSR025P03
S
22K
C
Q1600
2SC3052
E
G
C1604
10uF
10V
+3.3V_CI
16V
0.1 uF
R1628
47
D
+5V_CI_ON
R1631
C1607
0.1uF
16V
10K
R1632
011:AB9
CI_DET
001:AA10
R1633
33K
/PCM_CD
47
CI_DATA[0-7]
CI_DATA[0-7]
CI_ADDR[8]
CI_ADDR[9]
CI_ADDR[10]
CI_ADDR[11]
CI_ADDR[12]
CI_ADDR[13]
CI_ADDR[14]
CI_OE
CI_WE
CI_IORD
CI_IOWR
CI_DATA[4]
CI_DATA[5]
CI_DATA[6]
CI_DATA[7]
REG
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
PCMCIA
EAX
PCMCIA
2008.11.28
16 11
Page 34
AGC_LGS8G75
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
010:F6
TU_SDA_3.3V
TU_SCL_3.3V
TU_DIF2
TU_DIF1
LGS_TP_DATA[0-7]
R2829
180
C2843
0.1uF
C2858 220pF
C2857 220pF
LGS_TP_SYNC
LGS_TP_VALID
LGS_TP_CLK
R2830
4.7K
C2844
0.1uF
R1713 0
R1714 0
R2831
1M
X1501
30.4MHz
C2845
18pF
LGS_TP_DATA[7]
LGS_TP_DATA[6]
LGS_TP_DATA[5]
LGS_TP_DATA[4]
LGS_TP_DATA[3]
LGS_TP_DATA[2]
LGS_TP_DATA[1]
LGS_TP_DATA[0]
+2.5V_LGSVDD
Close to IC
C2846
18pF
+1.2V_DTMB
R1716 0
R2859
0
OPT
A10
J10
D12
H12
K11
G12
H11
M12
L12
J12
L11
E10
M10
B12
C12
C11
F10
G11
K12
A4
D6
E1
F9
G7
A5
A8
C2
D8
G4
G9
M7
C5
G6
K8
L7
L9
M8
B4
B7
B9
D3
E5
E8
F2
H5
H8
L6
M9
L1
K1
AR900
0
1/16W
R1720
0
NON_CI
AR901 0
CI
CI
AR902 0
A3
C4
B5
MPEG_D0J3MPEG_D1H2MPEG_D2G1MPEG_D3H3MPEG_D4D2MPEG_D5C1MPEG_D6A2MPEG_D7
VDD1.2_1
VDD1.2_2
VDD1.2_3
VDD1.2_4
VDD1.2_5
VDD1.2_6
VDD1.2_7
VDD2.5_1
VDD2.5_2
VDD2.5_3
VDD2.5_4
VDD2.5_5
VDD2.5_6
VDD2.5_7
VDD2.5_8
VDD2.5_9
RES_38
RES_42
RES_49
RES_47
RES_45
RES_46
RES_48
AGC
RFAGC
SHUTDOWN
CLK_OBS
SDAT
SCLT
IP
IM
QP
QM
DGND_1
DGND_2
DGND_3
DGND_4
DGND_5
DGND_6
DGND_7
DGND_8
DGND_9
DGND_10
DGND_11
DGND_12
DGND_13
DGND_14
DGND_15
XTALOUT
XTALIN
RES_1A1RES_2A7RES_6B1RES_7B2RES_9B6RES_13C7RES_16D1RES_22E2RES_23E3RES_24E4RES_25E6RES_26E7RES_32F5RES_33F6RES_34F7RES_35F8RES_37
MPEG_CLK
To External ADC
A6I0M6I1H7I2G8I3M5I4M4I5L5I6K6I7M3I8K4I9M1Q0L2Q1K3Q2K2Q3J1Q4J2Q5H1Q6G2Q7J4Q8G3Q9J5
MPEG_SYNC
MPEG_VALID
IC1804
LGS-8G75-A1
RES_39H6RES_40H9RES_41
RES_44J8RES_43
J6
G10
H10
+2.5V_LGSVDD
R1715
10K
RES_29F1RES_17D4RES_12C3RES_30F3RES_8
RESETN
BLKERRN
LOCK
RES_21
RES_28
RES_3
RES_20
RES_36
RES_10
RES_14
RES_4
RES_5
RES_11
RES_15
CEA0
CEA1
CEA2
RES_27
RES_31
RES_19
RES_18
IF_CLK
GPIO0
GPIO1
VDD2.5_10
PLL_AVDD1.2
PLL_AGND
PLL_VDD1.2
PLL_GND
ADC_VDD1.2
AGND
IBIAS
B3
+1.2V_DTMB
C1710
C1712
C1714
C1716
C1718
C1720
C1722
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
+2.5V_LGSVDD
C1711
C1713
C1715
C1717
C1719
C1721
C1723
C1724
C1725
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
+2.5V_LGSVDD
R2836
330
A1[RD]
A2[GN]
LD1503
SAM2333
SDA_LGS8G75
SCL_LGS8G75
+2.5V_LGSVDD
L1809
MLB-201209-0120P-N2
C2848
0.1uF
1uF
C2847
RESET_LGS8G75
C
+1.2V_DTMB
L1808
SEL_LGS8G75
001:F8
FE_TS_DATA[0-7]
+3.3V_LGSVDD
R1719
4.7K
FE_TS_CLK
FE_TS_VAL_ERR
FE_TS_SYN
FE_TS_SERIAL_DATA
R1706
10K
FE_TS_DATA[0]
FE_TS_DATA[1]
FE_TS_DATA[2]
FE_TS_DATA[3]
FE_TS_DATA[4]
FE_TS_DATA[5]
FE_TS_DATA[6]
FE_TS_DATA[7]
B
AR1700
AR1701
AR1702
CI
CI
R1707
22
22
22
47K
C
IC908
2SC3875S(ALY)
E
+3.3V_LGSVDD
C1706
0.1uF
C1707
0.1uF
GND_1
VCC_1
GND_2
GND_3
VCC_2
GND_4
IC1702
74LVC16244ADGG
1OE
1
1Y0
2
1Y1
3
4
1Y2
5
1Y3
6
7
2Y0
8
2Y1
9
10
2Y2
11
2Y3
12
3Y0
13
3Y1
14
15
3Y2
16
3Y4
17
18
4Y0
19
4Y1
20
21
4Y2
22
4Y3
23
4OE
24
2OE
48
1A0
47
1A1
46
GND_8
45
1A2
44
1A3
43
VCC_4
42
2A0
41
2A1
40
GND_7
39
2A2
38
2A3
37
3A0
36
3A1
35
GND_6
34
3A2
33
3A3
32
VCC_3
31
4A0
30
4A1
29
GND_5
28
4A2
27
4A3
26
3OE
25
LGS_TP_DATA[0-7]
C1709
0.1uF
C1708
0.1uF
012:A2
LGS_TP_DATA[0]
LGS_TP_DATA[1]
LGS_TP_DATA[2]
LGS_TP_DATA[3]
LGS_TP_DATA[4]
LGS_TP_DATA[5]
LGS_TP_DATA[6]
LGS_TP_DATA[7]
LGS_TP_CLK
LGS_TP_VALID
LGS_TP_SYNC
LGS_TP_CLK
LGS_TP_VALID
LGS_TP_SYNC
012:A1
012:A1
012:A1
+5V_TUNER
AMOTECH
D1700
5.6V
F12
B10
C9
D10
SDA
E11
SCL
D11
E12
A9
D9
F11
B8
C8
A11
A12
B11
C10
J11
R2860 0
K9
R2861 0
G5
R2862 0
H4
BP2
E9
F4
D7
D5
M11
K10
C6
L10
K5
L4
L3
M2
C2850
J7
K7
J9
VBG
L8
1000pF
OPT
C2859
R2832 0
L1806
MLB-201209-0120P-N2
LD1502
SAM2333
C
R2835
330
L1811
MLB-201209-0120P-N2
C2854
0.1uF
MLB-201209-0120P-N2
C28530.1uF
C2852
0.1uF
1uF
C2851
OPT
A1[RD]
A2[GN]
+2.5V_LGSVDD
MLB-201209-0120P-N2
L1810
C2849
1000pF
L1807
MLB-201209-0120P-N2
FE_DEMOD_SDA
001:D21;010:E4
FE_DEMOD_SCL
001:D21;010:E4
+3.3V_LGSVDD
IC905
2N7002(F)
S
R17000
S
IC904
2N7002(F)
G
D
0
G
R1701
D
+2.5V_LGSVDD
R1703
R1702
5.6K
5.6K
SDA_LGS8G75
009:W32
SCL_LGS8G75
009:W32
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
+3.3V_LGSVDD
C1700
0.1uF
L1700
MLB-201209-0120P-N2
C1701
47uF
16V
+3.3V_DEMOD
IC1700
SC1565IST-2.5TR
VIN
1
C1703
0.1uF
R1705
4.7K
+3.3V_DEMOD
R1708
0
SOURCE1
GATE1
DRAIN2
IC1701
SSM6N15FU
1
2
3
6
5
4
0TFTH80001A
R1709
OPT
0
R1710
0
OPT
DRAIN1
GATE2
SOURCE2
+3.3V_DEMOD
+2.5V_LGSVDD
R17 04
4.7 K
TU_SCL_3.3V009:W33
VO
3
2
GND
C1704
0.1uF
C1705
47uF
16V
TU_SDA_5V009:AQ8
R1711
4.7K
+3.3V_DEMOD
R17 12
4.7 K
TU_SCL_5V 009:AQ8
TU_SDA_3.3V 009:W33
EAX60736301 2009.02.14
LGS8G75
9 11
Page 35
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