LG 43LF5900, 43LF590T-DB Schematic

Internal Use Only
North/Latin America http://aic.lgservice.com Europe/Africa http://eic.lgservice.com Asia/Oceania http://biz.lgservice.com
LED TV
CHASSIS : LT50H
MODEL : 43LF5900 43LF5900-DB
43LF590T 43LF590T-DB
CAUTION
BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
Printed in KoreaP/NO : MFL69272001 (1506-REV00)
CONTENTS
CONTENTS .............................................................................................. 2
PRODUCT SAFETY
SPECIFICATION
ADJUSTMENT INSTRUCTION
................................................................................. 3
....................................................................................... 6
................................................................ 9
BLOCK DIAGRAM ................................................................................. 14
EXPLODED VIEW .................................................................................. 19
SCHEMATIC CIRCUIT DIAGRAM ............................................APPENDIX
TROUBLE SHOOTING
..............................................................APPENDIX
Only for training and service purposes
- 2 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and Exploded View. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.
General Guidance
An isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC power line. Use a transformer of adequate power rating as this protects the technician from accidents resulting in personal injury from electrical shocks.
It will also protect the receiver and it's components from being damaged by accidental shorts of the circuitry that may be inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown, replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor, over 1 W), keep the resistor 10 mm away from PCB.
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed metallic parts of the cabinet, such as antennas, terminals, etc., to be sure the set is safe to operate without damage of electrical shock.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an electrical jumper across the two AC plug prongs. Place the AC switch in the on position, connect one lead of ohm-meter to the AC plug prongs tied together and touch other ohm-meter lead in turn to each exposed metallic parts such as antenna terminals, phone jacks, etc. If the exposed metallic part has a return path to the chassis, the measured resistance should be between 1 MΩ and 5.2 MΩ. When the exposed metal has no return path to the chassis the reading must be infinite. An other abnormality exists that must be corrected before the receiver is returned to the customer.
Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check. Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor between a known good earth ground (Water Pipe, Conduit, etc.) and the exposed metallic parts. Measure the AC voltage across the resistor using AC voltmeter with 1000 ohms/volt or more sensitivity. Reverse plug the AC cord into the AC outlet and repeat AC voltage measurements for each exposed metallic part. Any voltage measured must not exceed 0.75 volt RMS which is corresponds to
0.5 mA. In case any measurement is out of the limits specified, there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer.
Leakage Current Hot Check circuit
Only for training and service purposes
- 3 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service manual and its supplements and addenda, read and follow the
SAFETY PRECAUTIONS on page 3 of this publication. NOTE: If unforeseen circumstances create conict between the
following servicing precautions and any of the safety precautions on page 3 of this publication, always follow the safety precautions. Remember: Safety First.
General Servicing Precautions
1. Always unplug the receiver AC power cord from the AC power source before;
a. Removing or reinstalling any component, circuit board mod-
ule or any other receiver assembly.
b. Disconnecting or reconnecting any receiver electrical plug or
other electrical connection.
c. Connecting a test substitute in parallel with an electrolytic
capacitor in the receiver. CAUTION: A wrong part substitution or incorrect polarity installation of electrolytic capacitors may result in an explo­sion hazard.
2. Test high voltage only by measuring it with an appropriate high voltage meter or other voltage measuring device (DVM, FETVOM, etc) equipped with a suitable high voltage probe. Do not test high voltage by "drawing an arc".
3. Do not spray chemicals on or near this receiver or any of its assemblies.
4. Unless specied otherwise in this service manual, clean
electrical contacts only by applying the following mixture to the contacts with a pipe cleaner, cotton-tipped stick or comparable non-abrasive applicator; 10 % (by volume) Acetone and 90 % (by volume) isopropyl alcohol (90 % - 99 % strength)
CAUTION: This is a ammable mixture. Unless specied otherwise in this service manual, lubrication of
contacts in not required.
5. Do not defeat any plug/socket B+ voltage interlocks with which receivers covered by this service manual might be equipped.
6. Do not apply AC power to this instrument and/or any of its electrical assemblies unless all solid-state device heat sinks are correctly installed.
7. Always connect the test receiver ground lead to the receiver chassis ground before connecting the test receiver positive lead. Always remove the test receiver ground lead last.
8. Use with this receiver only the test xtures specied in this
service manual.
CAUTION: Do not connect the test xture ground strap to any
heat sink in this receiver.
Electrostatically Sensitive (ES) Devices
Some semiconductor (solid-state) devices can be damaged eas­ily by static electricity. Such components commonly are called Electrostatically Sensitive (ES) Devices. Examples of typical ES
devices are integrated circuits and some eld-effect transistors
and semiconductor “chip” components. The following techniques should be used to help reduce the incidence of component dam­age caused by static by static electricity.
1. Immediately before handling any semiconductor component or semiconductor-equipped assembly, drain off any electrostatic charge on your body by touching a known earth ground. Alter­natively, obtain and wear a commercially available discharging wrist strap device, which should be removed to prevent poten­tial shock reasons prior to applying power to the unit under test.
2. After removing an electrical assembly equipped with ES devices, place the assembly on a conductive surface such as aluminum foil, to prevent electrostatic charge buildup or expo­sure of the assembly.
3. Use only a grounded-tip soldering iron to solder or unsolder ES devices.
4. Use only an anti-static type solder removal device. Some solder
removal devices not classied as “anti-static” can generate electrical charges sufcient to damage ES devices.
5. Do not use freon-propelled chemicals. These can generate
electrical charges sufcient to damage ES devices.
6. Do not remove a replacement ES device from its protective package until immediately before you are ready to install it. (Most replacement ES devices are packaged with leads electri­cally shorted together by conductive foam, aluminum foil or comparable conductive material).
7. Immediately before removing the protective material from the leads of a replacement ES device, touch the protective material to the chassis or circuit assembly into which the device will be installed. CAUTION: Be sure no power is applied to the chassis or circuit, and observe all other safety precautions.
8. Minimize bodily motions when handling unpackaged replace­ment ES devices. (Otherwise harmless motion such as the brushing together of your clothes fabric or the lifting of your
foot from a carpeted oor can generate static electricity suf­cient to damage an ES device.)
General Soldering Guidelines
1. Use a grounded-tip, low-wattage soldering iron and appropriate tip size and shape that will maintain tip temperature within the range or 500 °F to 600 °F.
2. Use an appropriate gauge of RMA resin-core solder composed of 60 parts tin/40 parts lead.
3. Keep the soldering iron tip clean and well tinned.
4. Thoroughly clean the surfaces to be soldered. Use a mall wire­bristle (0.5 inch, or 1.25 cm) brush with a metal handle. Do not use freon-propelled spray-on cleaners.
5. Use the following unsoldering technique
a. Allow the soldering iron tip to reach normal temperature.
(500 °F to 600 °F) b. Heat the component lead until the solder melts. c. Quickly draw the melted solder with an anti-static, suction-
type solder removal device or with solder braid.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
6. Use the following soldering technique. a. Allow the soldering iron tip to reach a normal temperature
(500 °F to 600 °F)
b. First, hold the soldering iron tip and solder the strand against
the component lead until the solder melts.
c. Quickly move the soldering iron tip to the junction of the
component lead and the printed circuit foil, and hold it there only until the solder ows onto and around both the compo­nent lead and the foil. CAUTION: Work quickly to avoid overheating the circuit board printed foil.
d. Closely inspect the solder area and remove any excess or
splashed solder with a small wire-bristle brush.
Only for training and service purposes
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LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
IC Remove/Replacement
Some chassis circuit boards have slotted holes (oblong) through which the IC leads are inserted and then bent at against the cir­cuit foil. When holes are the slotted type, the following technique should be used to remove and replace the IC. When working with boards using the familiar round hole, use the standard technique as outlined in paragraphs 5 and 6 above.
Removal
1. Desolder and straighten each IC lead in one operation by gently prying up on the lead with the soldering iron tip as the solder melts.
2. Draw away the melted solder with an anti-static suction-type solder removal device (or with solder braid) before removing the IC.
Replacement
1. Carefully insert the replacement IC in the circuit board.
2. Carefully bend each IC lead against the circuit foil pad and solder it.
3. Clean the soldered areas with a small wire-bristle brush. (It is not necessary to reapply acrylic coating to the areas).
"Small-Signal" Discrete Transistor Removal/Replacement
1. Remove the defective transistor by clipping its leads as close as possible to the component body.
2. Bend into a "U" shape the end of each of three leads remaining on the circuit board.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding leads extending from the circuit board and crimp the "U" with long nose pliers to insure metal to metal contact then solder each connection.
Power Output, Transistor Device Removal/Replacement
1. Heat and remove all solder from around the transistor leads.
2. Remove the heat sink mounting screw (if so equipped).
3. Carefully remove the transistor from the heat sink of the circuit board.
4. Insert new transistor in the circuit board.
5. Solder each transistor lead, and clip off excess lead.
6. Replace heat sink.
Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as pos­sible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit board.
3. Observing diode polarity, wrap each lead of the new diode around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of the two "original" leads. If they are not shiny, reheat them and if necessary, apply additional solder.
3. Solder the connections. CAUTION: Maintain original spacing between the replaced component and adjacent components and the circuit board to prevent excessive component temperatures.
Circuit Board Foil Repair
Excessive heat applied to the copper foil of any printed circuit board will weaken the adhesive that bonds the foil to the circuit board causing the foil to separate from or "lift-off" the board. The following guidelines and procedures should be followed whenever this condition is encountered.
At IC Connections
To repair a defective copper pattern at IC connections use the following procedure to install a jumper wire on the copper pattern side of the circuit board. (Use this technique only on IC connec­tions).
1. Carefully remove the damaged copper pattern with a sharp knife. (Remove only as much copper as absolutely necessary).
2. carefully scratch away the solder resist and acrylic coating (if used) from the end of the remaining copper pattern.
3. Bend a small "U" in one end of a small gauge jumper wire and carefully crimp it around the IC pin. Solder the IC connection.
4. Route the jumper wire along the path of the out-away copper pattern and let it overlap the previously scraped end of the good copper pattern. Solder the overlapped area and clip off any excess jumper wire.
At Other Connections
Use the following technique to repair the defective copper pattern at connections other than IC Pins. This technique involves the installation of a jumper wire on the component side of the circuit board.
1. Remove the defective copper pattern with a sharp knife. Remove at least 1/4 inch of copper, to ensure that a hazardous condition will not exist if the jumper wire opens.
2. Trace along the copper pattern from both sides of the pattern break and locate the nearest component that is directly con­nected to the affected copper pattern.
3. Connect insulated 20-gauge jumper wire from the lead of the nearest component on one side of the pattern break to the lead of the nearest component on the other side. Carefully crimp and solder the connections. CAUTION: Be sure the insulated jumper wire is dressed so the it does not touch components or sharp edges.
Fuse and Conventional Resistor Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow stake.
2. Securely crimp the leads of replacement component around notch at stake top.
Only for training and service purposes
- 5 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement
.
1. Application range
This spec sheet is applied to the TV used LT50H chassis
2. Test condition
Each part is tested as below without special notice.
1) Temperature : 25 ºC ± 5 ºC(77±9ºF), CST : 40 ºC±5 ºC
2) Relative Humidity: 65 % ± 10 %
3) Power Voltage Standard input voltage (100~240V@ 50/60Hz) * Standard Voltage of each products is marked by models. * Taiwan : 110V 60Hz
4) Specification and performance of each parts are followed
each drawing and specification by part number in accordance with BOM.
5) The receiver must be operated for about 20 minutes prior to
the adjustment.
3. Test method
1) Performance: LGE TV test method followed
2) Demanded other specification
- Safety : CE, IEC specification
- EMC: CE, IEC
4. Model Specification
No Item Specication Remark
1.
Market Taiwan, Colombia, Panama
2.
Broadcasting system Digital : DVB-T/T2
Analog : NTSC-M / PAL-M / PAL-N
3. Available Channel BAND NTSC
VHF UHF DTV
CATV
4. Receiving system
5. Video Input NTSC-M Rear 1EA (Common AV/Component)
6. Component Input Y/Cb/Cr, Y/ Pb/Pr Rear 1EA
7. RGB Input RGB-PC, Spec out
8. HDMI Input PC(HDMI version 1.3) / DTV format, Support
9. Audio Input Component / AV Audio / DVI Audio, Rear 1EA(Common Component / AV / DVI)
10 SPDIF out(1EA) Optical Audio out Rear (1EA)
11 USB Input(2EA) EMF, DivX HD, For SVC (download) Side 2EA
Digital : DVB-T/T2 Analog : NTSC-M / PAL-M / PAL-N
HDCP
2 ~ 13
14 ~ 69
2 ~ 69
1 ~ 125
Taiwan: NTSC-M / Colombia : DVB-T/T2
Taiwan: NTSC-M / Colombia : DVB-T/T2
Side 2EA Support ARC only HDMI1
JPEG, MP3, DivX HD
Only for training and service purposes
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LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
5. External Input Support Format
5.1. Component (Y, PB, PR)
No Resolution H-freq(kHz) V-freq.(kHz) Pixel clock Proposed
1. 720*480 15.73 60 13.5135 SDTV ,DVD 480I
2. 720*480 15.73 59.94 13.5 SDTV ,DVD 480I
3. 720*480 31.50 60 27.027 SDTV 480P
4. 720*480 31.47 59.94 27.00 SDTV 480P
5. 720*576 15.625 50* 13.5 SDTV 576I
6. 720*576 31.25 50* 13.5 SDTV 576P
7. 1280*720 37.5 50* 74.25 HDTV 720P
8. 1280*720 45.00 60.00 74.25 HDTV 720P
9. 1280*720 44.96 59.94 74.176 HDTV 720P
10. 1929*1080 28.125 50* 74.25 HDTV 1080I
11. 1920*1080 33.75 60.00 74.25 HDTV 1080I
12. 1920*1080 33.72 59.94 74.176 HDTV 1080I
13. 1920*1080 56.25 50* 148.5 HDTV 1080P
14. 1920*1080 67.50 60 148.50 HDTV 1080P
15. 1920*1080 67.432 59.94 148.352 HDTV 1080P
16. 1920*1080 27.00 24.00 74.25 HDTV 1080P
17. 1920*1080 26.97 23.976 74.176 HDTV 1080P
18. 1920*1080 33.75 30.00 74.25 HDTV 1080P
19. 1920*1080 33.71 29.97 74.176 HDTV 1080P
Only for training and service purposes
- 7 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
5.2. HDMI : EDID DATA : Refer to adjust specification
5.2.1. DTV mode
No Resolution H-freq(kHz) V-freq.(Hz) Proposed Remark
1 640 x 480 31.46 59.94 SDTV 480P
2 640 x 480 31.5 60.00 SDTV 480P
3 720 x 480 15.73 59.94 SDTV 480I Comment Only Spec. Sheet
4 720 x 480 15.75 60.00 SDTV 480I
5 720 x 576 15.62 50.00 SDTV 576I(DVB)
6 720 x 480 31.47 59.94 SDTV 480P
7 720 x 480 31.5 60.00 SDTV 480P
8 720 x 576 31.25 50.00 SDTV 576P(DVB)
9 1280 x 720 44.96 59.94 HDTV 720P
10 1280 x 720 45 60.00 HDTV 720P
11 1280 x 720 37.5 50.00 HDTV 720P(DVB)
12 1920 x 1080 28.12 50.00 HDTV 1080I(DVB)
13 1920 x 1080 33.72 59.94 HDTV 1080I
14 1920 x 1080 33.75 60.00 HDTV 1080I
15 1920 x 1080 26.97 23.97 HDTV 1080P
16 1920 x 1080 27.00 24.00 HDTV 1080P
17 1920 x 1080 33.71 29.97 HDTV 1080P
18 1920 x 1080 33.75 30.00 HDTV 1080P
19 1920 x 1080 56.25 50.00 HDTV 1080P(DVB)
20 1920 x 1080 67.43 59.94 HDTV 1080P
21 1920 x 1080 67.5 60.00 HDTV 1080P
(Spec Out)
5.2.2. PC mode
No. Resolution H-freq(kHz) V-freq.(kHz) Proposed Remarks
1 640 x 350 @70Hz 31.46 70.09 EGA
2 720 x 400 @70Hz 31.46 70.08 DOS
3 640 x 480 @60Hz 31.46 59.94 VESA(VGA)
4 800 x 600 @60Hz 37.87 60.31 VESA(SVGA)
5 1024 x 768 @60Hz 48.36 60.00 VESA(XGA)
6 1152 x 864 @60Hz 54.34 60.05 VESA
7 1280 x 1024 @60Hz 63.98 60.02 VESA(SXGA) FHD only
8 1360 x 768 @60Hz 47.71 60.01 VESA(WXGA)
9 1920 x 1080 @60Hz 67.5 60.00 WUXGA(CEA 861D) FHD only
Only for training and service purposes
- 8 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
ADJUSTMENT INSTRUCTION
1. Application Range
This specification sheet is applied all of the LT50H TV models, which produced in manufacture department or similar LG TV factory
2. Notice
1) Because this is not a hot chassis, it is not necessary to use
an isolation transformer. However, the use of isolation transformer will help protect test instrument.
2) Adjustment must be done in the correct order. But it is
flexible when its factory local problem occurs.
3) The adjustment must be performed in the circumstance of
25 ±5ºC of temperature and 65±10% of relative humidity if there is no specific designation.
4) The input voltage of the receiver must keep 100~220V,
50/60Hz.
5) Before adjustment, execute Heat-Run for 5 minutes.
▪ After Receive 100% Full white pattern (06CH) then process
Heat-run (or “8. Test pattern” condition of Ez-Adjust status)
▪ How to make set white pattern
1) Press Power ON button of Service Remocon
2) Press ADJ button of Service remocon. Select “8. Test
pattern” and, after select “White” using navigation button, and then you can see 100% Full White pattern.
* In this status you can maintain Heat-Run useless any pattern
generator
* Notice : if you maintain one picture over 20 minutes
(Especially sharp distinction black with white pattern
-13Ch, or Cross hatch pattern – 09Ch) then it can appear image stick near black level.
4. PCB Assembly Adjustment
4.1. MAC Address, ESN Key and Widevine Key download
4.1.1. Equipment & Condition
1) Play file: keydownload.exe
4.1.2. Communication Port connection
1) Key Write: Com 1,2,3,4 and 115200 (Baudrate)
2) Barcode: Com 1,2,3,4 and 9600 (Baudrate)
4.1.3. Download process
1) Select the download items.
2) Mode check: Online Only
3) Check the test process
- DETECT MAC_WRITE → ESN_WRITE → WIDEVINE_ WRITE
4) Play : START
5) Check of result: Ready, Test, OK or NG
4.1.4. Communication Port connection
1) Connect: PCBA Jig → RS-232C Port == PC → RS-232C
Port
3. Adjustment items
3.1. PCB Assembly Adjustment
▪ MAC Address / ESN / Widevine / HDCP1.4 / HDCP 2.0
Download
▪ EDID (The Extended Display Identification Data)/DDC
(Display Data Channel) download
* If it is necessary, it can adjustment at Manufacture Line
You can see set adjustment status at “1. ADJUST CHECK” of the “In-start menu”
3.2. Set Assembly Adjustment
▪ Color Temperature (White Balance) Adjustment ▪ Using RS-232C ▪ PING Test ▪ Selection Factory output option
Only for training and service purposes
4.1.5. Download
1) 15Y LCD TV+MAC+Widevine+ESN Key+ HDCP1.4 and
HDCP2.0
4.1.6. Inspection
- In INSTART menu, check these keys.
- 9 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
4.2. LAN PORT INSPECTION(PING TEST)
4.2.1. Equipment setting
1) Play the LAN Port Test PROGRAM.
2) Input IP set up for an inspection to Test Program.
*IP Number : 12.12.2.2.
4.2.2. LAN PORT inspection (PING TEST)
1) Play the LAN Port Test Program.
2) connect each other LAN Port Jack.
3) Play Test (F9) button and confirm OK Message.
4) remove LAN CABLE
4.3. ADC Adjust => No need at Assembly line because of OPT type
* OTP mode Automatic ADC Calibration. (Internal ADC Calibration) On the manufacture line, OTP is used for ADC Calibration automatically.
* External mode Manual ADC Calibration. When OTP mode is failed, ADC calibration should be “OK” by using External mode.
- If you want re-adjust for ADC.
■ Enter Service Mode by pushing “ADJ” key,
■ Enter Internal ADC mode by pushing “►” key at “ADC
Calibration”
Adjustment protocol
Order Command Set response
(1) Inter the Adjustment mode aa 00 00 a 00 OK00x
(2) Change the Source xb 00 40
(3) Start Adjustment ad 00 10
(4) Return the Response OKx ( Success condition )
(5) Read Adjustment data ( main)
ad 00 20 ( main ) ad 00 30
(6) Conrm Adjustment ad 00 99 NG 03 00x (Failed condition)
(7) End of Adjustment ad 00 90 d 00 OK90x
b 00 OK40x (Adjust 480i Comp1 )
(Adjust 1080p Comp1)
NGx ( Failed condition )
(main : component1 480i) 000000000000000000000000007c007b­006dx (main : component1 1080p) 000000070000000000000000007c0083 0077x
NG 03 01x (Failed condition) NG 03 02x (Failed condition) OK 03 03x (Success condition)
Only for training and service purposes
- 10 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
5. Factory Adjustment
5.1. EDID (The Extended Display Identification Data)/DDC (Display Data Channel) Download
● Summary
▪ It is established in VESA, for communication between PC
and Monitor without order from user for building user condition. It helps to make easily use realize “Plug and Play” function. For EDID data write, we use DDC2B protocol.
● Auto Download (No need Writing EDID data in Assembly line)
▪ After Set Tool Option, then TV turn off and on finish auto
download
* EDID data for FHD, 2D, DTS, 8Bit (43/49/55LF59 Series)
(Model name = LG TV ).
- HDMI - 1 EDID table ( 0x40, 0x1B )
5.2. Adjustment Color Temperature (White balance)
● W/B Equipment condition
CA210 : CH 14, Test signal : I nn er pa tt er n ( 80 IR E) – L ED
Module
CH18, Test signal : Inner pattern (80IRE) – ALEF
Module
● Above 5 minutes H/run in the inner pattern. (“power on” key of
adjust remote control)
The spec of color temperature and coordinate.
Cool
(C50)
Medium
All
Warm
(W50)
1) RS-232C Command used during auto-adj.
RS-232C COMMAND
CMD DATA ID
Wb 00 00 Begin White Balance adj.
Wb 00 ff
(0)
13,000k K
9,300k K
6,500k K
X=0.271 (±0.002) Y=0.270 (±0.002)
X=0.286 (±0.002) Y=0.289 (±0.002)
X=0.313 (±0.002) Y=0.329 (±0.002)
Explanation
End White Balance adj. (internal pattern disappears )
<Test signal>
- Inner pattern for W/B adjust
- External white
pattern (80IRE, 204gray)
-. LVDS supports 8bit ( CEA Block 0x23 :80, 0x24 : 1E)
1) HDMI 1 Check sum : 0x40, 0x1B (CEA Block 0x21 :10)
2) HDMI 2 Check sum : 0x40, 0x0B (CEA Block 0x21 :20)
* EDID data for HD.2D.DTS, 8Bit (32LF59 Series) (Model
name = LG TV )
- - HDMI-1 EDID table (0x74, 0XE2)
A. If the LVDS supports 8bit (not support Deep color) , CEA Block 0x23 :80, 0x24 : 1E)
1) HDMI 1 Check sum : 0x74, 0XE2 (CEA Block 0x21 :10)
2) HDMI 2 Check sum : 0x74, 0XD2 (CEA Block 0x21 :20)
5.2.1. Adjustment method
5.2.2. Auto WB calibration
1) Set TV in ADJ mode using P-ONLY key (or POWER ON key)
2) Place optical probe on the center of the display
- It need to check probe condition of zero calibration before
adjustment.
3) Connect RS-232C Cable
4) Select mode in ADJ Program and begin a adjustment.
5) When WB adjustment is completed with OK message, check adjustment status of pre-set mode (Cool, Medium, Warm)
6) Remove probe and RS-232C cable.
▪ W/B Adj. must begin as start command “wb 00 00” , and
finish as end command “wb 00 ff”, and Adj. offset if need
5.2.3. Manual adjustment
5.2.3.1 Manual adj. method
1) Set TV in Adj. mode using POWER ON
2) Zero Calibrate the probe of Color Analyzer, then place it on the center of LCD module within 10cm of the surface..
3) Press ADJ key à EZ adjust using adj. R/C → 11. White­Balance then press the cursor to the right (KEY►). When KEY(►) is pressed 206 Gray internal pattern will be
displayed.
4) Adjust Cool modes
- Fix the one of R/G/B gain to 192 (default data) and
decrease the others. (If G gain is adjusted over 172 and R and B gain less than 192 , Adjust is O.K.)
- If G gain is less than 172,
Increase G gain by up to 172, and then increase R gain and
G gain same amount of increasing G gain.
Only for training and service purposes
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LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
- If R gain or B gain is over 255, Readjust G gain less than 172, Conform to R gain is 255 or
B gain is 255
5) Adjust two modes (Medium / Warm) Fix the one of R/G/B gain to 192 (default data) and decrease the others.
6) Adj. is completed, Exit adjust mode using “EXIT” key on Remote controller
5.2.4. Reference (White Balance Adj. coordinate and color temperature)
1) Luminance: 204 Gray, 80IRE
2) Standard color coordinate and temperature using CS-1000 (over 26 inch)
5.2.5. Reference (White Balance Adj. coordinate and color temperature)
1) Luminance: 204 Gray
2) Standard color coordinate and temperature using CS-1000 (over 26 inch)
Mode
Cool 0.271 0.270 13,000K 0.0000
Medium 0.286 0.289 9,300K 0.0000
Warm 0.313 0.329 6,500K 0.0000
▪ Standard color coordinate and temperature using
CA-210(CH-14) – by aging time Normal line in Korea (From January to February) : LGD (LF5xxx, LF6xxx, LF7xxx Series models)
webOS
1 0-2 286 295 301 314 328 354
2 3-5 284 290 299 309 326 349
3 6-9 282 287 297 306 324 346
4 10-19 279 283 294 302 321 342
5 20-35 276 278 291 297 318 337
6 36-49 274 275 289 294 316 334
7 50-79 273 272 288 291 315 331
8 80-119 272 271 287 290 314 330
9 Over 120 271 270 286 289 313 329
Coordinate
X Y
Aging time
(Min)
Temp uv
Cool Medium Warm
X Y X Y X Y
271 270 286 289 313 329
▪ Standard color coordinate and temperature using
CA-210(CH-14) – by aging time Normal line in Korea (From March to December) : LGD (LF5xxx, LF6xxx, LF7xxx Series models) Normal line in GLOBAL : LGD (LF5xxx, LF6xxx, LF7xxx Series models)
webOS
Aging time
(Min)
1 0-2 282 289 297 308 324 348
2 3-5 281 287 296 306 323 346
3 6-9 279 284 294 303 321 343
4 10-19 277 280 292 299 319 339
5 20-35 275 277 290 296 317 336
6 36-49 274 274 289 293 316 333
7 50-79 273 272 288 291 315 331
8 80-119 272 271 287 290 314 330
9 Over 120 271 270 286 289 313 329
Cool Medium Warm
X Y X Y X Y
271 270 286 289 313 329
5.3. HDMI ARC Function Inspection
5.3.1. Test equipment
- Optic Receiver Speaker
- MSHG-600 (SW: 1220 ↑)
- HDMI Cable (for 1.4 version)
5.3.2. Test method
1) Insert the HDMI Cable to the HDMI ARC port from the master equipment (HDMI1)
2) Check the sound from the TV Set
3) Check the Sound from the Speaker or using AV & Optic TEST program (It’s connected to MSHG-600)
- O/S Module(AUO, INX, Sharp, CSOT, BOE)
Cool Medium Warm
x y x y x y
spec 271 270 286 289 313 329
target 278 280 293 299 320 339
Only for training and service purposes
- 12 -
* Remark: Inspect in Power Only Mode and check SW version
in a master equipment
* Caution : Don’t push The INSTOP KEY after completing the function inspection.
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
6. GND and HI-POT Testing
6.1. GND & HI-POT auto-check preparation Check the connection between set and power cord
1) Check the POWER CABLE and SIGNAL CABE insertion condition
6.2. GND & HI-POT auto-check
1) Pallet moves in the station. (POWER CORD / AV CORD is tightly inserted)
2) Connect the AV JACK Tester
3) Controller (GWS103-4) on.
4) GND Test (Auto)
- If Test is failed, Buzzer operates.
- If Test is passed, execute next process (Hi-pot test).
(Remove A/V CORD from A/V JACK BOX)
5) HI-POT test (Auto)
- If Test is failed, Buzzer operates.
- If Test is passed, GOOD Lamp on and move to next process
automatically
6.3. Check Point
1) Test voltage
3 Poles : GND: 1.5KV/min at 100mA / SIGNAL: 3KV/min at
100mA
2) TEST time: 1 second
3) TEST POINT
3 Poles : GND Test = POWER CORD GND and SIGNAL
CABLE GND.
Hi-pot Test = POWER CORD GND and LIVE & NEUTRAL.
4) LEAKAGE CURRENT: At 0.5mArms
7.2. White balance. Value
CENTER (DEFAULT)
C50 0 W50
R Gain 192 192 192
G Gain 192 192 192
B Gain 192 192 192
R Cut 64 64 64
G Cut 64 64 64
B Cut 64 64 64
8. USB DOWNLOAD (*.epk file download)
1) Put the USB Stick to the USB socket
2) Press Menu key, and move General *before 10.2 Step. Set USB Expert Mode : Enabled IN START > System 3 > USB Expert Mode
7. Default Service option
7.1. ADC-Set
▪ R-Gain adjustment Value (default 128) ▪ G-Gain adjustment Value (default 128) ▪ B-Gain adjustment Value (default 128) ▪ R-Offset adjustment Value (default 128) ▪ G-Offset adjustment Value (default 128) ▪ B-Offset adjustment Value (default 128)
3) Press “number key 7” Press 7 times.
4) Select download file (epk file)
5) After download is finished, remove the USB stick. ( it will be auto-reboot )
6) Press “IN-START” key of ADJ remote control, check the S/W version
Only for training and service purposes
- 13 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
BLOCK DIAGRAM
1. MTK(A5LR) Block Diagram
Only for training and service purposes
- 14 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
2. I2C Block Diagram
Only for training and service purposes
- 15 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
3. Tuner /CI Block Diagram (TDJM-K301F,B301F)
Only for training and service purposes
- 16 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
3-1. Tuner /CI Block Diagram (TDJM-T301F)
Only for training and service purposes
- 17 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
4.Power Block Diagram
Only for training and service purposes
- 18 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
400
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and EXPLODED VIEW. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.
900
502
901
500
LV1
200
521
800
540
401
570
571
120
530
A10
A2
Set + Stand
Only for training and service purposes
- 19 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
IC101
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
LGE5221(A5LRA0)
+3.3V_NORMAL
R101
4.7K
R100
4.7K OPT
+3.3V_NORMAL
R102 10K
OPT
R103 10K
R104
OPT
4.7K OPT
OPT
NVRAM
IC100
AT24C256C-SSHL-T
A0
1
A1
2
A2
3
GND
4
NVRAM_ATMEL
R107
R105
10K
10K
OPT
R106
R108
10K
10K
I2C
NVRAM_ROHM
IC100-*1
BR24G256FJ-3
VCC
A0
8
1
WP
A1
7
+3.3V_NORMAL
VCC
8
0.1uF
WP
7
SCL
6
SDA
5
C112
Write Protection
- Low : Normal Operation
- High : Write Protection
33
R111
R112 33
2
A2
3
GND
4
I2C_SCL1
I2C_SDA1
SCL
6
SDA
5
X-TAL
XTAL_IN
C100 5pF 50V
X-TAL_1
GND_1
1
2
X100
24MHz
4
3
GND_2
X-TAL_2
C101 5pF 50V
XTAL_OUT
DVDD18_EMMC
Near SoC
C102
VDD3V3
1uF
10V
I2C_SDA1
I2C_SCL1
XTAL_IN
XTAL_OUT
C107
0.1uF
C108
0.1uF
C109
0.1uF
C103
4.7uF 10V
C104
4.7uF 10V
AE26 AH26
B28 B27
J22
J1
H24 K21
J23
U25
Y26
OSDA0 OSCL0
XTALI XTALO
AVDD33_REG_STB
VCC3IO_EMMC
AVDD33_RGB_STB AVSS33_RGB
AVDD33_PLL_STB
AVDD10_LDO
AVDD10_ELDO
A5LR_A0
B12
USB_DP_P0
A12
USB_DM_P0
C13
USB_DP_P1
D13
USB_DM_P1
D14
USB_DP_P2
C14
USB_DM_P2
AD28
USB_DP_P3
AD27
USB_DM_P3
F23
AVDD33_USB
LGE5221(A5LRA0)
D2
CI_A0
D1
CI_A1
C3
CI_A2
C1
CI_A3
C2
CI_A4
B1
CI_A5
A1
CI_A6
A2
CI_A7
C5
CI_A8
B5
CI_A9
D6
CI_A10
A5
CI_A11
A3
CI_A12
D5
CI_A13
E4
CI_A14
B4
CI_MCLKI
H5
CI_MIVAL
D4
CI_MISTRT
D3
CI_MDI0
E5
CI_MDI1
F5
CI_MDI2
H6
CI_MDI3
H4
CI_MDI4
A4
CI_MDI5
B3
CI_MDI6
C4
CI_MDI7
E1
CI_D0
E2
CI_D1
G3
CI_D2
D9
CI_D3
B9
CI_D4
B8
CI_D5
B7
CI_D6
D7
CI_D7
E3
CI_MDO0
F3
CI_MDO1
G2
CI_MDO2
A9
CI_MDO3
A8
CI_MDO4
A7
CI_MDO5
C7
CI_MDO6
C6
CI_MDO7
P26
OPCTRL0
P25
OPCTRL1
P24
OPCTRL2
N24
OPCTRL3
M24
OPCTRL4
M23
OPCTRL5
M22
OPCTRL6
K23
OPCTRL7
L23
OPCTRL8
E20
OPCTRL9
D20
OPCTRL10
G18
OPCTRL11
F18
OPCTRL12
IC101
DEMOD_TSDATA0
DEMOD_TSSYNC
DEMOD_RST
DEMOD_TSCLK
DEMOD_TSVAL
CI_TSCLK
CI_TSDATA0
CI_TSSYNC
CI_TSVAL
PVR_TSCLK PVR_TSVAL
PVR_TSSYNC PVR_TSDATA0 PVR_TSDATA1
SPI_CLK1
SPI_DATA
A5LR_A0
VCC3IO_SD
LED_PWM0 LED_PWM1
ADIN0_SRV ADIN1_SRV ADIN2_SRV ADIN3_SRV ADIN4_SRV ADIN5_SRV ADIN6_SRV ADIN7_SRV
TU_M/W
R109
1.8K
LED_PWM0 LED_PWM1 OPCTRL3
+3.3V_TUNER
TU_M/W
R110
1.8K
STRAPPING
ICE moce + 24M + ROM to 60bit ECC Nand boot
ICE moce + 24M + ROM to eMMC boot from eMMC pins(share pins w/s NAND)
R113
3.3K
+3.3V_NORMAL
R114
3.3K
R115
1.8K
+3.3V_TUNER
R116
1.8K
R117
3.3K
LED_PWM0
0
0
0
I2C_1 : AMP, L/D, NVM, TCON I2C_2 : TUNER I2C_3 : MICOM I2C_4 : S/Demod,T2/Demod, LNB
+3.3V_NORMAL
R118
3.3K
LED_PWM1
0ICE mode + 24M + serial boot
1
0
I2C_SCL1
I2C_SDA1
I2C_SCL2 I2C_SDA2 I2C_SCL3 I2C_SDA3 I2C_SCL4 I2C_SDA4
OPCTRL3
1
0
0
5V_HDMI_1
PCM_5V_CTL
L/DIM0_MOSI
/TU_RESET2
L/DIM0_SCLK
L/DIM0_VS
/TU_RESET2
+3.3V_NORMAL
L/D
R121 33
L/D
R119 33
L/D
R120 33
5V_HDMI_3
NON_L/D
R122
NON_L/D
10K
VDD3V3
Near SoC
NON_L/D
R123 10K
C106
1uF
10V
TPO_DATA[0-7]
TPI_DATA[0-7]
5V_HDMI_3
NON_JP
R124
R140
10K
10K
NON_EU
USB_DP2 USB_DM2
USB_DP1 USB_DM1
WIFI_DP WIFI_DM
R138 10K
OPCTRL3
I2C_SCL3 I2C_SDA3
I2C_SCL4
I2C_SDA4
5V_HDMI_1
R199 1K
TPO_DATA[0] TPO_DATA[1] TPO_DATA[2] TPO_DATA[3] TPO_DATA[4] TPO_DATA[5] TPO_DATA[6] TPO_DATA[7]
TPI_DATA[0] TPI_DATA[1] TPI_DATA[2] TPI_DATA[3] TPI_DATA[4] TPI_DATA[5] TPI_DATA[6] TPI_DATA[7]
R141 1K
EB_ADDR[0] EB_ADDR[1] EB_ADDR[2] EB_ADDR[3] EB_ADDR[4] EB_ADDR[5] EB_ADDR[6] EB_ADDR[7] EB_ADDR[8] EB_ADDR[9] EB_ADDR[10] EB_ADDR[11] EB_ADDR[12] EB_ADDR[13] EB_ADDR[14]
TPO_CLK TPO_VAL
TPO_SYNC
EB_DATA[0] EB_DATA[1] EB_DATA[2] EB_DATA[3] EB_DATA[4] EB_DATA[5] EB_DATA[6] EB_DATA[7]
TP107
U0TX U0RX
POWE__B
POOE__B POCE1__B POCE0__B
PDD7 PDD6 PDD5 PDD4 PDD3 PDD2 PDD1 PDD0
PARB__B
PACLE
PAALE EMMC_CLK EMMC_RST
OPWRSB
ORESETB
OIRI
FSRC_WR
TXVP_0 TXVN_0 RXVP_1 RXVN_1
PHYLED1 PHYLED0
REXT
AVDD33_ETH
CI_INT
CI_RST
SPI_CLK
SPI_CLE
OPWM2 OPWM1 OPWM0
SD_D0 SD_D1 SD_D2
SD_D3 SD_CMD SD_CLK
GPIO42 GPIO43 GPIO44 GPIO45 GPIO46 GPIO47
E13
F13 F12 F11 G13
D10 D12 E11 F4 E12 B2 E10 A11 F10 B11 C9
G1 C11 D11 C10
AE25 AG26 AF26
K4 L5 L4 L6 K5 H1
H2
R22 R24
J6 J7 G11 H11 H12 G12
K24 L24 J24 E28 F25 F26 H25 H26
T25 T24
J2 N7 M7 L7 P3 N1 N2 N4 M3 L1 N6 P6 N5 L3 K3 P4 P7
R26 L25
L26
AH27
AB27 AB26 AC25 AC26
AA25 AA26
AB28
AB25
R125
R126 24K
/TU_RESET1
FE_DEMOD1_TS_CLK FE_DEMOD1_TS_DATA[0] FE_DEMOD1_TS_SYNC FE_DEMOD1_TS_VAL
CI_REG# CI_CE1#
TPI_SYNC
CI_WE# CI_OE# CI_RESET TPI_VAL
CI_VS1#
TPI_CLK CI_IREQ# CI_WAIT#
CI_CD2# CI_CD1# CI_IORD# CI_IOWR#
SOC_TX SOC_RX
EMMC_DATA[7] EMMC_DATA[6] EMMC_DATA[5] EMMC_DATA[4] EMMC_DATA[3] EMMC_DATA[2]
EMMC_DATA[1]
EMMC_DATA[0]
EMMC_CLK EMMC_RST
4.7K
EPHY_TDP EPHY_TDN EPHY_RDP EPHY_RDN
MODEL_OPT_12 MODEL_OPT_13
1%
+3.3V_NORMAL
AMP_RESET_N
LED_PWM0 LED_PWM1
FE_DEMOD1_TS_DATA[1] FE_DEMOD1_TS_DATA[2] FE_DEMOD1_TS_DATA[3] FE_DEMOD1_TS_DATA[4] FE_DEMOD1_TS_DATA[5] FE_DEMOD1_TS_DATA[6]
AV1_CVBS_DET
COMP1_DET
SC_DET
/USB_OCD1 /USB_OCD2 USB_CTL2 USB_CTL1
EMMC_CMD
VDD3V3
R137 10K
OPT
22
R128
C105
0.1uF 16V
VDD3V3
C110
0.1uF
+3.3V_NORMAL
R143
R144
4.7K
4.7K OPT
OPT
SMARTCARD_CLK/SD_EMMC_DATA[0] SMARTCARD_PWR_SEL/SD_EMMC_DATA[1] SMARTCARD_RST/SD_EMMC_DATA[2] SMARTCARD_DET/SD_EMMC_DATA[3] SMARTCARD_VCC/SD_EMMC_CMD SMARTCARD_DATA/SD_EMMC_CLK
NON_SCART
R139 10K
SOC_RESET
SC_ID_SOC
PCM_5V_CTL
TPO_DATA[0-7] TPI_DATA[0-7]
EB_ADDR[0] EB_ADDR[1] EB_ADDR[2] EB_ADDR[3] EB_ADDR[4] EB_ADDR[5] EB_ADDR[6] EB_ADDR[7] EB_ADDR[8]
EB_ADDR[9] EB_ADDR[10] EB_ADDR[11] EB_ADDR[12] EB_ADDR[13] EB_ADDR[14]
TPO_CLK TPO_VAL
TPO_SYNC
R130
R133
4.7K
4.7K OPT
OPT
R136
R135
R131
R134
1K
1K
PWM1_PULL_DOWN_1K
PWM2_PULL_DOWN_1K
SC_ID_SOC
SC_DET
PWM_DIM2
IC101-*1
LGE5222(A5LRB0)
AE26
OSDA0
AH26
OSCL0
B28
XTALI
B27
XTALO
J22
AVDD33_REG_STB
J1
VCC3IO_EMMC
H24
AVDD33_RGB_STB
K21
AVSS33_RGB
J23
AVDD33_PLL_STB
U25
AVDD10_LDO
Y26
AVDD10_ELDO
B12
USB_DP_P0
A12
USB_DM_P0
C13
USB_DP_P1
D13
USB_DM_P1
D14
USB_DP_P2
C14
USB_DM_P2
AD28
USB_DP_P3
AD27
USB_DM_P3
F23
AVDD33_USB
TP149
TP139
TP150
TP140 TP141
TP148
TP142
TP199
TP143
TP198
TP144
TP115
TP137
TP116
TP138
TP117
TP126
TP118
TP127
TP119
TP128
TP120
TP129
TP121
TP130
TP109
TP131
TP110
TP132
TP111 TP112
TP133
TP113
TP134
TP114
TP135
TP106 TP108
TP123
TP147
TP124
TP145
TP125
TP146
TP136
100
100
TP100 TP101 TP102 TP103 TP104 TP105
VDD3V3
PWM_DIM2
OPT
R142
0
PWM_DIM
SMARTCARD_DATA/SD_EMMC_CLK SMARTCARD_VCC/SD_EMMC_CMD SMARTCARD_DET/SD_EMMC_DATA[3] SMARTCARD_RST/SD_EMMC_DATA[2] SMARTCARD_PWR_SEL/SD_EMMC_DATA[1] SMARTCARD_CLK/SD_EMMC_DATA[0]
C111
0.1uF
LGE5222(A5LRB0)
D2
CI_A0
D1
CI_A1
C3
CI_A2
C1
CI_A3
C2
CI_A4
B1
CI_A5
A1
CI_A6
A2
CI_A7
C5
CI_A8
B5
CI_A9
D6
CI_A10
A5
CI_A11
A3
CI_A12
D5
CI_A13
E4
CI_A14
B4
CI_MCLKI
H5
CI_MIVAL
D4
CI_MISTRT
D3
CI_MDI0
E5
CI_MDI1
F5
CI_MDI2
H6
CI_MDI3
H4
CI_MDI4
A4
CI_MDI5
B3
CI_MDI6
C4
CI_MDI7
E1
CI_D0
E2
CI_D1
G3
CI_D2
D9
CI_D3
B9
CI_D4
B8
CI_D5
B7
CI_D6
D7
CI_D7
E3
CI_MDO0
F3
CI_MDO1
G2
CI_MDO2
A9
CI_MDO3
A8
CI_MDO4
A7
CI_MDO5
C7
CI_MDO6
C6
CI_MDO7
P26
OPCTRL0
P25
OPCTRL1
P24
OPCTRL2
N24
OPCTRL3
M24
OPCTRL4
M23
OPCTRL5
M22
OPCTRL6
K23
OPCTRL7
L23
OPCTRL8
E20
OPCTRL9
D20
OPCTRL10
G18
OPCTRL11
F18
OPCTRL12
IC101-*1
U0TX U0RX
POWE__B
POOE__B POCE1__B POCE0__B
PDD7 PDD6 PDD5 PDD4 PDD3 PDD2 PDD1 PDD0
PARB__B
PACLE
PAALE EMMC_CLK EMMC_RST
OPWRSB
ORESETB
OIRI
FSRC_WR
TXVP_0
A5LR_B0
TXVN_0 RXVP_1 RXVN_1
PHYLED1 PHYLED0
REXT
AVDD33_ETH
EB_DATA[0]
EB_DATA[1]
EB_DATA[2]
EB_DATA[3]
EB_DATA[4]
EB_DATA[5]
EB_DATA[6]
EB_DATA[7]
CI_REG#
CI_CE1#
TPI_SYNC
CI_WE#
CI_OE#
CI_RESET
TPI_VAL
TPI_CLK
CI_IREQ#
CI_WAIT#
CI_CD2#
CI_CD1#
CI_IORD#
CI_IOWR#
DEMOD_RST
DEMOD_TSCLK
DEMOD_TSDATA0
DEMOD_TSSYNC
DEMOD_TSVAL
CI_INT
CI_TSCLK
CI_TSDATA0
CI_TSSYNC
CI_TSVAL
CI_RST PVR_TSCLK PVR_TSVAL
PVR_TSSYNC PVR_TSDATA0 PVR_TSDATA1
SPI_CLK1
SPI_CLK
SPI_DATA
SPI_CLE
OPWM2 OPWM1 OPWM0
SD_D0 SD_D1 SD_D2
SD_D3 SD_CMD SD_CLK
A5LR_B0
VCC3IO_SD
LED_PWM0 LED_PWM1
GPIO42 GPIO43 GPIO44 GPIO45 GPIO46 GPIO47
ADIN0_SRV ADIN1_SRV ADIN2_SRV ADIN3_SRV ADIN4_SRV ADIN5_SRV ADIN6_SRV ADIN7_SRV
T25 T24
J2 N7 M7 L7 P3 N1 N2 N4 M3 L1 N6 P6 N5 L3 K3 P4 P7
R26 L25
L26
AH27
AB27 AB26 AC25 AC26
AA25 AA26
AB28
AB25
E13
F13 F12 F11 G13
D10 D12 E11 F4 E12 B2 E10 A11 F10 B11 C9
G1 C11 D11 C10
AE25 AG26 AF26
K4 L5 L4 L6 K5 H1
H2
R22 R24
J6 J7 G11 H11 H12 G12
K24 L24 J24 E28 F25 F26 H25 H26
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
A5LR_Bring_Up
MAIN1
2014.11.01
1
HDMI_HPD_5V_3
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
HDMI_HPD_5V_1
1uF
10V
C353
Closed to SoC Side
DDC_SCL_3 DDC_SCL_1
DDC_SDA_3 DDC_SDA_1
5V_HDMI_2
+1.2V_MTK_AVDD
C321
0.1uF
+1.2V_MTK_AVDD
ADCIN_P_DEMOD ADCIN_N_DEMOD
C322
0.1uF
IF_AGC
FE_DEMOD1_TS_DATA[7]
I2C_SCL2 I2C_SDA2
AV1_CVBS
SC_CVBS_IN_SOC
TU_CVBS_SOC
TU_SIF_TU
CEC
TP336 TP337
TP338 TP339
HDMI_HPD_5V_2_CBUS
TP340
HDMI_HPD_5V_3
TP341
HDMI_HPD_5V_1
C324
0.1uF
COMP1/AV1/DVI_L_IN
COMP1/AV1/DVI_R_IN
Closed to SoC Side
R300 10K
C300
0.047uF 25V
C301 0.01uF
R301
2.2K
OPT
1uF
Closed to SoC Side
CEC
TP300
DDC_SCL_2 DDC_SCL_3 DDC_SCL_1
DDC_SDA_2 DDC_SDA_3 DDC_SDA_1
R365 1K
R366 10K
VDD3V3_HDMI
C359
C354
10uF
0.1uF 10V
TP302
C302
COMP1_Y/AV1
D27 D28
E27
F15 E14
E15 D15
H27 H28 J25 G28 G26 G25
10V
C19
C16 D19 U23
D16 G19 U24
E18
E17 F19 T22
E16
A14 U26
G20
Place JACK Side
COMP1_Pb
COMP1_Pr
IC101
LGE5221(A5LRA0)
ADCINP_DEMOD ADCINN_DEMOD
AVDD12_DEMOD
IF_AGC RF_AGC
OSCL1 OSDA1
CVBS_COM CVBS3P CVBS2P CVBS1P CVBS0P SIF_COM
HDMI_CEC
HDMI_0_SCL HDMI_1_SCL HDMI_2_SCL
HDMI_0_SDA HDMI_1_SDA HDMI_2_SDA
HDMI_0_PWR5V
HDMI_0_HPD_CBUS HDMI_1_HPD HDMI_2_HPD
MHL_SENSE
AVDD12_HDMI_1 AVDD12_HDMI_2
AVDD33_HDMI
R302 470K OPT
VGA_SDA VGA_SCL
VDACX_OUT
AVDD33_VIDEO_STB
AVSS33_XTAL
AVSS33_DEMOD
HDMI_0_RX_0
HDMI_0_RX_0B
A5LR_A0
HDMI_0_RX_1
HDMI_0_RX_1B
HDMI_0_RX_2
HDMI_0_RX_2B
HDMI_0_RX_C
HDMI_0_RX_CB
HDMI_1_RX_0
HDMI_1_RX_0B
HDMI_1_RX_1
HDMI_1_RX_1B
HDMI_1_RX_2
HDMI_1_RX_2B
HDMI_1_RX_C
HDMI_1_RX_CB
HDMI_2_RX_0
HDMI_2_RX_0B
HDMI_2_RX_1
HDMI_2_RX_1B
HDMI_2_RX_2
HDMI_2_RX_2B
HDMI_2_RX_C
HDMI_2_RX_CB
HSYNC VSYNC
Place SOC Side
1uF
C307 25V
C3081uF
25V
C305
C306
R306
50V
50V
470K
560pF
560pF
OPT
OPT
OPT
R303 0
R304 0
75
75
50V
1%
1005
R307
50V
1%
10pF
10pF
C309
C311
1005
R309
3216
50V
R308
10pF
75
C310
1%
TU_CVBS
Close to Tuner
TU_ALL_IntDemod
IF_P
IF_N
R27 R28 N26
RP
N28
GP
P28
BP
N27
COM
P27
SOG
T28 T27
M25
COM1
L28
PB1P
L27
PR1P
M26
Y1P
N25
SOY1
K26
COM0
K25
PB0P
J26
PR0P
K27
Y0P
K28
SOY0
R364 0
G27
H23
J20 K20
A17 B17 A16 B16 A15 B15 C17 D17
A20 B20 A19 B19 C18 D18 C21 B21
W26 W25 V26 V25 V28 V27 Y28 Y27
R311 1K
R310 1K
TU_ALL_IntDemod
SC_COM_SOC SC_G_IN_SOC SC_R_IN_SOC SC_B_IN_SOC
SC_FB_SOC
COMP_COM_SOC COMP_PB_IN_SOC COMP_PR_IN_SOC COMP_Y_AV1_IN_SOC
COMP1_Y_SOY
DTV/MNT_V_OUT
R312
1K
TU_ALL_IntDemod
VDD3V3
C355
0.1uF
D0+_HDMI2 D0-_HDMI2 D1+_HDMI2 D1-_HDMI2 D2+_HDMI2 D2-_HDMI2 CK+_HDMI2 CK-_HDMI2
D0+_HDMI3 D0-_HDMI3 D1+_HDMI3 D1-_HDMI3 D2+_HDMI3 D2-_HDMI3 CK+_HDMI3 CK-_HDMI3
D0+_HDMI1 D0-_HDMI1 D1+_HDMI1 D1-_HDMI1 D2+_HDMI1 D2-_HDMI1 CK+_HDMI1 CK-_HDMI1
TP313 TP311 TP308 TP309 TP310 TP312 TP314 TP317 TP318 TP315
TP316
R324
R325
C315 100pF
30K
30K
50V
OPT
C316 100pF
50V
OPT
R322 100
R323 100
R363 100
R321 10
1/16W 5%
R315 100
R317 100
1/16W 5%
TU_ALL_2178B
R320 100
TU_ALL_IntDemod
C303
1uF
10V
TU_ALL_IntDemod
C304 1uF
10V
TU_ALL_IntDemod
DTV/MNT_V_OUT
SC_COM_SOC
SC_G_IN_SOC SC_R_IN_SOC
SC_B_IN_SOC SC_FB_SOC
SC_CVBS_IN_SOC
SCART_RIN_SOC SCART_Lout_SOC SCART_Rout_SOC
SCART_LIN_SOC
TP320 TP321 TP322 TP323 TP324 TP325 TP326 TP327
TP328 TP329 TP332 TP334 TP335 TP333 TP330 TP331
C314 0.01uF
1/16W 5%
C317 0.01uF
1/16W 5%
C352 0.047uF
C323
C319 0.01uF
C320 0.01uF
C318 0.047uF
Closed to SoC Side
C312
33pF
C313
33pF
TU_ALL_IntDemod
D0+_HDMI3 D0-_HDMI3 D1+_HDMI3 D1-_HDMI3 D2+_HDMI3 D2-_HDMI3 CK+_HDMI3 CK-_HDMI3
D0+_HDMI1 D0-_HDMI1 D1+_HDMI1 D1-_HDMI1 D2+_HDMI1 D2-_HDMI1 CK+_HDMI1 CK-_HDMI1
1500pF
TU_ALL_2178B
R313 51
TU_ALL_IntDemod
R314 51
TU_ALL_IntDemod
D27 D28
E27
F15 E14
E15 D15
H27 H28 J25 G28 G26 G25
C19
C16 D19 U23
D16 G19 U24
E18
E17 F19 T22
E16
A14 U26
G20
COMP/AV1/DVI_L_IN_SOC COMP/AV1/DVI_R_IN_SOC
COMP_PB_IN_SOC
COMP_PR_IN_SOC
COMP1_Y_SOY
COMP_Y_AV1_IN_SOC
COMP_COM_SOC
TU_CVBS_SOC
ADCIN_P_DEMOD
ADCIN_N_DEMOD
IC101-*1
LGE5222(A5LRB0)
R27
HSYNC
ADCINP_DEMOD
R28
VSYNC
ADCINN_DEMOD
N26
RP
N28
GP
AVDD12_DEMOD
P28
BP
N27
COM
P27
SOG
T28
VGA_SDA
T27
VGA_SCL
M25
COM1
IF_AGC
L28
PB1P
RF_AGC
L27
PR1P
M26
Y1P
N25
SOY1
OSCL1 OSDA1
K26
COM0
K25
PB0P
J26
PR0P
CVBS_COM
K27
Y0P
CVBS3P
K28
SOY0
CVBS2P CVBS1P CVBS0P SIF_COM
G27
VDACX_OUT
H23
AVDD33_VIDEO_STB
J20
AVSS33_XTAL
K20
AVSS33_DEMOD
A17
HDMI_0_RX_0
HDMI_CEC
B17
HDMI_0_RX_0B
A16
HDMI_0_RX_1
HDMI_0_SCL
B16
HDMI_0_RX_1B
HDMI_1_SCL
A15
HDMI_0_RX_2
HDMI_2_SCL
B15
HDMI_0_RX_2B
C17
HDMI_0_RX_C
D17
HDMI_0_RX_CB
HDMI_0_SDA
A5LR_B0
HDMI_1_SDA
A20
HDMI_1_RX_0
HDMI_2_SDA
B20
HDMI_1_RX_0B
A19
HDMI_1_RX_1
B19
HDMI_1_RX_1B
HDMI_0_PWR5V
C18
HDMI_1_RX_2
D18
HDMI_1_RX_2B
C21
HDMI_1_RX_C
B21
HDMI_1_RX_CB
HDMI_0_HPD_CBUS
W26
HDMI_2_RX_0
HDMI_1_HPD
W25
HDMI_2_RX_0B
HDMI_2_HPD
V26
HDMI_2_RX_1
V25
HDMI_2_RX_1B
V28
HDMI_2_RX_2
V27
HDMI_2_RX_2B
MHL_SENSE
Y28
HDMI_2_RX_C
Y27
HDMI_2_RX_CB AVDD12_HDMI_1 AVDD12_HDMI_2
AVDD33_HDMI
AV1_CVBS
Model Option
+3.3V_NORMAL
R351
R337
4.7K
R339
4.7K
BIT0_1
BIT1_1
R338
4.7K
R340
4.7K
BIT0_0
BIT1_0
AREA OPTION
BIT [0/1]
0 / 0 0 / 1 1 / 0 1 / 1 EPI FHD, 120Hz, V12 (6 lane)
DVB
EU/CIS
CHINA/HONGKONG
TAIWAN/COLOM
ASIA/AFRICA
ATSC
N/AMERICA
KOREA
S/AMERCIA
+1.2V_MTK_CORE
BLM18PG121SN1D
+3.3V_NORMAL
C337 10uF
MODEL_OPT_11
HP_DET
MODEL_OPT_8 MODEL_OPT_9
MODEL_OPT_10
+1.2V_MTK_AVDD
C356
0.1uF
VDD3V3
C357
1uF 10V
C358
0.1uF
COMP/AV1/DVI_R_IN_SOC COMP/AV1/DVI_L_IN_SOC
SCART_RIN_SOC SCART_LIN_SOC
BIT0
BIT1
JP
JAPAN
L301
L302
BLM18PG121SN1D
BIT0 BIT1 BIT2 BIT3 BIT4 BIT5 BIT6 BIT7
BIT2_1
BIT2_0
C338 10uF
VDD3V3
C339 10uF
R332 24K
1%
R343
4.7K
R344
4.7K
+1.2V_MTK_AVDD
AE18 AF18 AD17 AE15 AD15 AC19 AD18 AD19 AC17 AD16 AC15 AC18 AB17
AG14
AF14
G22
C22 C24 B23 E23 D23 A22 B22 C23
BIT3_1
BIT3_0
AVDD3V3_AADC
E21
D22
C332
C328
1uF
0.1uF
TP303
VDD3V3
10V
K19
Close to AVDD33_ADAC & AVDD33_AADC
L300
C325
C326
C327
10uF
1uF
0.1uF
10V
10V
R350
4.7K
R345
4.7K BIT5_1
BIT4_1
R349
4.7K
R346
4.7K
BIT4_0
BIT5_0
BACK-END OPTION
BIT[2/3/4/5]
0 / 0 / 0 / 0 0 / 0 / 0 / 1 0 / 0 / 1 / 0 0 / 0 / 1 / 1 0 / 1 / 0 / 0 0 / 1 / 0 / 1 0 / 1 / 1 / 0 0 / 1 / 1 / 1 1 / 0 / 0 / 0 1 / 0 / 0 / 1 1 / 0 / 1 / 0 1 / 0 / 1 / 1 1 / 1 / 0 / 0 1 / 1 / 0 / 1 1 / 1 / 1 / 0 1 / 1 / 1 / 1
C340
C341
0.1uF
2.2uF
IC101
LGE5221(A5LRA0)
TCON0 TCON1 TCON2 TCON3 TCON4 TCON5 TCON6 TCON7 TCON8 TCON9 TCON10 TCON11 TCON12
AVDD12_LVDS
AVDD33_LVDSA
REXT_VPLL
AIN_R0 AIN_L0 AIN_R1 AIN_L1 AIN_R2 AIN_L2 AIN_R3 AIN_L3
AVDD33_AADC
VMID_AADC
AVSS33_CLN
AVDD3V3_AADC
4.7K
R352
4.7K
+1.2V_MTK_CORE
TP304
+1.2V_MTK_CORE
TP305
AE0P AE0N AE1P AE1N AE2P
AE2N AECKP AECKN
AE3P
AE3N
AE4P
AE4N
AE5P
AE5N
AO0P
AO0N
AO1P
AO1N
AO2P
AO2N AOCKP AOCKN
AO3P
AO3N
AO4P
AO4N
AO5P
AO5N
AR0_ADAC
A5LR_A0
AL0_ADAC
AR1_ADAC AL1_ADAC
AR2_ADAC AL2_ADAC
AVDD33_ADAC
ASPDIFI
ASPDIFO0
AOBCK
AOLRCK
AOMCLK AOSDATA1 AOSDATA0
TUNER OPTION
BIT [6/7]
0 / 0
T2/C/S2/ATV_EXT
0 / 1 1 / 0
T2/C/S2/ATV_SOC
1 / 1
R355
4.7K
R353
4.7K BIT7_1
BIT6_1
BIT2
BIT3 BIT4
BIT5
R354
BIT6_0
FHD
TYPE
LVDS FHD, 60Hz
EPI FHD, 120Hz, v14_32inch (6 lane) EPI FHD, 120Hz, V13 (6 lane)
EPI FHD, 60Hz, V14_32 inch (6lane)
LVDS FHD, 120Hz EPI FHD, 120Hz, V14 (8 lane) LVDS HD, 60Hz LVDS FHD, 60Hz, CP BOX LVDS HD, 60Hz SMALL SMART
Vby1 FHD, 120Hz LVDS FHD, 120Hz OLED
OPT
C344 10uF
C345 10uF
AF19 AE19 AH19 AG19 AH18 AG18 AF17 AE17 AF16 AE16 AH16 AG16 AG15 AH15
AF24 AE24 AF23 AE23 AH23 AG23 AF22 AE22 AF21 AE21 AH21 AG21 AF20 AE20
A25 C25
B26 A27
B25 A26
F21
AG27 AH28
AF27 AD26 AG28 AE27 AF28
4.7K
C347 10uF
R356
4.7K
BIT7_0
FRC
OPT
C346
0.1uF
AVDD3V3_AADC
BIT6 BIT7
PANEL TYPE
OLED
OPT
C349
0.1uF
C348
C350
0.1uF
0.1uF
TXA4N TXA4P TXA3N TXA3P TXACLKN TXACLKP TXA2N TXA2P TXA1N TXA1P TXA0N TXA0P
TXB4N TXB4P TXB3N TXB3P TXBCLKN TXBCLKP TXB2N TXB2P TXB1N TXB1P TXB0N
TXB0P
HP_ROUT_SOC HP_LOUT_SOC
SCART_Rout_SOC SCART_Lout_SOC
SPDIF_OUT HDMI_ARC
R335 100 R334 100 R333 100
OPT
R336 100
EU/CIS
AJJA
DDR_768MB
DDR_1GB
OPT
T2/C/ATV_EXT T2/C/ATV_SOC
T2/C/S2
R357
4.7K SIDE_HDMI
R358
4.7K
REAR_HDMI
C331
OPT
33pF
R359
R360
TP307
TAIWAN/COL
T/C
T/C
T2/C PIP
T2/C
R361
4.7K
4.7K
R371
4.7K
EXT_EEPROM
R362
4.7K
4.7K
R370
4.7K
OPT
INT_EEPROM
IC101-*1
LGE5222(A5LRB0)
AE18
TCON0
AF18
TCON1
AD17
TCON2
AE15
TCON3
AD15
TCON4
AC19
TCON5
AD18
TCON6
AD19
TCON7
AC17
TCON8
AD16
TCON9
AC15
TCON10
AC18
TCON11
AB17
TCON12
AG14
AVDD12_LVDS
G22
AVDD33_LVDSA
AF14
REXT_VPLL
AR0_ADAC
C22
AL0_ADAC
AIN_R0
C24
AIN_L0
B23
AR1_ADAC
AIN_R1
E23
A5LR_B0
AL1_ADAC
AIN_L1
D23
AIN_R2
A22
AIN_L2
B22
AR2_ADAC
AIN_R3
C23
AL2_ADAC
AIN_L3
AVDD33_ADAC
E21
AVDD33_AADC
ASPDIFI
ASPDIFO0
D22
VMID_AADC
AOLRCK AOMCLK
AOSDATA1
K19
AOSDATA0
AVSS33_CLN
AUD_SCK AUD_LRCK
AUD_LRCH
T/C Default
T2/C
C351
0.1uF
C329
C330 OPT 22pF
22pF
CHINA/HONG
Default
OPT
R373
4.7K
R372
4.7K
AF19
AE0P
AE19
AE0N
AH19
AE1P
AG19
AE1N
AH18
AE2P
AG18
AE2N
AF17
AECKP
AE17
AECKN
AF16
AE3P
AE16
AE3N
AH16
AE4P
AG16
AE4N
AG15
AE5P
AH15
AE5N
AF24
AO0P
AE24
AO0N
AF23
AO1P
AE23
AO1N
AH23
AO2P
AG23
AO2N
AF22
AOCKP
AE22
AOCKN
AF21
AO3P
AE21
AO3N
AH21
AO4P
AG21
AO4N
AF20
AO5P
AE20
AO5N
A25 C25
B26 A27
B25 A26
F21
AG27 AH28
AF27
AOBCK
AD26 AG28 AE27 AF28
KOREA
NORTH AMERICA
BRAZIL
Default
MODEL_OPT_8
MODEL_OPT_9
MODEL_OPT_10
MODEL_OPT_11
MODEL_OPT_12
MODEL_OPT_13
MODEL_OPT_11
ISDB PIP
ISDB
HIGH : ODT DISABLE LOW : ODT ENABLE
ATSC NIM+T2 Half NIM+T2
Half NIM ATSC PIP
OPT
R375
4.7K
R374
4.7K
JAPAN
POWER_ON/OFF1
+1.2V_MTK_CORE
TP301
LGE5221(A5LRA0)
Y16
VCCK_1
W17
VCCK_2
Y17
VCCK_3
W18
VCCK_4
Y18
VCCK_5
P19
VCCK_6
R19
VCCK_7
T19
VCCK_8
U19
VCCK_9
V19
VCCK_10
W19
VCCK_11
Y19
VCCK_12
P20
VCCK_13
R20
VCCK_14
T20
VCCK_15
U20
VCCK_16
V20
VCCK_17
W20
VCCK_18
Y20
VCCK_19
U21
VCCK_20
V21
VCCK_21
W21
VCCK_22
LGE5221(A5LRA0)
A28
DVSS_1
C12
DVSS_2
C15
DVSS_3
C26
DVSS_4
C27
DVSS_5
C28
DVSS_6
D24
DVSS_7
D26
DVSS_8
E6
DVSS_9
E7
DVSS_10
E8
DVSS_11
E9
DVSS_12
E22
DVSS_13
E26
DVSS_14
F6
DVSS_15
F7
DVSS_16
F8
DVSS_17
F9
DVSS_18
G6
DVSS_19
G7
DVSS_20
G8
DVSS_21
G9
DVSS_22
G14
DVSS_23
H3
DVSS_24
H7
DVSS_25
H8
DVSS_26
J3
DVSS_27
J5
DVSS_28
J14
DVSS_29
J15
DVSS_30
J16
DVSS_31
J17
DVSS_32
J18
DVSS_33
K6
DVSS_34
K9
DVSS_35
K10
DVSS_36
K11
DVSS_37
K12
DVSS_38
K13
DVSS_39
K14
DVSS_40
K15
DVSS_41
K16
DVSS_42
K17
DVSS_43
K18
DVSS_44
L2
DVSS_45
L9
DVSS_46
L10
DVSS_47
L11
DVSS_48
L12
DVSS_49
L13
DVSS_50
L14
DVSS_51
L15
DVSS_52
L16
DVSS_53
L17
DVSS_54
L18
DVSS_55
L19
DVSS_56
L20
DVSS_57
M4
DVSS_58
M9
DVSS_59
M10
DVSS_60
M11
DVSS_61
M12
DVSS_62
M13
DVSS_63
M14
DVSS_64
M15
DVSS_65
M16
DVSS_66
M17
DVSS_67
M18
DVSS_68
M19
DVSS_69
M20
DVSS_70
N3
DVSS_71
N9
DVSS_72
N10
DVSS_73
N11
DVSS_74
N12
DVSS_75
N13
DVSS_76
N14
DVSS_77
N15
DVSS_78
N16
DVSS_79
N17
DVSS_80
N18
DVSS_81
N19
DVSS_82
N20
DVSS_83
P5
DVSS_84
IC101
IC101
VCCK_23 VCCK_24 VCCK_25 VCCK_26 VCCK_27 VCCK_28 VCCK_29 VCCK_30 VCCK_31 VCCK_32
A5LR_A0
VCC3IO_A VCC3IO_B
DVSS_85 DVSS_86 DVSS_87 DVSS_88 DVSS_89 DVSS_90 DVSS_91 DVSS_92 DVSS_93 DVSS_94 DVSS_95 DVSS_96 DVSS_97 DVSS_98
DVSS_99 DVSS_100 DVSS_101 DVSS_102 DVSS_103 DVSS_104 DVSS_105 DVSS_106 DVSS_107 DVSS_108 DVSS_109 DVSS_110 DVSS_111 DVSS_112 DVSS_113 DVSS_114 DVSS_115 DVSS_116 DVSS_117 DVSS_118 DVSS_119 DVSS_120 DVSS_121 DVSS_122 DVSS_123 DVSS_124 DVSS_125 DVSS_126 DVSS_127 DVSS_128 DVSS_129 DVSS_130
A5LR_A0
DVSS_131 DVSS_132 DVSS_133 DVSS_134 DVSS_135 DVSS_136 DVSS_137 DVSS_138 DVSS_139 DVSS_140 DVSS_141 DVSS_142 DVSS_143 DVSS_144 DVSS_145 DVSS_146 DVSS_147 DVSS_148 DVSS_149 DVSS_150 DVSS_151 DVSS_152 DVSS_153 DVSS_154 DVSS_155 DVSS_156 DVSS_157 DVSS_158 DVSS_159 DVSS_160 DVSS_161 DVSS_162 DVSS_163 DVSS_164 DVSS_165 DVSS_166 DVSS_167
Y21 W22 Y22 AA22 AB22 Y23 AA23 AB23 AA24 AB24
G21 F22
P11 P12 P13 P14 P15 P16 P17 P18 P22 R3 R11 R12 R13 R14 R15 R16 R17 R18 T11 T12 T13 T14 T15 T16 T17 T18 T23 T26 U7 U8 U11 U12 U13 U14 U15 U16 U17 U18 V3 V11 V12 V13 V14 V15 V16 V17 V18 W7 W11 W12 W13 W14 W16 Y3 Y25 AA8 AB1 AB5 AB9 AB11 AB13 AB16 AB18 AB19 AB20 AC2 AC13 AC22 AC23 AC24 AD4 AD13 AD14 AD25 AE14 AF4 AF7 AF10 AF13 AF25 AG1 AH6 AH9
+1.2V_MTK_CORE
VDD3V3
LGE5222(A5LRB0)
Y16
VCCK_1
W17
VCCK_2
Y17
VCCK_3
W18
VCCK_4
Y18
VCCK_5
P19
VCCK_6
R19
VCCK_7
T19
VCCK_8
U19
VCCK_9
V19
VCCK_10
W19
VCCK_11
Y19
VCCK_12
P20
VCCK_13
R20
VCCK_14
T20
VCCK_15
U20
VCCK_16
V20
VCCK_17
W20
VCCK_18
Y20
VCCK_19
U21
VCCK_20
V21
VCCK_21
W21
VCCK_22
LGE5222(A5LRB0)
A28
DVSS_1
C12
DVSS_2
C15
DVSS_3
C26
DVSS_4
C27
DVSS_5
C28
DVSS_6
D24
DVSS_7
D26
DVSS_8
E6
DVSS_9
E7
DVSS_10
E8
DVSS_11
E9
DVSS_12
E22
DVSS_13
E26
DVSS_14
F6
DVSS_15
F7
DVSS_16
F8
DVSS_17
F9
DVSS_18
G6
DVSS_19
G7
DVSS_20
G8
DVSS_21
G9
DVSS_22
G14
DVSS_23
H3
DVSS_24
H7
DVSS_25
H8
DVSS_26
J3
DVSS_27
J5
DVSS_28
J14
DVSS_29
J15
DVSS_30
J16
DVSS_31
J17
DVSS_32
J18
DVSS_33
K6
DVSS_34
K9
DVSS_35
K10
DVSS_36
K11
DVSS_37
K12
DVSS_38
K13
DVSS_39
K14
DVSS_40
K15
DVSS_41
K16
DVSS_42
K17
DVSS_43
K18
DVSS_44
L2
DVSS_45
L9
DVSS_46
L10
DVSS_47
L11
DVSS_48
L12
DVSS_49
L13
DVSS_50
L14
DVSS_51
L15
DVSS_52
L16
DVSS_53
L17
DVSS_54
L18
DVSS_55
L19
DVSS_56
L20
DVSS_57
M4
DVSS_58
M9
DVSS_59
M10
DVSS_60
M11
DVSS_61
M12
DVSS_62
M13
DVSS_63
M14
DVSS_64
M15
DVSS_65
M16
DVSS_66
M17
DVSS_67
M18
DVSS_68
M19
DVSS_69
M20
DVSS_70
N3
DVSS_71
N9
DVSS_72
N10
DVSS_73
N11
DVSS_74
N12
DVSS_75
N13
DVSS_76
N14
DVSS_77
N15
DVSS_78
N16
DVSS_79
N17
DVSS_80
N18
DVSS_81
N19
DVSS_82
N20
DVSS_83
P5
DVSS_84
IC101-*1
IC101-*1
Y21
VCCK_23
W22
VCCK_24
Y22
VCCK_25
AA22
VCCK_26
AB22
VCCK_27
Y23
VCCK_28
AA23
VCCK_29
AB23
VCCK_30
AA24
VCCK_31
AB24
VCCK_32
A5LR_B0
G21
VCC3IO_A
F22
VCC3IO_B
P11
DVSS_85
P12
DVSS_86
P13
DVSS_87
P14
DVSS_88
P15
DVSS_89
P16
DVSS_90
P17
DVSS_91
P18
DVSS_92
P22
DVSS_93
R3
DVSS_94
R11
DVSS_95
R12
DVSS_96
R13
DVSS_97
R14
DVSS_98
R15
DVSS_99
R16
DVSS_100
R17
DVSS_101
R18
DVSS_102
T11
DVSS_103
T12
DVSS_104
T13
DVSS_105
T14
DVSS_106
T15
DVSS_107
T16
DVSS_108
T17
DVSS_109
T18
DVSS_110
T23
DVSS_111
T26
DVSS_112
U7
DVSS_113
U8
DVSS_114
U11
DVSS_115
U12
DVSS_116
U13
DVSS_117
U14
DVSS_118
U15
DVSS_119
U16
DVSS_120
U17
DVSS_121
U18
DVSS_122
V3
DVSS_123
V11
DVSS_124
V12
DVSS_125
V13
DVSS_126
V14
DVSS_127
V15
DVSS_128
V16
DVSS_129
V17
DVSS_130
V18
DVSS_131
W7
DVSS_132
W11
DVSS_133
W12
DVSS_134
A5LR_B0
W13
DVSS_135
W14
DVSS_136
W16
DVSS_137
Y3
DVSS_138
Y25
DVSS_139
AA8
DVSS_140
AB1
DVSS_141
AB5
DVSS_142
AB9
DVSS_143
AB11
DVSS_144
AB13
DVSS_145
AB16
DVSS_146
AB18
DVSS_147
AB19
DVSS_148
AB20
DVSS_149
AC2
DVSS_150
AC13
DVSS_151
AC22
DVSS_152
AC23
DVSS_153
AC24
DVSS_154
AD4
DVSS_155
AD13
DVSS_156
AD14
DVSS_157
AD25
DVSS_158
AE14
DVSS_159
AF4
DVSS_160
AF7
DVSS_161
AF10
DVSS_162
AF13
DVSS_163
AF25
DVSS_164
AG1
DVSS_165
AH6
DVSS_166
AH9
DVSS_167
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
A5LR_Bring_Up
MAIN2
2014.11.01
3
+1.5V_DDR
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
C501
0.1uF
C503
0.1uF
C505
0.1uF
C507
0.1uF
C509
0.1uF
+1.5V_DDR
C514
C512
10uF
1uF
10V
C525
C524
10uF
1uF
10V
LGE5222(A5LRB0)
AB4
RA0
AC9
RA1
AE3
RA2
AE6
RA3
AD9
RA4
AE4
RA5
AC11
RA6
AD5
RA7
AE9
RA8
AE5
RA9
AE7
RA10
AD11
RA11
AE12
RA12
AC5
RA13
AE10
RA14
AE11
RA15
AD7
RBA0
AE8
RBA1
AC7
RBA2
V4
RCS
W4
RCSD
AA5
RRAS
AA6
RCAS
AC4
RWE
W5
RODT
W6
RCKE
U6
RRESET
AA4
RCLK0
Y4
RCLK0B
U5
DDRVREF_A1
AE13
DDRVREF_A2
W9
ARTP
W8
ARTN
Y8
MEMTP
Y9
MEMTN
AC20
TP_HPCPLL
AD20
TN_HPCPLL
R4
DDRV_1
T4
DDRV_2
R5
DDRV_3
T5
DDRV_4
R6
DDRV_5
T6
DDRV_6
R7
DDRV_7
T7
DDRV_8
R8
DDRV_9
V8
DDRV_10
R9
DDRV_11
T9
DDRV_12
U9
DDRV_13
V9
DDRV_14
AB12
DDRV_15
T8
DDRVA
IC101-*1
AA3
RDQM0
Y2
RDQS0
Y1
RDQS0B
U3
RDQ0
AE2
RDQ1
T3
RDQ2
AE1
RDQ3
R2
RDQ4
AF2
RDQ5
R1
RDQ6
AF1
RDQ7
W2
RDQM1
AB3
RDQS1
AB2
RDQS1B
AD2
RDQ8
U1
RDQ9
AD3
RDQ10
U2
RDQ11
AC3
RDQ12
V1
RDQ13
AC1
RDQ14
V2
RDQ15
AF8
RDQM2
AG7
RDQS2
AH7
RDQS2B
AG3
RDQ16
AG12
RDQ17
AF3
RDQ18
AH12
RDQ19
AG2
RDQ20
AG13
RDQ21
AH2
RDQ22
AH13
RDQ23
AG6
RDQM3
AF9
RDQS3
AG9
RDQS3B
AF12
RDQ24
A5LR_B0
AH4
RDQ25
AF11
RDQ26
AG4
RDQ27
AG10
RDQ28
AF5
RDQ29
AH10
RDQ30
AF6
RDQ31
U4
AVDD33_DDR
Y15
AVDD12_DDR
W15
AVSS12_DDR
+1.5V_DDR
C502
C500
0.1uF
0.1uF
PCB Bottom Side
+1.5V_DDR
OPT
C537
0.1uF
/RCSD /RRAS /RCAS
RRESET
RCLK0
/RCLK0 DDRVREF_A1 DDRVREF_A2
+1.5V_DDR
AB4 AC9 AE3 AE6 AD9 AE4
AC11
AD5 AE9 AE5
AE7 AD11 AE12
AC5 AE10 AE11
AD7
AE8
AC7
V4
/RCS
W4 AA5 AA6 AC4
/RWE
W5
RODT
W6
RCKE
U6 AA4
Y4
U5
AE13
W9
W8
Y8
Y9
AC20 AD20
R4
T4
R5
T5
R6
T6
R7
T7
R8
V8
R9
T9
U9
V9
AB12
T8
RA0 RA1 RA2 RA3 RA4 RA5 RA6 RA7 RA8
RA9 RA10 RA11 RA12 RA13 RA14 RA15
RBA0 RBA1 RBA2
R501 120
1/16W 1%
TP500
R500
49.9
1/16W 1%
C506
0.1uF
OPT
OPT
C538
C539
0.1uF
0.1uF
IC101
LGE5221(A5LRA0)
RA0 RA1 RA2 RA3 RA4 RA5 RA6 RA7 RA8 RA9 RA10 RA11 RA12 RA13 RA14 RA15 RBA0 RBA1 RBA2 RCS RCSD RRAS RCAS RWE RODT RCKE RRESET RCLK0 RCLK0B DDRVREF_A1 DDRVREF_A2 ARTP ARTN
A5LR_A0
MEMTP MEMTN TP_HPCPLL TN_HPCPLL
DDRV_1 DDRV_2 DDRV_3 DDRV_4 DDRV_5 DDRV_6 DDRV_7 DDRV_8
AVDD33_DDR
DDRV_9
AVDD12_DDR DDRV_10 DDRV_11
AVSS12_DDR DDRV_12 DDRV_13 DDRV_14 DDRV_15
DDRVA
C508
0.1uF
RDQM0 RDQS0
RDQS0B
RDQM1 RDQS1
RDQS1B
RDQ10 RDQ11 RDQ12 RDQ13 RDQ14 RDQ15 RDQM2 RDQS2
RDQS2B
RDQ16 RDQ17 RDQ18 RDQ19 RDQ20 RDQ21 RDQ22 RDQ23 RDQM3 RDQS3
RDQS3B
RDQ24 RDQ25 RDQ26 RDQ27 RDQ28 RDQ29 RDQ30 RDQ31
+1.5V_DDR
C529
C528
0.1uF
0.1uF
VREFCA1
M8
VREFCA
H1
VREFDQ
R504
L8
ZQ
240
1%
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
A9
VSS_1
HYNIX_DDR
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
10uF
1uF
10V
DDRVREF_A2
+1.5V_DDR
C532 1uF C533 1uF
Near DRAM
+1.5V_DDR
R506
R508
VREFCA2
C534
0.1uF
1K 1%
C522
0.1uF
1K 1%
C535
0.1uF
DDRVREF_A1
+1.5V_DDR
C519 1uF C520 1uF
Near DRAM
+1.5V_DDR
RCLK0
VREFCA1
C518
0.1uF
R502
1K 1%
C517
0.1uF
R503
1K 1%
/RCLK0
RRESET
+1.5V_DDR
+1.5V_DDR
+1.5V_DDR
1%
1%
1%
1%
+1.5V_DDR
1%
1%
Near DRAM
100
R505
IC502
H5TQ4G63CFR_RDC
DDR3 4Gbit
N3
RA0 RA1
RCLK0
/RCLK0
/RCSD
/RRAS /RCAS
RRESET
RDQS2
/RDQS2
RDQS3
/RDQS3
RDQM2
RDQM3 RDQ[16] RDQ[17] RDQ[18] RDQ[19] RDQ[20] RDQ[21] RDQ[22] RDQ[23]
RDQ[24] RDQ[25] RDQ[26] RDQ[27] RDQ[28] RDQ[29] RDQ[30] RDQ[31]
RA2 RA3 RA4 RA5 RA6 RA7 RA8
RA9 RA10 RA11 RA12 RA13 RA14 RA15
RBA0 RBA1 RBA2
RCKE
RODT
/RWE
OPT
47K
R563
C521
0.1uF
OPT
100
R559
/RCS
OPT
100
R560
OPT
100
R561
/RCSD
OPT
100
R562
RDQ[16-23]
RDQ[24-31]
100
R564
RCKE
100
R565
A0
P7
(x16)
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
VREFCA2
M8
VREFCA
H1
VREFDQ
ZQ
VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9
VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9
NC_1 NC_2 NC_3 NC_4
VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7
1GB_HYNIX_DDR
VSS_8
VSS_9 VSS_10 VSS_11 VSS_12
VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9
C536
0.1uF
R507
L8
240
1% B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
J1 J9 L1 L9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
RCLK0
/RCLK0
/RRAS /RCAS
RRESET
RDQS0
/RDQS0
RDQS1
/RDQS1
RDQM0 RDQM1
RA0 RA1 RA2 RA3 RA4 RA5 RA6 RA7 RA8
RA9 RA10 RA11 RA12 RA13 RA14 RA15
RBA0 RBA1 RBA2
RCKE
/RCS RODT
/RWE
RDQ[0] RDQ[1] RDQ[2] RDQ[3] RDQ[4] RDQ[5] RDQ[6] RDQ[7]
RDQ[8] RDQ[9] RDQ[10] RDQ[11] RDQ[12] RDQ[13] RDQ[14] RDQ[15]
C523
0.1uF
C510
0.1uF
0.1uF
OPT
OPT
C541
C540
0.1uF
0.1uF
AA3
RDQM0
Y2
RDQS0
Y1
/RDQS0
U3
RDQ0
AE2
RDQ1
T3
RDQ2
AE1
RDQ3
R2
RDQ4
AF2
RDQ5
R1
RDQ6
AF1
RDQ7
W2
RDQM1
AB3
RDQS1
AB2
/RDQS1
AD2
RDQ8
U1
RDQ9
AD3 U2 AC3 V1 AC1 V2 AF8
RDQM2
AG7
RDQS2
AH7
/RDQS2
AG3 AG12 AF3 AH12 AG2 AG13 AH2 AH13 AG6
RDQM3
AF9
RDQS3
AG9
/RDQS3
AF12 AH4 AF11 AG4 AG10 AF5 AH10 AF6
U4 Y15
W15
10uF
1uF
10V
OPT
OPT
C543
C542
0.1uF
0.1uF 16V
+1.2V_MTK_CORE
RDQ[0-7]
RDQ[8-15]
RDQ[16-23]
RDQ[24-31]
VDD3V3
C511 1uF
RDQ[0-7]
RDQ[8-15]
C504
0.1uF
RDQ[0] RDQ[1] RDQ[2] RDQ[3] RDQ[4] RDQ[5] RDQ[6] RDQ[7]
RDQ[8]
RDQ[9] RDQ[10] RDQ[11] RDQ[12] RDQ[13] RDQ[14] RDQ[15]
RDQ[16] RDQ[17] RDQ[18] RDQ[19] RDQ[20] RDQ[21] RDQ[22] RDQ[23]
RDQ[24] RDQ[25] RDQ[26] RDQ[27] RDQ[28] RDQ[29] RDQ[30] RDQ[31]
C516
C515
C513
C527
C526
0.1uF
0.1uF
IC501
H5TQ4G63CFR_RDC
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
DDR3 4Gbit (x16)
C531
C530
+1.5V_DDR
1%
100
R566
RODT
100
R567
K4B4G1646D-BCMA
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
IC502-*1
VREFCA
VREFDQ
VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9
VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9
NC_1 NC_2 NC_3 NC_4 NC_6
VSS_1 VSS_2 VSS_3 VSS_4
1GB_SS_DDR
VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12
VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9
M8
H1
L8
ZQ
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
J1 J9 L1 L9 T7
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
M8
VREFCA
H1
VREFDQ
L8
ZQ
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_6
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
768MB_SS_DDR
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
IC502-*2
K4B2G1646Q-BCMA
IC502-*3
H5TQ2G63FFR-RDC
N3
VREFCA
A0
P7
A1
P3
A2
N2
VREFDQ
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
VDDQ_1
J7
VDDQ_2
CK
K7
VDDQ_3
CK
K9
VDDQ_4
CKE
VDDQ_5
L2
VDDQ_6
CS
K1
VDDQ_7
ODT
J3
VDDQ_8
RAS
K3
VDDQ_9
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
VSS_10
DQL3
H3
768MB_HYNIX_DDR
VSS_11
DQL4
H8
VSS_12
DQL5
G2
DQL6
H7
DQL7
VSSQ_1
D7
VSSQ_2
DQU0
C3
VSSQ_3
DQU1
C8
VSSQ_4
DQU2
C2
VSSQ_5
DQU3
A7
VSSQ_6
DQU4
A2
VSSQ_7
DQU5
B8
VSSQ_8
DQU6
A3
VSSQ_9
DQU7
M8
H1
L8
ZQ
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1 A8 C1 C9 D2 E9 F1 H2 H9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
K4B4G1646D-BCMA
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
IC501-*1
VREFCA
VREFDQ
ZQ
VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9
VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9
NC_1 NC_2 NC_3 NC_4 NC_6
SS_DDR
VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12
VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9
1%
M8
H1
L8
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
J1 J9 L1 L9 T7
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
A5LR_Bring_Up
DDR
2014.11.01
5
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