LG 32LH35FD-AA Schematic

LCD TV
SERVICE MANUAL
CAUTION
BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
CHASSIS : LB91A
MODEL : 32LH35FD
North/Latin America http://aic.lgservice.com Europe/Africa http://eic.lgservice.com Asia/Oceania http://biz.lgservice.com
Internal Use Only
P/NO : MFL60020317 (0904-REV00) Printed in Korea
Copyright © 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes
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LGE Internal Use Only
CONTENTS
CONTENTS ............................................................................................. 2
PRODUCT SAFETY ................................................................................. 3
SPECIFICATION....................................................................................... 6
ADJUSTMENT INSTRUCTION .............................................................. 10
BLOCK DIAGRAM.................................................................................. 14
EXPLODED VIEW .................................................................................. 15
SVC. SHEET ...............................................................................................
Copyright © 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes
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LGE Internal Use Only
SAFETY PRECAUTIONS
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and Exploded View. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.
General Guidance
An isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC power line. Use a transformer of adequate power rating as this protects the technician from accidents resulting in personal injury from electrical shocks.
It will also protect the receiver and it's components from being damaged by accidental shorts of the circuitry that may be inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown, replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor, over 1W), keep the resistor 10mm away from PCB.
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed metallic parts of the cabinet, such as antennas, terminals, etc., to be sure the set is safe to operate without damage of electrical shock.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an electrical jumper across the two AC plug prongs. Place the AC switch in the on position, connect one lead of ohm-meter to the AC plug prongs tied together and touch other ohm-meter lead in turn to each exposed metallic parts such as antenna terminals, phone jacks, etc. If the exposed metallic part has a return path to the chassis, the measured resistance should be between 1Mand 5.2M. When the exposed metal has no return path to the chassis the reading must be infinite. An other abnormality exists that must be corrected before the receiver is returned to the customer.
Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check.
Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor between a known good earth ground (Water Pipe, Conduit, etc.) and the exposed metallic parts. Measure the AC voltage across the resistor using AC voltmeter with 1000 ohms/volt or more sensitivity. Reverse plug the AC cord into the AC outlet and repeat AC voltage measurements for each exposed metallic part. Any voltage measured must not exceed 0.75 volt RMS which is corresponds to
0.5mA. In case any measurement is out of the limits specified, there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer.
Leakage Current Hot Check circuit
1.5 Kohm/10W
To Instrument's exposed METALLIC PARTS
Good Earth Ground such as WATER PIPE, CONDUIT etc.
AC Volt-meter
IMPORTANT SAFETY NOTICE
0.15uF
Copyright © 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
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CAUTION: Before servicing receivers covered by this service manual and its supplements and addenda, read and follow the
SAFETY PRECAUTIONS on page 3 of this publication. NOTE: If unforeseen circumstances create conflict between the
following servicing precautions and any of the safety precautions on page 3 of this publication, always follow the safety precautions. Remember: Safety First.
General Servicing Precautions
1. Always unplug the receiver AC power cord from the AC power source before; a. Removing or reinstalling any component, circuit board
module or any other receiver assembly.
b. Disconnecting or reconnecting any receiver electrical plug or
other electrical connection.
c. Connecting a test substitute in parallel with an electrolytic
capacitor in the receiver. CAUTION: A wrong part substitution or incorrect polarity installation of electrolytic capacitors may result in an explosion hazard.
2. Test high voltage only by measuring it with an appropriate high voltage meter or other voltage measuring device (DVM, FETVOM, etc) equipped with a suitable high voltage probe. Do not test high voltage by "drawing an arc".
3. Do not spray chemicals on or near this receiver or any of its assemblies.
4. Unless specified otherwise in this service manual, clean electrical contacts only by applying the following mixture to the contacts with a pipe cleaner, cotton-tipped stick or comparable non-abrasive applicator; 10% (by volume) Acetone and 90% (by volume) isopropyl alcohol (90%-99% strength) CAUTION: This is a flammable mixture. Unless specified otherwise in this service manual, lubrication of contacts in not required.
5. Do not defeat any plug/socket B+ voltage interlocks with which receivers covered by this service manual might be equipped.
6. Do not apply AC power to this instrument and/or any of its electrical assemblies unless all solid-state device heat sinks are correctly installed.
7. Always connect the test receiver ground lead to the receiver chassis ground before connecting the test receiver positive lead. Always remove the test receiver ground lead last.
8. Use with this receiver only the test fixtures specified in this
service manual.
CAUTION: Do not connect the test fixture ground strap to any heat sink in this receiver.
Electrostatically Sensitive (ES) Devices
Some semiconductor (solid-state) devices can be damaged easily by static electricity. Such components commonly are called Electrostatically Sensitive (ES) Devices. Examples of typical ES devices are integrated circuits and some field-effect transistors and semiconductor "chip" components. The following techniques should be used to help reduce the incidence of component damage caused by static by static electricity.
1. Immediately before handling any semiconductor component or semiconductor-equipped assembly, drain off any electrostatic charge on your body by touching a known earth ground. Alternatively, obtain and wear a commercially available discharging wrist strap device, which should be removed to prevent potential shock reasons prior to applying power to the
unit under test.
2. After removing an electrical assembly equipped with ES devices, place the assembly on a conductive surface such as aluminum foil, to prevent electrostatic charge buildup or exposure of the assembly.
3. Use only a grounded-tip soldering iron to solder or unsolder ES devices.
4. Use only an anti-static type solder removal device. Some solder removal devices not classified as "anti-static" can generate electrical charges sufficient to damage ES devices.
5. Do not use freon-propelled chemicals. These can generate electrical charges sufficient to damage ES devices.
6. Do not remove a replacement ES device from its protective package until immediately before you are ready to install it. (Most replacement ES devices are packaged with leads electrically shorted together by conductive foam, aluminum foil or comparable conductive material).
7. Immediately before removing the protective material from the leads of a replacement ES device, touch the protective material to the chassis or circuit assembly into which the device will be installed. CAUTION: Be sure no power is applied to the chassis or circuit, and observe all other safety precautions.
8. Minimize bodily motions when handling unpackaged replacement ES devices. (Otherwise harmless motion such as the brushing together of your clothes fabric or the lifting of your foot from a carpeted floor can generate static electricity sufficient to damage an ES device.)
General Soldering Guidelines
1. Use a grounded-tip, low-wattage soldering iron and appropriate tip size and shape that will maintain tip temperature within the range or 500
°F to 600°F.
2. Use an appropriate gauge of RMA resin-core solder composed of 60 parts tin/40 parts lead.
3. Keep the soldering iron tip clean and well tinned.
4. Thoroughly clean the surfaces to be soldered. Use a mall wire­bristle (0.5 inch, or 1.25cm) brush with a metal handle. Do not use freon-propelled spray-on cleaners.
5. Use the following unsoldering technique a. Allow the soldering iron tip to reach normal temperature.
(500
°F to 600°F)
b. Heat the component lead until the solder melts. c. Quickly draw the melted solder with an anti-static, suction-
type solder removal device or with solder braid. CAUTION: Work quickly to avoid overheating the circuit board printed foil.
6. Use the following soldering technique. a. Allow the soldering iron tip to reach a normal temperature
(500
°F to 600°F)
b. First, hold the soldering iron tip and solder the strand against
the component lead until the solder melts.
c. Quickly move the soldering iron tip to the junction of the
component lead and the printed circuit foil, and hold it there only until the solder flows onto and around both the component lead and the foil. CAUTION: Work quickly to avoid overheating the circuit board printed foil.
d. Closely inspect the solder area and remove any excess or
splashed solder with a small wire-bristle brush.
SERVICING PRECAUTIONS
Copyright © 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes
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LGE Internal Use Only
IC Remove/Replacement
Some chassis circuit boards have slotted holes (oblong) through which the IC leads are inserted and then bent flat against the circuit foil. When holes are the slotted type, the following technique should be used to remove and replace the IC. When working with boards using the familiar round hole, use the standard technique as outlined in paragraphs 5 and 6 above.
Removal
1. Desolder and straighten each IC lead in one operation by gently prying up on the lead with the soldering iron tip as the solder melts.
2. Draw away the melted solder with an anti-static suction-type solder removal device (or with solder braid) before removing the IC.
Replacement
1. Carefully insert the replacement IC in the circuit board.
2. Carefully bend each IC lead against the circuit foil pad and solder it.
3. Clean the soldered areas with a small wire-bristle brush. (It is not necessary to reapply acrylic coating to the areas).
"Small-Signal" Discrete Transistor Removal/Replacement
1. Remove the defective transistor by clipping its leads as close as possible to the component body.
2. Bend into a "U" shape the end of each of three leads remaining on the circuit board.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding leads extending from the circuit board and crimp the "U" with long nose pliers to insure metal to metal contact then solder each connection.
Power Output, Transistor Device Removal/Replacement
1. Heat and remove all solder from around the transistor leads.
2. Remove the heat sink mounting screw (if so equipped).
3. Carefully remove the transistor from the heat sink of the circuit board.
4. Insert new transistor in the circuit board.
5. Solder each transistor lead, and clip off excess lead.
6. Replace heat sink.
Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as possible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit board.
3. Observing diode polarity, wrap each lead of the new diode around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of the two "original" leads. If they are not shiny, reheat them and if necessary, apply additional solder.
Fuse and Conventional Resistor Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow stake.
2. Securely crimp the leads of replacement component around notch at stake top.
3. Solder the connections. CAUTION: Maintain original spacing between the replaced component and adjacent components and the circuit board to prevent excessive component temperatures.
Circuit Board Foil Repair
Excessive heat applied to the copper foil of any printed circuit board will weaken the adhesive that bonds the foil to the circuit board causing the foil to separate from or "lift-off" the board. The following guidelines and procedures should be followed whenever this condition is encountered.
At IC Connections
To repair a defective copper pattern at IC connections use the following procedure to install a jumper wire on the copper pattern side of the circuit board. (Use this technique only on IC connections).
1. Carefully remove the damaged copper pattern with a sharp knife. (Remove only as much copper as absolutely necessary).
2. carefully scratch away the solder resist and acrylic coating (if used) from the end of the remaining copper pattern.
3. Bend a small "U" in one end of a small gauge jumper wire and carefully crimp it around the IC pin. Solder the IC connection.
4. Route the jumper wire along the path of the out-away copper pattern and let it overlap the previously scraped end of the good copper pattern. Solder the overlapped area and clip off any excess jumper wire.
At Other Connections
Use the following technique to repair the defective copper pattern at connections other than IC Pins. This technique involves the installation of a jumper wire on the component side of the circuit board.
1. Remove the defective copper pattern with a sharp knife. Remove at least 1/4 inch of copper, to ensure that a hazardous condition will not exist if the jumper wire opens.
2. Trace along the copper pattern from both sides of the pattern break and locate the nearest component that is directly connected to the affected copper pattern.
3. Connect insulated 20-gauge jumper wire from the lead of the nearest component on one side of the pattern break to the lead of the nearest component on the other side. Carefully crimp and solder the connections. CAUTION: Be sure the insulated jumper wire is dressed so the it does not touch components or sharp edges.
Copyright © 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
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4. Module Specification
No. Item Specification Remark
1. Display Screen Device 32 Wide Color Display Module LCD
2. Aspect Ratio 16:9
3. LCD Module 32”TFT LCD FHD, with Inverter, Low Power LGD (LC320WUN-SBG1)
4. Operating Environment Temp.:0 ~ 50°C 240h Humidity :Ta=40°C, 90% RH, 240h 32-LGD (FHD/50Hz)
5. Storage Environment Temp.:-20 ~ 60°C, 240h 32-LGD (FHD/50Hz)
6. Input Voltage AC 100 ~ 240V, 50/60Hz
7. Power Consumption Typ : 73.2W (Low Power) LCD(Module)+Backlight(Lamp)
8. Module Size 760.0 (H)x 450.0 (V)x 48.0 (D) With inverter
9. Pixel Pitch 0.36375 (H)x 0.363755 (V)
10. Back Light EEFL
11. Color Depth 10-bit(D), 1.06B colors
12. Coating 3H, Anti-glare
1. Application Range
This specification sheet is applied to the LCD TV used LB91A chassis.
2. Specification
Each part is tested as below without special appointment
1) Temperature : 25 ± 5°C (77 ± 9ºF), CST : 40 ±5ºC
2) Relative Humidity : 65 ±10%
3) Power Voltage : Standard input voltage (100-240V@ 50/60Hz) * Standard Voltage of each products is marked by models
4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with BOM.
5) The receiver must be operated for about 20 minutes prior to the adjustment.
3. Test method
1) Performance : LGE TV test method followed.
2) Demanded other specification
- Safety : UL, CSA, IEC specification
- EMC : FCC, ICE, IEC specification
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement
.
Copyright © 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
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1) Optical characteristics are determined after the unit has been ‘ON’ and stable in a dark environment at 25±2°C
2) Surface luminance is the luminance value at center 1-point across the LCD surface 50cm from the surface with all pixels displaying white.
No Item Min. Typ. Max. Remark
1 Viewing Angle R/L/U/D 178/178/178/178 CR >10 2 Luminance Luminance 400 500
Variation 1.3 PSM: Vivid, CSM: Cool, White: 100IRE 3 Contrast Ratio CR 900 1300 AllWhite, All Black 4 Color coordinate WHITE X 0.279
Y 0.292
RED X Typ. 0.638 Typ. PSM: Vivid, CSM: Cool, White: 85 IRE
Y +0.03 0.334 +0.03
GREEN X 0.291
Y 0.607
BLUE X 0.145
Y 0.062
P1
P2
P3
P4
P5
1W/4
2W/4
3W/4
1H/4
2H/4
3H/4
: Measurement position (5 point)
5. Chroma & Brightness
5.1 Module optical specifications
*** LGD module Uniformity Measurement Position ***
5.2 Chroma (PSM:Vivid, Color Temperature:Cool)
- except RGB PC Mode PSM: Standard, Color Temperature: Medium ** The W/B Tolerance is ±0.002 for Adjustment, but for DQA ±0.015
No Item Min Typ Max Remark
1. Cool White Balance, X axis 0.274 0.276 0.278 DQA : ±0.015 White Balance, Y axis 0.281 0.283 0.285 DQA : ±0.015 -PSM: Vivid, CSM: Cool,
2. Medium White Balance, X axis 0.283 0.285 0.287 DQA : ±0.015 White(85IRE), White Balance, Y axis 0.291 0.293 0.295 DQA : ±0.015 Dynamic contrast : off,
3. Warm White Balance, X axis 0.311 0.313 0.315 DQA : ±0.015 Dynamic color :off White Balance, Y axis 0.327 0.329 0.331 DQA : ±0.015
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LGE Internal Use OnlyCopyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
No.
Specification
Remark
Resolution H-freq(kHz) V-freq(Hz)
1. 720x480 15.73 60.00 SDTV,DVD 480i
2. 720x480 15.63 59.94 SDTV,DVD 480i
3. 720x480 31.47 59.94 480p
4. 720x480 31.50 60.00 480p
5. 720x576 15.625 50.00 SDTV,DVD 625 Line
6. 720x576 31.25 50.00 HDTV 576p
7. 1280x720 45.00 50.00 HDTV 720p
8. 1280x720 44.96 59.94 HDTV 720p
9. 1280x720 45.00 60.00 HDTV 720p
10. 1920x1080 31.25 50.00 HDTV 1080i
11. 1920x1080 33.75 60.00 HDTV 1080i
12. 1920x1080 33.72 59.94 HDTV 1080i
13. 1920x1080 56.250 50 HDTV 1080p
14. 1920x1080 67.43/67.5 59.94/60 HDTV 1080p
7. Component Video Input (Y, CB/PB, CR/PR)
6. SET Optical Feature
6.1 General feature
(Measurement Condition:Full white/Vivid) -> Measure the black luminance after 30 seconds.
No Item
Module
Luminance(min) C/R(min)
Remark
AV, COMPONENT,HDMI AV, COMPONENT,HDMI
1 32 inch LGD FHD 360 cd/m
2
900 except from the PC mode.
No Item Min Inch Power B/D P/N Remark
1
Dynamic CR
40,000:1 32FHD EAY58582801 HDMI 720p Full White/ Full Black Pattern
(Only HDMI mode)
6.2 Special feature
(Dynamic CR 50000:1) -> Measure the black luminance after 30 seconds.
Copyright © 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
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No. Specification
Remark
Resolution H-freq(kHz) V-freq(Hz) Pixel clock(MHz) Proposed
1. 720*400 31.468 70.08 28.321 For only DOS mode
2. 640*480 31.469 59.94 25.17 VESA Input 848*480 60Hz, 852*480 60Hz
-> 640*480 60Hz Display
3. 800*600 37.879 60.31 40.00 VESA
4. 1024*768 48.363 60.00 65.00 VESA(XGA)
5. 1280*768 47.78 59.87 79.5 WXGA
6. 1360*768 47.72 59.8 84.75 WXGA
7. 1280*1024 63.595 60.0 108.875 SXGA FHD model
8. 1920*1080 66.587 59.93 138.625 WUXGA FHD model
8. RGB input (PC)
9. HDMI input (PC/DTV)
No. Resolution H-freq(kHz) V-freq(Hz) Pixel clock(MHz) Remark
PC
1. 720*400 31.468 70.08 28.321 HDCP
2. 640*480 31.469 59.94 25.17 VESA HDCP
3. 800*600 37.879 60.31 40.00 VESA HDCP
4. 1024*768 48.363 60.00 65.00 VESA(XGA)HDCP
5. 1280*768 47.78 59.87 79.5 WXGA HDCP
6. 1360*768 47.72 59.8 84.75 WXGA HDCP
7. 1280*1024 63.595 60.0 108.875 SXGA HDCP
8. 1920*1080 67.5 60 148.5 WUXGA HDCP
DTV
1. 720*480 31.469 /31.5 59.94 /60 27.00/27.03 SDTV 480P
2. 720*576 31.25 50 54 SDTV 576P
3. 1280*720 37.500 50 74.25 HDTV 720P
4. 1280*720 44.96 /45 5 9.94 /60 74.17/74.25 HDTV 720P
5. 1920*1080 33.72 /33.75 59.94 /60 74.17/74.25 HDTV 1080I
6. 1920*1080 28.125 50.00 74.25 HDTV 1080I
7. 1920*1080 26.97 /27 23.97 /24 74.17/74.25 HDTV 1080P
8. 1920*1080 33.716 /33.75 29.976 /30.00 74.25 HDTV 1080P
9. 1920*1080 56.250 50 148.5 HDTV 1080P
10. 1920*1080 67.43 /67.5 59.94 /60 148.35/148.50 HDTV 1080P
Copyright © 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes
1. Application
This spec sheet is applied all of the LCD TV with LB91A chassis.
2. Designation
(1) The adjustment is according to the order which is
designated and which must be followed, according to the
plan which can be changed only on agreeing. (2) Power adjustment : Free Voltage. (3) Magnetic Field Condition: Nil. (4) Input signal Unit: Product Specification Standard. (5) Reserve after operation: Above 5 Minutes (Heat Run)
Temperature : at 25 °C±5 °C Relative humidity : 65 ±10% Input voltage : 220V, 60Hz
(6) Adjustment equipments : Color Analyzer (CA-210 or CA-
110), Pattern Generator (MSPG-925L or Equivalent), DDC
Adjustment Jig equipment, SVC remote controller. (7) Push The IN STOP KEY” – For memory initialization.
3.Main PCB check process
# APC - After Manual-Insert, executing APC
3.1 Boot file Download
1. Execute ISP program Mstar ISP Utility and then click
Config tab.
2. Set as below, and then click Auto Detect and check OK
message If Error is displayed, Check connection between computer, jig, and set.
3. Click Read tab, and then load download file (XXXX.bin) by
clicking Read
4. Click Connect tab. If Cant is displayed, Check connection between computer, jig, and set.
5. Click Auto tab and set as below
6. Click Run”.
7. After downloading, check OK message.
LGE Internal Use Only
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ADJUSTMENT INSTRUCTION
Case1 : Software version up
1. After downloading S/W by USB , TV set will reboot automatically
2. Push In-stop key
3. Push Power on key
4. Function inspection
5. After function inspection, Push In-stop key.
Case2 : Function check at the assembly line
1. When TV set is entering on the assembly line, Push In­stop key at first.
2. Push Power on key for turning it on.
-> If you push Power on key, TV set will recover channel information by itself.
3. After function inspection, Push In-stop key.
(4)
filexxx.bin
(1) (3)
Please Check the Speed : To use speed between from 200KHz to 400KHz
filexxx.bin
(7)
(5)
(8) ……….OK
(6)
3.2 USB DOWNLOAD(*.epk file download)
1. Put the USB Stick to the USB socket
2. Automatically detecting update file in USB Stick
- If your downloaded program version in USB Stick is Low, it didnt work. But your downloaded version is High, USB data is automatically detecting
3. Show the message Copying files from memory
4. Updating is staring.
5. Updating Completed, The TV will restart automatically.
6. If your TV is turned on, check your updated version and Tool option. (explain the Tool option, next stage)
* If downloading version is more high than your TV have, TV
can lost all channel data. In this case, you have to channel recover. if all channel data is cleared, you didnt have a DTV/ATV test on production line.
* After downloading, have to adjust TOOL OPTION again.
1. Push "IN-START" key in service remote controller.
2. Select "Tool Option 1" and Push OK button.
3. Punch in the number. (Each model has their number.)
4. Completed selecting Tool option.
3.3 ADC Process
3.3.1 ADC
Input signal : Component
Signal equipment displays.
Adjustment pattern
-Component 480I MODEL: 209 in Pattern Generator(480i Mode) PATTERN : 65 in Pattern Generator( MSPG-925 SERISE)
Input Signal : RGB (You dont need to connect RGB Cable) Because We use TV internal pattern
After enter Service Mode by pushing ADJ key,
Enter Internal ADC mode by pushing “” key at “5. ADC
Calibration
* Caution
Using power on button of the Adjustment R/C , power on TV.
3.3.2 ADC Calibration Protocol (RS232)
* Adjustment can be done using only external ADC * Required equipment : Adjustment R/C.
3.4 Function Check
3.4.1 Check display and sound
Check Input and Signal items. (cf. work instructions)
1. TV
2. AV (CVBS)
3. COMPONENT (480i)
4. RGB (PC : 1024 x 768 @ 60hz)
5. HDMI
6. PC Audio In
* Display and Sound check is executed by Remote controller.
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LGE Internal Use OnlyCopyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
Tool Option 1 2 3 4
32LH35 16577 2600 932 4352
NO Item
CMD1 CMD2
Data0 Data1 1 Main total mode A A 0 0 0 0 2 Change to Component X B 0 0 4 0 3 Adjust Component A D 0 0 1 0 4 Change to RGB X B 0 0 6 0 5 Adjust RGB A D 0 0 1 0
4. Total Assembly line process
4.1 Adjustment Preparation
• W/B Equipment condition CA210 : CH 9, Test signal : Inner pattern (85IRE)
• Above 5 minutes H/run in the inner pattern. (Power on” key of
adjust remote control)
- Connecting picture of the measuring instrument (On Automatic control )
Inside PATTERN is used when W/B is controlled. Connect to auto controller or push Adjustment R/C POWER-ON -> Enter the mode of White-Balance, the
pattern will come out.
4.1.1 Auto-control interface and directions
1. Adjust in the place where the influx of light like floodlight around is blocked. (illumination is less than 10ux).
2. Adhere closely the Color Analyzer ( CA210 ) to the module less than 10cm distance, keep it with the surface of the Module and Color Analyzer’s Prove vertically.(80~100°).
3. Aging time
- After aging start, keep the power on (no suspension of power
supply) and heat-run over 15 minutes.
- Using ‘no signal’ or ‘full white pattern’ or the others, check the
back light on.
** Caution ** Color Temperature : COOL, Medium, Warm. One of R Gain/G Gain/ B Gain should be kept on 0xC0, and adjust other two lower than C0. (when R/G/B Gain are all C0, it is the FULL Dynamic Range of Module)
*Manual W/B process using adjusts Remote control.
• After enter Service Mode by pushing “ADJ” key,
• Enter White Balance by pushing “•” key at “3. White Balance”.
* After done all adjustments, Press “In-start” button and compare
Tool option and Area option value with its BOM, if it is correctly same then unplug the AC cable.
If it is not same, then correct it same with BOM and unplug AC cable. For correct it to the model’s module from factory JIG model.
* Push The “IN STOP KEY” after completing the function
inspection.
4.2 DDC EDID Write (RGB 128Byte )
• Connect D-sub Signal Cable to D-Sub Jack.
• Write EDID DATA to EEPROM (24C02) by using DDC2B protocol.
• Check whether written EDID data is correct or not.
* For SVC main Ass’y, EDID have to be downloaded to Insert Process in advance.
4.3 DDC EDID Write (HDMI 256Byte)
• Connect HDMI Signal Cable to HDMI Jack.
• Write EDID DATA to EEPROM(24C02) by using DDC2B protocol.
• Check whether written EDID data is correct or not.
* For SVC main Ass’y, EDID have to be downloaded to Insert
Process in advance.
4.4 EDID DATA
1) All Data : HEXA Value
2) Changeable Data : *: Serial No : Controlled / Data:01 **: Month : Controlled / Data:00 ***:Year : Controlled ****:Check sum
4.4.1 Auto Download
• After enter Service Mode by pushing “ADJ” key,
• Enter EDID D/L mode.
• Enter “START” by pushing “OK” key.
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LGE Internal Use OnlyCopyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
Cool
11,000k
K
X=0.276
(±0.002)
Y=0.283
(±0.002)
Medium
9,300k
K
X=0.285
(±0.002)
Y=0.293
(±0.002)
Color
Temperature
Warm
6,500k
K
X=0.313
(±0.002)
Y=0.329
(±0.002)
<Test Signal>
Inner pattern
(216gray,85IRE)
COLOR ANALYZER TYPE: CA-100
4.4.2 Manual Download * Caution * Use the proper signal cable for EDID Download
- Analog EDID : Pin3 exists
- Digital EDID : Pin3 exists * Caution:
- Never connect HDMI & D-sub Cable at the same time.
- Use the proper cables below for EDID Writing.
- Download HDMI1, HDMI2 separately because HDMI1 is
different from HDMI2.
4.4.3EDID DATA(32/37/42LH35FD-AA)
1. ANALOG DATA 128 Byte (2Bi)
2. DIGITAL DATA(HDMI-1/2/3) 256Byte (1) FHD HDMI1/2/3 Block1
(2) FHD HDMI1 Block2
(3) FHD HDMI2 Block2
(4) FHD HDMI3 Block2
- 13 -
LGE Internal Use OnlyCopyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
For Analog EDID
For HDMI EDID
D-sub to D-sub DVI-D to HDMI or HDMI to HDMI
No. Item Condition Hex Data
1 Manufacturer ID GSM 1E6D
2 Version Digital : 1 01
3 Revision Digital : 3 03
• Detail EDID Options are below (a, , , , ,
)
Product ID
MODEL NAME HEX EDID Table
DDC
Func tion
FHD Model 0001 01 00 Analog/Digital
HD Model 0000 00 00 Analog/Digital
Serial No:
Controlled on production line.
Month, Year:
Controlled on production line: ex) Monthly : ‘09’ Q-> ‘09’
Year : ‘2006’ -> ‘10’
Model Name(Hex):
MODEL NAME MODEL NAME(HEX)
ALL 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 (LG TV)
c
d
f
b
e
a
b
c
d
Checksum: Changeable by total EDID data. Vendor Specific(HDMI)
INPUT
MODEL NAME(HEX)
HDMI1
65030C001000
HD
(22/26/32/37/42LH20D-AA)
HDMI2
65030C002000
INPUT
MODEL NAME(HEX)
HDMI1
67030C001000B82D
HDMI2
65030C002000B82D
FHD
(32/37/42LH35FD-AA)
HDMI3 65030C003000B82D
f
e
Copyright © 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
- 14 -
BLOCK DIAGRAM
DDR2 (1Gbit)
Qimonda / Hynix
NAND Flash
(512Mbit)
Digital Audio (Optic)
Digital AMP
NTP3100L
RS-232C (Ctrl./SVC)
I2S
DDR_Data[0:15], DQS, DM …
Addr.[ ], ctrl. data
MAX3232
RS232 IC
Saturn6
Saturn6
Data [0 … 7]
DTV IF +/-
Component 1
Y Pb Pr
Audio L/R
Addr[0…1], CS …
Phone (for RGB)
SPDI
F
RX/TX RX/TX
Tuner CVBS, SIF
TS_Serial In
TS_clk, Sync, Val, Err
TS_Parallel In[0-7]l
SCL,
SDA_3.3V
CVBS
LCD Module
LVDS
Buffer
CE6355
Intel Demod.
CVBS
RGB/H/V
EEPROM
AV 1
AV 2
RGB
Audio L/R
USB2.0
USB DP/DM
MIC2019
O.C. Protector
+5V+5V
Serial Flash
(32Mbit)
SPI
EEPROM
(512K)
CM3212
Sensor
SCL,
SDA_3.3V
XC5000
Tuner
LH30 LU20 : Side
LH20 : Rear
Rear
DDR2 (512Mbit)
Qimonda / Hynix
DDR_Data[0:15], DQS, DM …
Addr.[ ], ctrl. data
Rear
Audio L/R
Audio L/R
Audio L/R
SVC only
LH30 LU20 : Side
LH20 : Rear
HDMI 1
HDMI 2
HDMI 3
5V_HDMI1, HPD1, DDC SCL/SDA, CLK,
DATA
5V_HDMI2, HPD2, DDC SCL/SDA, CLK,
DATA
5V_HDMI3, HPD3, DDC SCL/SDA, CLK,
DATA
LH30 LU20 : Side
LH20 : Rear
Copyright LG Electronics. Inc. All right reserved. Only for training and service purposes
- 15 -
LGE Internal Use Only
EXPLODED VIEW
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and EXPLODED VIEW. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.
IMPORTANT SAFETY NOTICE
300
200
200T
521
530
804
510
120
900
500
540
806
550
802
801
803
805
400
310
200N
A2
LV1
A10
IC102
Copyright ⓒ 2009 LG Electronics Inc. All right reserved. Only for traning and service purposes
LGE Internal Use Only
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
VCC_1
VSS_1
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
R/B
RE
CE
CLE
ALE
WE
WP
+3.3V
VCC
HOLD#
SCLK
SI
HY27US08121B-TPCB
1
Nand Flash
2
3
4
5
6
7
1386 WON
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
EAN38563401
L102
0.1uF
SPI_CK
SPI_DI
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
C102
R120
R117 3.9K
OPT
C101
IC103
Serial Flash
1
$0.76
2
3
4
+3.3V
0.1uF
8
7
6
5
NAND FLASH MEMORY
/PF_CE0 H : Serial Flash L : NAND Flash /PF_CE1 H : 16 bit L : 8 bit
/F_RB
/PF_OE
/PF_CE0
+3.3V
OPT R108
1K
/PF_CE1
10K
PF_ALE
R105
/PF_WE
0
C
R101
OPT
Q101
B
R103
R104
R102
OPT
KRC103S
+3.3V
Q102
OPT
0
KRC103S OPT
E
HY27US08121B-TPCB 512MBIT 64MX8BIT 2.7VTO3.6V 50NSEC UNIFORM SECTOR TSOP TR 48P HYNIX SEMICONDOCTOR
+3.3V
SPI_CS
SPI_DO
10K
R106
0
C
B
0
E
PF_WP
Serial FLASH MEMORY for BOOT
Flash_WP_1
MX25L3205DM2I-12G 32MBIT 4M X 8BIT 2.7VTO3.6V 12NSEC UNIFORM SECTOR SOIC(EIAJ) ST 8P MACRONIX INTERNATIONAL CO.,LTD.
1K
R112
R113 1K
R114
1K
MX25L3205DM2I-12G
R115
4.7K CS#
SO
R109
33
WP#
GND
EAN39050401
NC_28
NC_27
NC_26
NC_25
I/O7
I/O6
I/O5
I/O4
NC_24
NC_23
PRE
VCC_2
VSS_2
NC_22
NC_21
NC_20
I/O3
I/O2
I/O1
I/O0
NC_19
NC_18
NC_17
NC_16
EEPROM
E0
E1
E2
VSS
0
+3.3V
AR102
22
C103
10uF 6.3V
C104 0.1uF
AR103
22
IC101
M24512-WMW6
VCC
8
1
$0.418
2
3
4
EAN43349001
WC
7
SCL
6
SDA
5
M24512-WMW6 512KBIT 64K x 8bit 1.8VTO5.5V 5MSEC SOIC(EIAJ) ST 8P STM
Model OPT Description, 081218 Updated
OPT1
OPT0
FHD
H
L
MODEL OPTION
R226 0
+3.3V
1.2K
R110
1/16W 5%
R111 4.7K
R116 4.7K
/DEMOD_RESET
R107 1.2K
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
R125
R127
+3.3V
1K
1K
R126
OPT
FHD
1K
R128
OPT
HD
R132
R134
1K
R133
26"UNDER
1K
32"UP
R135
LCD
PDP
1K
1K
R137
HD
1K
R138
FHD
+5V_GENERAL
R118 1.2K
MODEL_OPT_0
MODEL_OPT_1
MODEL_OPT_2
MODEL_OPT_3
MODEL_OPT_4
OPT
R119 1.2K
FRC
NO FRC
**LH35FD-AA
42/37/32LH20D-AA
26/22LH20D-AA
(Small)
I2C
FE_TUNER_SDA
FE_TUNER_SCL EEPROM_SDA
EEPROM_SCL SUB/AMP_SCL SUB/AMP_SDA
HD/Small
LVDS_CH_B
LVDS_CH_A
Apply +5V_GENERAL and 12V_DIP_DET simultaneously for 26"Inch Up Apply +5V_GENERAL and 15V_DIP_DET simultaneously for 22"Inch
PCM_A[0-7]
PCM_A[7]
PCM_A[6]
PCM_A[5]
PCM_A[4]
PCM_A[3]
PCM_A[2]
PCM_A[1]
PCM_A[0]
IC105: EAN43352801(ATMEL SHRINK)
+12V
0
0
22"UNDER_DIP_DET
R1001
Big_+24V/Small_+15V
26"UP_DIP_DET
R1004
R1002
12K1%
DIP_DET
DIP_DET
R1005
1K
R1003
1.1K DIP_DET
+3.3V_ST
R231
0
VCC
MAX810 : CMOS NCP810 : Open Drain
0IMMRMP008A(MICROCHIP)
+3.3V
L103
C105
0.1uF
001:I24;001:Y13;007:V23
EEPROM_SCL
001:I24;001:Y14;007:V23
EEPROM_SDA
OPT2
Blinking_LED
Moving_LED
OPT0 OPT1
H
H
H
+5V_GENERAL
R1006
10K
DIP_DET
DIP_DET R1007
1K
C
R1008
Q103
B
E
2SC3052
DIP_DET
2.2K
DIP_DET
C
B
E
12V_DIP_DET
+5V_ST
R229
R230
OPT
MAX810RTR
IC106
3
1
GND
OPT
POWER_ON/OFF_RESETIC
R228
B
100
B
+3.3V_ST
C
Q106 2SC3052
E
C
Q107 2SC3052
E
R221
10K
SW101
12
4 3
R227
100
S6_RESET
C112
10uF
6.3V
RESET
2
R220
4.7K
R232
10K
C113
4.7uF 10V
Modified on 081217 by JIHWAN
-->REVISION 11
Modified on 090123 by HONGSU
-->REVISION13
MCU BOOT STRAP
OPT
OPT
R130 1K
1K
+3.3V
R131 1K
PWM0
PWM1
001:I24;001:M12;007:V23 001:I24;001:M13;007:V23 001:I24;001:M13;007:V23 001:I24;001:M12;007:V23
10 : BOOT 51 11 : BOOT RISC
R123 1K
R124
OPT3
FHD
009:J7
A_DIM
PWM_DIM
HD
OPT2
L
H
H
L
L
H
OPT3
H
L
L
POWER DETECT
+3.3V_ST
R1009
22
Q104 2SC3052
DIP_DET
100K
R218
10K
OPT
RESET
R219
NCP803SN293
2
1
GND
3
IC105
POWER_DET
VCC
26"UP_12V_POWER_DET
R234
LIPS_5V_POWER_DET
+12V
+5V_GENERAL
LIPS_5V_POWER_DET R212 15K 1%
1608
0
1608
R213
30K
26"UP_12V_POWER_DET
1%
1/10W
R201
15K
1%
1608
R213-*1
6.2K
1%
EAX59793902(0)_MERCURY
For LH20_LH35 MP based on EAX59793901(13)
IC100
HWRESET
PCMD0/CI_D0 PCMD1/CI_D1 PCMD2/CI_D2 PCMD3/CI_D3 PCMD4/CI_D4 PCMD5/CI_D5 PCMD6/CI_D6 PCMD7/CI_D7
PCM_A0/CI_A0 PCM_A1/CI_A1 PCM_A2/CI_A2 PCM_A3/CI_A3 PCM_A4/CI_A4 PCM_A5/CI_A5 PCM_A6/CI_A6 PCM_A7/CI_A7 PCM_A8/CI_A8 PCM_A9/CI_A9 PCM_A10/CI_A10 PCM_A11/CI_A11 PCM_A12/CI_A12 PCM_A13/CI_A13 PCM_A14/CI_A14
PCM_RST/CI_RST PCM_CD/CI_CD /PCM_OE PCM_REG/CI_CLK PCM_WAIT/CI_WACK /PCM_IRQA /PCM_WE PCM_IOWR/CI_WR PCM_IOR/CI_RD /PCM_CE /PF_CE0 /PF_CE1 /PF_OE /PF_WE PF_ALE PF_AD15 F_RBZ
UART2_TX/SCKM UART2_RX/SDAM DDCR_DA DDCR_CK
DDCA_CLK DDCA_DA UART_RX2 UART_TX2
PWM0 PWM1 PWM2 PWM3
SAR0 SAR1 SAR2 SAR3 IRIN
GPIO44
GPIO96 GPIO88 GPIO90/I2S_OUT_MUTE GPIO91 GPIO97 GPIO98 GPIO99 GPIO103/I2S_OUT_SD3 GPIO102
LHSYNC2/I2S_OUT_MUTE/RX1
XOUT
TESTPIN/GND
SPI_DI SPI_DO
/SPI_CS
SPI_CK
USB_DP_1 USB_DM_1 USB_DM_2 USB_DP_2
GPIO_PM0/GPIO134 GPIO_PM1/GPIO135 GPIO_PM2/GPIO136 GPIO_PM3/GPIO137
GPIO_PM4/GPIO138 GPIO_PM5/INT1/GPIO139 GPIO_PM6/INT2/GPIO140
GPIO131/LDE/SPI_WPn1
GPIO130/LCK
GPIO132/LHSYNC/SPI_WPn
GPIO60/PCM2_RESET/RX1
GPIO62/PCM2_CD_N/TX1
LVSYNC/GPIO133
GPIO79/LVSYNC2/TX1
UART2_RX/GPIO84 UART2_TX/GPIO85 UART1_RX/GPIO86 UART1_TX/GPIO87
GPIO42/PCM2_CE_N
GPIO43/PCM2_IRQA_N
TS0_D0 TS0_D1 TS0_D2 TS0_D3 TS0_D4 TS0_D5 TS0_D6 TS0_D7
TS0_SYNC
TS0_VLD TS0_CLK
TS1_D0
TS1_SYNC
TS1_VLD TS1_CLK
ET_TXD0 ET_TXD1
ET_TX_CLK
ET_RXD0 ET_RXD1
ET_TX_EN
ET_MDC
ET_MDIO
ET_COL
GPIO67 GPIO68
B3
XIN
A3
R167 0
R168 0
E6
AE11
R169 33 AF12 AE12
R170 33 AD11
R171 33
B5
R172
A5
R173 AC10 AB10
E5
R176 100
R207 22
F5
R177
G5
R178
H5
R206
F6
R205 22
G6 H6 AC17
R184 100
AB17
R180 0
AF11
R181 R182
AA18
R183 0
AA17
E7 AC18
R186 C6 F9 F10 A6
R185
B6
R187 R190
AF5
R188 100
AF10
AA8 Y8 Y9 AB7 AA6 AB6 U4 AC5 AC4 AD5 AB4
AB19 AA20 AC19 AA19
C10
R189 22
B11
R191
A9
R192
C11
R194
C9 B10
R195 100
A10
R196 100
B9
R193 0
A11
R197 100
A7
R198 100
R199
B8
/PF_CE0
001:C4
/PF_CE1
001:D6
/PF_OE
001:C4
/PF_WE
001:D7
PF_ALE
001:D6
PF_WP
001:A7
/F_RB
001:C3
C108
1uF
SB_MUTE
Big_+24V/Small_+15V
22"UNDER_15V_POWER_DET
R223
22"UNDER_15V_POWER_DET
C109
1608
2.2uF
1% 33K
AR101
EEPROM_SCL EEPROM_SDA FE_TUNER_SDA FE_TUNER_SCL
ISP_RXD ISP_TXD
DBG_RX
DBG_TX
R213-*2
9.1K 1/10W 1%
R144 R145
22
+3.3V_ST
R174
S6_RESET
PCM_A[0-7]
001:M2
AR100
22
10K 100
PWM0 PWM1 PWM2
10K
LED_ON/LED_R
MODEL_OPT_4
MODEL_OPT_1 MODEL_OPT_2
MODEL_OPT_0
PWM0 PWM2
KEY1 KEY2
IR
AMP_RST
ERROR_OUT
NTP_MUTE
DSUB_DET
R155
R156 0
OPT
R210
OPT
R211
R147 R148 22 R149 22 R150 22
R152 100
PCM_A[0] PCM_A[1] PCM_A[2] PCM_A[3] PCM_A[4] PCM_A[5] PCM_A[6] PCM_A[7]
0
0 0
R154 0
R160
R158 0
R165 100
R163 100
LGE3368A (Saturn6 No-DivX)
D4
AC16 AA15 AA16
AC6 Y10 Y11 Y12 Y13
AB16 AC15 AC14 AB14 AC12
AB8
AC13
AA9 AB5 AA4
V4
Y4 AB9 AA7 AD6
AA14 AB18
Y5
AB15 AA10
AC8 AC7 AA5
W4
T4 AE6 AF6
AA12 AA11
AC9 Y14
AB11
F8 D11
AB21 AC21
22
R157 0
R143 100
R153 0
100
R164 0 R161
R162 0
R166 100
R159 100
100
AB13 AB12 AD12 AA13
AC11
J1
J2
W5
V5
A4
B4
F4
E4
C4
D9 D10
D7 E11
E8 E10
D6
D5
C5
AUS_LH20/LH35
AUS_EAX59793902(0)
MSTAR-S6
C110
X100
20pF
12MHz
+3.3V_ST
USB_OCD 5V_HDMI_1 5V_HDMI_2 5V_HDMI_3 AV1_DET
50V
C111 20pF
50V
SPI_DI SPI_DO SPI_CS SPI_CK
LVDS_SEL /FE_RESET
Flash_WP_1 FE_TUNER_SDA FE_TUNER_SCL
SUB/AMP_SCL OPC_EN SUB/AMP_SDA
AV2_DET
PANEL_AGP LED_G BIT_SEL
EDID_WP
MODEL_OPT_3
COMP1_DET
USB_CTL
001:G12
LED_G_SUB DBG_TX INV_CTL PANEL_CTL
POWER_ON/OFF_GPIO
DBG_RX
005:AL11
SIDE_USB_DM SIDE_USB_DP
R179
100
R233
100
OPT
005:O17;007:J14;007:X14;007:AL14
ISP_TXD
006:K14
001:P18
SIDE_USB
POWER_DET
FE_TS_DATA FE_TS_SYNC FE_TS_VAL FE_TS_CLK
R200 1M
0 0
R204 10K
100 100 100
100
0
100
100 100
100
22 22
0
100
2009.01.31 1 11
+1.26V_VDDC
Copyright ⓒ 2009 LG Electronics Inc. All right reserved. Only for traning and service purposes
LGE Internal Use Only
007:AK23
005:E21 005:E21 005:E25 005:E23 005:E22
005:AM4
005:P6 005:P8 005:P6
005:P9
004:H8
HDMI1_CLK+ HDMI1_CLK­HDMI1_RX0+ HDMI1_RX0­HDMI1_RX1+ HDMI1_RX1­HDMI1_RX2+ HDMI1_RX2­HDMI1_SDA HDMI1_SCL HPD1
HDMI2_CLK+ HDMI2_CLK­HDMI2_RX0+ HDMI2_RX0­HDMI2_RX1+ HDMI2_RX1­HDMI2_RX2+ HDMI2_RX2­HDMI2_SDA HDMI2_SCL HPD2
HDMI3_CLK+ HDMI3_CLK­HDMI3_RX0+ HDMI3_RX0­HDMI3_RX1+ HDMI3_RX1­HDMI3_RX2+ HDMI3_RX2­HDMI3_SDA HDMI3_SCL HPD3 HDMI_CEC
COMP1
DSUB
CVBS
TV/MNT
COMP1_Pr_IN
COMP1_Y_IN
COMP1_Pb_IN
DSUB_HSYNC DSUB_VSYNC
DSUB_R DSUB_G DSUB_B
AV2_CVBS_IN AV1_CVBS_IN
FE_VMAIN
R243 0 R244 0 R245
R246
10K
100
R248 0 R249 0 R250
R251 0 R252 0 R253 R254
R258
R260 R261 R262 R263 47 R264
R247
10K
R265 R266 R267 47
470
R268
R255 47 R256 47 R269 47 R270 47
R272 47 R273 47
R271 R257
100
100 100
47
47 470 47
47
47 47
100 100
R274 22
R275 22
C209
C201 0.047uF C202
0.047uFR259 47
0.047uF
C203
0.047uF
C204 C205 0.047uF C206
0.047uF
0.047uF
C207
0.047uF
C212 C208
0.047uF
0.047uF
C213
50V
1000pF
C210 0.047uF
0.047uF
C211 C214 0.047uF C215 0.047uF
C218 0.047uF C219 0.047uF
C216 0.047uF C217 0.047uF
LGE3368A (Saturn6 No-DivX)
F1
RXACKP
F2
RXACKN
G2
RXA0P
G3
RXA0N
H3
RXA1P
G1
RXA1N
H1
RXA2P
H2
RXA2N
A1
DDCD_A_DA
B2
DDCD_A_CK
A2
HOTPLUG_A
C3
RXBCKP
B1
RXBCKN
C1
RXB0P
C2
RXB0N
D2
RXB1P
D3
RXB1N
E3
RXB2P
D1
RXB2N
E1
DDCD_B_DA
F3
DDCD_B_CK
E2
HOTPLUG_B
AE8
RXCCKP
AD8
RXCCKN
AD9
RXC0P
AF8
RXC0N
AF9
RXC1P
AE9
RXC1N
AE10
RXC2P
AD10
RXC2N
AE7
DDCD_C_DA
AF7
DDCD_C_CK
AD7
HOTPLUG_C
J3
CEC
N2
HSYNC0/SC1_ID
N1
VSYNC0/SC1_FB
P2
RIN0P/SC1_R
R3
GIN0P/SC1_G
R1
BIN0P/SC1_B
P3
SOGIN0/SC1_CVBS
P1
RINM
T3
BINM
R2
GINM
K3
HSYNC1/DSUB_HSYNC
K2
VSYNC1/DSUB_VSYNC
L1
RIN1P/DSUB_R
L3
GIN1P/DSUB_G
K1
BIN1P/DSUB_B
L2
SOGIN1
V1
RIN2P/COMP_PR+
V2
GIN2P/COMP_Y+
U1
BIN2P/COMP_PB+
V3
SOGIN2
J5
VSYNC2
U3
CVBS1/SC1_CVBS
U2
CVBS2/SC2_CVBS
T1
CVBS3/SIDE_CVBS
T2
VCOM1
M1
CVBS4/S-VIDEO_Y
M2
CVBS6/S-VIDEO_C
N3
CVBS5
M3
CVBS7
W1
CVBS0/RF_CVBS
Y3
VCOM0
Y2
CVBSOUT0/SC2_MNTOUT
AA2
CVBSOUT1
IC100
LVA0P LVA0M LVA1P LVA1M LVA2P LVA2M LVA3P LVA3M LVA4P LVA4M
LVACKP LVACKM
LVB0P LVB0M LVB1P LVB1M LVB2P LVB2M LVB3P LVB3M LVB4P LVB4M
LVBCKP LVBCKM
AUR0 AUL0 AUR1 AUL1 AUR2
AUL2
AUR3 AUL3 AUR4 AUL4 AUR5 AUL5
SIF0P SIF0M
SPDIF_IN
SPDIF_OUT
AUOUTR0/HP_ROUT
AUOUTL0/HP_LOUT AUOUTR1/SC1_ROUT AUOUTL1/SC1_LOUT AUOUTR2/SC2_ROUT AUOUTL2/SC2_LOUT
I2S_OUT_MCK
I2S_OUT_WS
I2S_OUT_BCK
I2S_OUT_SD
I2S_IN_SD
VCLAMP
REFP REFM REXT
AUCOM AUVRM AUVRP AUVAG
AE16 AD16 AD15 AF16 AF15 AE15 AD13 AF14 AF13 AE13
AE14 AD14
AE20 AD20 AD19 AF20 AF19 AE19 AD17 AF18 AF17 AE17
AE18 AD18
AA3 Y1 AE1 AF3 AE3
AE2
AA1 AB1 AB2 AC2 AB3 AC3
W3 W2
F11 E9
AF1 AF2 AD3 AD1 AC1 AD2
A8 B7 C7 D8 C8
K4
0.1uF
C220
H4 J4 G4
R277 390
1%
Check AE5 AE4 AF4 AD4
C221 0.1uF
C222 10uF C223 0.1uF C224 C225 4.7uF
Close to IC as close as possible
C226 2.2uF C227 C228 C229 C230 2.2uF C231 C232 2.2uF C233
C236 2.2uF C237 2.2uF
C238 0.1uF
R278 100
R279 100
R284 R285 R286 R287 R288 R289
R280 22 R281 22 R282 22 R283 22
+3.3V
C240
0.1uF
6.3V
1uF
LVDS_A0+ LVDS_A0­LVDS_A1+ LVDS_A1­LVDS_A2+ LVDS_A2­LVDS_A3+ LVDS_A3­LVDS_A4+ LVDS_A4-
LVDS_AC+ LVDS_AC-
LVDS_B0+ LVDS_B0­LVDS_B1+ LVDS_B1­LVDS_B2+ LVDS_B2­LVDS_B3+ LVDS_B3­LVDS_B4+ LVDS_B4-
LVDS_BC+ LVDS_BC-
2.2uF
2.2uF
2.2uF
2.2uF
2.2uF
100 100 100 100 100 100
C242 0.1uF
C241 0.1uF
C245 330uF 4V
OPT
+3.3V_VDDP
C246
0.1uF
006:H13 006:H14 006:H13 006:H13 006:H12 006:H12 006:H10 006:H11 006:H10 006:H10
006:H11 006:H11
006:H18;006:Z15;006:AI16 006:H18;006:Z15;006:AI16 006:H17;006:Z14;006:AI15 006:H18;006:Z14;006:AI15 006:H17;006:Z13;006:AI14 006:H17;006:Z13;006:AI14 006:H15;006:Z11;006:AI12 006:H15;006:Z11;006:AI12
006:H14 006:H15
006:H16 006:H16
COMP1_R_IN COMP1_L_IN
AV2_R_IN AV2_L_IN AV1_R_IN AV1_L_IN
PC_R_IN PC_L_IN
R290
47
R291 47C239 0.1uF
C243
C244
22pF
22pF
OPT
OPT
C247 22pF OPT
C248
0.1uF
C249
0.1uF
C250 22pF
OPT
C251
0.1uF
C252
0.1uF
FE_SIF
005:P4
005:P5
005:AM6
005:AM5 005:P13 005:P12
005:AB9
005:AB10
004:H5
C253
0.1uF
C254
0.1uF
rev 0
C255
0.1uF
C256
0.1uF
AUDIO IN
C257
0.1uF
C258
0.1uF
C259
0.1uF
C260
0.1uF
C261
0.1uF
BLM18PG121SN1D
C262
0.1uF
SPDIF_OUT
AUDIO_MASTER_CLK MS_LRCK MS_SCK MS_LRCH
C264
0.1uF
C263
0.1uF
L201
C265
0.1uF
+3.3V
C266
0.1uF
C267
0.1uF
rev 0
005:AA3
008:K12 008:K17 008:K17 008:K17
C268
0.1uF
AUDIO OUT
C270
0.1uF
+1.8V_DDR
C271
C269
0.1uF
330uF 4V OPT
C274
C272
0.1uF
C276
0.1uF
C275
0.1uF
GND_2 GND_3 GND_4 GND_5 GND_6 GND_7 GND_8
GND_9 GND_10 GND_11 GND_12 GND_13
GND_14 GND_15 GND_16
GND_17 GND_18
GND_19 GND_20 GND_21 GND_22 GND_23 GND_24
GND_25 GND_26 GND_27 GND_28 GND_29 GND_30 GND_31 GND_32
GND_33 GND_34 GND_35 GND_36 GND_37 GND_38 GND_39
GND_40 GND_41 GND_42 GND_43 GND_44 GND_45 GND_46 GND_47
GND_48 GND_49 GND_50 GND_51 GND_52 GND_53 GND_54 GND_55
GND_56 GND_57 GND_58 GND_59 GND_60 GND_61 GND_62 GND_63
GND_64 GND_65 GND_66 GND_67 GND_68 GND_69 GND_70 GND_71 GND_72 GND_73
C278
0.1uF
C277
0.1uF
IC100
AVDD_MEMPLL_1 AVDD_MEMPLL_2 AVDD_MEMPLL_3
0.1uF
C273
0.1uF
LGE3368A (Saturn6 No-DivX)
E16 E17 E18
F7
L9 L10 L11
L12 L13 L14 L15 L16 L17 L18
M9
M10 M11 M12 M13 M14 M15 M16 M17
M18
N4
N9 N10 N11 N12 N13 N14
N15 N16 N17 N18
P4
P9 P10
P11 P12 P13 P14 P15 P16 P17 P18
R4
R9 R10 R11 R12 R13 R14 R15
R16 R17 R18
T5
T9 T10 T11 T12
T13 T14 T15 T16 T17 T18
U5 W13 Y21
AA23
C282
C280
0.1uF
0.1uF
C281
C279
0.1uF
0.1uF
+1.26V_VDDC
D16
VDDC_1
D17
VDDC_2
D18
VDDC_3
D19
VDDC_4
D20
VDDC_5
H18
VDDC_6
H19
VDDC_7
H20
VDDC_8
J20
VDDC_9
K20
VDDC_10
L20
VDDC_11
M20
VDDC_12
P7
VDDC_13
R7
VDDC_14
T7
VDDC_15
T22
VDDC_16
U7
VDDC_17
U20
VDDC_18
U22
VDDC_19
V7
VDDC_20
V22
VDDC_21
W11
VDDC_22
W12
VDDC_23
W19
VDDC_24
W20
VDDC_25
W22
VDDC_26
Y22
VDDC_27
H9
VDDP_1
H10
VDDP_2
H11
VDDP_3
H12
VDDP_4
N20
VDDP_5
P20
VDDP_6
W9
VDDP_7
W10
VDDP_8
W7
AVDD_AU
G12
AVDD_DDR_1
G13
AVDD_DDR_2
H13
AVDD_DDR_3
H14
AVDD_DDR_4
H15
AVDD_DDR_5
H16
AVDD_DDR_6
W14
AVDD_DDR_7
W15
AVDD_DDR_8
W16
AVDD_DDR_9
AVDD_LPLL
AVDD_MPLL
AVDD_33_1 AVDD_33_2 AVDD_33_3 AVDD_33_4 AVDD_33_5
AVDD_DM
AVDD_USB
W17 W18
H17 T20 V20
R20
H7
J7 K7 L7 M7 N7
W8
H8
AVDD_DDR_10 AVDD_DDR_11
AVDD_OTG : 22.96mA
C284
0.1uF
C283
0.1uF
+1.8V_DDR
C288
0.1uF
PI_080719
C286
0.1uF
C285
0.1uF
+3.3V_VDDP
C287
0.1uF
+3.3V_S6
C297
C292
0.1uF
0.1uF
C296
C291
0.1uF
0.1uF
VDDC : 970mA
VDDP : 102.3mA
+3.3V_S6
C293
C300
0.1uF
0.1uF
+3.3V_AVDD_MPLL
C295 10uF
6.3V
C294
C289
0.1uF
0.1uF
C290
0.1uF
C303
0.1uF
C301
0.1uF
L202
BLM18PG121SN1D
C298
0.1uF
+3.3V_S6
C304
0.1uF
BLM18PG121SN1D
C302
C299
0.1uF
0.1uF
C316
2.2uF 16V
C306
C310
0.1uF
0.1uF
C305
0.1uF
+3.3V
AVDD_AU : 36.11mA
C307
0.1uF
AVDD_MEMPLL : 23.77mA
AVDD_LPLL : 4.69mA
+3.3V_S6
C308
0.1uF
L203
+3.3V_AVDD
AVDD_33 : 281mA
C309
0.1uF
+3.3V_S6
C311
0.1uF
C312
C313
0.1uF
0.1uF
AVDD_DM : 0.03mA
C314 10uF
C315 10uF
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
MAIN_2
EAX59793902(0)_AUS_MERCURY
For LH20_LH35 MP PCB_090131
AUS_LH20/LH35
EAX59793902(0)
MSTAR_S6
2009.01.31 2 11
Qimonda_1G_DDR
Copyright ⓒ 2009 LG Electronics Inc. All right reserved. Only for traning and service purposes
LGE Internal Use Only
IC300-*1
HYB18TC1G160C2F-2.5
VREF
J2
A0
M8
A1
M3
A2
M7
A3
N2
A4
N8
A5
N3
A6
N7
A7
P2
A8
P8
A9
P3
A10/AP
M2
A11
P7
A12
R2
BA0
L2
BA1
L3
BA2
L1
CK
J8
CK
K8
CKE
K2
ODT
K9
CS
L8
RAS
K7
CAS
L7
WE
K3
LDQS
F7
UDQS
B7
LDM
F3
UDM
B3
LDQS
E8
UDQS
A8
NC4
R3
NC5
R7
NC1
A2
NC2
E2
NC3
R8
VSSDL
J7
VDDL
J1
Elpida_1G_DDR
IC300-*2
EDE1116AEBG-8E-F
VREF
J2
A0
M8
A1
M3
A2
M7
A3
N2
A4
N8
A5
N3
A6
N7
A7
P2
A8
P8
A9
P3
A10
M2
A11
P7
A12
R2
BA0
L2
BA1
L3
BA2
L1
CK
J8
CK
K8
CKE
K2
ODT
K9
CS
L8
RAS
K7
CAS
L7
WE
K3
LDQS
F7
UDQS
B7
LDM
F3
UDM
B3
LDQS
E8
UDQS
A8
NC_5
R3
NC_6
R7
NC_1
A2
NC_2
E2
NC_3
R8
VSSDL
J7
VDDL
J1
Qimonda_512M_DDR
IC301-*1
HYB18TC512160B2F-2.5
DQ0
G8
DQ1
G2
DQ2
H7
DQ3
H3
DQ4
H1
DQ5
H9
DQ6
F1
DQ7
F9
DQ8
C8
DQ9
C2
DQ10
D7
DQ11
D3
DQ12
D1
DQ13
D9
DQ14
B1
DQ15
B9
VDD5
A1
VDD4
E1
VDD3
J9
VDD2
M9
VDD1
R1
VDDQ10
A9
VDDQ9
C1
VDDQ8
C3
VDDQ7
C7
VDDQ6
C9
VDDQ5
E9
VDDQ4
G1
VDDQ3
G3
VDDQ2
G7
VDDQ1
G9
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
VDD5 VDD4 VDD3 VDD2 VDD1
VDDQ10
VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1
VSS5 VSS4 VSS3 VSS2 VSS1
VSSQ10
VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9
VSS5
A3
VSS4
E3
VSS3
J3
VSS2
N1
VSS1
P9
VSSQ10
B2
VSSQ9
B8
VSSQ8
A7
VSSQ7
D2
VSSQ6
D8
VSSQ5
E7
VSSQ4
F2
VSSQ3
F8
VSSQ2
H2
VSSQ1
H8
DQ0
G8
DQ1
G2
DQ2
H7
DQ3
H3
DQ4
H1
DQ5
H9
DQ6
F1
DQ7
F9
DQ8
C8
DQ9
C2
DQ10
D7
DQ11
D3
DQ12
D1
DQ13
D9
DQ14
B1
DQ15
B9
VDD_5
A1
VDD_4
E1
VDD_3
J9
VDD_2
M9
VDD_1
R1
VDDQ_10
A9
VDDQ_9
C1
VDDQ_8
C3
VDDQ_7
C7
VDDQ_6
C9
VDDQ_5
E9
VDDQ_4
G1
VDDQ_3
G3
VDDQ_2
G7
VDDQ_1
G9
VSS_5
A3
VSS_4
E3
VSS_3
J3
VSS_2
N1
VSS_1
P9
VSSQ_10
B2
VSSQ_9
B8
VSSQ_8
A7
VSSQ_7
D2
VSSQ_6
D8
VSSQ_5
E7
VSSQ_4
F2
VSSQ_3
F8
VSSQ_2
H2
VSSQ_1
H8
SDDR_D[0] SDDR_D[1] SDDR_D[2] SDDR_D[3] SDDR_D[4] SDDR_D[5] SDDR_D[6] SDDR_D[7] SDDR_D[8] SDDR_D[9] SDDR_D[10]
SDDR_D[0-15]
SDDR_D[11] SDDR_D[12] SDDR_D[13] SDDR_D[14] SDDR_D[15]
+1.8V_DDR
Hynix_1G_DDR
IC300
HY5PS1G1631CFP-S6
G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9
A1 E1 J9 M9 R1
A9 C1 C3 C7 C9 E9 G1 G3 G7 G9
A3 E3 J3 N1 P9
B2 B8 A7 D2 D8 E7 F2 F8 H2 H8
VREF
J2
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12
BA0 BA1 BA2
CK CK CKE
ODT CS RAS CAS WE
LDQS UDQS
LDM UDM
LDQS UDQS
NC5 NC6
NC1 NC2 NC3
VSSDL
VDDL
SDDR_A[0] SDDR_A[1] SDDR_A[2] SDDR_A[3] SDDR_A[4] SDDR_A[5] SDDR_A[6] SDDR_A[7] SDDR_A[8]
SDDR_A[9] SDDR_A[10] SDDR_A[11] SDDR_A[12]
OPT
R321
SDDR_CK
/SDDR_CK
0
R322 4.7K
M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2
L2 L3 L1
J8 K8 K2
K9 L8 K7 L7 K3
F7 B7
F3 B3
E8 A8
R3 R7
A2 E2 R8
J7
J1
+1.8V_DDR
5%
1K
R325
0.1uF
0.1uF
R326 1K 5%
C322
C321
SDDR_A[5] ADDR2_A[5] SDDR_A[3] SDDR_A[1] SDDR_A[10]
SDDR_A[9] SDDR_A[12] SDDR_A[7]
SDDR_A[0]
SDDR_A[0-12]
SDDR_A[2] SDDR_A[4] SDDR_A[6] SDDR_A[11] SDDR_A[8]
SDDR_BA[0] SDDR_BA[1] SDDR_BA[2]
OPT
R323
150
SDDR_CKE ADDR2_CKE
OPT
R324 4.7K
OPT
/SDDR_RAS /SDDR_CAS
SDDR_DQS0_P SDDR_DQS1_P
SDDR_DQM0_P SDDR_DQM1_P
SDDR_DQS0_N SDDR_DQS1_N
+1.8V_DDR
+1.8V_DDR
SDDR_ODT
/SDDR_WE
DDR2 1.8V By CAP - Place these Caps near Memory
+1.8V_DDR +1.8V_DDR
C323
0.1uF C324
10uF
C325
0.1uF
C326
0.1uF
C327
0.1uF
C328
0.1uF
C329
0.1uF
C331
0.1uF
C333
0.1uF
C334
0.1uF
C335
0.1uF
C336
0.1uF
C337
0.1uF
C338
0.1uF
C339
0.1uF
C340
0.1uF
C341
0.1uF
C342
0.1uF
Close to DDR Power Pin Close to DDR Power Pin
+1.8V_DDR
R345
1K 5%
0.1uF
56
56
R32756
R32956
R33022
R33122 R33256
R33356
R33456
R33556
R33656
R33756
R33956 R34056
R34156 R34256
SDDR_D[11] SDDR_D[12] SDDR_D[9] SDDR_D[14]
SDDR_D[4] SDDR_D[3] SDDR_D[1] SDDR_D[6]
SDDR_D[15] SDDR_D[8] SDDR_D[10] SDDR_D[13]
SDDR_D[7] SDDR_D[0] SDDR_D[2] SDDR_D[5]
AR300
AR301
AR302
R344 56
AR306
AR308
R343
56
56
56
AR307
56
AR309
ADDR2_A[3] ADDR2_A[1]
ADDR2_A[10]
ADDR2_A[9]
ADDR2_A[12]
ADDR2_A[7] ADDR2_A[0]
ADDR2_A[2] ADDR2_A[4] ADDR2_A[6] ADDR2_A[11] ADDR2_A[8]
ADDR2_BA[0] ADDR2_BA[1] ADDR2_BA[2]
ADDR2_MCLK
/ADDR2_MCLK
ADDR2_ODT
/ADDR2_RAS /ADDR2_CAS
/ADDR2_WE
ADDR2_DQS0_P ADDR2_DQS1_P
ADDR2_DQM0_P ADDR2_DQM1_P
ADDR2_DQS0_N ADDR2_DQS1_N
ADDR2_D[11] ADDR2_D[12]
ADDR2_D[9]
ADDR2_D[14]
ADDR2_D[4] ADDR2_D[3] ADDR2_D[1] ADDR2_D[6]
56
ADDR2_D[15]
ADDR2_D[8] ADDR2_D[10] ADDR2_D[13]
ADDR2_D[7]
ADDR2_D[0]
ADDR2_D[2]
ADDR2_D[5]
56
R346
1K 5%
C330
ADDR2_A[0-12]
ADDR2_D[0-15]
0.1uF
LGE3368A (Saturn6 No-DivX)
C332
D15
C13
ADDR2_A[0]
A22
ADDR2_A[1]
B13
ADDR2_A[2]
C22
ADDR2_A[3]
A13
ADDR2_A[4]
A23
ADDR2_A[5]
C12
ADDR2_A[6]
B23
ADDR2_A[7]
B12
ADDR2_A[8]
C23
ADDR2_A[9]
B22
ADDR2_A[10]
A12
ADDR2_A[11]
A24
ADDR2_A[12]
C24 B24 D24 B14
A14 D23
D14
D13 D12 D22
B18 C17
C18 A19
A18 B17
B15
ADDR2_D[0]
A21
ADDR2_D[1]
A15
ADDR2_D[2]
B21
ADDR2_D[3]
C21
ADDR2_D[4]
C14
ADDR2_D[5]
C20
ADDR2_D[6]
C15
ADDR2_D[7]
C16
ADDR2_D[8]
C19
ADDR2_D[9]
B16
ADDR2_D[10]
B20
ADDR2_D[11]
A20
ADDR2_D[12]
A16
ADDR2_D[13]
B19
ADDR2_D[14]
A17
ADDR2_D[15]
A_MVREF
A_DDR2_A0 A_DDR2_A1 A_DDR2_A2 A_DDR2_A3 A_DDR2_A4 A_DDR2_A5 A_DDR2_A6 A_DDR2_A7 A_DDR2_A8 A_DDR2_A9 A_DDR2_A10 A_DDR2_A11 A_DDR2_A12
A_DDR2_BA0 A_DDR2_BA1 A_DDR2_BA2 A_DDR2_MCLK
/A_DDR2_MCLK A_DDR2_CKE
A_DDR2_ODT
/A_DDR2_RAS /A_DDR2_CAS /A_DDR2_WE
A_DDR2_DQS0 A_DDR2_DQS1
A_DDR2_DQM0 A_DDR2_DQM1
A_DDR2_DQSB0 A_DDR2_DQSB1
A_DDR2_DQ0 A_DDR2_DQ1 A_DDR2_DQ2 A_DDR2_DQ3 A_DDR2_DQ4 A_DDR2_DQ5 A_DDR2_DQ6 A_DDR2_DQ7 A_DDR2_DQ8 A_DDR2_DQ9 A_DDR2_DQ10 A_DDR2_DQ11 A_DDR2_DQ12 A_DDR2_DQ13 A_DDR2_DQ14 A_DDR2_DQ15
IC100
B_DDR2_A0 B_DDR2_A1 B_DDR2_A2 B_DDR2_A3 B_DDR2_A4 B_DDR2_A5 B_DDR2_A6 B_DDR2_A7 B_DDR2_A8
B_DDR2_A9 B_DDR2_A10 B_DDR2_A11 B_DDR2_A12
B_DDR2_BA0 B_DDR2_BA1 B_DDR2_BA2
B_DDR2_MCLK
/B_DDR2_MCLK
B_DDR2_CKE
B_DDR2_ODT
/B_DDR2_RAS /B_DDR2_CAS
/B_DDR2_WE
B_DDR2_DQS0 B_DDR2_DQS1
B_DDR2_DQM0 B_DDR2_DQM1
B_DDR2_DQSB0 B_DDR2_DQSB1
B_DDR2_DQ0 B_DDR2_DQ1 B_DDR2_DQ2 B_DDR2_DQ3 B_DDR2_DQ4 B_DDR2_DQ5 B_DDR2_DQ6 B_DDR2_DQ7 B_DDR2_DQ8 B_DDR2_DQ9
B_DDR2_DQ10 B_DDR2_DQ11 B_DDR2_DQ12 B_DDR2_DQ13 B_DDR2_DQ14 B_DDR2_DQ15
T26 AF26 T25 AF23 T24 AE23 R26 AD22 R25 AC22 AD23 R24 AE22
AC23 AC24 AB22 V25
V24 AB23
U26
U25 U24 AB24
AB26 AA26
AC25 AC26
AB25 AA25
W25 AE26 W24 AF24 AF25 V26 AE25 W26 Y26 AD25 Y25 AE24 AD26 Y24 AD24 AA24
BDDR2_A[0] BDDR2_A[1] BDDR2_A[2] BDDR2_A[3] BDDR2_A[4] BDDR2_A[5] BDDR2_A[6] BDDR2_A[7] BDDR2_A[8]
BDDR2_A[9] BDDR2_A[10] BDDR2_A[11] BDDR2_A[12]
BDDR2_D[0]
BDDR2_D[1]
BDDR2_D[2]
BDDR2_D[3]
BDDR2_D[4]
BDDR2_D[5]
BDDR2_D[6]
BDDR2_D[7]
BDDR2_D[8]
BDDR2_D[9] BDDR2_D[10] BDDR2_D[11] BDDR2_D[12] BDDR2_D[13] BDDR2_D[14] BDDR2_D[15]
BDDR2_A[0-12]
BDDR2_D[0-15]
BDDR2_DQS0_P BDDR2_DQS1_P
BDDR2_DQM0_P BDDR2_DQM1_P
BDDR2_D[11] BDDR2_D[12] BDDR2_D[9] BDDR2_D[14]
BDDR2_D[4] BDDR2_D[3] BDDR2_D[1] BDDR2_D[6]
BDDR2_D[15] BDDR2_D[8] BDDR2_D[10] BDDR2_D[13]
BDDR2_D[7] BDDR2_D[0] BDDR2_D[2] BDDR2_D[5]
C346
C348
C344
C345
C343
BDDR2_A[9] BDDR2_A[3] BDDR2_A[1] BDDR2_A[10]
BDDR2_A[5] BDDR2_A[12] BDDR2_A[7] TDDR_A[7]
BDDR2_A[0] BDDR2_A[2] BDDR2_A[4] BDDR2_A[6] BDDR2_A[11] BDDR2_A[8]
BDDR2_BA[0] BDDR2_BA[1] BDDR2_BA[2]
BDDR2_MCLK
/BDDR2_MCLK
BDDR2_CKE
BDDR2_ODT
/BDDR2_RAS /BDDR2_CAS
/BDDR2_WE
BDDR2_DQS0_N BDDR2_DQS1_N
10uF
0.1uF
AR304
R347 56
R348 56
AR310
AR311
56
AR313
56
0.1uF
AR312
AR303
56
AR305
56
56
C347
0.1uF
0.1uF
56
56
R349 56 R350 56R32856 R351 56
R352 22
R353 22
R354 56
R355 56
R356 56
R357 56 R358 56
R359 56 R360 56R33856
R361 56 R362 56
R363 56 R364 56
TDDR_D[11] TDDR_D[12]
TDDR_D[9]
TDDR_D[14]
TDDR_D[4] TDDR_D[3] TDDR_D[1] TDDR_D[6]
TDDR_D[15]
TDDR_D[8] TDDR_D[10] TDDR_D[13]
TDDR_D[7]
TDDR_D[0]
TDDR_D[2]
TDDR_D[5]
0.1uF
TDDR_A[9] TDDR_A[3] TDDR_A[1]
TDDR_A[5] TDDR_A[12]
TDDR_A[0] TDDR_A[2] TDDR_A[4] TDDR_A[6] TDDR_A[11] TDDR_A[8]
OPT
+1.8V_DDR
C349
C350
0.1uF
R3651K5%
C353
C352
0.1uF
0.1uF
+1.8V_DDR
R3681K5%
C351
0.1uF
TDDR_A[0] TDDR_A[1] TDDR_A[2]TDDR_A[10] TDDR_A[3] TDDR_A[4] TDDR_A[5] TDDR_A[6] TDDR_A[7] TDDR_A[8] TDDR_A[9]
TDDR_A[0-12]
TDDR_A[10] TDDR_A[11] TDDR_A[12]
TDDR_BA[0] TDDR_BA[1] TDDR_BA[2]
TDDR_MCLK
OPT
R366
150
/TDDR_MCLK
TDDR_CKE
OPT
R367 4.7K
OPT
R369 /TDDR_RAS /TDDR_CAS
/TDDR_WE
TDDR_DQS0_P TDDR_DQS1_P
TDDR_DQM0_P TDDR_DQM1_P
TDDR_DQS0_N TDDR_DQS1_N
+1.8V_DDR
0.1uF
C354
0.1uF
4.7K
C355
0.1uF
R370
C356
0.1uF
A10/AP
0
VSSDL
VREF
LDQS UDQS
LDQS UDQS
VDDL
C359
C358
C357
0.1uF
0.1uF
0.1uF
Hynix_512M_DDR
IC301
H5PS5162FFR-S6C
J2
A0
M8
A1
M3
A2
M7
A3
N2
A4
N8
A5
N3
A6
N7
A7
P2
A8
P8
A9
P3 M2
A11
P7
A12
R2
BA0
L2
BA1
L3
NC4
L1
CK
J8
CK
K8
CKE
K2
ODT
K9
CS
L8
RAS
K7
CAS
L7
WE
K3
F7 B7
LDM
F3
UDM
B3
E8 A8
NC5
R3
NC6
R7
NC1
A2
NC2
E2
NC3
R8
J7
J1
C360
0.1uF
C361
0.1uF
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
VDD5 VDD4 VDD3 VDD2 VDD1
VDDQ10 VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1
VSS5 VSS4 VSS3 VSS2 VSS1
VSSQ10 VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1
TDDR_D[0] TDDR_D[1] TDDR_D[2] TDDR_D[3] TDDR_D[4] TDDR_D[5] TDDR_D[6] TDDR_D[7] TDDR_D[8]
TDDR_D[9] TDDR_D[10] TDDR_D[11] TDDR_D[12] TDDR_D[13] TDDR_D[14] TDDR_D[15]
+1.8V_DDR
G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9
A1 E1 J9 M9 R1
A9 C1 C3 C7 C9 E9 G1 G3 G7 G9
A3 E3 J3 N1 P9
B2 B8 A7 D2 D8 E7 F2 F8 H2 H8
VREF
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9
A10/AP
A11 A12
BA0 BA1
CK CK
CKE
ODT
CS RAS CAS
WE
LDQS UDQS
LDM UDM
LDQS UDQS
NC4 NC5 NC6
NC1 NC2
TDDR_D[0-15]
NC3
VSSDL
VDDL
EDE5116AJBG-8E-E
VREF
J2
A0
M8
A1
M3
A2
M7
A3
N2
A4
N8
A5
N3
A6
N7
A7
P2
A8
P8
A9
P3
A10
M2
A11
P7
A12
R2
BA0
L2
BA1
L3
CK
J8
CK
K8
CKE
K2
ODT
K9
CS
L8
RAS
K7
CAS
L7
WE
K3
LDQS
F7
UDQS
B7
LDM
F3
UDM
B3
LDQS
E8
UDQS
A8
NC_4
L1
NC_5
R3
NC_6
R7
NC_1
A2
NC_2
E2
NC_3
R8
VSSDL
J7
VDDL
J1
J2
M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2
L2 L3
J8 K8 K2
K9 L8 K7 L7 K3
F7 B7
F3 B3
E8 A8
L1 R3 R7
A2 E2 R8
J7
J1
IC301-*2
DQ0
G8
DQ1
G2
DQ2
H7
DQ3
H3
DQ4
H1
DQ5
H9
DQ6
F1
DQ7
F9
DQ8
C8
DQ9
C2
DQ10
D7
DQ11
D3
DQ12
D1
DQ13
D9
DQ14
B1
DQ15
B9
VDD5
A1
VDD4
E1
VDD3
J9
VDD2
M9
VDD1
R1
VDDQ10
A9
VDDQ9
C1
VDDQ8
C3
VDDQ7
C7
VDDQ6
C9
VDDQ5
E9
VDDQ4
G1
VDDQ3
G3
VDDQ2
G7
VDDQ1
G9
VSS5
A3
VSS4
E3
VSS3
J3
VSS2
N1
VSS1
P9
VSSQ10
B2
VSSQ9
B8
VSSQ8
A7
VSSQ7
D2
VSSQ6
D8
VSSQ5
E7
VSSQ4
F2
VSSQ3
F8
VSSQ2
H2
VSSQ1
H8
DQ0
G8
DQ1
G2
DQ2
H7
DQ3
H3
DQ4
H1
DQ5
H9
DQ6
F1
DQ7
F9
DQ8
C8
DQ9
C2
DQ10
D7
DQ11
D3
DQ12
D1
DQ13
D9
DQ14
B1
DQ15
B9
VDD_5
A1
VDD_4
E1
VDD_3
J9
VDD_2
M9
VDD_1
R1
VDDQ_10
A9
VDDQ_9
C1
VDDQ_8
C3
VDDQ_7
C7
VDDQ_6
C9
VDDQ_5
E9
VDDQ_4
G1
VDDQ_3
G3
VDDQ_2
G7
VDDQ_1
G9
VSS_5
A3
VSS_4
E3
VSS_3
J3
VSS_2
N1
VSS_1
P9
VSSQ_10
B2
VSSQ_9
B8
VSSQ_8
A7
VSSQ_7
D2
VSSQ_6
D8
VSSQ_5
E7
VSSQ_4
F2
VSSQ_3
F8
VSSQ_2
H2
VSSQ_1
H8
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
DDR2
EAX59793902(0)_AUS_MERCURY
For LH20_LH35 MP PCB_090131
AUS_LH20/LH35
EAX59793902(0)
DDR2
2009.01.31
3 11
+5V_TUNER
Copyright ⓒ 2009 LG Electronics Inc. All right reserved. Only for traning and service purposes
LGE Internal Use Only
C475
0.1uF 16V
C476
0.1uF 16V
+1.8V_TU_CE
C477
0.1uF 16V
C479
0.1uF 16V
L402
MLF1608A2R7J
TUNER_SIF_IF_N
L407
MLF1608A2R7J
TUNER_CVBS_IF_P
R401 680
R411 680
C423 10pF 50V
C409 10pF 50V
L410 0
1/10W 5%
+5V_TUNER
R413 0
R414 0
R404 0
1/16W 5%
R405 0
1/16W 5%
C430
0.1uF 16V
C452
0.1uF 16V
+1.8V_TUNER
C410
0.1uF
R409
390
16V
DTV_IF_N
004:AK27
E
Q402
ISA1530AC1
B
C
+5V_TUNER
R40 8
E
C
390
R41 5
0
E
R41 6
ISA1530AC1
Q403
C
B
C411
0.1uF
390
16V
R410 82
ISA1530AC1
Q401
R422 0
+5V_TUNER
R421
390
E
ISA1530AC1 Q404
C
C453 22uF
16V
C444 270pF
OPT
C442
0.1uF 16V
+5V_TUNER
FE_SIF 002:T16
FE_VMAIN 002:E22
DTV_IF_P
OPT
R406 0
B
B
L412
+3.3V_TUNER
L413
C468 10uF
6.3V
C467 10uF
6.3V
C470
0.1uF 16V
C469
0.1uF 16V
C472
0.1uF 16V
C471
0.1uF 16V
C473
0.1uF 16V
+3.3V_TU_CE
C474
0.1uF 16V
AZ1117H-3.3
INPUT
C450 8pF
50V
3
2
OUTPUT
1
IC403
ADJ/GND
L411
C455
0.1uF 16V
+3.3V_TUNER
C457 22uF 16V
IC405
AZ1117H-1.8TRE1(EH13A)
INPUT
C451
0.1uF 16V
3
2
OUTPUT
ADJ/GND
1
C454
0.1uF 16V
GND
+1.8V_TUNER
C456
0.1uF 16V
C458 22uF 16V
EAX59793902(0)_AUS_MERCURY
+3.3V_TUNER
+1.8V_TUNER
L414
L415
+3.3V_TU_XE
+1.8V_TU_XE
KCN-ET-0-0094
JK401
1
2
PAL-STRAIGHT
JK402
1
2
FE_TUNER_SCL
FE_TUNER_SDA
Shield PAL Jack
OPT
001:M18;004:L1
EAH36618701
/DEMOD_RESET
LD401
SAM2333
D401
+1.8V_TU_CE
16V
0.1uF C433
16V
0.1uF C437
16V
0.1uF C434
16V
C427
16V
C426
16V
0.1uF C428
R412
4.99K
13
VAGC
VDDC_314VDDA_4
0.1uF C429
15
16
VIF
16V
16V
0.1uF C431
1%
REXT45VDDA_746GND_947VDDC_948VDDA_8
44
IC402
XC5000
17
18
SIF
VDDA_5
0.1uF
16V
0.1uF C432
0.1uF
19
GND_5
16V
C435
C436
16V
20
GND_6
VDDC_421VDDA_6
16V
0.1uF C438
22
RESET38VI2C39VDDC_640VREF_N41VREF_P42VDDC_743VDDC_8
37
23
VDDD_1
TESTMODE
36 35 34 33 32 31 30 29 28 27 26 25
24
0.1uF
+3.3V_TU_XE
50V
L408
+3.3V_TU_XE
VDDA_1
GND_1
GND_2
EXTCHOKE
GND_3 VDDA_2 VDDA_3 VDDC_1
GND_4 VDDC_2
1000pF
IN1
IN2
C425
C424
0.1uF 16V
1 2 3 4 5 6 7 8 9 10 11 12
0.1uF
+1.8V_TU_XE
C418
0.1uF
16V
2%
L405
39pF
50V
C413
56pF
C415
6.8nH
C416
L406
C414 120pF
L404
270nH
2%
50V
OPT
1uH
L403
390nH
56pF
OPT
C417 0.1uF
C419
1000pF
50V
1008CS-821XGLC
820nH 2%
C420 0.1uF
C421 0.1uF
C422 0.1uF
+1.8V_TU_XE
+1.8V_TU_XE
GND_8 SDA SCL VDDD_2 EXTREF X1 GND_7 X2 ADDRSEL DDI2 VDDC_5 DDI1
L409
CM2012F2R2KT
C439
0.1uF 16V
R470 33
+5V_TUNER
C440
0.1uF
16V
0
R424
16V
C441
0.1uF
C443
0.1uF 16V
C445
0.1uF 16V
31.875MHz
GND_21X-TAL_1
4
X-TAL_2
3
+1.8V_TU_XE
X403
GND_1
2
/FE_RESET
C446
18pF
50V
50V
C44 7
18p F
C448 18pF 50V
C449 18pF 50V
R437 100
R438
FE_TUNER_SDA
100
FE_TUNER_SCL
IF_AGC
TUNER_CVBS_IF_P
TUNER_SIF_IF_N
004:B2
C480
0.1uF 16V
FE_TS_CLK
FE_TS_DATA
FE_TS_VAL
FE_TS_SYNC
001:AM18
R472 1K
C482
0.1uF 16V
IF_AGC
R44833
33
R458
33
R463 10K
R464 10K
33
+3.3V_TU_CE
R466
1K
+3.3V_TU_CE
R461
R462
R468 1K
DTV_IF_N
+3.3V_TU_CE
+1.8V_TU_CE
+3.3V_TU_CE
VSS_1
1
VDD_1
2
VSS_2
R4360
0
R435
CVDD_1
0
R443
R4420
1/16W 5%
R44 12K
A2[GN]
A1[RD]
STATUS
C
CLK1
DATA1
IRQ
VSS_3 RESET SLEEP
SADD4 VDD_2 VSS_4 SADD3 SADD2
+1.8V_TU_CE
3 4 5 6 7 8 9 10 11 12 13 14 15 16
R444 10K
BKERR
MICLK
CVDD_6
63
64
17
SADD118SADD0
CVDD_2
R446
10K
OPT
62
19
MOCLK
61
20
VSS_5
MDO7
CVDD_5
VSS_11
58
59
60
IC404
CE6355
EAN60223501
21
23
XTI24XTO
PLLVDD22PLLGND
16V
C460
0.1uF
R449 100K
OPT
X402
20.48MHz
C459 22pF 50V
MDO6
57
VSS_10
MDO5
55
56
25
26
VSS_6
PLLTEST27OSCMODE
C461 22pF 50V
MDO4
VDD_5
54
AVDD
0
53
28
MDO3
52
29
AGND_1
C462
0.1uF 16V
R45 3
MDO1
MDO2
50
51
30
VIN31VIN
OPT
C463
0.1uF 16V
MDO0
49
32
AGND_2
22p F
C46 4
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
OPT
22p F
C46 5
MOVAL MOSTRT VSS_9 VDD_4 SMTEST GPP3 AGC1 AGC2/GPP2 VSS_8 CVDD_4 VSS_7 CVDD_3 DATA2/GPP1 CLK2/GPP0 RFLEV VDD_3
C466
0.1uF 16V
+3.3V_TU_CE
+1.8V_TU_CE
DTV_IF_P
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
AUS_LH20/LH35
EAX59793902(0)
TUNER
2009.01.31
4 11
Component and AV(CVBS)
Copyright ⓒ 2009 LG Electronics Inc. All right reserved. Only for traning and service purposes
LGE Internal Use Only
JK502
0
3E
4E [RD]O-SPRING-S
9E [RD]E-LUG_2
8D [WH]C-LUG-S
9D [WH]E-LUG
8C [RD]C-LUG-S
9C [RD]E-LUG_1
8B [BL]C-LUG-S
9B [BL]E-LUG
3A [GN]CONTACT-S
4A [GN]O-SPRING-S
9A [GN]E-LUG
R533
R5340
[RD]CONTACT-S
D513 30V
C509
OPT
R537
75
C510
OPT
R535
75
C511
OPT
R536
75
IC501
CAT24C02WI-GT3
A0
A1
A2
VSS
D514 30V
ADUC30S03010L_AMODIODE
D515 ADUC30S03010L_AMODIODE
30V
D516 ADUC30S03010L_AMODIODE
30V
D517 ADUC30S03010L_AMODIODE
30V
VCC
1
8
WP
2
7
SCL
3
6
SDA
4
5
C512
0.1uF 16V
R538
2.2K
C514
C513
18pF
18pF
50V
50V
ADMC5M03200L_AMODIODE
OPT
D503 AMOTECH
5.6V
D505 AMOTECH
5.6V
D506 AMOTECH 30V
D509
AMOTECH
30V
D510
AMOTECH
5.6V
D507 AMOTECH 30V
D511 AMOTECH 30V
D508
AMOTECH
5.6V
D504
AMOTECH
5.6V
D512
AMOTECH
5.6V
D519
ENKMC2838-T112
A1
C
A2
R539
2.2K
R540 22
D518
5.6V
1112131415
678
12345
JK501
KCN-DS-1-0089
C515
0.1uF
16V
9
R509 75
10K
10
R541
R510
R511 470K
6H[RD]CONTACT-L
5H[RD]O-SPRING-L
7G[WH]C-LUG-L
6F[YL]CONTACT-L
5F[YL]O-SPRING-L
PPJ228-01
[ PC ]
002:E17
DSUB_VSYNC
DSUB_HSYNC
002:E17
DSUB_B
002:E18
002:E18
DSUB_G
DSUB_R
002:E17
EAX59793902(0)_AUS_MERCURY
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
INTERFACE
C504
50V
470K
1000pF
C505
50V
1000pF
+3.3V
R516
4.7K
R514 0
R515 0
+3.3V
R517
4.7K
C503
0.1uF 16V
R512 470K
100pF
R513 470K
R544 100
R542 22
D520 ADMC5M03200L_AMODIODE
5.6V
OPT
+3.3V
R545
4.7K
D522
R543
ADMC5M03200L_AMODIODE
0
5.6V
OPT
OPT
16
C506
50V
C507 100pF 50V
SPDIF OPTIC JACK
R500
SPDIF_OUT
10K
R518
10K
R519
+5V_ST
R520 10K
R521 10K
R5310
R5320
EDID_WP
ISP_RXD
ISP_TXD
DSUB_DET
COMP1_R_IN
002:S13
COMP1_L_IN
002:S13
COMP1_Pr_IN
002:E15
COMP1_Pb_IN
002:E16
COMP1_DET
001:AJ20
COMP1_Y_IN
002:E15
AV1_CVBS_IN
AV1_DET
AV1_L_IN
AV1_R_IN
001:Y14
R527 12K
R528 12K
R523 75
R526 1K
R522
75
C508
R524
47pF
75
50V
R525
1K
R529
12K
R530 12K
R546
1K
For LH20_LH35 MP PCB_090131
4.7K
+3.3V
IC500
NL17SZ00DFT2G
A
1
B
2
GND
3
R547
VCC
5
C500
0.1uF 16V
Y
4
0
OPT
PC AUDIO
JK505
PEJ024-01
E_SPRING
3
T_TERMINAL1
6A
B_TERMINAL1
7A
R_SPRING
4
T_SPRING
5
B_TERMINAL2
7B
T_TERMINAL2
6B
SHIELD_PLATE
8
D501
ADMC5M03200L_AMODIODE
5.6V
D502
ADMC5M03200L_AMODIODE
5.6V
R571 22
1/16W 5%
OPT
OPT
C501
100pF
50V
C502
100pF
50V
+3.3V
R573
0
R572 1K OPT
C516
OPT
100pF
D500
ADMC5M03200L_AMODIODE
R501 470K
R502 470K
R503 15K
R504 15K
50V
+5V_GENERAL
R574
C532
0.1uF 16V
R507 0
R505
10K
R508 0
R506
10K
JK503
JST1223-001
GND
VINPUT
1
VCC
2
3
4
FIX_POLE
0
OPT
AV2(SIDE)
Fib er O pti c
JK504
PPJ218-02
FHD
[YL]O_SPRING
4A
[YL]CONTACT
5A
[YL]U_CAN
2A
[WH]C_LUG
3B
[WH]U_CAN
2B
[RD]O_SPRING
4C
[RD]CONTACT
5C
[RD]U_CAN
2C
D525 AMOTECH
5.6V
R552 0
D526
AMOTECH
30V
D527
AMOTECH
5.6V
D528
AMOTECH
5.6V
R554 75
R555
470K
R556 470K
R558
4.7K
C524
0.1uF 16V
C525 47pF 50V
C526
100pF
50V
C527 100pF 50V
R561 10K
R562 10K
R560
1K
12K
R563 12K
R564
AV2_DET
AV2_CVBS_IN
AV2_L_IN
AV2_R_IN
FHD Option has been applied to this block
SIDE AV-IN_Only LH35
+3.3V
PC_R_IN
002:S15
Side USB
JK508
PC_L_IN
002:S15
KJA-UB-0-0037
REAR USB
5
USB DOW N S TREA M
JK506
KJA-UB-4-0004
5
SIDE USB
DBG_TX DBG_RX
GND
1
2
3
4
GND
1
2
3
4
+5V_USB
DM
DP
GND
+5V_USB
DM
DP
GND
+5V_ST
C534
10uF
4.7K
REAR USB
C531
100uF
0
R569
REAR USB
0
R570
REAR USB
D523
CDS3C05HDMI1
5.6V
C517
0.33uF 16V
9
ROU T2
R548
R549
4.7K
C518 220pF 50V
C519 220pF 50V
JK507
KCN-DS-1-0088
REAR USB
DOU T28RIN 2
7
10
DIN 2
REAR USB
R568
D524
CDS3C05HDMI1
5.6V
C521
0.33uF 16V
6V-5
IC502
MAX3232CDR
11
12
DIN 1
R551
100
1
0
BLM18PG121SN1D
C520 10uF 10V
RS232C
C2+
C2-
4
13
RIN 1
ROU T1
R553
6
7
2
100
120-ohm
180
C1-2V+
3
14
DOU T1
3
L501
R550
8
OPT
C522
0.33uF 16V
15
GND16VCC
0
OPT
4
R567
0
ILIMIT
0.047uF
IR_OUT
001:AJ26
R557
9
IC503
MIC2019YM6
VOUT
6
5
FAULT
4
EAN60223701
DEVELOPE
C523 25V
C1+
1
D529 ADUC30S03010L_AMODIODE
30V
D530
ADUC30S03010L_AMODIODE
30V
10
5
OPT
OPT
VIN
1
GND
2
ENABLE
3
+5V_ST
C528
0.1uF 50V
+3.3V
USB_CTL
001:AJ26
R559
4.7K
R565
SIDE_USB_DM
SIDE_USB_DP
BLM18PG121SN1D
C529 10uF
10K
R566 47
001:AN8
001:AN8
L502
C530
0.1uF
USB_OCD
001:AI14
+5V_USB
AUS_LH20/LH35
EAX59793902(0)
INTERFACE
2009.01.31 5 11
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