Lenovo y560-i7 Schematics

1

KL3E Intel Huron River Platform with Discrete GFX

2

3

4

5

14.318MHz

6

7

8

01

CLOCK GEN

ICS9LRS3197AKLFT

A A

AMD

DMI

DMIFDI

DMIX4

PCI-E

Graphics Interfaces

32.768KHz

PCI-Express

16X

Park XT 64 Bit
Madison Pro

PG 16,17,18,19,20,21,22

LVDS_CRT_HDMI

INT_HDMI

Switch Graphic

INT_CRT
INT_LVDS

USB2.0

0,1,8 4 6,10,11

USB2.0 Ports X3

PCI-E

X2

Mini PCI-E Card

(WLAN/ WWAN)

PAGE 30 PAGE 26 PAGE 32

SPI

SPI BIOS

PG 36 PG 26

BlueTooth

PG 29 PG 29

X1 X1

LAN

Broadcom

(10/100/1G LAN)

BCM57790/57780

RJ45 CONN

EXT_HDMI

25MHz

DDRIII-SODIMM1

PG 14

DDRIII-SODIMM2

PG 15

B B

Speaker

PG 27

C C

(External MIC)

PG 27

Head-Phone Jack
+ SPDIF

PG 27

Dual Channel DDR3
800/1067 1.5V

SATA - HDD

SATA - CD-ROM

USB+eSATA

PG 28

PG 28

PG 28

SPI BIOS

PG 9

AUDIO CODEC

ALC272Audio Jack

PG 27

Camera + D-MIC

SATA0 150MB

SATA1 150MB

SATA5 150MB

USB2.0

SPI

IHDA

USB2.0

PG 24

Touch Pad

PG 34

Keyboard

PG 34

<MCH Process>
SandyBridge 0.61

rPGA 988

DDR SYSTEM MEMORY

PG 4,5,6,7

FDIx8

CougarPoint 0.7

2

PG 8,9,10,11,12,13

32.768KHz

PS/2

FDI

PCH

LPC

EC

IT8512E

PAGE 36

PG 3

(40nm)

969p

EXT_CRT

EXT_LVDS

PG 23

Mini PCI-E Card X 2
Express Card

Express Card

(NEW CARD)

FAN / THERMAL
EMC2103-2

27MHz

HDMI CON

CRT

LCD CONN

PG 30

X1

Card Reader

JMB385/387

7-IN-1 Card
Reader CONN

PG 23

PG 25

PG 24

PAGE 30

PG 30

PG 35

POWER

Discharge

RUN POWER SW

3VSUS, 5VSUS, 3V_S5, 5V_S5
+3V, +5V

AC/BATT CONNECTOR

BATT CHARGER

REGULATOR (DDR3)

1.5VSUS, 0.75VSMDDR_VTERM,1.5V

1.5V_GPU,1.5V_CPU

REGULATOR

+1.05V_VTT,+1.8V

DC/DC

3VPCU, 5VPCU, +15V

CPU Core

VGA Core

1.8V_GPU, 1V_GFX_PCIE

VGA Core

Discrete

UMA

PG 38

PG 38

PG 42

PG 39

PG 40

PG 41

PG 42

PG 43

PG 44

PG 45

D D

Ambient

LIGHT SENSOR

1

2

3

PG 35

PROJECT : KL2D

PROJECT : KL2D

PROJECT : KL2D

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

4

5

6

Date: Sheet of

Quanta Computer Inc.

BLOCK DIAGRAM

BLOCK DIAGRAM

BLOCK DIAGRAM

7

1ACustom

1ACustom

1 48Thursday, September 30, 2010

1 48Thursday, September 30, 2010

1 48Thursday, September 30, 2010

8

1ACustom

1

2

GPU PWR CTRL Option 1 (Default/ VDDR3 before VDDC)

+3V

+VIN

3

+VIN

4

+1.05V_VTT

5

+1.5V_SUS

+1.8V

6

7

8

02

PCH

A A

DGPU_PWR_EN#

P10

VDDR3

+3V_GPU (0.6A)

Main Power Rails

POWER PLANE

B B

+0.75V_DDR_VTT
+0.85V
+1.05V_LAN_M
+1.05V_M
+1.05V_PCH
+1.05V_SUS
+1.05V_VTT
+1.5V
+1.5V_CPU
+1.5V_GPU
+1.5V_SUS
+1.8V
+1.8_GPU

C C

+1V_GPU
+3V
+3V_GPU
+3V_M
+3V_S5
+3V_SUS +3.3V SUSD
+3VPCU
+5V
+5V_S5 +5V 5V power sequence
+5V_SUS +5V USB2.0 power
+5VPCU +5V Always power
+15V_ALW +15V Power sequence

D D

+SMDDR_VREF +0.75V DDR3 reference power
+VCC_CORE +1.1V
+VCC_GFX +1.52V Internal GPU Core power

+VGPU_IO +1V
+VIN +19V AC power input

VOLTAGE

+0.75V
+0.9V
+1.05V
+1.05V
+1.05V
+1.05V
+1.05V
+1.5V
+1.5V
+1.5V
+1.5V
+1.8V
+1.8V
+1V
+3.3V
+3.3V

+3.3V

+3.3V Always power
+5V I/O power

+1V+VGPU_CORE

1

DESCRIPTION

DDR3 reference voltage
Intel new power rail
LAN M power for iAMT
ME power for iAMT
PCH core power
USB3.0 chip power
CPU core logic power
I/O module power
CPU DDR3 controller power
GPU DDR3 controller power
DDR3 SODIMM power
CPU/PCH/LVDS power

I/O power
GPU power
PCH/SPI power for iAMT+3.3V
3V power sequence
USB3.0 chip power

CPU Core power

GPU Core power
GPU I/O controller power

+3V_GPU

P19

VDDC

RT8204Cougar Point

+VGPU_CORE (29A)

1.05V_VTT_PWRGD

PG_GPUIO_EN

P45

CONTROL
SIGNAL

RUN_ON

SLP_LAN#
SLP_A#
RUN_ON
SUSD
RUN_ON
RUN_ON
RUN_ON_D
PG_1.5V_EN
SUS_ON
RUN_ON
+1.5V_GPUGPU power
PG_1V_ENGPU PCIE VDDC power
RUN_ON

DGPU_PWR_EN#

SLP_A#
S5_ON

SYS_SHDN#
RUN_ON
S5_ON
SUSD
SYS_SHDN#

+VGPU_IO (4.5A)

ACTIVE IN

VDDCI

UP6111A

P46

AC/DC

Charger

ISL88731A

+VIN

SYS_PWRGD
VDDR_PWRGD

1.8V_PWRGD

1.05V_PCH_PWRGD

1.05V_VTT_PWRGD

0.85V_PWRGD
APWROK
GFX_PWRGD

SUS_ON

+1V_GPU (2A)

P53

DDR PWR

SUS PWR

MOS (AO6402A)

SUS PWR

MOS (AO6402A)

+1.05V_LAN_M

SUS PWR

MOS (AO6402A)

PCIE_VDDC

RT8204

+VIN

3V/5V ALW

RT8206B

+3V_PCU
+5V_PCU

+VIN

RT8207A

P50

+5VPCU

P54

+3VPCU

P54

P54

P45

PG_1.5V_EN

VDDR1

MOS (AO4496)MOS (SI2303)

+1.5V_GPU (5.25A)

+1.5V_GPUPG_1V_EN

P50

VDDR4

MOS (AO6402A)

+1.8V_GPU (1.9A)

PCU

+3V_PCU

P52

NBSWON# EC_PWRBTN# SLP_LAN#

EC

SUS_ON

RUN_ON

HWPG VRON

IT8502N

S5_ON

SLP_S4#

SLP_S3#

P39

S5 PWR

AO4496

PCH

Cougar Point

3

4

+VIN

+1.5V_SUS

SLP_LAN#

VDD_LAN

UP6111AQDD

P49

+3VPCU

+5V_SUS

VCC_LAN

MOS (ME3424)

P36

+3VPCU

+3V_SUS

VCCSPI

MOS (AO4496)

P49

+1.05V_LAN_M

+1.05V_SUS

SLP_A#

VCCASW

MOS (AO6402A)

P54

P52

P08

+VIN

RUN_ON
VRON
VRON
DGPU_VRON
PG_GPUIO_EN

2

3

VRON

CPU Core

ISL9583CRZ

4

P43

+VCC_CORE

+VCC_GFX

5

+1.8V_GPU

P51

+3V_S5
+5V_S5

1

2

SLP_A#

+1.05V_LAN_M

+3V_LAN

+1.05V_M

+3V_M

6

BJT

RUN_ON

dGPU_PWROK

P51

+5VPCU

RUN PWR

MOS (AO4496)

+5V

P54

+3VPCU

RUN PWR

MOS (AO4496)

+3V

P54

+1.5V_SUS

RUN PWR

MOS (AO6402A)

+1.5V

P50

+VIN

RUN PWR

UP6111A

+1.8V

P51

+1.5V_SUS

RUN PWR

RT8207A

+SMDDR_VREF

P50

+1.05V_LAN_M

VCC_PCH

MOS (AOL1718)

+VIN

VCCIO_CPU

UP6111A

+1.05V_VTT

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Thursday, September 30, 2010 2 48

Date: Sheet of

Thursday, September 30, 2010 2 48

Date: Sheet of

Thursday, September 30, 2010 2 48

7

+1.05V_PCH

P49

1.05V_VTT_PWRGD

P47

PROJECT : KL2D

PROJECT : KL2D

PROJECT : KL2D

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PWR Status & GPU PWR CRL

PWR Status & GPU PWR CRL

PWR Status & GPU PWR CRL

+VIN

VCCSA

UP6112

+0.85V

8

P49

1A

1A

1A

5

03

PART

PART

EC

EC

ECEC
NO.

NO.

NO.NO.

EC-C-01 08/26 PR31941

D D

EC-C-02
EC-C-03 24

PG. DATE

DATE

PG.PG.

DATEDATE

36 08/26

08/26

PART PART
REFERENCE

REFERENCE

REFERENCEREFERENCE

EC-C-04 23 08/30
EC-C-05 18 09/01

EC-C-06 09/0110
EC-C-07 9 09/01
EC-C-08 9

EC-A-09 09/07

C C

09/02

35,37

C91
Q47, R725, R726

R538
C814

C483, C355, C356

4

DESCRIPTION

DESCRIPTIONPG.

DESCRIPTIONDESCRIPTION

Add PR319. Change +0.75V contral signal
Change LED power to +3V_S5
Change HDMI pull high to +3V

Remove MUX for LVDS and CRT. Change for Resistor option.

Change C91 to 0603 part. The same as C594
Del reserve schematic
Change value to 1K

Reserve for RF

Mount CYAVLC18B02 for ESD

3

2

1

B B

A A

PROJECT : KL2D

PROJECT : KL2D

PROJECT : KL2D

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Clock Generator

Clock Generator

Clock Generator

Thursday, September 30, 2010 3 48

Thursday, September 30, 2010 3 48

Thursday, September 30, 2010 3 48

1

1A

1A

1A

5

4

3

2

1

Sandy Bridge Processor (CLK,MISC,JTAG)

Sandy Bridge Processor (DMI,PEG,FDI)

DMI_TXN0
DMI_TXN1
DMI_TXN2

D D

C C

eDP_COMP connect to PIN A18 W:4mils/S:15mils/L: 500mils.
eDP_COMP connect to PIN A17 W:12mils/S:15mils/L: 500mils.

B B

DMI_TXN3
DMI_TXP0

DMI_TXP1
DMI_TXP2
DMI_TXP3

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7

FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7

FDI_FSYNC0
FDI_FSYNC1

FDI_INT

FDI_LSYNC0
FDI_LSYNC1

eDP_COMP
INT_eDP_HPD_Q

B27
B25
A25
B24

B28
B26
A24
B23

G21
E22
F21
D21

G22
D22
F20
C21

A21
H19
E19
F18
B21
C20
D18
E17

A22
G19
E20
G18
B20
C19
D19
F17

J18
J17

H20
J19

H17

A18
A17
B16

C15
D15

C17
F16
C16
G15

C18
E16
D16
F15

U47A

U47A

DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]

DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]

DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]

DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]

FDI0_TX#[0]
FDI0_TX#[1]
FDI0_TX#[2]
FDI0_TX#[3]
FDI1_TX#[0]
FDI1_TX#[1]
FDI1_TX#[2]
FDI1_TX#[3]

FDI0_TX[0]
FDI0_TX[1]
FDI0_TX[2]
FDI0_TX[3]
FDI1_TX[0]
FDI1_TX[1]
FDI1_TX[2]
FDI1_TX[3]

FDI0_FSYNC
FDI1_FSYNC

FDI_INT
FDI0_LSYNC

FDI1_LSYNC

eDP_COMPIO
eDP_ICOMPO
eDP_HPD

eDP_AUX
eDP_AUX#

eDP_TX[0]
eDP_TX[1]
eDP_TX[2]
eDP_TX[3]

eDP_TX#[0]
eDP_TX#[1]
eDP_TX#[2]
eDP_TX#[3]

CPU-989P-rPGA

CPU-989P-rPGA

J22

PEG_ICOMPI

J21

PEG_ICOMPO

H22

PEG_RCOMPO

PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]

DMI

DMI

PEG_RX#[7]
PEG_RX#[8]

PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

PEG_RX[0 ]
PEG_RX[1 ]
PEG_RX[2 ]
PEG_RX[3 ]
PEG_RX[4 ]
PEG_RX[5 ]
PEG_RX[6 ]
PEG_RX[7 ]
PEG_RX[8 ]

PEG_RX[9 ]
PEG_RX[1 0]
PEG_RX[1 1]
PEG_RX[1 2]
PEG_RX[1 3]
PEG_RX[1 4]
PEG_RX[1 5]

PEG_TX#[0 ]
PEG_TX#[1 ]
PEG_TX#[2 ]
PEG_TX#[3 ]
PEG_TX#[4 ]

Intel(R) FDI

Intel(R) FDI

PEG_TX#[5 ]
PEG_TX#[6 ]
PEG_TX#[7 ]
PEG_TX#[8 ]
PEG_TX#[9 ]

PEG_TX#[1 0]
PEG_TX#[1 1]

PCI EXPRESS* - GRAPHICS

PCI EXPRESS* - GRAPHICS

PEG_TX#[1 2]
PEG_TX#[1 3]
PEG_TX#[1 4]
PEG_TX#[1 5]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

eDP

eDP

PEG_TX[9]
PEG_TX[10 ]
PEG_TX[11 ]
PEG_TX[12 ]
PEG_TX[13 ]
PEG_TX[14 ]
PEG_TX[15 ]

K33
M35
L34
J35
J32
H34
H31
G33
G30
F35
E34
E32
D33
D31
B33
C32

J33
L35
K34
H35
H32
G34
G31
F33
F30
E35
E33
F32
D34
E31
C33
B32

M29
M32
M31
L32
L29
K31
K28
J30
J28
H29
G27
E29
F27
D28
F26
E25

M28
M33
M30
L31
L28
K30
K27
J29
J27
H28
G28
E28
F28
D27
E26
D25

PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8
PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15

PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15

PEG_TXN0_C
PEG_TXN1_C
PEG_TXN2_C
PEG_TXN3_C
PEG_TXN4_C
PEG_TXN5_C
PEG_TXN6_C
PEG_TXN7_C
PEG_TXN8_C
PEG_TXN9_C
PEG_TXN10_C
PEG_TXN11_C
PEG_TXN12_C
PEG_TXN13_C
PEG_TXN14_C
PEG_TXN15_C

PEG_TXP0_C
PEG_TXP1_C
PEG_TXP2_C
PEG_TXP3_C
PEG_TXP4_C
PEG_TXP5_C
PEG_TXP6_C
PEG_TXP7_C
PEG_TXP8_C
PEG_TXP9_C
PEG_TXP10_C
PEG_TXP11_C
PEG_TXP12_C
PEG_TXP13_C
PEG_TXP14_C
PEG_TXP15_C

PEG_COMP connect to PIN J21 W:12mils/S:15mils/L: 500mils.

PEG_RXN[0..15]

PEG_RXP[0..15]

U14

U14

1

PLTRST#

2

IN
GND3OUT

74LVC1G07GW

74LVC1G07GW

SNB_IVB# N.A at SNB EDS #27637 0.7v1

H_SNB_IVB#

EC_PECI

H_PROCHOT#

PM_THRMTRIP#

PM_SYNC

H_PWRGOOD

+3V_S5

VCC5NC

4

R190 56/J_4R190 56/J_4

R187 0/J_4R187 0/J_4

R191 0/J_4R191 0/J_4

R192 10K/J_4R192 10K/J_4

C823 *0.1U/10V/X5R_4C823 *0.1U/10V/X5R_4

R195 75/J_4R195 75/J_4

+1.05V_VTT

CPU_PLTRST#

C337

C337

0.1U/10V_4

0.1U/10V_4

CPU_PLTRST#

R197 43/J_4R197 43/J_4

TP7TP7

TP6TP6

PM_DRAM_PWRGD

SKTOCC#

TP_CATERR#

H_PROCHOT#_R

PM_SYNC_R

H_PWRGOOD_R

PM_DRAM_PWRGD_R

CPU_PLTRST#_R

SYS_PWROK

PM_DRAM_PWRGD_R

PEG_COMP connect to PIN H22&J22 W:4mils/S:15mils/L: 500mils.

PEG_COMP

C26

AN34

AL33

AN33

AL32

AN32

AM34

AP33

V8

AR33

U47B

U47B

CPU-989P-rPGA

CPU-989P-rPGA

PROC_SEL ECT#

SKTOCC#

CATERR#

PECI

PROCHOT#

THERMTRIP#

PM_SYNC

UNCOREPW RGOOD

SM_DRAMPW ROK

RESET#

R219 0/J_4R219 0/J_4

R214

R214
*1.1K/F_4

*1.1K/F_4

R208 *3K/F_4R208 *3K/F_4

A28

BCLK

A27

BCLK#

CLK_DPLL_SSCLKP_R

MISCTHERMALPWR MANAGEMENT

MISCTHERMALPWR MANAGEMENT

+3V_S5

2
1

U17

U17

74AHC1G09

74AHC1G09

3 5

CLOCKS

CLOCKS

DDR3

DDR3

JTAG & BPM

JTAG & BPM

C370

C370

0.1U/10V_4

0.1U/10V_4

4

DPLL_REF_CLK#

MISC

MISC

R221 *39/J_4R221 *39/J_4

DPLL_REF_CLK

SM_DRAMRST#

SM_RCOMP[0 ]
SM_RCOMP[1 ]
SM_RCOMP[2 ]

PRDY#

PREQ#

TRST#

DBR#

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

A16

CLK_DPLL_SSCLKN_R

A15

R8

SM_RCOMP_0

AK1

SM_RCOMP_1

A5

SM_RCOMP_2

A4

SM_RCOMP[0] W:20mils/S:20mils/L: 500mils,
SM_RCOMP[1] W:20mils/S:20mils/L: 500mils,
SM_RCOMP[2] W:15mils/S:20mils/L: 500mils,

XDP_PRDY#

AP29

XDP_PREQ#

AP27

XDP_TCLK

AR26

TCK
TMS

TDO

AR27
AP30

AR28

TDI

AP26

AL35

AT28
AR29
AR30
AT30
AP32
AR31
AT31
AR32

+1.5V_CPU

R218

R218
200/F_4

200/F_4
R213 130/F_4R213 130/F_4

3

Q22 *2N7002KQ22 *2N7002K

XDP_TMS
XDP_TRST#

XDP_TDI_R
XDP_TDO

XDP_DBRST#

XDP_BPM0
XDP_BPM1
XDP_BPM2
XDP_BPM3
XDP_BPM4
XDP_BPM5
XDP_BPM6
XDP_BPM7

2

R515 *DIS@0/J_4R515 *DIS@0/J_4
R510 *DIS@0/J_4R510 *DIS@0/J_4

R179 140/F_4R179 140/F_4
R130 26.1/F_4R130 26.1/F_4
R131 200/F_4R131 200/F_4

PM_DRAM_PWRGD_RPM_DRAM_PWRGD_Q

1

CLK_CPU_BCLKP
CLK_CPU_BCLKN

3
1

R514 SW@0X2R514 SW@0X2

Ra

Rb

Rc

CPU_DRAMRST#

TP8TP8
TP21TP21

TP18TP18
TP20TP20
TP22TP22

TP19TP19
TP9TP9

R227 *1K/J_4R227 *1K/J_4

TP15TP15
TP10TP10
TP11TP11
TP14TP14
TP17TP17
TP13TP13
TP12TP12
TP16TP16

MAINON#

4
2

*PDG=25.5K

+3V
XDP_DBRST#

CLK_DPLL_SSCLKP
CLK_DPLL_SSCLKN

Ra
Rb
Rc

04

DIS SW/UMA
NA

0 ohm

0 ohm

NA

0 ohm

NA

FDI Disable

FDI_INT

R519 *DIS@0/J_4R519 *DIS@0/J_4

A A

R520 *DIS@0/J_4R520 *DIS@0/J_4 R222 51/J_4R222 51/J_4
R518 *DIS@0/J_4R518 *DIS@0/J_4

R516

R516

R517

R517
*DIS@1K/F_4

*DIS@1K/F_4

*DIS@1K/F_4

*DIS@1K/F_4

FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1

FDI_FSYNC can gang
all these 4
signals together
and tie them with
only one 1K
resistor to GND
(DG V0.5 Ch2.2.9).

5

PEG x16 (UMA Non-stuff)

PEG_TXP0_C
PEG_TXP1_C
PEG_TXP2_C
PEG_TXP3_C
PEG_TXP4_C
PEG_TXP5_C
PEG_TXP6_C
PEG_TXP7_C
PEG_TXP8_C
PEG_TXP9_C
PEG_TXP10_C
PEG_TXP11_C
PEG_TXP12_C
PEG_TXP13_C
PEG_TXP14_C
PEG_TXP15_C

C273 0.1U/10V_4C273 0.1U/10V_4
C268 0.1U/10V_4C268 0.1U/10V_4
C261 0.1U/10V_4C261 0.1U/10V_4
C257 0.1U/10V_4C257 0.1U/10V_4
C256 0.1U/10V_4C256 0.1U/10V_4
C252 0.1U/10V_4C252 0.1U/10V_4
C250 0.1U/10V_4C250 0.1U/10V_4
C237 0.1U/10V_4C237 0.1U/10V_4
C230 0.1U/10V_4C230 0.1U/10V_4
C227 0.1U/10V_4C227 0.1U/10V_4
C222 0.1U/10V_4C222 0.1U/10V_4
C216 0.1U/10V_4C216 0.1U/10V_4
C215 0.1U/10V_4C215 0.1U/10V_4
C192 0.1U/10V_4C192 0.1U/10V_4
C243 0.1U/10V_4C243 0.1U/10V_4
C241 0.1U/10V_4C241 0.1U/10V_4

PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15

0.22uF for PCIE GEN 3 support in feture support.

PEG_TXP[0..15]

PEG_TXN0_C

C270 0.1U/10V_4C270 0.1U/10V_4

PEG_TXN1_C

C262 0.1U/10V_4C262 0.1U/10V_4

PEG_TXN2_C

C263 0.1U/10V_4C263 0.1U/10V_4

PEG_TXN3_C

C259 0.1U/10V_4C259 0.1U/10V_4

PEG_TXN4_C

C258 0.1U/10V_4C258 0.1U/10V_4

PEG_TXN5_C

C255 0.1U/10V_4C255 0.1U/10V_4

PEG_TXN6_C

C251 0.1U/10V_4C251 0.1U/10V_4

PEG_TXN7_C

C246 0.1U/10V_4C246 0.1U/10V_4

PEG_TXN8_C

C231 0.1U/10V_4C231 0.1U/10V_4

PEG_TXN9_C

C229 0.1U/10V_4C229 0.1U/10V_4

PEG_TXN10_C

C226 0.1U/10V_4C226 0.1U/10V_4

PEG_TXN11_C

C220 0.1U/10V_4C220 0.1U/10V_4

PEG_TXN12_C

C211 0.1U/10V_4C211 0.1U/10V_4

PEG_TXN13_C

C212 0.1U/10V_4C212 0.1U/10V_4

PEG_TXN14_C

C242 0.1U/10V_4C242 0.1U/10V_4

PEG_TXN15_C

C240 0.1U/10V_4C240 0.1U/10V_4

4

PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15

PEG_TXN[0..15]

DP & PEG Compensation

R147 24.9/F_4R147 24.9/F_4

+1.05V_VTT

PEG_ICOMPI and RCOMPO signals should be routed within 500
mils typical impedance = 43 mohms PEG_ICOMPO signals should
be routed within 500 mils
typical impedance = 14.5 mohms

R133 10K_4R133 10K_4

+1.05V_VTT

R511 24.9/F_4R511 24.9/F_4

+1.05V_VTT

eDP_COMPIO and ICOMPO signals should be shorted near balls and
routed with typical impedance <25 mohms

3

PEG_COMP

INT_eDP_HPD_Q

eDP_COMP

Processor pull-up(CPU)

2

H_PROCHOT#

R189 62/F_4R189 62/F_4

XDP_TDO

R202 51/J_4R202 51/J_4

XDP_TMS

R224 51/J_4R224 51/J_4

XDP_TDI_R

R223 51/J_4R223 51/J_4

XDP_PREQ#

R226 *51/J_4R226 *51/J_4

XDP_TCLK

R225 51/J_4R225 51/J_4

XDP_TRST#

PROJECT : KL2D

PROJECT : KL2D

PROJECT : KL2D

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Sandy Bridge 1/4

Sandy Bridge 1/4

Sandy Bridge 1/4

Thursday, September 30, 2010 4 48

Thursday, September 30, 2010 4 48

Thursday, September 30, 2010 4 48

+1.05V_VTT

1A

1A

1A

1

5

4

3

2

1

Sandy Bridge Processor (DDR3)

U47D

AM5
AM6
AR3

AN3
AN2
AN1

AN9

AN8
AR6
AR5
AR9

AJ11

AH11

AR8

AJ12

AH12

AT11
AN14
AR14

AT14

AT12
AN15
AR15

AT15

AA10

D10

K10

AP3

AP2
AP5

AT5
AT6
AP6

AT8
AT9

AA9
AA7

AB8
AB9

J10

C9
A7

C8
A9
A8
D9
D8
G4
F4
F1
G1
G5
F5
F2
G2

J7
J8

K9

J9

K8
K7
M5
N4
N2
N1
M4
N5
M2
M1

R6

U47D

SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

SB_BS[0]
SB_BS[1]
SB_BS[2]

SB_CAS#
SB_RAS#
SB_WE#

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY B

SB_CLK[0]

SB_CLK#[0]

SB_CKE[0]

SB_CLK[1]

SB_CLK#[1]

SB_CKE[1]

RSVD_TP[11]
RSVD_TP[12]
RSVD_TP[13]

RSVD_TP[14]
RSVD_TP[15]
RSVD_TP[16]

SB_CS#[0]

SB_CS#[1]
RSVD_TP[17]
RSVD_TP[18]

SB_ODT[0]

SB_ODT[1]
RSVD_TP[19]
RSVD_TP[20]

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

SB_DQS[0]

SB_DQS[1]

SB_DQS[2]

SB_DQS[3]

SB_DQS[4]

SB_DQS[5]

SB_DQS[6]

SB_DQS[7]

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]

SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

AE2
AD2
R9

AE1
AD1
R10

AB2
AA2
T9

AA1
AB1
T10

AD3
AE3
AD6
AE6

AE4
AD4
AD5
AE5

D7
F3
K6
N3
AN5
AP9
AK12
AP15

C7
G3
J6
M3
AN6
AP8
AK11
AP14

AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4

M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7

M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

M_B_CLKP0
M_B_CLKN0
M_B_CKE0

M_B_CLKP1
M_B_CLKN1
M_B_CKE1

M_B_CS#0
M_B_CS#1

M_B_ODT0
M_B_ODT1

U47C

U47C

AB6

SA_CLK[0]

M_A_DQ[63:0]

D D

C C

B B

M_A_BS#0
M_A_BS#1
M_A_BS#2

M_A_CAS#
M_A_RAS#
M_A_WE#

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

AP11
AN11

AL12
AM12
AM11

AL11

AP12
AN12

AJ14

AH14

AL15

AK15

AL14

AK14

AJ15

AH15

AE10

AF10

G10

N10

M10

AG6
AG5
AK6
AK5
AH5
AH6

AK8
AK9

AH8
AH9
AL9
AL8

AE8
AD9
AF9

F10

AJ5
AJ6
AJ8

AJ9

C5
D5
D3
D2
D6
C6
C2
C3

F8
G9

F9
F7
G8
G7
K4
K5
K1

J1
J5
J4
J2

K2

M8
N8

N7
M9

N9
M7

V6

SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

SA_BS[0]
SA_BS[1]
SA_BS[2]

SA_CAS#
SA_RAS#
SA_WE#

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

RSVD_TP[10]

SA_CLK#[0]

SA_CKE[0]

SA_CLK[1]

SA_CLK#[1]

SA_CKE[1]

RSVD_TP[1]
RSVD_TP[2]
RSVD_TP[3]

RSVD_TP[4]
RSVD_TP[5]
RSVD_TP[6]

SA_CS#[0]

SA_CS#[1]
RSVD_TP[7]
RSVD_TP[8]

SA_ODT[0]

SA_ODT[1]
RSVD_TP[9]

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

SA_DQS[0]

SA_DQS[1]

SA_DQS[2]

SA_DQS[3]

SA_DQS[4]

SA_DQS[5]

SA_DQS[6]

SA_DQS[7]

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]

SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

AA6
V9

AA5
AB5
V10

AB4
AA4
W9

AB3
AA3
W10

AK3
AL3
AG1
AH1

AH3
AG3
AG2
AH2

C4
G6
J3
M6
AL6
AM8
AR12
AM15

D4
F6
K3
N6
AL5
AM9
AR11
AM14

AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7

M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7

M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

M_A_CLKP0
M_A_CLKN0
M_A_CKE0

M_A_CLKP1
M_A_CLKN1
M_A_CKE1

M_A_CS#0
M_A_CS#1

M_A_ODT0
M_A_ODT1

M_A_DQSN[7:0]

M_A_DQSP[7:0]

M_A_A[15:0]

M_B_DQ[63:0]

M_B_BS#0
M_B_BS#1
M_B_BS#2

M_B_CAS#
M_B_RAS#
M_B_WE#

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

05

M_B_DQSN[7:0]

M_B_DQSP[7:0]

M_B_A[15:0]

CPU-989P-rPGA

CPU-989P-rPGA

CPU-989P-rPGA

+1.5V_SUS

R149 *0/J_4R149 *0/J_4

R150

R150
1K/F_4

A A

DDR3_DRAMRST#

5

R140 1K/F_4R140 1K/F_4

DRAMRST_CNTRL_PCH

DRAMRST_CNTRL_EC

+3V_S5

CPU_DRAMRST#_R

4

1K/F_4

R137 0/J_4R137 0/J_4
R138 *0/J_4R138 *0/J_4

3

Q11

Q11
2N7002K

2N7002K

2

C272

C272

0.047U/10V_4

0.047U/10V_4

1

R148

R148

4.99K/F_4

4.99K/F_4R139 10K/J_4R139 10K/J_4

CPU_DRAMRST#

3

CPU-989P-rPGA

PROJECT : KL2D

PROJECT : KL2D

PROJECT : KL2D

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Quanta Computer Inc.

Sandy Bridge 2/4

Sandy Bridge 2/4

Sandy Bridge 2/4

Thursday, September 30, 2010 5 48

Thursday, September 30, 2010 5 48

Thursday, September 30, 2010 5 48

1

1A

1A

1A

5

4

3

2

1

Sandy Bridge Processor (POWER)

CPU Core Power

SNB 45W:55A
22uF x 32

C324

C324
22U/6.3V_8

22U/6.3V_8

C325

C325
22U/6.3V_8

22U/6.3V_8

C197

C197
22U/6.3V_8

22U/6.3V_8

C326

C326
22U/6.3V_8

22U/6.3V_8

C179

C179
22U/6.3V_8

22U/6.3V_8

C307

C307
22U/6.3V_8

22U/6.3V_8

C664

C664
22U/6.3V_8

22U/6.3V_8

C288

C288
22U/6.3V_8

22U/6.3V_8

22uF x 3 (Non-stuff)

C626

C626

C159

C159

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

C308

C308

C669

C669

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

C327

C327

C294

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

C665

C665

C657

C657

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

C662

C662

C656

C656

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

C658

C658

C667

C667

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

C659

C659

C156

C156

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

C196

C196

C160

C160

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

D D

C C

B B

Reserved

C624

C624

C289

C289

C293

C293
*22U/6.3V_8

*22U/6.3V_8

A A

*22U/6.3V_8

*22U/6.3V_8

*22U/6.3V_8

*22U/6.3V_8

5

C168

C168
22U/6.3V_8

22U/6.3V_8

C625

C625
22U/6.3V_8

22U/6.3V_8

C306

C306
22U/6.3V_8

22U/6.3V_8

C663

C663
22U/6.3V_8

22U/6.3V_8

C668

C668
22U/6.3V_8

22U/6.3V_8

C670

C670
22U/6.3V_8

22U/6.3V_8

C674

C674
22U/6.3V_8

22U/6.3V_8

C292

C292
22U/6.3V_8

22U/6.3V_8

+VCC_CORE

AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26

Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26

U47F

U47F

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100

CPU-989P-rPGA

CPU-989P-rPGA

POWER

POWER

CORE SUPPLY

CORE SUPPLY

CPU VTT

SNB 45W:8.5A
22uF x 10

+1.05V_VTT

+1.05V_VTT_40

H_CPU_SVIDALRT#
H_CPU_SVIDCLK
H_CPU_SVIDDAT

VCC_SENSE_R
VSS_SENSE_R

22uF x 6 (Non-stuff)

C655

C655
22U/6.3V_8

22U/6.3V_8

C661

C661
*22U/6.3V_8

*22U/6.3V_8

C630

C630
*22U/6.3V_8

*22U/6.3V_8

R171 0/J_4R171 0/J_4
R174 0/J_4R174 0/J_4

R513 0/J_4R513 0/J_4

TP43TP43

C281

C281

C629

C629

10U/6.3V_6

10U/6.3V_6

22U/6.3V_8

22U/6.3V_8

C653

C653

C633

C633

*22U/6.3V_8

*22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22uF (Reserved)

C632

C632
*22U/6.3V_8

*22U/6.3V_8

R521 *0/short_4R521 *0/short_4

R170 1 00/J_4R170 100/J_4

R173 1 00/J_4R173 100/J_4

VCCP_SENSE

Rev.B

C638

C638
*22U/6.3V_8

*22U/6.3V_8

+SMDDR_VREF

C671

C671
22U/6.3V_8

22U/6.3V_8

C305

C305
10U/6.3V_6

10U/6.3V_6

MAINON

C660

C660
22U/6.3V_8

22U/6.3V_8

C299

C299
10U/6.3V_6

10U/6.3V_6

C631

C631
*22U/6.3V_8

*22U/6.3V_8

+1.05V_VTT

CPU VCCPL

SNB 45W:3A
330uF/7mohm x 1
10uF x 1
1uF x 2

+VCC_CORE

VCC_SENSE
VSS_SENSE

AH13

VCCIO1

AH10

VCCIO2

AG10

VCCIO3

AC10

VCCIO4

Y10

VCCIO5

U10

VCCIO6

P10

VCCIO7

L10

VCCIO8

J14

VCCIO9

J13

VCCIO10

J12

VCCIO11

J11

VCCIO12

H14

VCCIO13

H12

VCCIO14

H11

VCCIO15

G14

VCCIO16

G13

VCCIO17

G12

VCCIO18

F14

VCCIO19

F13

VCCIO20

F12

VCCIO21

F11

VCCIO22

E14

VCCIO23

E12

VCCIO24

E11

VCCIO25

D14

VCCIO26

D13

VCCIO27

D12

VCCIO28

D11

VCCIO29

C14

VCCIO30
VCCIO31
VCCIO32
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39

VCCIO40

VIDALERT#

VIDSCLK
VIDSOUT

VCC_SENSE
VSS_SENSE

VCCIO_SENSE
VSSIO_SENSE

C13
C12
C11
B14
B12
A14
A13
A12
A11

J23

AJ29
AJ30
AJ28

AJ35
AJ34

B10
A10

4

PEG AND DDR

PEG AND DDR

SENSE LINES SVID

SENSE LINES SVID

CPU VGT

SNB 45W:22A
22uF x 12
22uF x 4 (Reserved)

+VCC_GFX

C666

C666
22U/6.3V_8

22U/6.3V_8

C635

C635
22U/6.3V_8

22U/6.3V_8

+1.8V

R183 *0/J_8R183 *0/J_8

3

2

+VDDR_REF_CPU

1

Q16

Q16
2N7002K

2N7002K

3

C341

C341
22U/6.3V_8

22U/6.3V_8

C343

C343
22U/6.3V_8

22U/6.3V_8

C349

C349
22U/6.3V_8

22U/6.3V_8

C680

C680
*22U/6.3V_8

*22U/6.3V_8

R232 *DIS@0/J_4R232 *DIS@0/J_4

Ra 0 ohm

C645

C645

10U/6.3V_6

10U/6.3V_6

R182

R182
100K/J_4

100K/J_4

Sandy Bridge Processor (GRAPHIC POWER)

POWER

C352

C352

C681

22U/6.3V_8

22U/6.3V_8

C347

C347
22U/6.3V_8

22U/6.3V_8

C360

C360
22U/6.3V_8

22U/6.3V_8

C681
22U/6.3V_8

22U/6.3V_8

C350

C350
22U/6.3V_8

22U/6.3V_8

C344

C344
22U/6.3V_8

22U/6.3V_8

C673

C673
*22U/6.3V_8

*22U/6.3V_8

C679

C679
22U/6.3V_8

22U/6.3V_8

C342

C342
22U/6.3V_8

22U/6.3V_8

C369

C369
22U/6.3V_8

22U/6.3V_8

C346

C346
*22U/6.3V_8

*22U/6.3V_8

Ra

DISNASW

C640
1U/6.3V_4

1U/6.3V_4

Layout note: need routing
together and ALERT need
between CLK and DATA

Place PU resistor close to CPU

*330U/2V_7343

*330U/2V_7343

1U/6.3V_4

1U/6.3V_4

H_CPU_SVIDCLK

H_CPU_SVIDDAT

R169 0/J_4R169 0/J_4

+1.05V_VTT +1.05V_VTT

+

+

C639

C639

C637

C637

C640

Place PU resistor close to CPU

H_CPU_SVIDALRT#

R167 4 3/J_4R167 43/J_4

R164

R164
130/F_4

130/F_4

U47G

U47G

AT24
AT23
AT21
AT20
AT18
AT17
AR24
AR23
AR21
AR20
AR18
AR17
AP24
AP23
AP21
AP20
AP18
AP17
AN24
AN23
AN21
AN20
AN18

AN17
AM24
AM23
AM21
AM20
AM18
AM17

AL24

AL23

AL21

AL20

AL18

AL17

AK24

AK23

AK21

AK20

AK18

AK17

AJ24

AJ23

AJ21

AJ20

AJ18

AJ17

AH24

AH23

AH21

AH20

AH18

AH17

B6
A6
A2

CPU-989P-rPGA

CPU-989P-rPGA

R160 0/J_4R160 0/J_4

+1.05V_VTT

VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
VAXG37
VAXG38
VAXG39
VAXG40
VAXG41
VAXG42
VAXG43
VAXG44
VAXG45
VAXG46
VAXG47
VAXG48
VAXG49
VAXG50
VAXG51
VAXG52
VAXG53
VAXG54

VCCPLL1
VCCPLL2
VCCPLL3

R166

R166
75/J_4

75/J_4

POWER

GRAPHICS

GRAPHICS

1.8V RAIL

1.8V RAIL

+1.05V_VTT

R165 0/J_4R165 0/J_4

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

VREFMISC

VREFMISC

DDR3 -1.5V RAILS

DDR3 -1.5V RAILS

SA RAIL

SA RAIL

SVID CLK

Close to VR

R490

R490

54.9/F_4

54.9/F_4

SVID DATA

Close to VR

R493

R493
130/F_4

130/F_4

SVID ALERT

2

VAXG_SENSE

VCCSA_SENSE

VR_SVID_CLK

VR_SVID_DATA

VR_SVID_ALERT#

SM_VREF

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15

VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8

FC_C22

VCCSA_VID1

TP3TP3

R184 1 00/J_4R184 100/J_4

R185

R185

0/J_4

AK35
AK34

AL1

AF7
AF4
AF1
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1

M27
M26
L26
J26
J25
J24
H26
H25

H23

C22
C24

0/J_4
0/J_4

0/J_4

R177 1 00/J_4R177 100/J_4

R178

R178

TP1TP1

+VDDR_REF_CPU

CAD Note: +VDDR_REF_CPU should
have 10 mil trace width

R146 0/J_4R146 0/J_4

H_FC_C22

C313

C313

10U/6.3V_6

10U/6.3V_6

10U/6.3V_6

10U/6.3V_6C294

C329

C329

C298

C298

10U/6.3V_6

10U/6.3V_6

10U/6.3V_6

10U/6.3V_6

C238

C238

10U/6.3V_6

10U/6.3V_6

10U/6.3V_6

10U/6.3V_6

R125 1 0K/J_4R12 5 10 K/J_4

VCCSA_SEL

+VDDR_REF_CPU

C312

C312

C239

C239

+

+

VCCUSA_SENSE

MAINON_15V

+VCC_GFX

VCC_AXG_SENSE
VSS_AXG_SENSE

CPU MCH

SNB 45W: 5A
330uF/6mohm x 1
10uF x 6

C319

C319

10U/6.3V_6

10U/6.3V_6

C304

C304
*330U/2V_7343

*330U/2V_7343

C328

C328

10U/6.3V_6

10U/6.3V_6

C297

C297
22U/6.3V_8

22U/6.3V_8

+1.5V_CPU

C296

C296
22U/6.3V_8

22U/6.3V_8

22uF (Reserved)

+0.85V

+

+

C651

C651

C654

C654

*330U/2V_7343

*330U/2V_7343

10U/6.3V_6

10U/6.3V_6

CPU SA

SNB 45W: 6A
330uF/7mohm x 1
10uF x 3

4.5A

JP1

JP1

SHORT PAD

SHORT PAD

12

8
7

5

MAINON#

1
2
36

Q13

Q13

4

AO4496

AO4496

C318

C318
*470P/50V_4

*470P/50V_4

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Thursday, September 30, 2010 6 48

Date: Sheet of

Thursday, September 30, 2010 6 48

Date: Sheet of

Thursday, September 30, 2010 6 48

3/26 DB add for Intel.
Placement close to CPU.

R151

R151
220/J_8

220/J_8

3

2

Q12

Q12
DMN601K-7

DMN601K-7

1

PROJECT : KL2D

PROJECT : KL2D

PROJECT : KL2D

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Sandy Bridge 3/4

Sandy Bridge 3/4

Sandy Bridge 3/4

1

C323 0.1U/10V_4C323 0.1U/10V_4
C321 0.1U/10V_4C321 0.1U/10V_4
C320 0.1U/10V_4C320 0.1U/10V_4
C322 0.1U/10V_4C322 0.1U/10V_4

06

+1.5V_SUS+1.5V_CPU+1.5V_SUS

1A

1A

1A

5

4

3

2

1

Sandy Bridge Processor (GND)

U47I

N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
M34

H33
H30
H27
H24
H21
H18
H15
H13
H10

G35
G32
G29
G26
G23
G20
G17
G11

U47I

T35

VSS161

T34

VSS162

T33

VSS163

T32

VSS164

T31

VSS165

T30

VSS166

T29

VSS167

T28

VSS168

T27

VSS169

T26

VSS170

P9

VSS171

P8

VSS172

P6

VSS173

P5

VSS174

P3

VSS175

P2

VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187

L33

VSS188

L30

VSS189

L27

VSS190

L9

VSS191

L8

VSS192

L6

VSS193

L5

VSS194

L4

VSS195

L3

VSS196

L2

VSS197

L1

VSS198

K35

VSS199

K32

VSS200

K29

VSS201

K26

VSS202

J34

VSS203

J31

VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213

H9

VSS214

H8

VSS215

H7

VSS216

H6

VSS217

H5

VSS218

H4

VSS219

H3

VSS220

H2

VSS221

H1

VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230

F34

VSS231

F31

VSS232

F29

VSS233

VSS

VSS

VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285

F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3

SMDDR_VREF_DQ0_M3
SMDDR_VREF_DQ1_M3

Sandy Bridge Processor (RESERVED, CFG)

U47E

U47E

L7

RSVD28

AG7

RSVD29
RSVD30
RSVD31
RSVD32

RSVD33
RSVD34
RSVD35

RSVD37
RSVD38
RSVD39
RSVD40

RSVD41
RSVD42
RSVD43
RSVD44
RSVD45

RSVD46
RSVD47
RSVD48
RSVD49
RSVD50

RSVD51
RSVD52

VCC_DIE_SENSE

RSVD54
RSVD55

RSVD56
RSVD57
RSVD58

KEY

AE7
AK2
W8

AT26
AM33
AJ27

T8
J16
H16
G16

AR35
AT34
AT33
AP35
AR34

B34
A33
A34
B35
C35

AJ32
AK32

AH27

AN35
AM35

AT2
AT1
AR1

B1

R134

R134
*1K/J_4

*1K/J_4

CFG0CFG0
CFG2
CFG4CFG4

CFG5
CFG6
CFG7CFG7

R132

R132
*1K/J_4

*1K/J_4

TP2TP2
TP4TP4

TP5TP5

SMDDR_VREF_DQ0_M3
SMDDR_VREF_DQ1_M3

02/20 Add for Pre-ES1

TP37TP37

AK28

CFG[0]

AK29

CFG[1]

AL26

CFG[2]

AL27

CFG[3]

AK26

CFG[4]

AL29

CFG[5]

AL30

CFG[6]

AM31

CFG[7]

AM32

CFG[8]

AM30

CFG[9]

AM28

CFG[10]

AM26

CFG[11]

AN28

CFG[12]

AN31

CFG[13]

AN26

CFG[14]

AM27

CFG[15]

AK31

CFG[16]

AN29

CFG[17]

AJ31

VAXG_VAL_SENSE

AH31

VSSAXG_VAL_SENSE

AJ33

VCC_VAL_SENSE

AH33

VSS_VAL_SENSE

AJ26

RSVD5

B4

RSVD6

D1

RSVD7

F25

RSVD8

F24

RSVD9

F23

RSVD10

D24

RSVD11

G25

RSVD12

G24

RSVD13

E23

RSVD14

D23

RSVD15

C30

RSVD16

A31

RSVD17

B30

RSVD18

B29

RSVD19

D30

RSVD20

B31

RSVD21

A30

RSVD22

C29

RSVD23

J20

RSVD24

B18

RSVD25

A19

VCCIO_SEL

J15

RSVD27

CPU-989P-rPGA

CPU-989P-rPGA

RESERVED

RESERVED

07

CLK_PCH_ITPP

#27636 SNB EDS0.7v1 no function.

For rPGA socket, RSVD59 pin should be left NC

CLK_PCH_ITPN

U47H

U47H

AT35

VSS1

AT32

VSS2

AT29

VSS3

AT27

VSS4

AT25

VSS5

AT22

VSS6

AT19

VSS7

AT16

VSS8

AT13

D D

C C

B B

AT10

AT7
AT4

AT3
AR25
AR22
AR19
AR16
AR13
AR10

AR7

AR4

AR2
AP34
AP31
AP28
AP25
AP22
AP19
AP16
AP13
AP10

AP7

AP4

AP1
AN30
AN27
AN25
AN22
AN19
AN16
AN13
AN10

AN7

AN4
AM29
AM25
AM22
AM19
AM16
AM13
AM10

AM7
AM4
AM3
AM2

AM1
AL34
AL31
AL28
AL25
AL22
AL19
AL16
AL13
AL10

AL7
AL4

AL2
AK33
AK30
AK27
AK25
AK22
AK19
AK16
AK13
AK10

AK7

AK4

AJ25

VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80

VSS

VSS

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH26
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2

CPU-989P-rPGA

CPU-989P-rPGA

CPU-989P-rPGA

Processor Strapping

The CFG signals have a default value of '1' if not terminated on the board.

1 0

CFG2

A A

(PEG Static Lane Reversal)

CFG4
(DP Presence Strap)

CFG7
(PEG Defer Training)

Normal Operation Lane Reversed

Disable; No physical DP attached to eDP
Leave NC for disable

PEG train immediately following
xxRESETB de assertion

5

CPU-989P-rPGA

Enable; An ext DP device is connected to eDP

PEG wait for BIOS training

4

CFG2
CFG4
CFG7

R233 1K/F_4R233 1K/F_4

R206 *1K/F_4R206 *1K/F_4

3

CFG5
CFG6

R211 *1K/F_4R211 *1K/F_4
R207 *1K/F_4R207 *1K/F_4R216 *1K/F_4R216 *1K/F_4

CFG[6:5] (PCIE Port Bifurcation Straps)

11: (Default) x16 - Device 1 functions 1 and 2 disabled
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

PROJECT : KL2D

PROJECT : KL2D

PROJECT : KL2D

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Quanta Computer Inc.

Sandy Bridge 4/4

Sandy Bridge 4/4

Sandy Bridge 4/4

Thursday, September 30, 2010 7 48

Thursday, September 30, 2010 7 48

Thursday, September 30, 2010 7 48

1

1A

1A

1A

5

4

3

2

1

R535

R535
100K/J_4

100K/J_4

08

INT. HDMI INT. DP

INT_HDMI_HPD

+3V

Cougar Point (LVDS,DDI)

U50D

AF37
AF36

AE48
AE47

AK39
AK40

AN48
AM47
AK47

AJ48

AN47
AM49
AK49

AJ47

AF40
AF39

AH45
AH47

AF49
AF45

AH43
AH49

AF47
AF43

J47
M45

P45
T40

K47
T45

P39

N48
P49
T49

T39
M40

M47
M49

T43
T42

U50D

L_BKLTEN
L_VDD_EN

L_BKLTCTL
L_DDC_CLK

L_DDC_DATA
L_CTRL_CLK

L_CTRL_DATA
LVD_IBG

LVD_VBG
LVD_VREFH

LVD_VREFL

LVDSA_CLK#
LVDSA_CLK

LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3

LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3

LVDSB_CLK#
LVDSB_CLK

LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3

LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3

CRT_BLUE
CRT_GREEN
CRT_RED

CRT_DDC_CLK
CRT_DDC_DATA

CRT_HSYNC
CRT_VSYNC

DAC_IREF
CRT_IRTN

CougarPoint_R1P0

CougarPoint_R1P0

SDVO_INTN
SDVO_INTP

DDPB_AUXN

DDPB_AUXP

DDPB_HPD

DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P

DDPC_AUXN
DDPC_AUXP

DDPC_HPD

DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P

DDPD_AUXN
DDPD_AUXP

DDPD_HPD

DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P

AP43
AP45

AM42
AM40

AP39
AP40

P38
M39

AT49
AT47

INT_HDMI_HPD_Q

AT40
AV42

AV40
AV45
AV46
AU48
AU47
AV47
AV49

P46
P42

AP47
AP49
AT38

AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49

M43
M36

AT45
AT43
BH41

BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42

DDPC_HPD_PU

DDPD_HPD_PU

INT_HDMI_HPD_Q

1

R537

R537
*100K/J_4

*100K/J_4

+5V

2

Q52

Q52
2N7002K

2N7002K

DDPC_HPD_PU
DDPD_HPD_PU

INT_HDMI_SCL
INT_HDMI_SDA

INT_HDMI_TXDN2
INT_HDMI_TXDP2
INT_HDMI_TXDN1
INT_HDMI_TXDP1
INT_HDMI_TXDN0
INT_HDMI_TXDP0
INT_HDMI_TXCN
INT_HDMI_TXCP

3

R275 10K/J_4R275 10K/J_4
R253 10K/J_4R253 10K/J_4

SDVO_TVCLKINN

SDVO_TVCLKINP

SDVO_STALLN
SDVO_STALLP

SDVO_CTRLCLK

SDVO_CTRLDATA

LVDS

LVDS

DDPC_CTRLCLK

DDPC_CTRLDATA

Digital Display Interface

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

CRT

CRT

Follow PDG eDP disable guide

Cougar Point (DMI,FDI,PM)

U50C

U50C

D D

C C

B B

Rev.B

EC_PWROK

PM_DRAM_PWRGD

SUS_PWR_ACK

SIO_PWRBTN#

+1.05V_PCH

SUS_PWR_ACK_R

SUSACK#

XDP_DBRST#

SYS_PWROK

EC_PWROK_R

RSMRST#

AC_PRESENT

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

R261 49.9/F_4R261 49.9/F_4
R265 750/F_4R265 750/F_4

R597 *0/J_4R597 *0/J_4
R611 *0/J_4R611 *0/J_4

R691 0/J_4R691 0/J_4
R690 *0/J_4R690 *0/J_4

R689 0/J_4R689 0/J_4

R642 0/J_4R642 0/J_4

R598 0/J_4R598 0/J_4

R632 0/J_4R632 0/J_4

R615 0/J_4R615 0/J_4

PM_DRAM_PWRGD

SUS_PWR_ACK_R DAC_IREF

AC_PRESENT_R

DMI_COMP

DMI_RBIAS

SUSACK#_R

XDP_DBRST#

SYS_PWROK_R

EC_PWROK_R

EC_PWROK_R

APWROK_R

RSMRST#

PM_BATLOW#

PM_RI#

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN#/SUSPWRDNACK/GPIO30

E20

PWRBTN#

H20

ACPRESENT / GPIO31

E10

BATLOW# / GPIO72

A10

RI#

CougarPoint_R1P0

CougarPoint_R1P0

+3V_S5

+3V_S5

+3V_S5

DSW

+3V_S5

+3V_S5

DMI

FDI

DMI

FDI

+3V

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

System Power Management

System Power Management

SLP_LAN# / GPIO29

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7

FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1

DSWVRMEN

DPWROK

+3V_S5

SLP_SUS#

PMSYNCH

FDI_INT

WAKE#

SLP_S4#

SLP_S3#

SLP_A#

BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9

BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9

AW16
AV12
BC10
AV14
BB10

DSWVREN

A18

R638 0/J_4R638 0/J_4

E22

PCIE_WAKE#

B9

CLKRUN#

N3

G8

N14

D10

H4

F4

G10

G16

AP14

K14

R613 0/J_4R613 0/J_4

PCH_SUSCLK

SLP_LAN#

Rev.B

R639 0/J_4R639 0/J_4

DPWROK

T31T31

T28T28

T36T36

T30T30

T32T32

T37T37

FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7

FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7

FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1

PCIE_WAKE#

CLKRUN#

LPC_PD#

T29T29

SLP_S5#

PM_SLP_S4#

SIO_SLP_S3#

SLP_A#

SLP_SUS#

PM_SYNC

RSMRST#

INT_CRT_HSYNC

INT_CRT_VSYNC

R place close to PCH

R566 150/F_4R566 150/F_4
R563 150/F_4R563 150/F_4
R560 150/F_4R560 150/F_4

INT_CRT_BLU
INT_CRT_GRE
INT_CRT_RED

INT_LVDS_BLON

INT_LVDS_VDDEN

INT_LVDS_BRIGHT

INT_EDIDCLK
INT_EDIDDAT

+3V

R283 2.37K/F_4R283 2.37K/F_4

INT_TXLCLKOUTN
INT_TXLCLKOUTP

INT_TXLOUTN0
INT_TXLOUTN1
INT_TXLOUTN2

INT_TXLOUTP0
INT_TXLOUTP1
INT_TXLOUTP2

INT_LVDS_BCLK­INT_LVDS_BCLK+

INT_LVDS_B0­INT_LVDS_B1­INT_LVDS_B2-

INT_LVDS_B0+
INT_LVDS_B1+
INT_LVDS_B2+

INT_CRT_BLU
INT_CRT_GRE
INT_CRT_RED

INT_DDCCLK
INT_DDCDAT

R574 20/F_4R574 20/F_4
R570 20/F_4R570 20/F_4

20ohm for SW;
33ohm for UMA

INT_EDIDCLK
INT_EDIDDAT

R294 2.2K/J_4R294 2.2K/J_4
R295 2.2K/J_4R295 2.2K/J_4

LVD_IBG

T27T27

INT_TXLCLKOUTN
INT_TXLCLKOUTP

INT_TXLOUTN0
INT_TXLOUTN1
INT_TXLOUTN2

INT_TXLOUTP0
INT_TXLOUTP1
INT_TXLOUTP2

INT_CRT_BLU
INT_CRT_GRE
INT_CRT_RED

INT_CRT_HSYNC_R
INT_CRT_VSYNC_R

R289

R289
1K/F_4

1K/F_4

PCH Pull-high/low(CLG) System PWR_OK(CLG)

+3V

CLKRUN#

R569 8.2K/J_4R569 8.2K/J_4

XDP_DBRST#

R572 4.7K_4R572 4.7K_4
R577 *1K/J_4R577 *1K/J_4

RSMRST#

A A

R616 10K/J_4R616 10K/J_4

SYS_PWROK

R692 10K/J_4R692 10K/J_4 C769

3/16 Change topology; 200ohm PU to +3V_S5

PM_RI#
PM_BATLOW#
PCIE_WAKE#
SLP_LAN#
SUS_PWR_ACK
AC_PRESENT

PM_DRAM_PWRGD

5

R594 10K/J_4R594 10K/J_4
R614 8.2K/J_4R614 8.2K/J_4
R593 10K/J_4R593 10K/J_4
R621 *10K/J_4R621 *10K/J_4
R612 10K/J_4R612 10K/J_4
R622 10K/J_4R622 10K/J_4

R413 *200/F_4R413 *200/F_4

+3V_S5

SYS_PWROK

SYS_PWROK

4

U62

U62

4

TC7SH08

TC7SH08

+3V_S5

3 5

C782

C782
*0.1U/10V_4

*0.1U/10V_4

2
1

R688

R688
100K/J_4

100K/J_4

IMVP_PWRGD

EC_PWROK

On Die DSW VR Enable
High = Enable (Default)
Low = Disable

DSWVREN

+3V_RTC

3

R624

R624
330K/J_4

330K/J_4

R625

R625
*330K/J_4

*330K/J_4

DPWROK FOR DSW

Change Rev.C

+3V_S5

+3VPCU

D21

D21

RB500V-40

RB500V-40
D20

D20

*RB500V-40

*RB500V-40

+3V_DSW

Q54

Q54
*PDTC144EU

*PDTC144EU

2

Rev.B

+3VPCU

+3VPCU

R663

R663

R677

R677

*10K_4

*10K_4

*10K_4

*10K_4

DPWROK

3

C769
*0.1U/10V_4

1

Q55

Q55
*2N7002

*2N7002

*0.1U/10V_4

add cap to
timing tune

2

1 3

2

Deep sleep
option

SUS_PWR_ACK

DPWROK

SLP_SUS

To PCH SUSACK#

(Pop R597)
DSWPWRGD
(Pop Q54, R663, Q55, R677)

EC

PROJECT : KL2D

PROJECT : KL2D

PROJECT : KL2D

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Quanta Computer Inc.

Cougar Point 1/6

Cougar Point 1/6

Cougar Point 1/6

Thursday, September 30, 2010 8 48

Thursday, September 30, 2010 8 48

Thursday, September 30, 2010 8 48

1

Not supportSupport

EC or NC
(Non-pop R597)
RSMRST
(Pop R639)

NC

1A

1A

1A

5

RTC Circuitry(RTC)

20mils

R656 *0/J_6R656 *0/J_6

+3V_DSW

+3VPCU

R655 0/J_6R655 0/J_6

+3V_RTC_2
+3V_RTC_1

20MIL

R675

D D

R675
1K/J_4

1K/J_4

20MIL

+3V_RTC_0

BT1

BT1

4

2
1

RTC BATTERY

RTC BATTERY

HDA Bus(CLG)

R582

R582
210/F_4

210/F_4

R634 33/J_4R634 33/J_4
R375 33/J_4R375 33/J_4
R633 33/J_4R633 33/J_4
R604 33/J_4R604 33/J_4

+3V_S5

R351

R351
210/F_4

210/F_4

R352

R352

R324

R324

100/F_4

100/F_4

51/J_4

51/J_4

ACZ_BITCLK

ACZ_SYNC

ACZ_RST#

ACZ_SDOUT

PCH JTAG Debug (CLG)

C C

R581

R581

100/F_4

100/F_4

B B

PCH Dual SPI
(CLG)

PCH_SPI_CS0#
PCH_SPI_CLK

R287 33/J_4R287 33/J_4

PCH_SPI_SI

R281 33/J_4R281 33/J_4

PCH_SPI_SO

R273 33/J_4R273 33/J_4

R542 3.3K/J_4R542 3.3K/J_4

+3V

A A

+3V_RTC

D22

D22

R664 20K/J_4R664 20K/J_4

BAT54C

BAT54C

30mils

R658 20K/J_4R658 20K/J_4

C752

C752
1U/6.3V_4

1U/6.3V_4

To Separate Codec Sync

U49

U49

1

CE#

6

SCK

5

SI

2

SO

3

WP#

SPI Flash Socket

SPI Flash Socket

by PD3

VDD

HOLD#

VSS

8

7
4

ACZ_BITCLK_R

ACZ_SYNC_CODEC

ACZ_RST#_R
ACZ_SDOUT_R

R334

R334
210/F_4

210/F_4

JTAG_TMS
JTAG_TDI
JTAG_TCK
JTAG_TDO

R333

R333
100/F_4

100/F_4

MX25L3205DM2I-12G: AKE39FP0Z00
W25X32VSSIG: AKE39ZP0N00

Socket: DG008000031

PCH_SPI1_CLK_R
PCH_SPI1_SI_R
PCH_SPI1_SO_R

C442

C442
*22P/50V_4

*22P/50V_4

12

J2

J2

C762

C762
1U/6.3V_4

1U/6.3V_4

*SHORT_ PAD1

*SHORT_ PAD1

12

J1

J1

C757

C757
1U/6.3V_4

1U/6.3V_4

*SHORT_ PAD1

*SHORT_ PAD1

1

Q30 2N7002Q30 2N7002

R561 3.3K/J_4R561 3.3K/J_4

RTC_RST#

SRTC_RST#

2

+3V

ACZ_SYNC_RACZ_SYNC_CODEC

3

C721

C721

0.1U/10V_4

0.1U/10V_4

4

PCH2(CLG)

C470

C470

15P/50V/NPO_4

15P/50V/NPO_4

C471

C471

15P/50V/NPO_4

15P/50V/NPO_4

Reserve for RF

ACZ_BITCLK_R

+5V

C814

C814
*33P/50V/NPO_4

*33P/50V/NPO_4

PCH Strap Table

Pin Name

SPKR

GNT3# / GPIO55

INTVRMEN

GNT1# / GPIO51

GPIO19

HDA_SDO

DF_TVS

GPIO28

HDA_SYNC On-Die PLL VR Voltage Select RSMRST

GPIO8

SPI_MOSI

NV_ALE

Strap description

No reboot mode setting PWROK

Top-Block Swap Override

Integrated 1.05V VRM enable ALWAYS Should be always pull-up

Boot BIOS Selection 1 [bit-1]

Boot BIOS Selection 0 [bit-0]

Flash Descriptor Security

DMI/FDI Termination voltage

On-die PLL Voltage Regulator RSMRST#

Integrated Clock Chip Enable

iTPM function Disable APWROK

Intel Anti-Theft HDD protection PWROK 0 = Disable (Internal pull-down 20kohm)

23

4 1

+3V_RTC

+3VPCU

Y2

32.768KHZY232.768KHZ

R629 1M/J_4R629 1M/J_4

ACZ_SDIN0

PCH_SPI_CLK

PCH_SPI_CS0#

R562 *10K/J_4R562 *10K/J_4

PCH_SPI_SI

PCH_SPI_SO

Sampled

PWROK

PWROK

PWROK

RSMRST

PWROK

RSMRST#

3

Cougar Point (HDA,JTAG,SATA)

R347

R347

RTC_X1

10M/J_4

10M/J_4

RTC_X2
RTC_RST#
SRTC_RST#
SM_INTRUDER#
PCH_INVRMEN

ACZ_BITCLK_R
ACZ_SYNC_R
SPKR

SPKR

ACZ_RST#_R

TP27TP27

ACZ_SDOUT_R

TP41TP41
TP26TP26

JTAG_TCK

TP29TP29

JTAG_TMS

TP31TP31

JTAG_TDI

TP33TP33

JTAG_TDO

TP38TP38

PCH_SPI_CLK
PCH_SPI_CS0#
PCH_SPI_CS1#

PCH_SPI_SI
PCH_SPI_SO

Configuration

0 = Default (weak pull-down 20K)
1 = Setting to No-Reboot mode

0 = "top-block swap" mode
1 = Default (weak pull-up 20K)

GNT0#GNT1#

11
00

0 = Override
1 = Default (weak pull-up 20K)

0 = Set to Vss
1 = Set to Vcc (weak pull-down 20K)

0 = Disable
1 = Enable (Default)

0 = Support by 1.8V (weak pull-down)
1 = Support by 1.5V

Should be pull-down
(weak pull-up 20K)

0 = Default (weak pull-down 20K)
1 = Enable

U50A

U50A

A20

RTCX1

C20

RTCX2

D20

RTCRST#

G22

SRTCRST#

K22

INTRUDER#

C17

INTVRMEN

N34

HDA_BCLK

L34

HDA_SYNC

T10

SPKR

K34

HDA_RST#

E34

HDA_SDIN0

G34

HDA_SDIN1

C34

HDA_SDIN2

A34

HDA_SDIN3

A36

HDA_SDO

C36

HDA_DOCK_EN# / GPIO33

N32

HDA_DOCK_RST# / GPIO13

J3

JTAG_TCK

H7

JTAG_TMS

K5

JTAG_TDI

H1

JTAG_TDO

T3

SPI_CLK

Y14

SPI_CS0#

T1

SPI_CS1#

V4

SPI_MOSI

U3

SPI_MISO

CougarPoint_R1P0

CougarPoint_R1P0

Boot Location

SPI

*

LPC

2

C38

FWH0 / LAD0

A38

FWH1 / LAD1

B37

FWH2 / LAD2

C37

FWH3 / LAD3

LPC

LPC

FWH4 / LFRAME#

+3V

LDRQ1# / GPIO23

RTCIHDA

RTCIHDA

+3V

SATA

SATA

+3V_S5

JTAG

JTAG

SATA3RCOMPO

SPI

SPI

+3V

SATA0GP / GPIO21

+3V

SATA1GP / GPIO19

+3V

+3V_RTC

Default weak pull-up on GNT0/1#
[Need external pull-down for LPC BIOS]

+3V_S5

R636 *1K/J_4R636 *1K/J_4

+3V_S5

+3V

LDRQ0#

SERIRQ

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

SATA1RXN

SATA 6G

SATA 6G

SATA1RXP
SATA1TXN
SATA1TXP

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP

SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3COMPI

SATA3RBIAS

SATALED#

R307 *1K/J_4R307 *1K/J_4

R608 *1K/J_4R608 *1K/J_4

R592 330K/J_4R592 330K/J_4

R609 *1K/J_4R609 *1K/J_4
R565 *1K/J_4R565 *1K/J_4

R590 *1K/J_4R590 *1K/J_4

R536 2.2K/J_4R536 2.2K/J_4

R538 1K/F_4R538 1K/F_4

R374 1K/J_4R374 1K/J_4

R282 *1K/J_4R282 *1K/J_4

D36
E36

LCD_BK_OFF

K36
V5

AM3
AM1

SATA_TXN0_C

AP7

SATA_TXP0_C

AP5
AM10

AM8

SATA_TXN1_C

AP11

SATA_TXP1_C

AP10
AD7

AD5
AH5

Remove SATA port 2 12/29

AH4
AB8

AB10

SATA_TXN3_C

AF3

SATA_TXP3_C

AF1
Y7

Y5

SATA_TXN4_C

AD3

SATA_TXP4_C

AD1
Y3

Y1
AB3
AB1

Y11

SATA_COMP

Y10

AB12

SATA3_COMP

AB13

SATA3_RBIAS

AH1

P3
V14

BBS_BIT0

P1

SPKR

PCI_GNT3#

PCH_INVRMEN

BBS_BIT1

BBS_BIT0

ACZ_SDOUT_R

+1.8V

PLL_ODVR_EN

PCH_SPI_SI

C436 0.01U/25V_4C436 0.01U/25V_4
C431 0.01U/25V_4C431 0.01U/25V_4

C425 0.01U/25V_4C425 0.01U/25V_4
C426 0.01U/25V_4C426 0.01U/25V_4

C714 0.01U/25V_4C714 0.01U/25V_4
C712 0.01U/25V_4C712 0.01U/25V_4

C443 0.01U/25V_4C443 0.01U/25V_4
C447 0.01U/25V_4C447 0.01U/25V_4

R292 37.4/F_4R292 37.4/F_4

R288 49.9/F_4R288 49.9/F_4

R550 750/F_4R550 750/F_4

SATA_ACT#

ODD_PRSNT#

DF_TVS
H_SNB_IVB#

ACZ_SYNC_R

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3

LPC_LFRAME#

LPC_DRQ#0

LCD_BK_OFF#
IRQ_SERIRQ

+1.05V_PCH

SATA_RXN0
SATA_RXP0
SATA_TXN0
SATA_TXP0

SATA_RXN1
SATA_RXP1
SATA_TXN1
SATA_TXP1

SATA_RXN3
SATA_RXP3
SATA_TXN3
SATA_TXP3

SATA_RXN4
SATA_RXP4
SATA_TXN4
SATA_TXP4

1

IRQ_SERIRQ
ODD_PRSNT#
LCD_BK_OFF#
SATA_ACT#

SATA SSD

SATA HDD

SATA ODD

ESATA #1

09

R286 8.2K/J_4R286 8.2K/J_4
R290 *10K/J_4R290 *10K/J_4
R302 10K_4R302 10K_4
R564 10K_4R564 10K_4

+3V

PROJECT : KL2D

PROJECT : KL2D

PROJECT : KL2D

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Quanta Computer Inc.

Cougar Point 2/6

Cougar Point 2/6

Cougar Point 2/6

Thursday, September 30, 2010 9 48

Thursday, September 30, 2010 9 48

Thursday, September 30, 2010 9 48

1

1A

1A

1A

5

Cougar Point-M (PCI,USB,NVRAM)

U50E

U50E

BG26

TP1

BJ26

TP2

BH25

TP3

BJ16

TP4

BG16

TP5

AH38

TP6

AH37

TP7

AK43

TP8

AK45

TP9

C18

TP10

N30

TP11

BT_DIS

SIO_EXT_WAKE#

AH12

AM4
AM5

Y13
K24

L24
AB46
AB45

B21

M20
AY16
BG46

BE28
BC30
BE32
BJ32
BC28
BE30
BF32
BG32
AV26
BB26
AU28
AY30
AU26
AY26
AV28

AW30

K40

K38
H38
G38

C46
C44

E40
D47

E42

F46

G42
G40
C42
D44

K10

H49
H43

J48

K42
H40

H3

TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
TP20

TP21
TP22
TP23
TP24

TP25
TP26
TP27
TP28
TP29
TP30
TP31
TP32
TP33
TP34
TP35
TP36
TP37
TP38
TP39
TP40

PIRQA#
PIRQB#
PIRQC#
PIRQD#

REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54

GNT1# / GPIO51
GNT2# / GPIO53
GNT3# / GPIO55

PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5

PME#

C6

PLTRST#

CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4

CougarPoint_R1P0

CougarPoint_R1P0

RSVD

RSVD

PCI

PCI

+3V
+3V
+3V

+3V
+3V
+3V

+3V
+3V
+3V
+3V

D D

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

DGPU_HOLD_RST#

BBS_BIT1

BT_DIS

PCI_GNT3#

R504 *0/J_4R504 *0/J_4

TP42TP42
TP32TP32
R313 22/J_4R313 22/J_4
R356 22/J_4R356 22/J_4
R322 22/J_4R322 22/J_4

DGPU_SELECT#
DGPU_PWR_EN#

BBS_BIT1
PCI_GNT3#

MPC_PWR_CTRL#
ODD_MDDA#_PCH
EXTTS_SNI_DRV0_PCH
EXTTS_SNI_DRV1_PCH

PCI_PLTRST#

CLK_PCI_LPC_R
CLK_PCI_EC_R

DGPU_SELECT#

C C

ODD_MDDA#

SIO_EXT_WAKE#

CLK_PCI_8512

CLK_PCI_FB CLK_PCI_FB_R

CLK_LPC_DEBUG

+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5

RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22

RSVD23
RSVD24

RSVD25
RSVD26

RSVD27
RSVD28

RSVD29

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N

USBP9P
USBP10N
USBP10P

USB

USB

USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P

USBRBIAS#

USBRBIAS

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43

OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14

RSVD1
RSVD2
RSVD3
RSVD4

RSVD5
RSVD6

RSVD7
RSVD8
RSVD9

4

AY7
AV7
AU3
BG4

AT10
BC8

AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6

NV_ALE

AV5
AV10

AT8
AY5

BA2
AT12

BF3

C24
A24
C25
B25

USBP2-

C26

USBP2+

A26

USBP3-

K28

USBP3+

H28

USBP4-

E28

USBP4+

D28

USBP5-

C28

USBP5+

A28
C29
B29
N28
M28

USBP8-

L30

USBP8+

K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32

USB_BIAS

C33

B33

USB_OC0#

A14

USB_OC1#

K20

USB_OC2#

B17

USB_OC3#

C16

USB_OC4#

L16

USB_OC5#

A16

USB_OC6#

D14

USB_OC7#

C14

TP24TP24

USBP1­USBP1+
USBP0­USBP0+
USBP2­USBP2+
USBP3­USBP3+
USBP4­USBP4+
USBP5­USBP5+

USBP8­USBP8+
USBP6­USBP6+
USBP7­USBP7+
USBP9­USBP9+

R321 22.6/F_4R 321 22.6/F_4

USB_OC0#
USB_OC1#
USB_OC2#

USB/eSATA Combo #1
BlueTooth
CCD on LVDS
WLAN
WWAN
USB #1

Mini Card
USB #2
USB #3

EHCI1

EHCI2

WLAN

LAN

Card Reader

MiniWLAN

Express Card

Card Reader

Card Reader

3

LAN

TV

KE3E Rev.B

KE3E Rev.B

PCIE_RX1­PCIE_RX1+
PCIE_TX1­PCIE_TX1+

PCIE_RXN6_LAN

PCIE_RXP6_LAN

PCIE_TXN6_LAN

PCIE_TXP6_LAN

PCIE_RX3­PCIE_RX3+
PCIE_TX3­PCIE_TX3+

PCIE_RX4­PCIE_RX4+
PCIE_TX4­PCIE_TX4+

Rev.B change to port 2

PCIE_RXN7_CARD
PCIE_RXP7_CARD
PCIE_TXN7_CARD
PCIE_TXP7_CARD

PCIE_CLKREQ_WLAN#

C418 0.1U/10V/X5R_4C418 0.1U/10V/X5R_4
C417 0.1U/10V/X5R_4C417 0.1U/10V/X5R_4

C430 0.1U/10V_4C430 0.1U/10V_4
C427 0.1U/10V_4C427 0.1U/10V_4

C421 0.1U/10V/X5R_4C421 0.1U/10V/X5R_4
C422 0.1U/10V/X5R_4C422 0.1U/10V/X5R_4

C420 0.1U/10V/X5R_4C420 0.1U/10V/X5R_4
C419 0.1U/10V/X5R_4C419 0.1U/10V/X5R_4

C423 0.1U/10V_4C423 0.1U/10V_4

CLK_PCIE_WLANN
CLK_PCIE_WLANP

CLK_PCIE_CADN
CLK_PCIE_CADP

PCIE_CLKREQ_CAD#

CLK_PCH_SRC3_N
CLK_PCH_SRC3_P

CLK_PCIE_REQ3#

CLK_PCH_SRC4_N
CLK_PCH_SRC4_P

CARD_CLK_REQ#

CLK_PCH_SRC5_N
CLK_PCH_SRC5_P

CLK_PCIE_REQ4#

CLK_PCIE_LANN
CLK_PCIE_LANP

PCIE_CLKREQ_LAN#

CLK_PCH_ITPN
CLK_PCH_ITPP

2

Cougar Point-M (PCI-E,SMBUS,CLK)

U50B

U50B

BG34

PERN1

PCIE_TXN1_C
PCIE_TXP1_C

PCIE_TXN6_LAN_C
PCIE_TXP6_LAN_C

PCIE_TXN3_C
PCIE_TXP3_C

PCIE_TXN4_C
PCIE_TXP4_C

TP40TP40
TP44TP44
TP45TP45
TP46TP46

PCIE_TXN7_C
PCIE_TXP7_C

CLK_PCIE_REQ4#

PCIECLKRQ_PEG#

TP47TP47
TP48TP48

PCIECLKRQ6#

PCIE_CLKREQ_REV1#

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0# / GPIO73

AB49

CLKOUT_PCIE1N

AB47

CLKOUT_PCIE1P

M1

PCIECLKRQ1# / GPIO18

AA48

CLKOUT_PCIE2N

AA47

CLKOUT_PCIE2P

V10

PCIECLKRQ2# / GPIO20

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4# / GPIO26

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5# / GPIO44

AB42

CLKOUT_PEG_B_N

AB40

CLKOUT_PEG_B_P

E6

PEG_B_CLKRQ# / GPIO56

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6# / GPIO45

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7# / GPIO46

AK14

CLKOUT_ITPXDP_N

AK13

CLKOUT_ITPXDP_P

CougarPoint_R1P0

CougarPoint_R1P0

+3V_S5

PCI-E*

PCI-E*

+3V_S5

+3V

+3V

+3V_S5

+3V_S5

+3V_S5

+3V_S5

+3V_S5

+3V_S5

+3V_S5

CLOCKS

CLOCKS

+3V_S5

+3V_S5

SMBALERT# / GPIO11

SML0ALERT# / GPIO60

SMBUSController

SMBUSController

SML1ALERT# / PCHHOT# / GPIO74

+3V_S5

SML1CLK / GPIO58

+3V_S5

SML1DATA / GPIO75

Link

Link

PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_A_N
CLKOUT_PEG_A_P

CLKOUT_DMI_N
CLKOUT_DMI_P

CLKOUT_DP_N
CLKOUT_DP_P

CLKIN_GND1_N
CLKIN_GND1_P

CLKIN_DOT_96N
CLKIN_DOT_96P

CLKIN_SATA_N
CLKIN_SATA_P

CLKIN_PCILOOPBACK

+3V

CLKOUTFLEX0 / GPIO64

+3V

CLKOUTFLEX1 / GPIO65

+3V

CLKOUTFLEX2 / GPIO66

+3V

CLKOUTFLEX3 / GPIO67

FLEX CLOCKS

FLEX CLOCKS

SMBCLK

SMBDATA

SML0CLK

SML0DATA

CL_CLK1

CL_DATA1

CL_RST1#

CLKIN_DMI_N
CLKIN_DMI_P

REFCLK14IN

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

SMBALERT#

E12

SMB_PCH_CLK

H14

SMB_PCH_DAT

C9

DRAMRST_CNTRL_PCH

A12

SMB_ME0_CLK

C8

SMB_ME0_DAT

G12

SML1ALERT#_R

C13

SMB_ME1_CLK

E14

SMB_ME1_DAT

M16

CL_CLK1

M7

CL_DAT1

T11

CL_RST#

P10

PEG_CLKREQ#

M10

AB37
AB38

AV22
AU22

AM12
AM13

CLK_BUF_PCIE_3GPLLN

BF18

CLK_BUF_PCIE_3GPLLP

BE18

CLK_BUF_BCLKN

BJ30

CLK_BUF_BCLKP

BG30

CLK_BUF_DREFCLKN

G24

CLK_BUF_DREFCLKP

E24

CLK_BUF_DREFSSCLKN

AK7

CLK_BUF_DREFSSCLKP

AK5

CLK_PCH_14M

K45

CLK_PCI_FB

H45

XTAL25_IN

V47

XTAL25_OUT

V49

XCLK_RCOMP

Y47

GPIO64

K43

CLK_FLEX1

F47

GPIO66

H47

GPIO54_PATCH_TP

K49

1

SMB_PCH_CLK
SMB_PCH_DAT

DRAMRST_CNTRL_PCH

TP35TP35

For EC

TP34TP34

TP28TP28

TP30TP30C424 0.1U/10V_4C424 0.1U/10V_4

CLK_PCIE_VGAN
CLK_PCIE_VGAP

CLK_CPU_BCLKN
CLK_CPU_BCLKP

CLK_DPLL_SSCLKN
CLK_DPLL_SSCLKP

R552 90.9/F_4R 552 90.9/F_4

27Mz support DIS only

R331 0/J_4R331 0/J_4
R336 *22/J_4R336 *22/J_4
R348 0/J_4R348 0/J_4

Rev. C

+1.05V_PCH

DIS_BULE_LED#
CLK_27M_VGA
RF_ON#

TP49TP49

R584

R584
1M/J_4

1M/J_4

C725 18P/50V_4C725 18P/50V_4

21

Y4
25MHzY425MHz

C723 18P/50V_4C723 18P/50V_4

10

DGPU Power ON

+3V

B B

GFXON

PLTRST#(CLG)

PCI_PLTRST#

A A

GPU RST#(CLG)

PLTRST#
DGPU_HOLD_RST#

R623

R623
100K/J_4

100K/J_4

TC7SH08FU(F)

TC7SH08FU(F)

+3V_S5

2
1

U53

U53

3 5

TC7SH08FU

TC7SH08FU

R589 *0_4R589 *0_4

+3V

2
1

U54

U54

3 5

TC7SH08FU

TC7SH08FU

R370 *0_4R370 *0_4

4

U27

U27

4

4

PLTRST#

+3V

C726

C726

0.1U/10V_4

0.1U/10V_4

PLTRST#

C734

C734

0.1U/10V_4

0.1U/10V_4

5

53

1
2

PLTRST#

R602

R602
100K/J_4

100K/J_4

PLTRST#

R635 *0_4R635 *0_4

DGPU_PWR_EN

GPU_RST#

MAINON

GPU_RST#

ME2N7002E

ME2N7002E

PCI/USBOC# Pull-up(CLG)

+3V_S5

R603

R603

10

USB_OC4#

9

USB_OC1#

8

USB_OC2#

7 4

USB_OC3#

10KX8

10KX8

+3V

MPC_PWR_CTRL#
BT_DIS
DGPU_PWR_EN#

ODD_MDDA#

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

10

9
8
7 4

R349 8.2K/J_4R 349 8.2K/J_4
R606 8.2K/J_4R 606 8.2K/J_4
R338 8.2K/J_4R 338 8.2K/J_4
R346 8.2K/J_4R 346 8.2K/J_4

R618

+3V

R360

R360
1K_4

1K_4

3

DGPU_PWR_EN#

2

Q28

Q28

1

USB_OC6#

1

USB_OC0#

2

USB_OC7#

3

USB_OC5#

56

R329

R329

EXTTS_SNI_DRV0_PCH

1

EXTTS_SNI_DRV1_PCH

2

DGPU_HOLD_RST#

3

DGPU_SELECT#

56

10KX8

10KX8

+3V

4

PEG CLK detect

SW: Stuff
UMA: Non-Stuff

ME2N7002E

ME2N7002E

MPC Switch Control

MPC_PWR_CTRL#

MPC_PWR_CTRL#

PEG_CLKREQ#

3

2

Q29

Q29

1

Low = MPC ON
High = MPC OFF (Default)

R320 *1K/J_4R320 *1K/J_4

3

GFXPG

SMBus(CLK)

Ra

PEG_CLKREQ#

3

3

PCIE_CLKREQ_CAD#
CLK_PCIE_REQ3#

PCIECLKRQ_PEG#
CLK_PCIE_REQ4#
CARD_CLK_REQ#

PCIE_CLKREQ_WLAN#
PCIE_CLKREQ_REV1#
PCIE_CLKREQ_LAN#
PCIECLKRQ6#

PEG_CLKREQ#

R309 10K/J_4R309 10K/J_4

Rb

R266 10K/J_4R266 10K/J_4
R268 10K/J_4R268 10K/J_4

R271 10K/J_4R271 10K/J_4
R272 10K/J_4R272 10K/J_4
R311 10K/J_4R311 10K/J_4
R316 10K/J_4R316 10K/J_4
R278 10K/J_4R278 10K/J_4
R277 10K/J_4R277 10K/J_4
R303 10K/J_4R303 10K/J_4

SMB_PCH_DAT SMB_RUN_DAT

CLK_REQ/Strap Pin(CLG) SMBus/Pull-up(CLG)

+3V

R304 10K/J_4R 304 10K/J_4
R291 10K/J_4R 291 10K/J_4

+3V_S5

R340 10K/J_4R 340 10K/J_4
R317 10K/J_4R 317 10K/J_4
R588 10K/J_4R 588 10K/J_4

R579 10K/J_4R 579 10K/J_4
R343 10K/J_4R 343 10K/J_4
R330 10K/J_4R 330 10K/J_4
R573 10K/J_4R 573 10K/J_4

R312 *10K/J_4R312 *10K/J_4

SW:Rb
UMA:Ra

CLK_BUF_BCLKN
CLK_BUF_BCLKP

CLK_BUF_PCIE_3GPLLN
CLK_BUF_PCIE_3GPLLP
CLK_BUF_DREFCLKN
CLK_BUF_DREFCLKP
CLK_BUF_DREFSSCLKN
CLK_BUF_DREFSSCLKP
CLK_PCH_14M

CLOCK TERMINATION for FCIM

R618

4.7K/J_4

4.7K/J_4

2

SMB_RUN_DAT

1

Q53

Q53
2N7002K

2N7002K

+3V

R358

R358

4.7K/J_4

4.7K/J_4

2

SMB_RUN_CLK

Q27

Q27
2N7002K

2N7002K

1

KE3E Rev.B

2

SMB_RUN_CLKSMB_PCH_CLK

+3V_S5

R342 1K/J_4R342 1K/J_4
R341 10K/J_4R 341 10K/J_4

R345 2.2K/J_4R 345 2.2K/J_4
R591 2.2K/J_4R 591 2.2K/J_4
R339 2.2K/J_4R 339 2.2K/J_4
R344 2.2K/J_4R 344 2.2K/J_4
R354 10K/J_4R 354 10K/J_4

MB_CLK1

MB_DATA1

3

3

DRAMRST_CNTRL_PCH
SMBALERT#

SMB_PCH_CLK
SMB_PCH_DAT
SMB_ME0_CLK
SMB_ME0_DAT
SML1ALERT#_R

+3V_S5

R696

R696

2.2K/J_4

2.2K/J_4

2

SMB_ME1_CLK

1

Q58

Q58
2N7002K

2N7002K

+3V_S5

R695

R695

2.2K/J_4

2.2K/J_4

2

SMB_ME1_DAT

1

Q57

Q57
2N7002K

2N7002K

PROJECT : KL2D

PROJECT : KL2D

PROJECT : KL2D

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Cougar Point 3/6

Cougar Point 3/6

Cougar Point 3/6

Date: Sheet of

Thursday, September 30, 2010 10 48

Date: Sheet of

Thursday, September 30, 2010 10 48

Date: Sheet of

Thursday, September 30, 2010 10 48

1

1A

1A

1A

5

4

3

2

1

Cougar Point (GPIO,VSS_NCTF,RSVD)

U50F

U50F

S_GPIO

R627 100_4R627 100_4

EC_EXT_SMI#

D D

check VR_ON GPIO

C C

B B

DGPU_PW ROK

A A

R319 100K/J_4R319 100K/J_4

FDI TERMINATION
VOLTAGE OVERRIDE

U25

U25

TC7SH08FU(F)

TC7SH08FU(F)

R357 *0_4R357 *0_4

4

FDI_OVRVLTG SDD_DA_DSS BIOS_REC

EC_EXT_SCI#

WLAN_OFF#

TP39TP39

DGPU_PW ROK

WWAN_OFF#

PLL_ODVR_EN

BT_ON#

SDD_DA_DSS

TEMP_ALERT#

+3V

53

1
2

R318 *1K/F_4R318 *1K/F_4

LOW - Tx, Rx terminated
to same voltage

5

EC_EXT_SMI#
BOARD_ID1
EC_EXT_SCI#
SYSTEM_ID

BOARD_ID0

BIOS_REC

R619 0/J_4R619 0/J_4

GPIO27

R637 0/J_4R637 0/J_4

STP_PCI#

BT_ON#

SDD_DA_DSS

MFG_MODE
DGPU_PRSNT#
TEST_SET_UP

SV_DET

HWPG
GFXPG

DMI TERMINATION
VOLTAGE OVERRIDE

HOST_ALERT#1_R

WWAN_OFF#_R

PLL_ODVR_EN_R

FDI_OVRVLTG

T7

BMBUSY# / GPIO0

A42

TACH1 / GPIO1

H36

TACH2 / GPIO6

E38

TACH3 / GPIO7

C10

GPIO8

C4

LAN_PHY_PWR_CTRL / GPIO12

G2

GPIO15

U2

SATA4GP / GPIO16

D40

TACH0 / GPIO17

T5

SCLOCK / GPIO22

E8

GPIO24 / MEM_LED

E16

GPIO27

P8

GPIO28

K1

STP_PCI# / GPIO34

K4

GPIO35

V8

SATA2GP / GPIO36

M5

SATA3GP / GPIO37

N2

SLOAD / GPIO38

M3

SDATAOUT0 / GPIO39

V13

SDATAOUT1 / GPIO48

V3

SATA5GP / GPIO49

D6

GPIO57

A4

VSS_NCTF_1

A44

VSS_NCTF_2

A45

VSS_NCTF_3

A46

VSS_NCTF_4

A5

VSS_NCTF_5

A6

VSS_NCTF_6

B3

VSS_NCTF_7

B47

VSS_NCTF_8

BD1

VSS_NCTF_9

BD49

VSS_NCTF_10

BE1

VSS_NCTF_11

BE49

VSS_NCTF_12

BF1

VSS_NCTF_13

BF49

VSS_NCTF_14

CougarPoint_R1P0

CougarPoint_R1P0

R293 200K/F_4R293 200K/F_4

Low = Tx, Rx terminated to
same voltage (DC Coupling Mode)
(DEFAULT)

4

+3V_S5

+3V_S5

DSW
+3V_S5

+3V

+3V_S5

+3V
+3V
+3V
+3V

+3V
+3V
+3V
+3V

+3V_S5

+3V

+3V

+3V

GPIO

GPIO

+3V_S5

+3V

+3V

+3V
+3V

+3V
+3V

+3V

NCTF

NCTF

+3V+3V +3V

TACH4 / GPIO68
TACH5 / GPIO69
TACH6 / GPIO70
TACH7 / GPIO71

A20GATE

PECI

RCIN#

PROCPWRGD

THRMTRIP#

INIT3_3V#

DF_TVS

CPU/MISC

CPU/MISC

TS_VSS1
TS_VSS2
TS_VSS3
TS_VSS4

NC_1

VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
VSS_NCTF_32

BIOS RECOVERY

C40
B41
C41

BOARD_ID2

A40

P4

PCH_PECI_TP

AU16

EC_RCIN#

P5
AY11

PCH_THRMTRIP#

AY10
T14
AY1

AH8
AK11
AH10
AK10

P37

3/16 Connected to GND
DG rev0.9

BG2
BG48
BH3
BH47
BJ4
BJ44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49

SGPIO

S_GPIO

R361 10K/J_4R361 10K/J_4
R362 *0/J_4R362 *0/J_4

High = Disable (Default)
Low = Enable

3

TP25TP25

R269 390/J_4R269 390/J_4

R628 10K/J_4R628 10K/J_4
R626 *0/J_4R626 *0/J_4

SSD_DETECT#
EXPRCRD_PWREN#
SATA_ODD_PWR_EN

EC_A20GATE

EC_RCIN#
H_PWRGOOD
PM_THRMTRIP#

DF_TVS

Model

Reserve

UMA

Muxless

Discrete

Reserve

Reserve

Reserve

TEST_SET_UP

+3V

HOST_ALERT#1_R

Intel ME Crypto Transport Layer
Security (TLS) cipher suite

Low = Disable (Default)
High = Enable

0

0

0

0

1

1

1

High = Strong (Default)

MFG-TEST

MFG_MODE

R567 10K/J_4R567 10K/J_4
R568 *0/J_4R568 *0/J_4

0

1

1

0

0

1

SV_SET_UP

R296 10K/J_4R296 10K/J_4
R298 *0/J_4R298 *0/J_4

R583 1K/J_4R583 1K/J_4

2

GPIO Pull-up/Pull-down(CLG)

0526
Danny

0526
Danny

BOARD_ID0BOARD_ID1BOARD_ID2

00

1

0

1

0

1

0

+3V_S5

+3V

+3V

R599 *10K/J_4R599 *10K/J_4

R558 10K/J_4R558 10K/J_4
R299 10K/J_4R299 10K/J_4
R350 10K/J_4R350 10K/J_4

+3V

+3V

R571 *10K/J_4R571 *10K/J_4

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Thursday, September 30, 2010 11 48

Date: Sheet of

Thursday, September 30, 2010 11 48

Date: Sheet of

Thursday, September 30, 2010 11 48

WLAN_OFF#
WWAN_OFF#_R

EC_EXT_SMI#
EC_EXT_SCI#
SSD_DETECT#
STP_PCI#
EC_A20GATE
EC_RCIN#
TEMP_ALERT#
BT_ON#
DGPU_PW ROK

SATA_ODD_PWR_EN

GPIO27
DGPU_PW ROK

SV_DET

BOARD_ID0
BOARD_ID1
BOARD_ID2

R596 *10K/J_4R596 *10K/J_4

SYSTEM_ID

SYSTEM_ID:
KL2 serious=>0
KL3 serious=>1

SWITCHABLE

R575

No Stuff

PROJECT : KL2D

PROJECT : KL2D

PROJECT : KL2D

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Cougar Point 4/6

Cougar Point 4/6

Cougar Point 4/6

R8490 R8489

DGPU_PRSNT#

1

11

R585 10K/J_4R585 10K/J_4
R610 10K/J_4R610 10K/J_4

R607 10K/J_4R607 10K/J_4
R644 10K/J_4R644 10K/J_4
R600 10K/J_4R600 10K/J_4
R578 10K/J_4R578 10K/J_4
R308 10K/J_4R308 10K/J_4
R310 10K/J_4R310 10K/J_4
R553 10K/J_4R553 10K/J_4
R580 10K/J_4R580 10K/J_4
R620 *10K/J_4R620 *10K/J_4

R605 10K/J_4R605 10K/J_4

R631 10K/J_4R631 10K/J_4
R617 100K/J_4R617 100K/J_4

R586 100K/J_4R586 100K/J_4

R557 *10K/J_4R557 *10K/J_4
R305 *10K/J_4R305 *10K/J_4
R601 *10K/J_4R601 *10K/J_4

R595 10K/J_4R595 10K/J_4

UMA

R571Stuff

R575 100K/J_4R575 100K/J_4

+3V_S5

+3V

+3V

+3V_S5

1A

1A

1A

5

4

3

2

1

PCH5(CLG)

+5V_S5
+3V_S5

+5V
+3V

+3V_S5

+3V

+1.05V_PCH

12

COUGAR POINT (POWER)

POWER

POWER

U50G

+1.05V_PCH +1.05V_PCH_VCC

R284 0.002/F_1206R284 0.002/F_ 1206

D D

+1.05V_PCH +1.05V_VCCAPLL_EXP

+1.05V_PCH +1.05V_VCCIO

C C

B B

+1.05V_PCH_VCCDPLL_EXP+1.05V_PCH

R530 0/J_6R530 0/J_6

L46 *1uH/25mA_6L46 *1uH/25mA_ 6

R247 0.002/F_1206R247 0.002/F_ 1206

VccCORE =1.3 A(60mils)

C444

C444

C441

C441

1U/6.3V_4

1U/6.3V_4

1U/6.3V_4

1U/6.3V_4

C688

C688
*10U/6.3V_6

*10U/6.3V_6

VccIO =2.925 A(140mils)

C428

C428

C434

C434

1U/6.3V_4

1U/6.3V_4

1U/6.3V_4

1U/6.3V_4

C433

C433
1U/6.3V_4

1U/6.3V_4

R534 0/J_8R534 0/J_8

+VCCAFDI_VRM

+1.05V_PCH

R540 0/J_6R540 0/J_6

+1.5V

R543 *0/J_6R543 *0/J_6

+1.05V_VTT

C440

C440

C445

C445

1U/6.3V_4

1U/6.3V_4

10U/6.3V_6

10U/6.3V_6

C438

C438
1U/6.3V_4

1U/6.3V_4

C435

C435
10U/6.3V_6

10U/6.3V_6

+3V_VCC_EXP+3V

C697

C697

0.1U/10V_4

0.1U/10V_4

+VCCAFDI_VRM

R532 *0/J_8R53 2 *0/J_8

+1.05V_VCCAPLL_FDI

R531 0/J_8R531 0/J_8

+1.05V_VCCDPLL_FDI

+1.05V_VTT

+VCCAFDI_VRM

VCCVRM: 1.8V (Destop) 02/20 del for Pre-ES1

1.5V (Mobile)

AA23
AC23
AD21
AD23

AF21

AF23
AG21
AG23
AG24
AG26
AG27
AG29

AJ23

AJ26

AJ27

AJ29

AJ31

AN19

BJ22

AN16
AN17

AN21
AN26
AN27

AP21

AP23

AP24

AP26

AT24

AN33
AN34

BH29

AP16

BG6

AP17

AU20

U50G

VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]
VCCCORE[16]
VCCCORE[17]

VCCIO[28]

VCCAPLLEXP

VCCIO[15]
VCCIO[16]

VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]
VCCIO[21]
VCCIO[22]
VCCIO[23]
VCCIO[24]

VCCIO[25]
VCCIO[26]

VCC3_3[3]

VCCVRM[2]

VccAFDIPLL

VCCIO[27]

VCCDMI[2]

CougarPoint_R1P0

CougarPoint_R1P0

U48

VCCADAC

U47

VSSADAC

CRTLVDS

CRTLVDS

AK36

VCCALVDS

AK37

DMI

DMI

DFT / SPI HVCMOS

DFT / SPI HVCMOS

VSSALVDS

VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]

VCC3_3[6]

VCC3_3[7]

VCCVRM[3]

VCCDMI[1]

VCCCLKDMI

VCCDFTERM[1]

VCCDFTERM[2]

VCCDFTERM[3]

VCCDFTERM[4]

VCCSPI

AM37
AM38
AP36
AP37

V33

V34

AT16

AT20

AB36

AG16

AG17

AJ16

AJ17

V1

VCC CORE

VCC CORE

VCCIO

VCCIO

FDI

FDI

VccADAC =1mA(8mils)

R554

R554
*0/J_6

*0/J_6

VccALVDS=1mA(8mils)

VccTX_LVDS=60mA(10mils)

C700

C700

0.01U/25V_4

0.01U/25V_4

R353 0/J_6R353 0/J_6

C469

C469

0.1U/10V_4

0.1U/10V_4

+VCCAFDI_VRM

C715

C715

C713

C713

*10U/6.3V_6

*10U/6.3V_6

1U/6.3V_4

1U/6.3V_4

R267 0/J_8R267 0/J_8

C439

C439

0.1U/10V_4

0.1U/10V_4

R556 0/J_6R556 0/J_6

C719

C719
1U/6.3V_4

1U/6.3V_4

C718

C718

0.01U/25V_4

0.01U/25V_4

C701

C701

0.01U/25V_4

0.01U/25V_4

+3V+3V_VCC_GIO

+VCCAFDI_VRM

L49 *1 0uH_8L49 *10u H_8

+1.8V+VCCP_NAND

+3V+3V_VCCME_SPI

+VCCA_DAC_1_2

L51 18 0ohm/5AL51 180ohm/5A

C716

C716

C717

C717

0.1U/10V_4

0.1U/10V_4

10U/6.3V_6

10U/6.3V_6

+VCCALVDS +3V

R279 SW@0/J_4R279 SW@0/J_4

Ra

R280 *DIS@0/J_4R280 *DIS@0/J_4

L47 SW@0.1u H_8L47 SW@0.1uH_8

Rb

R541 *DIS@0/J_4R541 *DIS@0/J_4

C703

C703
22U/6.3V_8

22U/6.3V_8

DIS SW

Ra

0 ohm NA
0 ohm

Rb NA

VCCDMI = 42mA(10mils)

R274 0/J_4R274 0/J_4

C432

C432
1U/6.3V_4

1U/6.3V_4

VCCCLKDMI = 20mA(8mils)

+VCC_DMI_CCI +1.05V_VTT+1.1V_VCC_DMI_CCI

R548 *1/F_4R548 *1/F_4
R551 0/J_4R551 0/J_4

VCCPNAND = 190 mA(15mils)

VCCSPI = 20mA(8mils)

+3V

+1.8V+VCC_TX_LVDS

+1.05V_VTT+1.1V_VCC_DMI

1mA(8mils)

VCCRTC<1mA(8mils)

BOM confirm

+3V_S5

+3V_DSW

+1.05V_PCH

L43 *1 0uH/100mA_8L43 *10uH/100 mA_8

VCCME(+1.05V) = ??A(??mils)

+1.05V_PCH

R587 0.002/F_1206R587 0.002/F_ 1206

+1.05V_PCH

R545 0/J_6R545 0/J_6

R549 0/J_6R549 0/J_6

R547 0/J_6R547 0/J_6

+1.05V_PCH

R297 *0/J_6R297 *0/J_6

+1.05V_VTT

R533 0/J_4R533 0/J_4

+3V_RTC

R335 0/J_4R335 0/J_4
R337 *0/J_4R33 7 *0/J_4

+VCCAPLL_CPY_PCH

C684

C684
*10U/6.3V_6

*10U/6.3V_6

+1.05V_VCCEPW

VccASW =1.01 A(60mils)

C448

C448
1U/6.3V_4

1U/6.3V_4

C704

C704
1U/6.3V_4

1U/6.3V_4

C711

C711
1U/6.3V_4

1U/6.3V_4

C706

C706
1U/6.3V_4

1U/6.3V_4

C459

C459
*1U/6.3V_4

*1U/6.3V_4

C693

C693

4.7U/6.3V_6

4.7U/6.3V_6

C729

C729
1U/6.3V_4

1U/6.3V_4

+1.05V_PCH

VCCDSW3_3= 3mA

C452

C452

0.1U/10V_4

0.1U/10V_4

+1.05V_PCH

C453

C453
1U/6.3V_4

1U/6.3V_4

C446

C446
22U/6.3V_8

22U/6.3V_8

VCCDIFFCLKN= 55mA(10mils)
VCCSSC= 95mA(10mils)

C694

C694

0.1U/10V_4

0.1U/10V_4

C728

C728

0.1U/10V_4

0.1U/10V_4

R285 *0/J_8R28 5 *0/J_8

R539 0/J_6R539 0/J_6

C455

C455
1U/6.3V_4

1U/6.3V_4

C454

C454
22U/6.3V_8

22U/6.3V_8

C457 0.1U/10V_4C457 0.1U/10V_4

+VCCAFDI_VRM

65mA(10mils)
8mA(8mils)

C451 0.1U/10V_4C451 0.1U/10V_4

C695

C695

0.1U/10V_4

0.1U/10V_4

C727

C727

0.1U/10V_4

0.1U/10V_4

C450

C450
*0.1U/10V_4

*0.1U/10V_4

C415

C415
*1U/6.3V_4

*1U/6.3V_4

+VCCACLK

+VCCPDSW

PCH_VCCDSW

+3V_SUS_CLKF33

+VCCDPLL_CPY

+VCCSUS1

+VCCRTCEXT

+VCCAFDI_VRM

+1.05V_VCCA_A_DPL
+1.05V_VCCA_B_DPL

+VCCDIFFCLK
+VCCDIFFCLKN

+V1.05V_SSCVCC

+VCCSST

+V1.05M_VCCSUS

+VTT_VCCPCPU

Cougar Point-M (POWER)

POWER

POWER

U50J

U50J

AD49

T16

V12

T38

BH23

AL29

AL24

AA19
AA21
AA24
AA26
AA27
AA29

AA31
AC26
AC27
AC29
AC31
AD29
AD31

W21
W23
W24
W26
W29
W31
W33

N16

Y49

BD47
BF47

AF17

AF33

AF34
AG34

AG33

V16

T17

V19

BJ8

A22

VCCACLK

VCCDSW3_3

DCPSUSBYP

VCC3_3[5]

VCCAPLLDMI2
VCCIO[14]

DCPSUS[3]

VCCASW[1]
VCCASW[2]
VCCASW[3]
VCCASW[4]
VCCASW[5]
VCCASW[6]
VCCASW[7]
VCCASW[8]
VCCASW[9]
VCCASW[10]
VCCASW[11]
VCCASW[12]
VCCASW[13]
VCCASW[14]
VCCASW[15]
VCCASW[16]
VCCASW[17]
VCCASW[18]
VCCASW[19]
VCCASW[20]

DCPRTC

VCCVRM[4]

VCCADPLLA
VCCADPLLB

VCCIO[7]
VCCDIFFCLKN[1]
VCCDIFFCLKN[2]
VCCDIFFCLKN[3]

VCCSSC

DCPSST

DCPSUS[1]
DCPSUS[2]

V_PROC_IO

VCCRTC

CougarPoint_R1P0

CougarPoint_R1P0

Clock and Miscellaneous

Clock and Miscellaneous

CPURTC

CPURTC

PCI/GPIO/LPCMISC

PCI/GPIO/LPCMISC

SATA USB

SATA USB

HDA

HDA

VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]

VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]

VCCSUS3_3[10]

VCCSUS3_3[6]

VCCIO[34]

V5REF_SUS

DCPSUS[4]

VCCSUS3_3[1]

V5REF

VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]

VCC3_3[1]
VCC3_3[8]
VCC3_3[4]

VCC3_3[2]

VCCIO[5]

VCCIO[12]
VCCIO[13]

VCCIO[6]

VCCAPLLSATA

VCCVRM[1]

VCCIO[2]
VCCIO[3]
VCCIO[4]

VCCASW[22]

VCCASW[23]

VCCASW[21]

VCCSUSHDA

N26
P26
P28
T27
T29

+3V_VCCPUSB

T23
T24
V23
V24

+3V_VCCAUBG

P24

+VCCAUPLL

T26

+5V_PCH_VCC5REFSUS

M26

+VCCA_USBSUS

AN23

+3V_VCCPSUS

AN24

+5V_PCH_VCC5REF

P34

N20
N22

+3V_VCCPSUS

P20
P22

AA16

+3V_VCCPCORE

W16
T34

+3V

C708

C708

0.1U/10V_4

0.1U/10V_4

AJ2

AF13

+V1.05S_SATA3

AH13
AH14

AF14

+V1.1LAN_VCCAPLL

AK1

VCCVRM= 114mA(15mils)

+VCCAFDI_VRM

AF11

+1.05V_VCCIO1

AC16
AC17

C449

C449
1U/6.3V_4

1U/6.3V_4

AD17

+1.05V_VCCEPW

T21

V21

T19

+V3.3A_1.5A_HDA_IO

P32

C731

C731
*1U/6.3V_4

*1U/6.3V_4

R300 0/J_6R300 0/J_6

C437

C437
*1U/6.3V_4

*1U/6.3V_4

L48 *10uH/100mA_8L48 *10uH/100mA_8
C707

C707
*10U/6.3V_6

*10U/6.3V_6

R276 0/J_6R276 0/J_6

VCCME = 1.01A(60mils)

R630 *0 /J_4R630 *0/J_4
R640 0 /J_4R640 0/J_4

C730

C730

0.1U/10V_4

0.1U/10V_4

+1.05V_PCH+1.05V_VCCUSBCORE

R641 0/J_8R641 0/J_8

C736

C736
1U/6.3V_4

1U/6.3V_4

VCCSUS3_3 = 119mA(15mils)

+3V_S5

R323 0/J_6R323 0/J_6

C460

C460

0.1U/10V_4

0.1U/10V_4

R643 0/J_6R643 0/J_6

C735

C735

0.1U/10V_4

0.1U/10V_4

+1.05V_VTT

VCC5REFSUS=1mA

R364 10/F_4R364 10/F_4

D9 RB500V-40D9 RB500V-40

C478

C478

0.1U/10V_4

0.1U/10V_4

V5REF= 1mA

R328 10/F_4R328 10/F_4

D5 RB500V-40D5 RB500V-40

C463

C463
1U/6.3V_4

1U/6.3V_4

R315 0/J_6R315 0/J_6

VCCSUS3_3 = 119mA(15mils)

C461

C461
1U/10V_4

1U/10V_4

R301 0/J_6R301 0/J_6

VCCPCORE = 28mA(10mils)

C456

C456

0.1U/10V_4

0.1U/10V_4

+3V

C458

C458

0.1U/10V_4

0.1U/10V_4
R270 0/J_8R270 0/J_8

C429

C429
1U/10V_4

1U/10V_4

??mA(??mils)

+1.05V_PCH

+1.05V_PCH

+1.5V_SUS
+3V_S5

VCCSUSHDA= 10mA(8mils)

L45 10 uH/100mAL45 10uH/100mA

+1.05V_PCH

+3V

R559 *0/J_6R55 9 *0/J_6
R555 1 /F_4R555 1/F_4

A A

5

4

+3V_SUS_CLKF33_R +3V_SUS_CLKF33

3

L50 10 uH/100mA_8L50 10uH/100mA_8

C720

C720
10U/6.3V_6

10U/6.3V_6

C722

C722
1U/10V_4

1U/10V_4

2

L44 10 uH/100mAL44 10uH/100mA

+

+

C692

C692
220U/2.5V_3528

220U/2.5V_3528

+

+

C690

C690
220U/2.5V_3528

220U/2.5V_3528

+1.05V_VCCA_A_DPL

C698

C698
1U/6.3V_4

1U/6.3V_4

+1.05V_VCCA_B_DPL

C696

C696
1U/6.3V_4

1U/6.3V_4

PROJECT : KL2D

PROJECT : KL2D

PROJECT : KL2D

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Cougar Point 5/6

Cougar Point 5/6

Cougar Point 5/6

Date: Sheet of

Thursday, September 30, 2010 12 48

Date: Sheet of

Thursday, September 30, 2010 12 48

Date: Sheet of

Thursday, September 30, 2010 12 48

1

1A

1A

1A

5

4

3

2

1

PCH6(CLG)

13

U50I

U50I

AY4

VSS[159]

IBEX PEAK-M (GND)

D D

U50H

U50H

H5

VSS[0]

AA17

VSS[1]

AA2

VSS[2]

AA3

VSS[3]

AA33

VSS[4]

AA34

VSS[5]

AB11

VSS[6]

AB14

VSS[7]

AB39

VSS[8]

AB4

VSS[9]

AB43

VSS[10]

AB5

VSS[11]

AB7

VSS[12]

AC19

VSS[13]

AC2

VSS[14]

AC21

VSS[15]

AC24

VSS[16]

AC33

VSS[17]

AC34

VSS[18]

AC48

C C

B B

A A

5

AD10
AD11
AD12
AD13
AD19
AD24
AD26
AD27
AD33
AD34
AD36
AD37
AD38
AD39

AD40
AD42
AD43
AD45
AD46

AF10

AF12
AD14
AD16

AF16

AF19

AF24

AF26

AF27

AF29

AF31

AF38

AF42

AF46

AG19
AG31

AG48
AH11

AH36
AH39
AH40
AH42
AH46

AJ19

AJ21

AJ24

AJ33

AJ34
AK12

AD4

AD8
AE2
AE3

AF4

AF5
AF7
AF8

AG2

AH3

AH7

AK3

VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]

CougarPoint_R1P0

CougarPoint_R1P0

VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]

VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]

AK38
AK4
AK42
AK46
AK8
AL16
AL17
AL19
AL2
AL21
AL23
AL26
AL27
AL31
AL33
AL34
AL48
AM11
AM14
AM36
AM39
AM43
AM45
AM46
AM7
AN2
AN29
AN3
AN31
AP12
AP19
AP28
AP30
AP32
AP38
AP4
AP42
AP46
AP8
AR2
AR48
AT11
AT13
AT18
AT22
AT26
AT28
AT30
AT32
AT34
AT39
AT42
AT46
AT7
AU24
AU30
AV16
AV20
AV24
AV30
AV38
AV4
AV43
AV8
AW14
AW18
AW2
AW22
AW26
AW28
AW32
AW34
AW36
AW40
AW48
AV11
AY12
AY22
AY28

4

AY42
AY46

AY8

BB12
BB16
BB20
BB22
BB24
BB28
BB30
BB38

BB4

BB46
BC14
BC18

BC2
BC22
BC26
BC32
BC34
BC36
BC40
BC42
BC48
BD46

BD5

BE22
BE26
BE40
BF10
BF12
BF16
BF20
BF22
BF24
BF26
BF28

BD3

BF30
BF38
BF40

BF8
BG17
BG21
BG33
BG44

BG8
BH11
BH15
BH17
BH19

H10
BH27
BH31
BH33
BH35
BH39
BH43

BH7

D12

D16

D18

D22

D24

D26

D30

D32

D34

D38

D42

G18

G20

G26

G28

G36

G48

H12

H18

H22

H24

H26

H30

H32

H34

B11
B15
B19
B23
B27
B31
B35
B39

B7

F45

D3

D8
E18
E26

F3

VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]

CougarPoint_R1P0

CougarPoint_R1P0

3

VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]

H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28

PROJECT : KL2D

PROJECT : KL2D

PROJECT : KL2D

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Quanta Computer Inc.

Cougar Point 6/6

Cougar Point 6/6

Cougar Point 6/6

Thursday, September 30, 2010 13 48

Thursday, September 30, 2010 13 48

Thursday, September 30, 2010 13 48

1

1A

1A

1A

5

DDR_STD(DDR)

M_A_A[15:0]

D D

M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_CS#0
M_A_CS#1
M_A_CLKP0
M_A_CLKN0
M_A_CLKP1
M_A_CLKN1
M_A_CKE0
M_A_CKE1
M_A_CAS#
M_A_RAS#

R215 10K/J_4R215 10K/J_4
R230 10K/J_4R230 10K/J_4

M_A_WE#

SMB_RUN_CLK
SMB_RUN_DAT

M_A_ODT0
M_A_ODT1

02/23 Remove 0ohm to GND

C C

M_A_DQSP[7:0]

M_A_DQSN[7:0]

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

DIMM0_SA0
DIMM0_SA1

M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7

98
97
96
95
92
91
90
86
89
85

107

84
83

119

80
78

109
108

79
114
121
101
103
102
104

73

74
115
110
113
197
201
202
200

116
120

11

28

46

63
136
153
170
187

12

29

47

64
137
154
171
188

10

27

45

62
135
152
169
186

4

JDIM2A

JDIM2A

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA

ODT0
ODT1

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

DDR3-DIMM0_H=4_STD_LTS

DDR3-DIMM0_H=4_STD_LTS

(204P)

(204P)

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

3

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9

M_A_DQ5

7

M_A_DQ7

15

M_A_DQ6

17

M_A_DQ1

4

M_A_DQ0

6

M_A_DQ3

16

M_A_DQ2

18

M_A_DQ9

21

M_A_DQ8

23

M_A_DQ15

33

M_A_DQ10

35

M_A_DQ12

22

M_A_DQ13

24

M_A_DQ11

34

M_A_DQ14

36

M_A_DQ21

39

M_A_DQ16

41

M_A_DQ19

51

M_A_DQ18

53

M_A_DQ20

40

M_A_DQ17

42

M_A_DQ22

50

M_A_DQ23

52

M_A_DQ25

57

M_A_DQ24

59

M_A_DQ30

67

M_A_DQ26

69

M_A_DQ28

56

M_A_DQ29

58

M_A_DQ31

68

M_A_DQ27

70

M_A_DQ36

129

M_A_DQ37

131

M_A_DQ34

141

M_A_DQ38

143

M_A_DQ32

130

M_A_DQ33

132

M_A_DQ35

140

M_A_DQ39

142

M_A_DQ41

147

M_A_DQ45

149

M_A_DQ47

157

M_A_DQ46

159

M_A_DQ40

146

M_A_DQ44

148

M_A_DQ42

158

M_A_DQ43

160

M_A_DQ49

163

M_A_DQ48

165

M_A_DQ54

175

M_A_DQ55

177

M_A_DQ53

164

M_A_DQ52

166

M_A_DQ51

174

M_A_DQ50

176

M_A_DQ61

181

M_A_DQ60

183

M_A_DQ62

191

M_A_DQ63

193

M_A_DQ56

180

M_A_DQ57

182

M_A_DQ59

192

M_A_DQ58

194

M_A_DQ4

5

M_A_DQ[63:0]

SMDDR_VREF_DQ0_M3

FOX

LTK

SUY

MLX

Standard 4H type:DDR-C-2013289-204p

SMDDR_VREF_DQ0_M3

STD 4H

DGMK4000004

DGMK4000011

DDR3_DRAMRST#

R100 0/J_6R100 0/J_6
R106 *0/J_6R106 *0/J_6

STD 8H

DGMK4000097

DGMK4000080

R212 10K/J_4R212 10K/J_4

+3V

2

+1.5V_SUS

2.48A

+3V

PM_EXTTS#0

+SMDDR_VREF_DQ0SMDDR_VREF_DQ0_M1
+SMDDR_VREF_DIMM

JDIM2B

JDIM2B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

DDR3-DIMM0_H=4_STD_LTS

DDR3-DIMM0_H=4_STD_LTS

1

44

VSS16

48

VSS17

49

VSS18

54

VSS19

55

VSS20

60

VSS21

61

VSS22

65

VSS23

66

VSS24

71

VSS25

72

VSS26

127

VSS27

128

VSS28

133

VSS29

134

VSS30

138

VSS31

139

VSS32

144

VSS33

145

VSS34

150

VSS35

151

VSS36

155

VSS37

156

VSS38

161

VSS39

162

VSS40

167

VSS41

168

VSS42

172

VSS43

173

VSS44

178

VSS45

179

VSS46

184

VSS47

185

VSS48

189

VSS49

190

VSS50

195

VSS51

196

VSS52

(204P)

(204P)

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

VTT1
VTT2

GND
GND

203
204

205
206

14

+0.75V_DDR_VTT

Place these Caps near So-Dimm0.

+1.5V_SUS

C302

C302
10U/6.3V_6

Rev. B Remove M2 schematic

B B

VREF DQ0 M1 Solution

A A

+SMDDR_VREF

5

4

R92 *0/J_6R92 *0/J_6

3

C267

C267
10U/6.3V_6

10U/6.3V_6

+3V

10U/6.3V_6

C375

C375

2.2U/6.3V_6

2.2U/6.3V_6

+1.5V_SUS

C303

C303
10U/6.3V_6

10U/6.3V_6

SMDDR_VREF_DQ0_M1

C295

C295
10U/6.3V_6

10U/6.3V_6

C351

C351

0.1u/10V_4

0.1u/10V_4

R94

R94
1K/F_4

1K/F_4

R95

R95
1K/F_4

1K/F_4

C282

C282
10U/6.3V_6

10U/6.3V_6

C274

C274
10U/6.3V_6

10U/6.3V_6

+0.75V_DDR_VTT

C357

C357
1U/6.3V_4

1U/6.3V_4

C290

C290
*10U/6.3V_6

*10U/6.3V_6

C147

C147

0.1u/10V_4

0.1u/10V_4

C260

C260
1U/10V_4

1U/10V_4

C358

C358
1U/6.3V_4

1U/6.3V_4

2

C277

C277
1U/10V_4

1U/10V_4

C301

C301
1U/10V_4

1U/10V_4

+

+

C285

C285
330U/2V_7343

330U/2V_7343

C309

C309
1U/10V_4

1U/10V_4

0.1u/10V_4

0.1u/10V_4

C359

C359

C363

C363
1u/6.3V_4

1u/6.3V_4

+SMDDR_VREF

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

C361

C361

1U/6.3V_4

1U/6.3V_4

10U/6.3V_6

10U/6.3V_6

R161 *0/J_6R161 *0/J_6

PROJECT : KL2D

PROJECT : KL2D

PROJECT : KL2D

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

DDRIII SO-DIMM-0

DDRIII SO-DIMM-0

DDRIII SO-DIMM-0

Thursday, September 30, 2010 14 48

Thursday, September 30, 2010 14 48

Thursday, September 30, 2010 14 48

C221

C221
10U/6.3V_8

10U/6.3V_8

+SMDDR_VREF_DIMM

C314

C314

2.2U/6.3V_6

2.2U/6.3V_6

C362

C362

*10U/6.3V_6

*10U/6.3V_6

+1.5V_SUS

R159

R159
10K/J_4

10K/J_4

+SMDDR_VREF_DIMM

C236

C236
10U/6.3V_8

10U/6.3V_8

C316

C316

R163

R163
10K/J_4

10K/J_4

C158

C158

0.1u/10V_4

0.1u/10V_4

C317

C317
470P/50V_4

470P/50V_4

1

+SMDDR_VREF_DQ0

C154

C154

2.2U/6.3V_6

2.2U/6.3V_6

1A

1A

1A

5

DDR_RVS(DDR)

M_B_A[15:0]

D D

M_B_BS#0
M_B_BS#1
M_B_BS#2
M_B_CS#0
M_B_CS#1
M_B_CLKP0
M_B_CLKN0
M_B_CLKP1
M_B_CLKN1
M_B_CKE0
M_B_CKE1
M_B_CAS#
M_B_RAS#

R527 10K/J_4R527 10K/J_4
R528 10K/J_4R528 10K/J_4

+3V

C C

02/23 Remove 0ohm to GND

M_B_WE#

SMB_RUN_CLK
SMB_RUN_DAT SMDDR_VREF_DQ1_M3

M_B_ODT0
M_B_ODT1

M_B_DQSP[7:0]

M_B_DQSN[7:0]

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

DIMM1_SA0
DIMM1_SA1 +SMDDR_VREF_DQ1

M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7
M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

10

DQS#0

27

DQS#1

45

DQS#2

62

DQS#3

135

DQS#4

152

DQS#5

169

DQS#6

186

DQS#7

DDR3-DIMM1_H=8_STD_MLX

DDR3-DIMM1_H=8_STD_MLX

JDIM1A

JDIM1A

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

4

M_B_DQ5

5

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46

(204P)

(204P)

DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

M_B_DQ4

7

M_B_DQ3

15

M_B_DQ2

17

M_B_DQ0

4

M_B_DQ1

6

M_B_DQ6

16

M_B_DQ7

18

M_B_DQ12

21

M_B_DQ13

23

M_B_DQ14

33

M_B_DQ10

35

M_B_DQ8

22

M_B_DQ9

24

M_B_DQ11

34

M_B_DQ15

36

M_B_DQ20

39

M_B_DQ21

41

M_B_DQ18

51

M_B_DQ22

53

M_B_DQ17

40

M_B_DQ16

42

M_B_DQ19

50

M_B_DQ23

52

M_B_DQ25

57

M_B_DQ29

59

M_B_DQ27

67

M_B_DQ26

69

M_B_DQ28

56

M_B_DQ24

58

M_B_DQ31

68

M_B_DQ30

70

M_B_DQ36

129

M_B_DQ37

131

M_B_DQ35

141

M_B_DQ34

143

M_B_DQ33

130

M_B_DQ32

132

M_B_DQ39

140

M_B_DQ38

142

M_B_DQ44

147

M_B_DQ40

149

M_B_DQ42

157

M_B_DQ43

159

M_B_DQ45

146

M_B_DQ41

148

M_B_DQ46

158

M_B_DQ47

160

M_B_DQ49

163

M_B_DQ48

165

M_B_DQ54

175

M_B_DQ55

177

M_B_DQ52

164

M_B_DQ53

166

M_B_DQ51

174

M_B_DQ50

176

M_B_DQ61

181

M_B_DQ60

183

M_B_DQ62

191

M_B_DQ63

193

M_B_DQ57

180

M_B_DQ56

182

M_B_DQ59

192

M_B_DQ58

194

M_B_DQ[63:0]

3

DDR3_DRAMRST#

SMDDR_VREF_DQ1_M1
SMDDR_VREF_DQ1_M3

R117 0/J_6R117 0/J_6
R500 *0/J_6R500 *0/J_6

2

2.48A

R220 10K/J_4R220 10K/J_4

+3V

PM_EXTTS#0

+SMDDR_VREF_DIMM

+3V

+1.5V_SUS

JDIM1B

JDIM1B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

DDR3-DIMM1_H=8_STD_MLX

DDR3-DIMM1_H=8_STD_MLX

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

(204P)

(204P)

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

VTT1
VTT2

GND
GND

1

15

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

203
204

205
206

+0.75V_DDR_VTT

Rev. B Remove M2 schematic

B B

+1.5V_SUS

C278

C278
10u/6.3V_6

10u/6.3V_6

A A

Place these Caps near So-Dimm1.

C271

C271

C283

C283

C291

10U/6.3V_6

10U/6.3V_6

C291
10U/6.3V_6

10U/6.3V_6

C287

C287
10U/6.3V_6

10U/6.3V_6

+0.75V_DDR_VTT

C300

C300
*10U/6.3V_6

*10U/6.3V_6

C373

C373
1U/6.3V_4

1U/6.3V_4

+3V

10U/6.3V_6

10U/6.3V_6

C353

C353

2.2U/6.3V_6

2.2U/6.3V_6

C266

C266
10U/6.3V_6

10U/6.3V_6

C348

C348

0.1u/10V_4

0.1u/10V_4

VREF DQ1 M1 Solution

+SMDDR_VREF

R120 *0/J_6R120 *0/J_6

5

C286

C286
1U/10V_4

1U/10V_4

C652

C652
1U/10V_4

1U/10V_4

C682

C682
1U/6.3V_4

1U/6.3V_4

+1.5V_SUS

R121

R121
1K/F_4

1K/F_4

SMDDR_VREF_DQ1_M1

R115

R115
1K/F_4

1K/F_4

C650

C650
1U/10V_4

1U/10V_4

C269

C269
1U/10V_4

1U/10V_4

C678

C678
1U/6.3V_4

1U/6.3V_4

C164

C164

0.1u/10V_4

0.1u/10V_4

+SMDDR_VREF_DIMM

C311

C311

C315

C372

C372

C315

2.2U/6.3V_6

2.2U/6.3V_6

C254

C254
10U/6.3V_8

10U/6.3V_8

C374

C374
1U/6.3V_4

1U/6.3V_4

C253

C253
10U/6.3V_8

10U/6.3V_8

C371

C371

10U/6.3V_6

10U/6.3V_6

0.1u/10V_4

0.1u/10V_4

*10U/6.3V_6

*10U/6.3V_6

STD 4H

FOX

LTK

DGMK4000004

SUY

MLX

DGMK4000011

Standard 8H type:DDR-C-2013310-204p-1

4

+SMDDR_VREF_DQ1

C617

C617

2.2U/6.3V_6

2.2U/6.3V_6

0.1u/10V_4

0.1u/10V_4

STD 8H

DGMK4000097

DGMK4000080

C618

C618

PROJECT : KL2D

PROJECT : KL2D

PROJECT : KL2D

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

Quanta Computer Inc.

DDRIII SO-DIMM-1

DDRIII SO-DIMM-1

DDRIII SO-DIMM-1

Thursday, September 30, 2010 15 48

Thursday, September 30, 2010 15 48

Thursday, September 30, 2010 15 48

1

1A

1A

1A