Lenovo E220s Schematics

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1 1

Compal Confidential

2 2

LA7041- Edge Schematics Document

Intel Sandy Bridge Processor with DDRIII + Cougar Point PCH

3 3

2010-10-05

REV:0.2

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/08/01 2010/08/01

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Cover Page

<Doc>

E

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0.2

of

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Compal confidential

File Name : LA-7041 Edge 12+

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http://hobi-elektronika.net

1 1

Sandy Bridge ULV

Intel

BGA1023

Single Channel

DDR3-1333(1.5V)

DDR3-SO-DIMM X1

Page 10

31mm*24mm

HDMI Connector

HDMI

Page 4~9

Page21

FDI

DMI

2Channel Speaker

Page 23

CRT Connector

Page29

2 2

LVDS Connector

Page 20

RGB

LVDS

PCI-E

Intel Cougar Point

FCBGA 989

USB2.0

HDA

Audio Codec

CX20671 CODEC

Page 23

CMOS Camera

Digital MIC

Page 20

Audio combo Jack

Page 29

Page 20

25mm*25mm

Card Reader

JBM 389

Page29

SPI ROM BIOS 4M

Realtek

3 3

RTL8111E(Giga)

Page 29

RJ45 CONN

Page 29

PCI Express Mini card Slot 1

WLAN/WiMAX

Page 29

Track Point

USB(WiMAX)

PCI-E(WLAN)

Page 28

Page 12

G-Sensor

Page 25

Touch Pad

ENE KBC930

Page 28

HM65

EC

Page 11~19

LPC BUS

Page 24

SATA

LED

Page 30

Int.KBD

Page 28

SPI ROM

128K

Page 26

BlueTooth CONN

USB PORT 2.0 x2

Finger Printer

Page 27

Page 29

Page 30

eSATA and USB CONN

SATA3.0 HDD CONN

Page 27

Page 29

4 4

PCI Express Mini card Slot 2

WWAN

SIM Card

Page 32

A

Page 32

USB

SATA

Fintek 75303

B

Page 25

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/03/24 2008/04/

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

MB Block Diagram

240Wednesday, November 03, 2010

of

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0.2

Thermal Sensor

A

Voltage Rails

B

C

D

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http://hobi-elektronika.net

BOARD ID Table

+5VS

power plane

1 1

State

S0

S3

S5 S4/AC

S5 S4/ Battery only

2 2

S5 S4/AC & Battery don't exist

STATE

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

3 3

SIGNAL

Full ON

+B

O

X

SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS

HIGH HIGH HIGH

LOW

+5VALW

+3VALW

O

X

XX X

HIGH

LOWLOW

HIGH

+1.5V

O

XX

X

ON

ON ON

ON

ONONOFF

ON

OFF

OFFLOW LOW LOW

EC SM Bus1 address

Device

Smart Battery

Address Address

0001 011X b

+3VS

+1.8VS

+1.5VS

+1.05VS

+VGFX_CORE

+CPU_CORE

+0.75VS

+1.5VS_DISVGA

+1.0VS

+NVVDD

OO

X

OFF

EC SM Bus2 address

Device

PCH

Thermal sensor

G sensor

1001 0110 b

1001 1110 b

0111 0010 b

Board ID

0 1 2 3 4 5 6 7

PCB Revision

USB Port Table

USB 2.0 USB 1.1 Port

0 1 2 3 4 5 6 7 8

9 10 11 12 13

EHCI1

EHCI2

UHCI0

UHCI1

UHCI2

UHCI3

UHCI4

UHCI5

UHCI6

BOM Structure Table

Structure Function

CPU1@ CPU2@ CPU3@ CPU4@

3G@

PCB@ SV@ ULV@

CPU type CPU type CPU type CPU type 3G Sim card

M/B SV CAP ULV CAP

nomsata@

PCH SM Bus address

Device Address

DDR DIMM0

DDR DIMM2

EEPROM(U32)

0.1

0.2

3 External USB Port

USB_COMBO

USB_PORT

NO USE NO USE WWAN CAMERA

HM65 not support HM65 not support

WLAN

USB_CHARGER

NO USE NO USE FINGER-PRINTER BLUETOOTH

1010 0000b

1010 0100b

1010 100xb

BTO Option Table

BTO Item BOM Structure

3G

Unpop

ZZZ1

PCB@

LA-7041P

DA80000LG00

@

UCPU1

CPU2@

ULV1.4G

SA00004H900

UCPU1

CPU3@

SV2.5G

SA00004EL00

UCPU1

CPU4@

SV2.7G

SA00004F000

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/08/01 2010/08/01

Compal Secret Data

Deciphered Dat e

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

<Doc>

Notes List

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+1.05VS

12

R6

24.9_0402_1%

UCPU1A

D D

DMI_CRX_PTX_N013 DMI_CRX_PTX_N113 DMI_CRX_PTX_N213 DMI_CRX_PTX_N313

DMI_CRX_PTX_P013 DMI_CRX_PTX_P113 DMI_CRX_PTX_P213 DMI_CRX_PTX_P313

DMI_CTX_PRX_N013 DMI_CTX_PRX_N113 DMI_CTX_PRX_N213 DMI_CTX_PRX_N313

DMI_CTX_PRX_P013 DMI_CTX_PRX_P113 DMI_CTX_PRX_P213 DMI_CTX_PRX_P313

12

FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7

FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7

FDI_FSYNC0 FDI_FSYNC1

FDI_INT

FDI_LSYNC0 FDI_LSYNC1

+EDP_COM

FDI_CTX_PRX_N013 FDI_CTX_PRX_N113 FDI_CTX_PRX_N213 FDI_CTX_PRX_N313 FDI_CTX_PRX_N413 FDI_CTX_PRX_N513

C C

B B

FDI_CTX_PRX_N613 FDI_CTX_PRX_N713

FDI_CTX_PRX_P013 FDI_CTX_PRX_P113 FDI_CTX_PRX_P213 FDI_CTX_PRX_P313 FDI_CTX_PRX_P413 FDI_CTX_PRX_P513 FDI_CTX_PRX_P613 FDI_CTX_PRX_P713

FDI_FSYNC013 FDI_FSYNC113

FDI_INT13

FDI_LSYNC013 FDI_LSYNC113

+1.05VS

1 2

R7 24.9_0402_1%

R19 1K_0402_5%

@

UCPU1A

M2

DMI_RX#[0]

P6

DMI_RX#[1]

P1

DMI_RX#[2]

P10

DMI_RX#[3]

N3

DMI_RX[0]

P7

DMI_RX[1]

P3

DMI_RX[2]

P11

DMI_RX[3]

K1

DMI_TX#[0]

M8

DMI_TX#[1]

N4

DMI_TX#[2]

R2

DMI_TX#[3]

K3

DMI_TX[0]

M7

DMI_TX[1]

P4

DMI_TX[2]

T3

DMI_TX[3]

U7

FDI0_TX#[0]

W11

FDI0_TX#[1]

W1

FDI0_TX#[2]

AA6

FDI0_TX#[3]

W6

FDI1_TX#[0]

V4

FDI1_TX#[1]

Y2

FDI1_TX#[2]

AC9

FDI1_TX#[3]

U6

FDI0_TX[0]

W10

FDI0_TX[1]

W3

FDI0_TX[2]

AA7

FDI0_TX[3]

W7

FDI1_TX[0]

T4

FDI1_TX[1]

AA3

FDI1_TX[2]

AC8

FDI1_TX[3]

AA11

FDI0_FSYNC

AC12

FDI1_FSYNC

U11

FDI_INT

AA10

FDI0_LSYNC

AG8

FDI1_LSYNC

AF3

eDP_COM PIO

AD2

eDP_ICOMPO

AG11

eDP_HP D

AG4

eDP_AUX#

AF4

eDP_AUX

AC3

eDP_TX#[0]

AC4

eDP_TX#[1]

AE11

eDP_TX#[2]

AE7

eDP_TX#[3]

AC1

eDP_TX [0]

AA4

eDP_TX [1]

AE10

eDP_TX [2]

AE6

eDP_TX [3]

SANDY-BRIDGE_BGA1023~D

PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8] PEG_RX#[9]

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]

PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]

PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]

G3 G1 G4

H22 J21 B22 D21 A19 D17 B14 D13 A11 B10 G8 A8 B6 H8 E5 K7

K22 K19 C21 D19 C19 D16 C13 D12 C11 C9 F8 C8 C5 H6 F6 K6

G22 C23 D23 F21 H19 C17 K15 F17 F14 A15 J14 H13 M10 F10 D9 J4

F22 A23 D24 E21 G19 B18 K17 G17 E14 C15 K13 G13 K10 G10 D8 K4

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

DMI Intel(R) FDI DP

PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

PEG_TX#[10] PEG_TX#[11] PEG_TX#[12]

PCI EXPRESS -- GRAPHICS

PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]

PEG_COMP

PEG_ICOMPI and RCOMPO signals should be shorted and routed with - max length = 500 mils - typical impedance = 43 mohms PEG_ICOMPO signals should be routed with - max length = 500 mils

- typical impedance = 14.5 mohms

UCPU1I

BG17

VSS[181]

BG21

VSS[182]

BG24

VSS[183]

BG28

VSS[184]

BG37

VSS[185]

BG41

VSS[186]

BG45

VSS[187]

BG49

VSS[188]

BG53

VSS[189]

BG9

VSS[190]

C29

VSS[191]

C35

VSS[192]

C40

VSS[193]

D10

VSS[194]

D14

VSS[195]

D18

VSS[196]

D22

VSS[197]

D26

VSS[198]

D29

VSS[199]

D35

VSS[200]

D4

VSS[201]

D40

VSS[202]

D43

VSS[203]

D46

VSS[204]

D50

VSS[205]

D54

VSS[206]

D58

VSS[207]

D6

VSS[208]

E25

VSS[209]

E29

VSS[210]

E3

VSS[211]

E35

VSS[212]

E40

VSS[213]

F13

VSS[214]

F15

VSS[215]

F19

VSS[216]

F29

VSS[217]

F35

VSS[218]

F40

VSS[219]

F55

VSS[220]

G48

VSS[221]

G51

VSS[222]

G6

VSS[223]

G61

VSS[224]

H10

VSS[225]

H14

VSS[226]

H17

VSS[227]

H21

VSS[228]

H4

VSS[229]

H53

VSS[230]

H58

VSS[231]

J1

VSS[232]

J49

VSS[233]

J55

VSS[234]

K11

VSS[235]

K21

VSS[236]

K51

VSS[237]

K8

VSS[238]

L16

VSS[239]

L20

VSS[240]

L22

VSS[241]

L26

VSS[242]

L30

VSS[243]

L34

VSS[244]

L38

VSS[245]

L43

VSS[246]

L48

VSS[247]

L61

VSS[248]

M11

VSS[249]

M15

VSS[250]

SANDY-BRIDGE_BGA1023~D

VSS

VSS[251] VSS[252] VSS[253] VSS[254] VSS[255] VSS[256] VSS[257] VSS[258] VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301]

VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8 VSS_NCTF_9

VSS_NCTF_10

NCTF

VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14

M4 M58 M6 N1 N17 N21 N25 N28 N33 N36 N40 N43 N47 N48 N51 N52 N56 N61 P14 P16 P18 P21 P58 P59 P9 R17 R20 R4 R46 T1 T47 T50 T51 T52 T53 T55 T56 U13 U8 V20 V61 W13 W15 W18 W21 W46 W8 Y4 Y47 Y58 Y59

A5 A57 BC61 BD3 BD59 BE4 BE58 BG5 BG57 C3 C58 D59 E1 E61

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/06 2011/07/06

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PROCESSOR(1/6) DMI,FDI,PEG

LA-7041P

1

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UCPU1B

PROC_DETECT (Processor Detect): pulled to ground on the processor package. There is no connection to the processor silicon for this signal. System board designers may use this

D D

C C

signal to determine if the processor is present

H_PROCHOT#24

R26

H_CPUPWRGD_R

H_CPUPWRGD16

1 2

0_0402_5%

R13

62_0402_5%

1 2

+1.05VS

1 2

R28

R28 10K_0402_5%

10K_0402_5%

H_PM_SYNC13

H_SNB_IVB#15

R11 10K_0402_5%

H_PECI16,24 H_DRAMRST# 6

H_THRMTRIP#16

VDDPWRGOOD

@

12

T1PAD~D @T1PAD~D @

R15

1 2

56_0402_5%

R23

1 2

0_0402_5%

R29

1 2

130_0402_1%

R14

1 2

0_0402_5%

H_PROCHOT#_R

H_THERMTRIP#

VDDPWRGOOD_R

BUF_CPU_RST#

H_CATERR#

H_PM_SYNC_R

H_PECI_ISO

F49

PROC_SELECT#

C57

PROC_DETECT #

C49

CATERR#

A48

PECI

C45

PROCHOT#

D45

THERMTRIP#

C48

PM_SYNC

B46

UNCOREPWRGOOD

BE45

SM_DRAMPWROK

D44

RESET#

SANDY-BRIDGE_BGA1023~D

MISC THERMAL PWR MANAGEMENT

DPLL_REF_CLK

DPLL_REF_CLK#

BCLK_ITP

CLOCKS

BCLK_ITP#

SM_DRAMRST#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

DDR3

MISC

DDR3

MISC

BPM#[0] BPM#[1] BPM#[2]

JTAG & BPM

BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]

CLK_CPU_DMI_R

J3

BCLK

CLK_CPU_DMI#_R

H2

BCLK#

R9 1K_0402_5%R9 1K_0402_5%

AG3

R10 1K_0402_5%R10 1K_0402_5%

AG1

N59 N58

H_DRAMRST#

AT30

SM_RCOMP0

BF44

SM_RCOMP1

BE43

SM_RCOMP2

BG43

DDR3 Compensation Signals

XDP_PRDY#

N53

PRDY#

XDP_PREQ#

N55

PREQ#

XDP_TCK

L56

TCK

XDP_TMS

L55

TMS

XDP_TRST#

J58

TRST#

XDP_TDI

M60

TDI

XDP_TDO

L59

TDO

XDP_DBRESET#

K58

DBR#

XDP_BPM#0

G58

XDP_BPM#1

E55

XDP_BPM#2

E59

XDP_BPM#3

G55

XDP_BPM#4

G59

XDP_BPM#5

H60

XDP_BPM#6

J59

XDP_BPM#7

J61

12 12

1 2 1 2 1 2

+3VS

R833_0402_5% R833_0402_5%

R1233_0402_5% R1233_0402_5%

R16140_0402_1% R16140_0402_1% R1725.5_0402_1% R1725.5_0402_1% R18200_0402_1% R18200_0402_1%

12

R27

R27 1K_0402_5%

1K_0402_5%

1 2 1 2

DG1.0

+1.05VS

XDP_DBRESET# 11,13

CLK_CPU_DMI 12 CLK_CPU_DMI# 12

XDP_TMS

R20 51_0402_5%R20 51_0402_5%

XDP_TDI

R21 51_0402_5%R21 51_0402_5%

XDP_TDO

R22 51_0402_5%R22 51_0402_5%

XDP_TCK

R24 51_0402_5%R24 51_0402_5%

XDP_TRST#

R25 51_0402_5%R25 51_0402_5%

+1.05VS

12 12 12

12 12

PU/PD for JTAG signals

+3VALW

0.1U_0402_16V4Z

+3VS

PM_DRAM_PWRGD13

B B

A A

5

R31

10K_0402_5%

1 2

2

1

B

2

A

SUSP9,31,38

U1

5

P

PM_SYS_PWRGD_BUF

4

O

G

74AHC1G09GW_TSSOP5

3

SUSP

1

C33

0.1U_0402_16V4Z

+1.5V_CPU_VDDQ

12

R30

R30 200_0402_5%

200_0402_5%

75_0402_5%

C247

@

12

75_0402_5%

R34

43_0402_5%

1 2

12

R33

@R33

@

39_0402_5%

13

D

Q3

@

Q3

@

2

2N7002_SOT23

G

S

BUF_CPU_RST# BUFO_CPU_RST#

0.1U_0402_16V4Z

4

Buffered reset to CPU

+1.05VS

0.1U_0402_16V4Z

12

R32

SN74LVC1G07DCKR_SC70-5

+3VS

1

C34

2

5

U2

1

P

NC

4

Y

3

PLT_RST#

2

A

G

3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PLT_RST# 15

2010/07/06 2011/07/06

H_CPUPWRGD16

+1.05VS

PLT_RST#15

Compal Secret Dat a

Deciphered Dat e

2

PBTN_OUT#11,13,24 XDP_CFG07 SYS_PWROK13 CLK_XDP_CLK12 CLK_XDP_CLK#12

H_CPUPWRGD

PLT_RST# XDP_DBRESET#

XDP_TDO XDP_TRST# XDP_TDI XDP_TMS

XDP_TCK

XDP_PREQ# XDP_PRDY#

PBTN_OUT#

R52 1K_0402_1%@R52 1K_0402_1%@

1 2

R53 0_0402_5%@R53 0_0402_5%@

1 2

R54 1K_0402_1%@R54 1K_0402_1%@

1 2

R284 0_0402_5%@R284 0_0402_5%@

1 2

R285 0_0402_5%@R285 0_0402_5%@

1 2

R286 0_0402_5%@R286 0_0402_5%@

1 2

R55 1K_0402_1%@R55 1K_0402_1%@

1 2

Title

PROCESSOR(2/6) PM,XDP,CLK

Size Document Number Rev

LA-7041P

Date: Sheet

JDB1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

G1

28

G2

ACES_88717-2601

ME@

Compal Electronics, Inc.

540Wednesday, November 03, 2010

1

540Wednesday, November 03, 2010

0.2

of

5

4

3

2

1

http://hobi-elektronika.net

UCPU1C

DDR_A_D[0..63]10

D D

C C

DDR_A_BS010 DDR_A_BS110

B B

DDR_A_BS210

DDR_A_CAS#10 DDR_A_RAS#10 DDR_A_WE#10

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

UCPU1C

AG6

SA_DQ[0]

AJ6

SA_DQ[1]

AP11

SA_DQ[2]

AL6

SA_DQ[3]

AJ10

SA_DQ[4]

AJ8

SA_DQ[5]

AL8

SA_DQ[6]

AL7

SA_DQ[7]

AR11

SA_DQ[8]

AP6

SA_DQ[9]

AU6

SA_DQ[10]

AV9

SA_DQ[11]

AR6

SA_DQ[12]

AP8

SA_DQ[13]

AT13

SA_DQ[14]

AU13

SA_DQ[15]

BC7

SA_DQ[16]

BB7

SA_DQ[17]

BA13

SA_DQ[18]

BB11

SA_DQ[19]

BA7

SA_DQ[20]

BA9

SA_DQ[21]

BB9

SA_DQ[22]

AY13

SA_DQ[23]

AV14

SA_DQ[24]

AR14

SA_DQ[25]

AY17

SA_DQ[26]

AR19

SA_DQ[27]

BA14

SA_DQ[28]

AU14

SA_DQ[29]

BB14

SA_DQ[30]

BB17

SA_DQ[31]

BA45

SA_DQ[32]

AR43

SA_DQ[33]

AW48

SA_DQ[34]

BC48

SA_DQ[35]

BC45

SA_DQ[36]

AR45

SA_DQ[37]

AT48

SA_DQ[38]

AY48

SA_DQ[39]

BA49

SA_DQ[40]

AV49

SA_DQ[41]

BB51

SA_DQ[42]

AY53

SA_DQ[43]

BB49

SA_DQ[44]

AU49

SA_DQ[45]

BA53

SA_DQ[46]

BB55

SA_DQ[47]

BA55

SA_DQ[48]

AV56

SA_DQ[49]

AP50

SA_DQ[50]

AP53

SA_DQ[51]

AV54

SA_DQ[52]

AT54

SA_DQ[53]

AP56

SA_DQ[54]

AP52

SA_DQ[55]

AN57

SA_DQ[56]

AN53

SA_DQ[57]

AG56

SA_DQ[58]

AG53

SA_DQ[59]

AN55

SA_DQ[60]

AN52

SA_DQ[61]

AG55

SA_DQ[62]

AK56

SA_DQ[63]

BD37

SA_BS[0]

BF36

SA_BS[1]

BA28

SA_BS[2]

BE39

SA_CAS#

BD39

SA_RAS#

AT41

SA_WE#

SANDY-BRIDGE_BGA1023~D

SA_CLK[0]

SA_CLK#[0]

SA_CKE[0]

SA_CLK[1]

SA_CLK#[1]

SA_CKE[1]

SA_CS#[0] SA_CS#[1]

SA_ODT[0] SA_ODT[1]

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]

DDR SYSTEM MEMORY A

SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]

SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

AV36 AY26

AT40 AU40 BB26

BB40 BC41

AY40 BA41

AL11 AR8 AV11 AT17 AV45 AY51 AT55 AK55

AJ11 AR10 AY11 AU17 AW45 AV51 AT56 AK54

BG35 BB34 BE35 BD35 AT34 AU34 BB32 AT32 AY32 AV32 BE37 BA30 BC30 AW41 AY28 AU26

M_CLK_DDR#0 DDR_CKE0_DIMMA

M_CLK_DDR1 M_CLK_DDR#1 DDR_CKE1_DIMMA

DDR_CS0_DIMMA# DDR_CS1_DIMMA#

M_ODT0 M_ODT1

DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7

DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15

M_CLK_DDR0

AU36

M_CLK_DDR0 10 M_CLK_DDR#0 10 DDR_CKE0_DIMMA 10

M_CLK_DDR1 10 M_CLK_DDR#1 10 DDR_CKE1_DIMMA 10

DDR_CS0_DIMMA# 10 DDR_CS1_DIMMA# 10

M_ODT0 10 M_ODT1 10

DDR_A_DQS#[0.. 7] 1 0

DDR_A_DQS[0..7 ] 10

DDR_A_MA[0..15] 10

UCPU1D

AL4

SB_DQ[0]

AL1

SB_DQ[1]

AN3

SB_DQ[2]

AR4

SB_DQ[3]

AK4

SB_DQ[4]

AK3

SB_DQ[5]

AN4

SB_DQ[6]

AR1

SB_DQ[7]

AU4

SB_DQ[8]

AT2

SB_DQ[9]

AV4

SB_DQ[10]

BA4

SB_DQ[11]

AU3

SB_DQ[12]

AR3

SB_DQ[13]

AY2

SB_DQ[14]

BA3

SB_DQ[15]

BE9

SB_DQ[16]

BD9

SB_DQ[17]

BD13

SB_DQ[18]

BF12

SB_DQ[19]

BF8

SB_DQ[20]

BD10

SB_DQ[21]

BD14

SB_DQ[22]

BE13

SB_DQ[23]

BF16

SB_DQ[24]

BE17

SB_DQ[25]

BE18

SB_DQ[26]

BE21

SB_DQ[27]

BE14

SB_DQ[28]

BG14

SB_DQ[29]

BG18

SB_DQ[30]

BF19

SB_DQ[31]

BD50

SB_DQ[32]

BF48

SB_DQ[33]

BD53

SB_DQ[34]

BF52

SB_DQ[35]

BD49

SB_DQ[36]

BE49

SB_DQ[37]

BD54

SB_DQ[38]

BE53

SB_DQ[39]

BF56

SB_DQ[40]

BE57

SB_DQ[41]

BC59

SB_DQ[42]

AY60

SB_DQ[43]

BE54

SB_DQ[44]

BG54

SB_DQ[45]

BA58

SB_DQ[46]

AW59

SB_DQ[47]

AW58

SB_DQ[48]

AU58

SB_DQ[49]

AN61

SB_DQ[50]

AN59

SB_DQ[51]

AU59

SB_DQ[52]

AU61

SB_DQ[53]

AN58

SB_DQ[54]

AR58

SB_DQ[55]

AK58

SB_DQ[56]

AL58

SB_DQ[57]

AG58

SB_DQ[58]

AG59

SB_DQ[59]

AM60

SB_DQ[60]

AL59

SB_DQ[61]

AF61

SB_DQ[62]

AH60

SB_DQ[63]

BG39

SB_BS[0]

BD42

SB_BS[1]

AT22

SB_BS[2]

AV43

SB_CAS#

BF40

SB_RAS#

BD45

SB_WE#

SANDY-BRIDGE_BGA1023~D

BA34

SB_CLK[0]

AY34

SB_CLK#[0]

AR22

SB_CKE[0]

BA36

SB_CLK[1]

BB36

SB_CLK#[1]

BF27

SB_CKE[1]

BE41

SB_CS#[0]

BE47

SB_CS#[1]

AT43

SB_ODT[0]

BG47

SB_ODT[1]

AL3

SB_DQS#[0]

AV3

SB_DQS#[1]

BG11

SB_DQS#[2]

BD17

SB_DQS#[3]

BG51

SB_DQS#[4]

BA59

SB_DQS#[5]

AT60

SB_DQS#[6]

AK59

SB_DQS#[7]

AM2

SB_DQS[0]

AV1

SB_DQS[1]

BE11

SB_DQS[2]

BD18

SB_DQS[3]

BE51

SB_DQS[4]

BA61

SB_DQS[5]

AR59

SB_DQS[6]

AK61

SB_DQS[7]

DDR SYSTEM MEMORY B

BF32

SB_MA[0]

BE33

SB_MA[1]

BD33

SB_MA[2]

AU30

SB_MA[3]

BD30

SB_MA[4]

AV30

SB_MA[5]

BG30

SB_MA[6]

BD29

SB_MA[7]

BE30

SB_MA[8]

BE28

SB_MA[9]

BD43

SB_MA[10]

AT28

SB_MA[11]

AV28

SB_MA[12]

BD46

SB_MA[13]

AT26

SB_MA[14]

AU22

SB_MA[15]

R36

@R36

@

0_0402_5%

1 2

D

S

D

S

DDR3_DRAMRST#_RH_DRAMRST#

1 2

13

Q4

G

BSS138_NL_SOT23-3

2

1

C35

0.047U_0402_16V4Z

2

H_DRAMRST#5

R39

4.99K_0402_1%

R40

0_0402_5%

5

0_0402_5%

1 2

DRAMRST_CNTRL

A A

DRAMRST_CNTRL_PCH12

+1.5V

12

R37

1K_0402_5%

R38

R38 1K_0402_5%

1K_0402_5%

1 2

Eiffel used 0.01u Module design used 0.047u

4

DDR3_DRAMRST# 10

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/06 2011/07/06

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Num ber Rev

Date: Sh eet

Compal Electronics, Inc.

PROCESSOR(3/6) DDRIII

LA-7041P

1

640Wednesday, November 03, 2010

of

0.2

5

4

3

2

1

http://hobi-elektronika.net

CFG Straps for Processor

D D

UCPU1E

VCC_VAL_SENSE VSS_VAL_SENSE

12

VCC_AXG_VAL_SENSE VSS_AXG_VAL_SENSE

T20PAD~D @T20PAD~D @

+V_DDR_REFA_R +V_DDR_REFB_R

XDP_CFG0

CFG2

CFG4 CFG5 CFG6 CFG7

XDP_CFG05

+CPU_CORE

R43

@R43

@

49.9_0402_1%

+VGFX_CORE

C C

B B

1 2

R45

@R45

@

49.9_0402_1%

1 2

R44 49.9_0402_1%@R44 49.9_0402_1%@

1 2

R46 49.9_0402_1%

B50

CFG[0]

C51

CFG[1]

B54

CFG[2]

D53

CFG[3]

A51

CFG[4]

C53

CFG[5]

C55

CFG[6]

H49

CFG[7]

A55

CFG[8]

H51

CFG[9]

K49

CFG[10]

K53

CFG[11]

F53

CFG[12]

G53

CFG[13]

L51

CFG[14]

F51

CFG[15]

D52

CFG[16]

L53

CFG[17]

H43

VCC_VAL_SENSE

K43

VSS_VAL_SENSE

H45

VAXG_VAL_SENSE

K45

VSSAXG_VAL_SENSE

F48

VCC_DIE_SENSE

H48

RSVD6

K48

RSVD7

BA19

RSVD8

AV19

RSVD9

AT21

RSVD10

BB21

RSVD11

BB19

RSVD12

AY21

RSVD13

BA22

RSVD14

AY22

RSVD15

AU19

RSVD16

AU21

RSVD17

BD21

RSVD18

BD22

RSVD19

BD25

RSVD20

BD26

RSVD21

BG22

RSVD22

BE22

RSVD23

BG26

RSVD24

BE26

RSVD25

BF23

RSVD26

BE24

RSVD27

SANDY-BRIDGE_BGA1023~D

RSVD28 RSVD29

RSVD30 RSVD31 RSVD32 RSVD33

RSVD34 RSVD35 RSVD36 RSVD37 RSVD38

RSVD39 RSVD40

RSVD41 RSVD42 RSVD43 RSVD44

RESERVED

RSVD45

DC_TEST_A4 DC_TEST_C4 DC_TEST_D3

DC_TEST_D1 DC_TEST_A58 DC_TEST_A59

DC_TEST_C59

DC_TEST_A61

DC_TEST_C61

DC_TEST_D61 DC_TEST_BD61 DC_TEST_BE61 DC_TEST_BE59

DC_TEST_BG61 DC_TEST_BG59 DC_TEST_BG58

DC_TEST_BG4 DC_TEST_BG3

DC_TEST_BE3

DC_TEST_BG1

DC_TEST_BE1

DC_TEST_BD1

BE7 BG7

N42 L42 L45 L47

M13 M14 U14 W14 P13

AT49 K24

AH2 AG13 AM14 AM15

N50

A4 C4 D3 D1 A58 A59 C59 A61 C61 D61 BD61 BE61 BE59 BG61 BG59 BG58 BG4 BG3 BE3 BG1 BE1 BD1

12

@

R47

1K_0402_1%

INTEL 12/28 recommand to add 1k pull down

@

R48

1K_0402_1%

7/30

CFG[6:5]

CFG2

12

R41

@R41

@

1K_0402_1%~D

PEG Static Lane Reversal - CFG2 is for the 16x

1:(Default) Normal Operation; Lane #

*

CFG2

definition matches socket pin map definition

0:Lane Reversed

CFG4

12

R42

@R42

@

1K_0402_1%~D

Display Port Presence Strap

1 : Disabled; No Physical Display Port

*

CFG4

attached to Embedded Display Port

0 : Enabled; An external Display Port device is connected to the Embedded Display Port

CFG6

CFG5

12

R49

@R49

@

1K_0402_1%~D

R50

@R50

@

1K_0402_1%~D

PCIE Port Bifurcation Straps

11: (Default) x16 - Device 1 functions 1 and 2 disabled

*

10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled 01: Reserved - (Device 1 function 1 disabled ; function 2 enabled) 00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

CFG7

12

R51

@R51

@

1K_0402_1%~D

PEG DEFER TRAINING

1: (Default) PEG Train immediately

*

CFG7

following xxRESETB de assertion

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/06 2011/07/06

Compal Secret Data

Deciphered Date

0: PEG Wait for BIOS for training

Title

Size Document Num ber Rev

Date: Sh eet

2

Date: Sh eet

Compal Electronics, Inc.

PROCESSOR(4/6) RSVD,CFG

LA-7041P

1

740Wednesday, November 03, 2010

0.2

of

5

C77

C192

C78

4

3

2

1

http://hobi-elektronika.net

1

2

1

2

SV@

1

2

SV@

1

2

SV@

DC=33A

+CPU_CORE

C61

22U_0805_6.3V6M

C61

22U_0805_6.3V6M

1

SV@

2

1

+

C78

SV@

2

330U_D2_2V_Y

C199

22U_0805_6.3V6M

C199

22U_0805_6.3V6M

1

SV@

2

1U_0402_6.3V6K

C99

1U_0402_6.3V6K

C312

1U_0402_6.3V6K

C322

4

UCPU1F

A26

VCC[1]

A29

VCC[2]

A31

VCC[3]

A34

VCC[4]

A35

VCC[5]

A38

VCC[6]

A39

VCC[7]

A42

VCC[8]

C26

VCC[9]

C27

VCC[10]

C32

VCC[11]

C34

VCC[12]

C37

VCC[13]

C39

VCC[14]

C42

VCC[15]

D27

VCC[16]

D32

VCC[17]

D34

VCC[18]

D37

VCC[19]

D39

VCC[20]

D42

VCC[21]

E26

VCC[22]

E28

VCC[23]

E32

VCC[24]

E34

VCC[25]

E37

VCC[26]

E38

VCC[27]

F25

VCC[28]

F26

VCC[29]

F28

VCC[30]

F32

VCC[31]

F34

VCC[32]

F37

VCC[33]

F38

VCC[34]

F42

VCC[35]

G42

VCC[36]

H25

VCC[37]

H26

VCC[38]

H28

VCC[39]

H29

VCC[40]

H32

VCC[41]

H34

VCC[42]

H35

VCC[43]

H37

VCC[44]

H38

VCC[45]

H40

VCC[46]

J25

VCC[47]

J26

VCC[48]

J28

VCC[49]

J29

VCC[50]

J32

VCC[51]

J34

VCC[52]

J35

VCC[53]

J37

VCC[54]

J38

VCC[55]

J40

VCC[56]

J42

VCC[57]

K26

VCC[58]

K27

VCC[59]

K29

VCC[60]

K32

VCC[61]

K34

VCC[62]

K35

VCC[63]

K37

VCC[64]

K39

VCC[66]

K42

VCC[67]

L25

VCC[68]

L28

VCC[69]

L33

VCC[70]

L36

VCC[71]

L40

VCC[72]

N26

VCC[73]

N30

VCC[74]

N34

VCC[75]

N38

VCC[76]

SANDY-BRIDGE_BGA1023~D

8.5A

AF46

VCCIO[1]

AG48

VCCIO[3]

AG50

VCCIO[4]

AG51

VCCIO[5]

AJ17

VCCIO[6]

AJ21

VCCIO[7]

AJ25

VCCIO[8]

AJ43

VCCIO[9]

AJ47

VCCIO[10]

AK50

VCCIO[11]

AK51

VCCIO[12]

AL14

VCCIO[13]

AL15

VCCIO[14]

AL16

VCCIO[15]

AL20

VCCIO[16]

AL22

VCCIO[17]

AL26

VCCIO[18]

AL45

VCCIO[19]

AL48

VCCIO[20]

AM16

VCCIO[21]

AM17

VCCIO[22]

AM21

VCCIO[23]

AM43

VCCIO[24]

AM47

VCCIO[25]

AN20

VCCIO[26]

AN42

VCCIO[27]

AN45

VCCIO[28]

AN48

PEG AND DDRSENSE LINES SVID QUIET RAILS

VCCIO_SENSE

VSS_SENSE_VCCIO

3

VCCIO[29]

AA14

VCCIO[30]

AA15

VCCIO[31]

AB17

VCCIO[32]

AB20

VCCIO[33]

AC13

VCCIO[34]

AD16

VCCIO[35]

AD18

VCCIO[36]

AD21

VCCIO[37]

AE14

VCCIO[38]

AE15

VCCIO[39]

AF16

VCCIO[40]

AF18

VCCIO[41]

AF20

VCCIO[42]

AG15

VCCIO[43]

AG16

VCCIO[44]

AG17

VCCIO[45]

AG20

VCCIO[46]

AG21

VCCIO[47]

AJ14

VCCIO[48]

AJ15

VCCIO[49]

W16

VCCIO50

W17

VCCIO51

BC22

VCCIO_SEL

AM25

VCCPQE[1]

AN22

VCCPQE[2]

H_CPU_SVIDALRT#

A44

VIDALERT#

VIDSCLK

VIDSOUT

VCC_SENSE

VSS_SENSE

H_CPU_SVIDCLK

B43

H_CPU_SVIDDAT

C44

VCCSENSE_R

F43

VSSSENSE_R

G43

AN16 AN17

2010/07/06 2011/07/06

CORE SUPPLY

POWER

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

10U_0603_6.3V6M

1

C36

2

1U_0402_6.3V6K

1

C44

2

1U_0402_6.3V6K

1

C62

2

1U_0402_6.3V6K

1

C79

2

1

+

C87

2

330U_D2_2V_Y

+1.05VS

H_VCCP_SEL

1 2

C106

C106 1U_0402_6.3V6K

1U_0402_6.3V6K

R62 0_0402_5%R62 0_0402_5%

1 2

R63 0_0402_5%R63 0_0402_5%

1 2

T51PAD T51PAD

Compal Secret Data

10U_0603_6.3V6M

1

C55

2

1U_0402_6.3V6K

1

C45

2

1U_0402_6.3V6K

1

C63

2

1U_0402_6.3V6K

1

C80

2

@

1

+

C88

C89

@

2

330U_D2_2V_Y

VCCIO_SEL

Hgih

Low 1.05V

R58

43_0402_5%

1 2

R59 0_0402_5% R59 0_0402_5%

1 2

R60 0_0402_5% R60 0_0402_5%

1 2

VCCIO_SENSE 38

Deciphered Date

10U_0603_6.3V6M

1

C37

2

1U_0402_6.3V6K

1

C46

2

1U_0402_6.3V6K

1

C64

2

@

1U_0402_6.3V6K

1

C81

2

1

+

2

330U_D2_2V_Y

1.0V

10U_0603_6.3V6M

1

2

1U_0402_6.3V6K

1

2

1U_0402_6.3V6K

1

2

1U_0402_6.3V6K

1

2

130_0402_1%

2

10U_0603_6.3V6M

1

C38

2

1U_0402_6.3V6K

1

C47

2

1U_0402_6.3V6K

1

C65

2

1U_0402_6.3V6K

1

C82

2

R56

C39

C48

@

C66

C83

10U_0603_6.3V6M

1

2

1U_0402_6.3V6K

1

2

1U_0402_6.3V6K

1

2

1U_0402_6.3V6K

1

2

+1.05VS+1.05VS

12

+CPU_CORE

+1.05VS

10U_0603_6.3V6M

1

C41

C40

@

C57

C67

C84

12

2

1

2

1

2

1

2

R57

R57 75_0402_5%

75_0402_5%

R61

R61 100_0402_1%

100_0402_1%

R64

R64 100_0402_1%~D

100_0402_1%~D

C56

2

@

1U_0402_6.3V6K

1

C49

C58

2

@

1U_0402_6.3V6K

1

C68

C69

2

1U_0402_6.3V6K

1

C86

C85

2

@

Place the PU resistors close to CPU

VR_SVID_ALRT# 39 VR_SVID_CLK 39 VR_SVID_DAT 39

Place the PU resistors close to CPU

VCCSENSE 39 VSSSENSE 39

Place the PU resistors close to VR

Title

PROCESSOR(5/6) PWR,BYPASS

Size Document Num ber Rev

LA-7041P

Date: Sh eet

10U_0603_6.3V6M

1

2

1

2

1

2

C43

C42

2

@

1U_0402_6.3V6K

C59

1U_0402_6.3V6K

C70

@

Compal Electronics, Inc.

1

0.2

840Wednesday, November 03, 2010

0.2

of

+CPU_CORE

D D

22U_0805_6.3V6M

1

2

+CPU_CORE

C C

+CPU_CORE

B B

A A

ULV@

470U

SGA00004200

C50

22U_0805_6.3V6M C50

22U_0805_6.3V6M

C51

22U_0805_6.3V6M C51

22U_0805_6.3V6M

1

2

C71

22U_0805_6.3V6M C71

22U_0805_6.3V6M

C72

22U_0805_6.3V6M C72

22U_0805_6.3V6M

1

2

C200

22U_0805_6.3V6M

C200

22U_0805_6.3V6M

C201

22U_0805_6.3V6M C201

22U_0805_6.3V6M

1

SV@

2

C206

22U_0805_6.3V6M

C206

22U_0805_6.3V6M

C207

22U_0805_6.3V6M@C207

22U_0805_6.3V6M

1

SV@

@

2

,ŝŐŚͲ&ƌĞƋƵĞŶĐǇĞĐŽƵƉůŝŶŐ

1U_0402_6.3V6K

C90

1

2

SV@

1

2

1

2

C90

1U_0402_6.3V6K

C100

1U_0402_6.3V6K

C311

5

SV@

1

2

SV@

1

2

1

2

SV@

1

2

C92

C91

1

2

SV@

1U_0402_6.3V6K

C102

C101

1

2

1U_0402_6.3V6K

C313

C314

1

2

1U_0402_6.3V6K

C323

C324

1

2

SV@

1

2

C75

1

2

1

2

1

2

SV@

ULV@

330U_9m

SGA20331E10

1U_0402_6.3V6K

ULV@

330U_9m

SGA20331E10

C54

22U_0805_6.3V6M@C54

22U_0805_6.3V6M C53

22U_0805_6.3V6M

330U_D2_2V_Y

22U_0805_6.3V6M@C203

22U_0805_6.3V6M

C96

C211

C316

@

SV@

22U_0805_6.3V6M

C53

1

@

2

1

+

C77

C76

SV@

2

330U_D2_2V_Y

C203

C204

22U_0805_6.3V6M

C204

22U_0805_6.3V6M

1

SV@

2

C210

C205

22U_0805_6.3V6M@C205

22U_0805_6.3V6M

1

@

2

1U_0402_6.3V6K

SV@

1U_0402_6.3V6K

C98

C97

1

2

SV@

1U_0402_6.3V6K

C315

C213

1

2

1U_0402_6.3V6K

C318

C325

1

2

SV@

C60

22U_0805_6.3V6M C60

22U_0805_6.3V6M

C52

22U_0805_6.3V6M C52

22U_0805_6.3V6M

1

2

C73

22U_0805_6.3V6M

C73

22U_0805_6.3V6M

1

SV@

2

C198

22U_0805_6.3V6M@C198

22U_0805_6.3V6M

1

@

2

C208

22U_0805_6.3V6M@C208

22U_0805_6.3V6M

1

@

2

1U_0402_6.3V6K

C93

1

2

SV@

1U_0402_6.3V6K

C103

1

2

1U_0402_6.3V6K

C222

1

2

1U_0402_6.3V6K

C320

1

2

1

2

C74

22U_0805_6.3V6M@C74

22U_0805_6.3V6M

1

+

@

2

C192

SV@

2

C202

22U_0805_6.3V6M@C202

22U_0805_6.3V6M

1

@

2

C209

22U_0805_6.3V6M@C209

22U_0805_6.3V6M

1

@

2

1U_0402_6.3V6K

C95

C94

1

2

SV@

1U_0402_6.3V6K

C104

C105

1

2

1U_0402_6.3V6K

C212

C221

1

2

SV@

1U_0402_6.3V6K

C319

C317

1

2

5

4

3

2

1

+1.5V

1 2

PAD-OPEN 4x4m

SUSP5,31,38

+3VALW

R67

C112

C119

C137

C194

1U_0402_6.3V6K

1

2

1

2

1

2

1

2

1

2

1

2

1U_0402_6.3V6K

1

2

10U_0603_6.3V6M

C161

1U_0402_6.3V6K

C166

100K_0402_5%

22U_0805_6.3V6M

C113

1

2

10U_0603_6.3V6M

1

C120

2

1U_0402_6.3V6K

C138

1U_0402_6.3V6K

C197

VCC_AXG_SENSE

VSS_AXG_SENSE

+1.8VS_VCCPLL

1

C155

+

C156

2

@

10U_0603_6.3V6M

1

C162

2

@

1U_0402_6.3V6K

C167

1

2

R67

2

G

22U_0805_6.3V6M

10U_0603_6.3V6M

330U_D2_2V_Y

1

2

1

2

C114

C121

10U_0603_6.3V6M

C168

D D

CPU1.5V_S3_GATE24

SUSP#24,31, 36,38

+VGFX_CORE

22U_0805_6.3V6M

C109

1

2

10U_0603_6.3V6M

1

C116

8/20

+1.8VS

+VCCSA

2

1

C122

2

1

2

+

330U_D2_2V_Y

1U_0402_6.3V6K

C133

R86

0_0805_5%

1 2

8/18

0_0402_5%~D

C123

1

2

1

2

C C

B B

VSSSA_SENSE37

A A

1 2

R710_0402_5% R710_0402_5%

@

1 2

R700_0402_5%@R700_0402_5%

22U_0805_6.3V6M

C110

1

2

10U_0603_6.3V6M

1

C117

2

1

+

2

330U_D2_2V_Y

@

1U_0402_6.3V6K

C134

1

2

1U_0402_6.3V6K

C196

1

2

1

+

C158

2

330U_D2_2V_Y

22U_0805_6.3V6M

C111

1

2

10U_0603_6.3V6M

1

C118

2

1U_0402_6.3V6K

C135

C136

1

2

1U_0402_6.3V6K

C195

C193

1

2

VCC_AXG_SENSE39

VSS_AXG_SENSE39

10U_0603_6.3V6M

1U_0402_6.3V6K

1

C153

C154

2

10U_0603_6.3V6M

1

C160

C159

2

12

R77

1U_0402_6.3V6K

C164

C165

1

2

1 2

R650_0402_5%@R650_0402_5%

@

12

RUN_ON_CPU1.5VS3# RUN_ON_CPU1.5VS3

13

D

Q6

Q6 2N7002_SOT23

2N7002_SOT23

S

UCPU1G

18A

AA46

VAXG[1]

AB47

VAXG[2]

AB50

VAXG[3]

AB51

VAXG[4]

AB52

VAXG[5]

AB53

VAXG[6]

AB55

VAXG[7]

AB56

VAXG[8]

AB58

VAXG[9]

AB59

VAXG[10]

AC61

VAXG[11]

AD47

VAXG[12]

AD48

VAXG[13]

AD50

VAXG[14]

AD51

VAXG[15]

AD52

VAXG[16]

AD53

VAXG[17]

AD55

VAXG[18]

AD56

VAXG[19]

AD58

VAXG[20]

AD59

VAXG[21]

AE46

VAXG[22]

N45

VAXG[23]

P47

VAXG[24]

P48

VAXG[25]

P50

VAXG[26]

P51

VAXG[27]

P52

VAXG[28]

P53

VAXG[29]

P55

VAXG[30]

P56

VAXG[31]

P61

VAXG[32]

T48

VAXG[33]

T58

VAXG[34]

T59

VAXG[35]

T61

VAXG[36]

U46

VAXG[37]

V47

VAXG[38]

V48

VAXG[39]

V50

VAXG[40]

V51

VAXG[41]

V52

VAXG[42]

V53

VAXG[43]

V55

VAXG[44]

V56

VAXG[45]

V58

VAXG[46]

V59

VAXG[47]

W50

VAXG[48]

W51

VAXG[49]

W52

VAXG[50]

W53

VAXG[51]

W55

VAXG[52]

W56

VAXG[53]

W61

VAXG[54]

Y48

VAXG[55]

Y61

VAXG[56]

TBD

F45

VAXG_SENSE

G45

VSSAXG_SENSE

BB3

VCCPLL[1]

BC1

VCCPLL[2]

BC4

VCCPLL[3]

6A

L17

VCCSA[1]

L21

VCCSA[2]

N16

VCCSA[3]

N20

VCCSA[4]

N22

VCCSA[5]

P17

VCCSA[6]

P20

VCCSA[7]

R16

C163

@

1U_0402_6.3V6K

VCCSA[8]

R18

VCCSA[9]

R21

VCCSA[10]

U15

VCCSA[11]

V16

VCCSA[12]

V17

VCCSA[13]

V18

VCCSA[14]

V21

VCCSA[15]

W20

VCCSA[16]

SANDY-BRIDGE_BGA1023~D

R68

15K_0402_1%

2

G

GRAPHICS

1.8V RAIL

SA RAIL

+VSB

SENSE

LINES

SENSE

LINES

12

13

D

S

PAD-OPEN 4x4m

8 7 6 5

AO4430L_SO8

Q7

Q7 2N7002_SOT23

2N7002_SOT23

DDR3 - 1.5V RAILS

POWER

QUIET RAILS

VDDQ_SENSE

VSS_SENSE_VDDQ

SENSE LINES

VCCSA_SENSE

VCCSA_VID[0] VCCSA_VID[1]

J1

@J1

@

U3

D D D D

SM_VREF

VDDQ[1] VDDQ[2] VDDQ[3] VDDQ[4] VDDQ[5] VDDQ[6] VDDQ[7] VDDQ[8]

VDDQ[9] VDDQ[10] VDDQ[11] VDDQ[12] VDDQ[13] VDDQ[14] VDDQ[15] VDDQ[16] VDDQ[17] VDDQ[18] VDDQ[19] VDDQ[20] VDDQ[21] VDDQ[22] VDDQ[23] VDDQ[24] VDDQ[25] VDDQ[26]

VCCDQ[1] VCCDQ[2]

+1.5V_CPU_VDDQ

1

S

2

S

3

S

4

G

12

R69

R69 330K_0402_5%

330K_0402_5%

@

+V_SM_VREF should have 10 mil trace width

AY43

0.1U_0402_16V4Z

5A

AJ28 AJ33 AJ36 AJ40 AL30 AL34 AL38 AL42 AM33 AM36 AM40 AN30 AN34 AN38 AR26 AR28 AR30 AR32 AR34 AR36 AR40 AV41 AW26 BA40 BB28 BG33

AM28 AN26

BC43 BA43

U10

VCCSA_VID0

D48 D49

http://hobi-elektronika.net

1

12

R66

1

2

C115

2N7002_SOT23

C108

0.1U_0603_25V7K

1

2

1 2

C124 10U_0603_6.3V6M@C124 10U_0603_6.3V6M

@

1

2

1U_0402_6.3V6K

C139

1

2

1U_0402_6.3V6K

1 2

C149

T24 PAD~D@ T24 PAD~D@ T25 PAD~D@ T25 PAD~D@

VCCSA_SEL 37

10K_0402_5%

220_0402_5%

100K_0402_5%

100K_0402_5% R74

R74

@

C125 10U_0603_6.3V6M@C125 10U_0603_6.3V6M

@

1

2

1U_0402_6.3V6K

C140

1

2

+1.5V_CPU_VDDQ

R79

R66

Q5

C126 10U_0603_6.3V6MC126 10U_0603_6.3V6M

1

2

C141

1

2

12

@ C 107

@

13

D

2

G

S

10/7

RUN_ON_CPU1.5VS3

change footprint first

C127 10U_0603_6.3V6M@C127 10U_0603_6.3V6M

@

1

2

1U_0402_6.3V6K

C142

1

2

C107

0.1U_0402_10V6K

2

C128 10U_0603_6.3V6M@C128 10U_0603_6.3V6M

@

1

2

1U_0402_6.3V6K

C143

1

2

12

RUN_ON_CPU1.5VS3#

R72

0_0402_5%

12

D

S

D

S

123

Q8

Q8 AO3414_SOT23-3

AO3414_SOT23-3

G

@

C129 10U_0603_6.3V6MC129 10U_0603_6.3V6M

C130 10U_0603_6.3V6MC130 10U_0603_6.3V6M

1

2

1U_0402_6.3V6K

C145

C144

1

2

VCCSA_SENSE 37

R78

@ R78

@

0_0402_5%~D

+V_SM_VREF+V_SM_VREF_CNT

+1.5V_CPU_VDDQ

C131 10U_0603_6.3V6M@C131 10U_0603_6.3V6M

@

1

C132

+

330U_D2_2V_Y

2

1U_0402_6.3V6K

C148

C146

C147

1

@

2

+1.5V_CPU_VDDQ +1.5V

C150 0.1U_0402_10V7K~DC150 0.1U_0402_10V7K~D

C151 0.1U_0402_10V7K~DC151 0.1U_0402_10V7K~D

C152 0.1U_0402_10V7K~DC152 0.1U_0402_10V7K~D

C157 0.1U_0402_10V7K~DC157 0.1U_0402_10V7K~D

add CC181 , CC182, 4 caps are all pop. follow checklist 1.0 5/24

VID[0] VID[1] 2011 2012 0 0 0.90 V Yes Yes 0 1 0.80 V Yes Yes 1 0 0.725 V No Yes 1 1 0.675 V No Yes

+1.5V_CPU_VDDQ

12

R73

R73 100_0402_1%

100_0402_1%

12

R75

R75 100_0402_1%

100_0402_1%

UCPU1H

A13

VSS[1]

A17

VSS[2]

A21

VSS[3]

A25

VSS[4]

A28

VSS[5]

A33

VSS[6]

A37

VSS[7]

A40

VSS[8]

A45

VSS[9]

A49

VSS[10]

A53

VSS[11]

A9

VSS[12]

AA1

VSS[13]

AA13

VSS[14]

AA50

VSS[15]

AA51

VSS[16]

AA52

VSS[17]

AA53

VSS[18]

AA55

VSS[19]

AA56

VSS[20]

AA8

VSS[21]

AB16

VSS[22]

AB18

VSS[23]

AB21

VSS[24]

AB48

VSS[25]

AB61

VSS[26]

AC10

VSS[27]

AC14

VSS[28]

AC46

VSS[29]

AC6

VSS[30]

AD17

VSS[31]

AD20

VSS[32]

AD4

VSS[33]

AD61

VSS[34]

AE13

VSS[35]

AE8

VSS[36]

AF1

VSS[37]

AF17

VSS[38]

AF21

VSS[39]

AF47

VSS[40]

AF48

VSS[41]

AF50

VSS[42]

AF51

VSS[43]

AF52

VSS[44]

AF53

VSS[45]

AF55

VSS[46]

AF56

VSS[47]

AF58

VSS[48]

AF59

VSS[49]

AG10

VSS[50]

AG14

VSS[51]

AG18

VSS[52]

AG47

VSS[53]

AG52

VSS[54]

AG61

VSS[55]

AG7

VSS[56]

AH4

VSS[57]

AH58

VSS[58]

AJ13

VSS[59]

AJ16

VSS[60]

AJ20

VSS[61]

AJ22

VSS[62]

AJ26

VSS[63]

AJ30

VSS[64]

AJ34

VSS[65]

AJ38

VSS[66]

AJ42

VSS[67]

AJ45

VSS[68]

AJ48

VSS[69]

AJ7

VSS[70]

AK1

VSS[71]

AK52

VSS[72]

AL10

VSS[73]

AL13

VSS[74]

AL17

VSS[75]

AL21

VSS[76]

AL25

VSS[77]

AL28

VSS[78]

AL33

VSS[79]

AL36

VSS[80]

AL40

VSS[81]

AL43

VSS[82]

AL47

VSS[83]

AL61

VSS[84]

AM13

VSS[85]

AM20

VSS[86]

AM22

VSS[87]

AM26

VSS[88]

AM30

VSS[89]

AM34

VSS[90]

12

VSS

SANDY-BRIDGE_BGA1023~D

VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98]

VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180]

AM38 AM4 AM42 AM45 AM48 AM58 AN1 AN21 AN25 AN28 AN33 AN36 AN40 AN43 AN47 AN50 AN54 AP10 AP51 AP55 AP7 AR13 AR17 AR21 AR41 AR48 AR61 AR7 AT14 AT19 AT36 AT4 AT45 AT52 AT58 AU1 AU11 AU28 AU32 AU51 AU7 AV17 AV21 AV22 AV34 AV40 AV48 AV55 AW13 AW43 AW61 AW7 AY14 AY19 AY30 AY36 AY4 AY41 AY45 AY49 AY55 AY58 AY9 BA1 BA11 BA17 BA21 BA26 BA32 BA48 BA51 BB53 BC13 BC5 BC57 BD12 BD16 BD19 BD23 BD27 BD32 BD36 BD40 BD44 BD48 BD52 BD56 BD8 BE5 BG13

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/06 2011/07/06

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

PROCESSOR(6/6) PWR,VSS

LA-7041P

1

940Thursday, November 04, 2010

of

0.2

5

+VREF_DQ_DIMMA +1.5V

+1.5V +1.5V

PN:SP07000MJ00

H4.0 standard

JDIMM1

+VREF_DQ_DIMMA

2.2U_0603_6.3V4Z

0.1U_0402_10V6K

0.1U_0402_10V6K C170

C170

C169

1

2

D D

C C

B B

A A

2

DDR_CKE0_DIMMA6

DDR_A_BS26

M_CLK_DDR06 M_CLK_DDR#06

DDR_A_BS06

DDR_A_WE#6 DDR_A_CAS#6

DDR_CS1_DIMMA#6

+3VS

1

2

5

DDR_A_D0 DDR_A_D1

DDR_A_DM0

DDR_A_D2 DDR_A_D3

DDR_A_D8 DDR_A_D9

DDR_A_DQS#1 DDR_A_DQS1

DDR_A_D10 DDR_A_D11

DDR_A_D16 DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_DM3

DDR_A_D26 DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS2

DDR_A_MA12 DDR_A_MA9

DDR_A_MA8 DDR_A_MA5

DDR_A_MA3 DDR_A_MA1

M_CLK_DDR0 M_CLK_DDR#0

DDR_A_MA10 DDR_A_BS0

DDR_A_WE# DDR_A_CAS# M_ODT0

DDR_A_MA13 DDR_CS1_DIMMA#

DDR_A_D32 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_DM5

DDR_A_D42 DDR_A_D43

DDR_A_D48 DDR_A_D49

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_DM7

DDR_A_D58 DDR_A_D59

R90

1 2

10K_0402_5%

2.2U_0603_6.3V4Z

0.1U_0402_10V6K

C190

C191

1

2

12

10K_0402_5% R93

10K_0402_5%

JDIMM1

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203

R93

205

VREF_CA VSS27 DQ32 DQ33 VSS29 DQS#4 DQS4 VSS32 DQ34 DQ35 VSS34 DQ40 DQ41 VSS36 DM5 VSS37 DQ42 DQ43 VSS39 DQ48 DQ49 VSS41 DQS#6 DQS6 VSS44 DQ50 DQ51 VSS46 DQ56 DQ57 VSS48 DM7 VSS49 DQ58 DQ59 VSS51 SA0 VDDSPD SA1 VTT1

G1

SUYIN_600023HB204G251ZL

ME@

DQ4 DQ5

VSS3

DQS#0

DQS0

VSS6

DQ6

DQ7 VSS8 DQ12 DQ13

VSS10

DM1

DQ14 DQ15

DQ20 DQ21

DM2

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

DQ30 DQ31

CKE1

VDD2

A15 A14

VDD4

A11

VDD6

VDD8

VDD10

CK1

CK1#

VDD12

BA1

RAS#

VDD14

S0#

ODT0

VDD16

ODT1

NC2

VDD18

VSS28

DQ36 DQ37

VSS30

DM4

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35 DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

DM6

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47 DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

SDA

SCL

VTT2

4

4BA2/6W

4BA2/6W4BA2/6W

http://hobi-elektronika.net

DDR3 SO-DIMM A

2

DDR_A_D4

4

DDR_A_D5

6 8

DDR_A_DQS#0

10

DDR_A_DQS0

12 14

DDR_A_D6

16

DDR_A_D7

18 20

DDR_A_D12

22

DDR_A_D13

24 26

DDR_A_DM1

28

DDR3_DRAMRST#

30 32

DDR_A_D14

34

DDR_A_D15

36 38

DDR_A_D20

40

DDR_A_D21

42 44

DDR_A_DM2

46 48

DDR_A_D22

50

DDR_A_D23

52 54

DDR_A_D28

56

DDR_A_D29

58 60

DDR_A_DQS#3

62

DDR_A_DQS3

64 66

DDR_A_D30

68

DDR_A_D31

70 72

DDR_CKE1_DIMMA

74 76

DDR_A_MA15

78

DDR_A_MA14

80 82

DDR_A_MA11

84

DDR_A_MA7

86

A7

88

DDR_A_MA6

90

A6 A4

A2 A0

G2

92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

4

DDR_A_MA4

DDR_A_MA2 DDR_A_MA0

M_CLK_DDR1 M_CLK_DDR#1

DDR_A_BS1 DDR_A_RAS#

DDR_CS0_DIMMA#

M_ODT1

DDR_A_D36 DDR_A_D37

DDR_A_DM4

DDR_A_D38 DDR_A_D39

DDR_A_D44 DDR_A_D45

DDR_A_DQS#5 DDR_A_DQS5

DDR_A_D46 DDR_A_D47

DDR_A_D52 DDR_A_D53

DDR_A_DM6

DDR_A_D54 DDR_A_D55

DDR_A_D60 DDR_A_D61

DDR_A_DQS#7 DDR_A_DQS7

DDR_A_D62 DDR_A_D63

SMB_DATA_S3 SMB_CLK_S3

+0.75VS

1/76BA1/86W

1/76BA1/86W1/76BA1/86W

DDR3_DRAMRST# 6

DDR_CKE1_DIMMA 6

M_CLK_DDR1 6 M_CLK_DDR#1 6

DDR_A_BS1 6 DDR_A_RAS# 6

DDR_CS0_DIMMA# 6 M_ODT0 6

M_ODT1 6

0.1U_0402_10V6K

0.1U_0402_10V6K C176

C176

1

2

SMB_DATA_S3 12,22 SMB_CLK_S3 12,22

1

2

+VREF_CA

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z C177

C177

3

DDR_A_D[0..63]6

DDR_A_DQS[0..7]6

DDR_A_DQS#[0..7]6

DDR_A_MA[0..15]6

+1.5V

12

R82

1K_0402_1%

12

R83

1K_0402_1%

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/10/31 2009/10/31

12

R80

1K_0402_1%

Layout Note: Place near DIMM

Compal Secret Data

R81

10U_0603_6.3V6M

C171

1

2

+0.75VS

C186

1U_0402_6.3V6K

C186

1U_0402_6.3V6K

1

2

Deciphered Date

+VREF_DQ_DIMMA

12

C172

C187

2

+1.5V

10U_0603_6.3V6M

C173

1

2

1U_0402_6.3V6K

C188

1

2

10U_0603_6.3V6M

C175

C174

1

2

1U_0402_6.3V6K

C189

1U_0402_6.3V6K

C189

1U_0402_6.3V6K

1

2

1

10U_0603_6.3V6M

C178

1

2

10U_0603_6.3V6M

1

2

DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7

C179

10U_0603_6.3V6M

0.1U_0402_10V6K

C182

1

2

<Doc>

1

0.1U_0402_10V6K

1

2

C181

C180

1

2

Title

Size Document Number Rev

Custom

Date: Sheet

C181

1

2

Compal Electronics, Inc.

DDRIII-SODIMM SLOT1

0.1U_0402_10V6K

0.1U_0402_10V6K C184

C184

C183

1

+

C185

2

220U_B2_2.5VM_R15M

0.2

10 40Wednesday, November 03, 2010

0.2

of

5

W=20milsW=20mils

+RTCBATT+RTCVCC

R111

1K_0402_5%

1

C216

C216 1U_0603_10V4Z

1U_0603_10V4Z

2

D D

+RTCVCC

R112 1M_0402_5%R112 1M_0402_5%

R113 330K_0402_5%R113 330K_0402_5%

*

1 2

INTVRMEN

H

烉烉烉烉

Integrated VRM enable

L

烉烉烉烉

Integrated VRM disable

12

CLRP1

SHORT PADS

SM_INTRUDER#

PCH_INTVRMEN

+RTCVCC

R114 20K_0402_5%R114 20K_0402_5%

R115 20K_0402_5%R115 20K_0402_5%

(INTVRMEN should always be pull high.)

+3VS

R117 1K_0402_5%@R117 1K_0402_5%@

1 2

HIGH= Enable ( No Reboot ) LOW= Disable (Default)

*

C C

+3VALW

R118 1K_0402_5%@R118 1K_0402_5%@

Low = Disabled (Default)

*

High = Enabled [Flash Descriptor Security Overide]

+3VALW

R120 1K_0402_5% R120 1K_0402_5%

12

HDA_SPKR

HDA_SDOUT

ME_FLASH24

HDA_SYNC

This signal has a weak internal pull-down

On Die PLL VR Select is supplied by

1.5V when smapled high

*

1.8V when sampled low Needs to be pulled High for Huron River platfrom

R124

33_0402_5%

HDA_BIT_CLK

12

1 2

R126

33_0402_5%

1 2

R128

33_0402_5%

1 2

R131

33_0402_5%

1 2

R135

200_0402_5%

R139

R139 100_0402_1%

100_0402_1%

5

HDA_SYNC_R

HDA_RST#

HDA_SDOUT

12

R136

200_0402_5%

12

R140

100_0402_1%

PCH_GPIO13

DPDG1.1

1M_0402_5%

PBTN_OUT#5,13,24

HDA_BITCLK_AUDIO23

HDA_SYNC_AUDIO23

B B

HDA_RST_AUDIO#23

HDA_SDOUT_AUDIO23

+3VALW +3VALW+3VALW

12

R134

200_0402_5%

PCH_JTAG_TDO PCH_JTAG_TDIPCH_JTAG_TMS

12

R138

100_0402_1%

A A

+3VALW

R243 1K_0402_5%R243 1K_0402_5%

C848

33P_0402_50V8J

12

R283

10/11

EC_RSMRST#13,24

12

8/9

XDP_DBRESET#5,13

C217

1U_0603_10V4Z

1 2

C218

1U_0603_10V4Z

ME_FLASH

R121 1K_0402_1%@R121 1K_0402_1%@

+3VS

R714

R714 33K_0402_5%

33K_0402_5%

1 2

7/28

G

2

13

D

S

D

S

1 2

R129

@R129

@

0_0402_5%

EC_RSMRST#13,24

+3VALW

18P_0402_50V8J

HDA_SPKR23

HDA_SDIN023

10/27

1 2

Q9

Q9 BSS138_NL_SOT23-3

BSS138_NL_SOT23-3

12

R122

R122 51_0402_5%

51_0402_5%

+1.05VS

+3VALW

4

1 2

R109 10M_0402_5%R109 10M_0402_5%

1

OSC4OSC

C214

NC3NC

2

CMOS

CLRP2

SHORT PADS

CLRP2

SHORT PADS

1

12

2

CLRP3

SHORT PADS

CLRP3

SHORT PADS

1

12

2

R119

@ R119

@

1 2

0_0402_5%

HDA_SYNC

PCH_JTAG_TCK

EC_RSMRST#

XDP_DBRESET#

PCH_JTAG_TDO

PCH_JTAG_TDI PCH_JTAG_TMS

PCH_JTAG_TCK

4

Y1

1

2

32.768KHZ_12.5PF_9H03200413

PCH_RTCX1

PCH_RTCX2

PCH_RTCRST#

PCH_SRTCRST#

SM_INTRUDER#

PCH_INTVRMEN

HDA_BIT_CLK

HDA_SYNC

HDA_SPKR

HDA_RST#

HDA_SDIN0

HDA_SDOUT

PCH_GPIO33

PCH_GPIO13

PCH_JTAG_TCK

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

SPI_CLK_PCH_R

SPI_SB_CS0#

SPI_SI

SPI_SO_R

R85 1K_0402_1%@ R85 1K_0402_1%@

1 2

R761 0_0402_5%@R761 0_0402_5%@

1 2

R290 0_0402_5%@R290 0_0402_5%@

1 2

R84 1K_0402_1%@ R84 1K_0402_1%@

1 2

PCH_RTCX1

PCH_RTCX2

C215

C215 18P_0402_50V8J

18P_0402_50V8J

A20

C20

D20

G22

K22

C17

N34

L34

T10

K34

E34

G34

C34

A34

A36

C36

N32

J3

H7

K5

H1

T3

Y14

T1

V4

U3

3

http://hobi-elektronika.net

U6A

RTCX1

RTCX2

RTCRST#

SRTCRST#

INTRUDER#

INTVRMEN

HDA_BCLK

HDA_SYNC

SPKR

HDA_RST#

HDA_SDIN0

HDA_SDIN1

HDA_SDIN2

HDA_SDIN3

HDA_SDO

HDA_DOCK_EN# / GPIO33

HDA_DOCK_RST# / GPIO13

JTAG_TCK

JTAG_TMS

JTAG_TDI

JTAG_TDO

SPI_CLK

SPI_CS0#

SPI_CS1#

SPI_MOSI

SPI_MISO

COUGARPOINT_FCBGA989

JDB2

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

G1

28

G2

ACES_88717-2601

ME@

RTCIHDA

JTAG

SPI

FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3

LPC

FWH4 / LFRAME#

LDRQ0#

LDRQ1# / GPIO23

SERIRQ

SATA0RXN SATA0RXP SATA0TXN

SATA0TXP

SATA1RXN

SATA 6G

SATA1RXP SATA1TXN

SATA1TXP

SATA2RXN SATA2RXP SATA2TXN

SATA2TXP

SATA3RXN SATA3RXP SATA3TXN

SATA3TXP

SATA4RXN SATA4RXP SATA4TXN

SATA

SATA4TXP

SATA5RXN SATA5RXP SATA5TXN

SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3RCOMPO

SATA3COMPI

SATA3RBIAS

SATALED#

SATA0GP / GPIO21

SATA1GP / GPIO19

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C38 A38 B37 C37

D36

E36 K36

V5

AM3 AM1 AP7 AP5

AM10 AM8 AP11 AP10

AD7 AD5 AH5 AH4

AB8 AB10 AF3 AF1

Y7 Y5 AD3 AD1

Y3 Y1 AB3 AB1

Y11

Y10

AB12

AB13

AH1

P3

V14

P1

3

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

LPC_FRAME#

SERIRQ

SATA_ITX_C_DRX_N0 SATA_ITX_C_DRX_P0

SATA_ITX_C_DRX_N3 SATA_ITX_C_DRX_P3

SATA_ITX_C_DRX_N4 SATA_ITX_C_DRX_P4

SATA_COMP

SATA3_COMP

RBIAS_SATA3

HDD_LED#

EEPROM_WP

3G_DET#

10/29

LPC_AD0 24,30 LPC_AD1 24,30 LPC_AD2 24,30 LPC_AD3 24,30

LPC_FRAME# 24,30

R116 10K_0402_5%R116 10K_0402_5%

R127 750_0402_1%R127 750_0402_1%

R130

@R130

@

10K_0402_5%

2009/12/01 2010/12/31

R123

37.4_0402_1%

1 2

R125

49.9_0402_1%

1 2

10K_0402_5%

R132

10K_0402_5%

R133

12

3G_DET# 22

EC and Mini card debug port

SERIRQ 24

+1.05VS_VCC_SATA

+1.05VS_SATA3

12

@R132

@

+3VS

EEPROM_WP 12

10/11

+3VS

Compal Secret Data

Deciphered Date

2

+3VS

SATA_DTX_C_IRX_N0

SATA_DTX_C_IRX_P0

SATA_ITX_DRX_N0_CONN

C2190.01U_0402_16V7K C2190.01U_0402_16V7K

12 12

C2200.01U_0402_16V7K C2200.01U_0402_16V7K

C2230.01U_0402_16V7K C2230.01U_0402_16V7K C2240.01U_0402_16V7K C2240.01U_0402_16V7K

C2250.01U_0402_16V7K C2250.01U_0402_16V7K C2260.01U_0402_16V7K C2260.01U_0402_16V7K

SATA_ITX_DRX_P0_CONN

SATA_DTX_C_IRX_N3 SATA_DTX_C_IRX_P3 SATA_ITX_DRX_N3 SATA_ITX_DRX_P3

SATA_DTX_C_IRX_N4

SATA_DTX_C_IRX_P4

SATA_ITX_DRX_N4 SATA_ITX_DRX_P4

4MB SPI ROM FOR ME & Non-share ROM.

+3VS

R141

R142

R143

0_0402_5%

2

0_0402_5%

1 2 1 2

33_0402_5%

R144

SPI_SB_CS0#

SATA_DTX_C_IRX_N0 29 SATA_DTX_C_IRX_P0 29 SATA_ITX_DRX_N0_CONN 29 SATA_ITX_DRX_P0_CONN 29

SATA_DTX_C_IRX_N3 22 SATA_DTX_C_IRX_P3 22 SATA_ITX_DRX_N3 22

SATA_ITX_DRX_P3 22

SATA_DTX_C_IRX_N4 27 SATA_DTX_C_IRX_P4 27 SATA_ITX_DRX_N4 27

SATA_ITX_DRX_P4 27

SPI_WP#

1 2

3.3K_0402_5%

SPI_HOLD#

1 2

3.3K_0402_5%

U5

1 2

SPI_WP#

3 4

S IC FL 32M W25Q32BVSSIG SOIC 8P

1

HDD

mSATA

ESATA

SPI_CLK_PCH

R137

33_0402_5%

@

C227

22P_0402_50V8J

@

R1450_0402_5% R1450_0402_5%

SPI_CLK_PCH_R SPI_SI

@

11 40Wednesday, November 03, 2010

+3VS

C228

1 2

0.1U_0402_16V4Z

CS# SO WP# GND

8

VCC

SPI_HOLD#SPI_SO_R SPI_SO_L

7

HOLD#

Title

Size Document Number Rev

Custom

Date: Sheet

SCLK

SPI_CLK_PCH

6

SPI_SI_R

5

SI

1 2 1 2

33_0402_5%

R146

Compal Electronics, Inc.

PCH (1/8) SATA,HDA,SPI, LPC, XDP

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1

12

0.2

of

5

PCIE_PRX_DTX_N229

WLAN

D D

Card reader

LAN

C C

WLAN

Card reader

LAN

B B

PCIE_PRX_DTX_P229 PCIE_PTX_C_DRX_N229 PCIE_PTX_C_DRX_P229

PCIE_PRX_DTX_N329

PCIE_PRX_DTX_P329 PCIE_PTX_C_DRX_N329 PCIE_PTX_C_DRX_P329

PCIE_PRX_DTX_N429

PCIE_PRX_DTX_P429 PCIE_PTX_C_DRX_N429 PCIE_PTX_C_DRX_P429

CLK_PCIE_WLAN1#29 CLK_PCIE_WLAN129

WLAN_CLKREQ1#29

CLK_PCIE_CR#29 CLK_PCIE_CR29

CLKREQ_CR#29

CLK_PCIE_LAN#29 CLK_PCIE_LAN29

CLKREQ_LAN#29

+3VALW

CLK_XDP_CLK#5

CLK_XDP_CLK5

C233 0.1U_0402_10V7KC233 0.1U_0402_10V7K

1 2

C229 0.1U_0402_10V7KC229 0.1U_0402_10V7K

1 2

C230 0.1U_0402_10V7KC230 0.1U_0402_10V7K

1 2

C234 0.1U_0402_10V7KC234 0.1U_0402_10V7K

1 2

C231 0.1U_0402_10V7KC231 0.1U_0402_10V7K

1 2

C232 0.1U_0402_10V7KC232 0.1U_0402_10V7K

1 2

R160 10K_0402_5%R160 10K_0402_5%

+3VALW

R162 0_0402_5%R162 0_0402_5%

1 2

R164 0_0402_5%R164 0_0402_5%

1 2

R166 0_0402_5%R166 0_0402_5%

1 2

R167 10K_0402_5%R167 10K_0402_5%

+3VS

R179 0_0402_5%R179 0_0402_5%

1 2

R180 0_0402_5%R180 0_0402_5%

1 2

R169 10K_0402_5%R169 10K_0402_5%

+3VS

R182 0_0402_5%R182 0_0402_5%

1 2

R171 0_0402_5%R171 0_0402_5%

1 2

R173 0_0402_5%R173 0_0402_5%

1 2

R176 10K_0402_5%R176 10K_0402_5%

+3VALW

R175 0_0402_5%R175 0_0402_5%

1 2

R184 10K_0402_5%R184 10K_0402_5%

+3VALW

R186 10K_0402_5%R186 10K_0402_5%

+3VALW

R188 10K_0402_5%R188 10K_0402_5%

+3VALW

R190 10K_0402_5%R190 10K_0402_5%

R193 10K_0402_5%R193 10K_0402_5%

+3VALW

12

CLK_PCIE_WLAN1#_R CLK_PCIE_WLAN1_R

4

PCIE_PRX_DTX_N2 PCIE_PRX_DTX_P2 PCIE_PTX_DRX_N2 PCIE_PTX_DRX_P2

PCIE_PRX_DTX_N3 PCIE_PRX_DTX_P3 PCIE_PTX_DRX_N3 PCIE_PTX_DRX_P3

PCIE_PRX_DTX_N4 PCIE_PRX_DTX_P4 PCIE_PTX_DRX_N4 PCIE_PTX_DRX_P4

PCH_GPIO73

WLAN_CLKREQ1#_R

CLK_PCIE_CR#_R CLK_PCIE_CR_R

CLKREQ_CR#_R

CLK_PCIE_LAN#_R CLK_PCIE_LAN_R

CLKREQ_LAN#_R

PCH_GPIO26

PCH_GPIO44

PCH_GPIO56

PCH_GPIO45

PCH_GPIO46

U6B

BG34 BJ34 AV32 AU32

BE34 BF34 BB32 AY32

BG36 BJ36 AV34 AU34

BF36 BE36 AY34 BB34

BG37 BH37 AY36 BB36

BJ38 BG38 AU36 AV36

BG40 BJ40 AY40 BB40

BE38 BC38

AW38

AY38

AB49 AB47

AA48 AA47

AB42 AB40

AK14 AK13

Y40 Y39

J2

M1

V10

Y37 Y36

A8

Y43 Y45

L12

V45 V46

L14

E6

V40 V42

T13

V38 V37

K12

http://hobi-elektronika.net

PERN1 PERP1 PETN1 PETP1

PERN2 PERP2 PETN2 PETP2

PERN3 PERP3 PETN3 PETP3

PERN4 PERP4 PETN4 PETP4

PERN5 PERP5 PETN5 PETP5

PERN6 PERP6 PETN6 PETP6

PERN7 PERP7 PETN7 PETP7

PERN8 PERP8 PETN8 PETP8

CLKOUT_PCIE0N CLKOUT_PCIE0P

PCIECLKR Q0# / GPIO73

CLKOUT_PCIE1N CLKOUT_PCIE1P

PCIECLKR Q1# / GPIO18

CLKOUT_PCIE2N CLKOUT_PCIE2P

PCIECLKR Q2# / GPIO20

CLKOUT_PCIE3N CLKOUT_PCIE3P

PCIECLKR Q3# / GPIO25

CLKOUT_PCIE4N CLKOUT_PCIE4P

PCIECLKR Q4# / GPIO26

CLKOUT_PCIE5N CLKOUT_PCIE5P

PCIECLKR Q5# / GPIO44

CLKOUT_PEG_B_N CLKOUT_PEG_B_P

PEG_B_CLKRQ# / GPIO56

CLKOUT_PCIE6N CLKOUT_PCIE6P

PCIECLKR Q6# / GPIO45

CLKOUT_PCIE7N CLKOUT_PCIE7P

PCIECLKR Q7# / GPIO46

CLKOUT_BCLK0_N / CLKOUT_PCIE8N CLKOUT_BCLK0_P / CLKOUT_PCIE8P

COUGARPOINT_FCBGA989

SMBUSController

SML1ALERT# / PCHHOT# / GPIO74

PCI-E*

CLOCKS

CLKOUT_DP_N / CLKOUT_BCLK1_N CLKOUT_DP_P / CLKOUT_BCLK1_P

3

SMBALERT# / GPIO11

SMBCLK

SMBDATA

SML0ALERT# / GPIO60

SML0CLK

SML0DATA

SML1CLK / GP IO58

SML1DATA / GPIO75

CL_CLK1

Link

CLKIN_SATA_N / CKSSCD_N

CLKIN_SATA_P / CKSSCD_P

FLEX CLOCKS

CL_DATA1

CL_RST1#

PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKOUT_DMI_N CLKOUT_DMI_P

CLKIN_DMI_N CLKIN_DMI_P

CLKIN_DMI2_N CLKIN_DMI2_P

CLKIN_DOT_96N CLKIN_DOT_96P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

CLKOUTFLEX3 / GPIO67

EC_LID_OUT#

E12

PCH_SMBCLK

H14

PCH_SMBDATA

C9

DRAMRST_CNTRL_PCH

A12

PCH_SML0CLK

C8

PCH_SML0DATA

G12

PCH_GPIO74

C13

PCH_SML1CLK

E14

PCH_SML1DATA

M16

M7

T11

P10

GPIO23_CLKREQB_R

M10

AB37 AB38

CLK_CPU_DMI#

AV22

CLK_CPU_DMI

AU22

AM12 AM13

CLK_BUF_CPU_DMI#

BF18

CLK_BUF_CPU_DMI

BE18

CLKIN_DMI2#

BJ30

CLKIN_DMI2

BG30

CLK_BUF_DREF_96M#

G24

CLK_BUF_DREF_96M

E24

CLK_BUF_PCIE_SATA#

AK7

CLK_BUF_PCIE_SATA

AK5

CLK_BUF_ICH_14M

K45

CLK_PCI_LPBACK

H45

XTAL25_IN

V47

XTAL25_OUT

V49

XCLK_RCOMP

Y47

K43

F47

H47

K49

10K_0402_5%

12

R148

EC_LID_OUT# 24

R152

1K_0402_5%

12

10K_0402_5%

12

R153

+3VALW

R156

R156 10K_0402_5%

10K_0402_5%

1 2

CLK_CPU_DMI# 5 CLK_CPU_DMI 5

R168 10K_0402_5%R168 10K_0402_5%

1 2

R170 10K_0402_5%R170 10K_0402_5%

1 2

R172 10K_0402_5%R172 10K_0402_5%

1 2

R174 10K_0402_5%R174 10K_0402_5%

1 2

R177 10K_0402_5%R177 10K_0402_5%

1 2

R178 10K_0402_5%R178 10K_0402_5%

1 2

R181 10K_0402_5%R181 10K_0402_5%

1 2

R183 10K_0402_5%R183 10K_0402_5%

1 2

R185 10K_0402_5%R185 10K_0402_5%

1 2

CLK_PCI_LPBACK 15

R189

90.9_0402_1%

1 2

+3VALW

DRAMRST_CNTRL_PCH 6

+3VALW

+3VALW +3VS

PCH_SML0CLK

PCH_SML0DATA

+1.05VS_VCCDIFFCLKN

2

+3VALW

R206 2.2K_0402_5%R206 2.2K_0402_5%

R250 2.2K_0402_5%R250 2.2K_0402_5%

2.2K_0402_5%

2.2K_0402_5% R149

R149

1 2

R151

2.2K_0402_5%

2.2K_0402_5% R154

R154

1 2

R155

2.2K_0402_5%

12

XTAL25_IN

XTAL25_OUT

C235

C235 27P_0402_50V8J

27P_0402_50V8J

+3VALW

ROM_A0 ROM_A1 ROM_A2

Q2A

Q2A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

6 1

3

6 1

3

1 2 3 4

SMB_CLK_S3

2.2K_0402_5%

1 2

2

+3VS

1 2

5

2.2K_0402_5%

SMB_DATA_S3

4

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6 Q2B

Q2B

Q10A

Q10A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6 Q10B

Q10B

U32

A0 A1 A2 GND

AT24C08BN-SH-T_SO8

EC_SMB_CK2

2

5

EC_SMB_DA2

4

12

R305

R305 10K_0402_5%

10K_0402_5%

ROM_A2 ROM_A0ROM_A1

12

R308

R308 10K_0402_5%

10K_0402_5%

@

VCC

WP

SCL SDA

EEPROM_WP

12

R309

R309 10K_0402_5%

10K_0402_5%

1 2

R187 1M_0402_5%R187 1M_0402_5%

1

25MHZ_20PF_7A25000012

2

8 7 6 5

Y2

12

SMB_CLK_S3 10,22

DIMM1

R150

R147

MINI CARD

SMB_DATA_S3 10,22

EC_SMB_CK2 24,25

EC thermal sensor

EC_SMB_DA2 24,25

12

R307

R307 10K_0402_5%

10K_0402_5%

@

12

R302

R302 10K_0402_5%

10K_0402_5%

@

EEPROM_WP SMB_CLK_S3 SMB_DATA_S3

EEPROM_WP 11

1

C236

C236 27P_0402_50V8J

27P_0402_50V8J

2

1

+3VS+3VS +3VS

12

10/11

R304

R304 10K_0402_5%

10K_0402_5%

@

R303

R303 10K_0402_5%

10K_0402_5%

@

10/5

+3VS

C670

1

0.1U_0402_16V4Z

2

C238

@C238

12

@

22P_0402_50V8J

1 2

R196

@R196

@

33_0402_5%

A A

CLK_PCI_LPBACK

33_0402_5%

Reserve for EMI please close to PCH

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/01 2010/12/31

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PCH (2/8) PCIE, SMBUS, CLK

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1

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Lenovo E220s Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual