Lenovo A369i schematic diagram and service manual
5 4 3 2 1
Celullar ANT
FEM
TX
RX
balun
32K
Headset
(HPL, HPR, AU_VIN1)
Class D/AB
Receiver
26M
TCXO
RX
D
Connectivity ANT
C
26M_BB
26M_CN
CONN IQ
CONN ctrl
32K_BB
AUD I/F
BPI, APC
RF IQ
BSI ctrl
26M_AUD
MT6166
DCXO ctrl
26M_CN
MT6627
RTC
MT6323
Audio
Speech
EMI x32
Memory
MCP
D
micro SD
+ hot-plug
CMMB
C
Camera
Module
Module
LCD
module
NFI
MSDC 4-bit
EINT
Camera IF
Camera IF2nd Camera
LCD IF LCD
I2C
EMI
NFI
MSDC1
SPI
CAM
(MIPI / Parallel)
i2C_0
(MIPI / Parallel)
MT6572
ABB
CTP
controller
B
Motion
Sensor
ALS + PXS
Magnetic
sensor
Gyro
sensor
Keypad
I2C
EINT
I2C
EINT
I2C
EINT
I2C
EINT
I2C
EINT
i2C_1
SPI
BC1.1
POWER
Power
Management
Charger
Charger
VIB
SIM2
SIM1
AU_VIN0
B
SIM2
SIM1
Battery
BJT
A
Debug
port
JTAG
UART
USB
USB 2.0
micro USB
Title
MT6572 Block diagram
Size Document Number Rev
D
Friday, December 28, 2012
Date: Sheet of 151
12345
A
V1.0
5 4 3 2 1
GND
100nF
U101-H
[2,3,4,5,7,9,15] VIO18_PMU
D
[2,3,4,5,7,9,15] VIO18_PMU
[4] VUSB_PMU
C104
C101
C107
0201
0201
100nF
100nF
GND GND
dedicate VSS ball, must return to cap then to main GND:
1. REFN(G6) => C109
2. DVSS18_MIPIRX(U25) => C107
4. C101,C104,C107,C108,C109,C112,C113,C128 close to BB
C
B
A
C113
0201
0402
1uF
100nF
GND
GND
GND
T25
DVDD18_MIPIRX
U25
DVSS18_MIPIRX
R25
DVDD18_MIPITX
P25
DVSS18_MIPITX
H23
AVDD18_USB
G24
AVDD33_USB
G23
AVSS33_USB
F6
REFP
C109
G6
REFN
0402
1uF
MT6572/TFBGA428/P0.4/B0.25/10.6X10.6
GND
AC21
GND
AB11
GND
AF13
GND
AD11
GND
AC8
GND
AB5
GND
AB14
GND
W26
GND
T15
GND
W23
GND
T14
GND
AF26
GND
G3
GND
K21
GND
L11
GND
L12
GND
L14
GND
L15
GND
L16
GND
M5
GND
M11
GND
M12
GND
M13
GND
M14
GND
M15
GND
M16
GND
N10
GND
N8
GND
N9
GND
N11
GND
N12
GND
N13
GND
N14
GND
N15
GND
N16
GND
N22
GND
P10
GND
P11
GND
P12
GND
P13
GND
P14
GND
P15
GND
P16
GND
R10
GND
R11
GND
R12
GND
R13
GND
R14
GND
R15
GND
R16
GND
T10
GND
T11
GND
T12
GND
T13
GND
AF1
GND
U10
GND
U11
GND
V13
GND
W11
GND
Y21
GND
GND
A26
DUMMY
BG
U101-B
VCC
Memory
DVDD
Peripheral
VCC
CPU
VCC
Core
AVDD28_DAC
AVDD18_AP
DVDD18_PLLGP
AVDD18_MD
AVSS18_MD
AVSS18_MD
AVSS18_MD
AVSS18_MD
VCCIO_EMI
VCCIO_EMI
VCCIO_EMI
VCCIO_EMI
VCCIO_EMI
DVDD18_MC0
DVDD18_CAM
DVDD18_VIO_1
DVDD18_VIO_2
DVDD18_VIO_3
DVDD18_LCD
DVDD3_MC1
DVDD3_LCD
DVDD28_BPI
VCCK_CPU
VCCK_CPU
VCCK_CPU
VCCK_CPU
VCCK_CPU
VCCK_CPU
VCCK_CPU
VCCK_CPU
VCCK_CPU
VCCK_CPU
VCCK_CPU
VCCK_CPU
VCCK_CPU
VCCK_CPU
F1
E5
U9
D3
A1
A4
C3
E2
W9
W12
W14
W16
W19
AA1
K20
L3
J19
H13
AB24
K24
W24
C10
P6
T7
P7
P8
P9
R6
R7
R8
R9
T6
U6
T9
T8
U7
J9
VCCK
J15
VCCK
M9
VCCK
K6
VCCK
K7
VCCK
K8
VCCK
K9
VCCK
K11
VCCK
K14
VCCK
K15
VCCK
M10
VCCK
K16
VCCK
K17
VCCK
U17
VCCK
J8
VCCK
L7
VCCK
L8
VCCK
L9
VCCK
L17
VCCK
M6
VCCK
M7
VCCK
M8
VCCK
J10
VCCK
J11
VCCK
J14
VCCK
T16
VCCK
L6
VCCK
K12
VCCK
T17
VCCK
J16
VCCK
J17
VCCK
U12
VCCK
U13
VCCK
U14
VCCK
U15
VCCK
U16
VCCK
M17
VCCK
R17
VCCK
C112
0201
100nF
GND
if use emmc,DVDD18_MC0 should add a 100nF cap
C117
0402
1uF
GND
C130
0201
100nF
C114
100nF
0201
C108
VTCXO_PMU
VIO18_PMU
VIO18_PMU
C128
0201
100nF
GND
C405
C406
0201
0201
100nF
100nF
GND
GND
C117 Close to BB IC, recommand < 150mil
120mil
C135
C134
C120
C115
C116
C118
0201
0201
0201
0201
100nF
100nF
100nF
GNDGND GND GND
0R
R101
0201
0R
R102
0201
C119
0402
0402
0402
0402
1uF
1uF
1uF
1uF
feedback-4mil - defferential - GND shielding
Vproc remote sense :
differential 4mil with good shielding, from the BB to PMIC
[4,7]
[2,3,4,5,7,9,15]
[2,3,4,5,7,9,15]
1.8V IO for DDR1
1.2V IO for DDR2
[5]
VIO_EMI
If double-sided SMT, put C405 & C406 below BB.
If single-sided SMT, put C405 & C406 around memory.
[4]VMC_PMU
[4,6,9]VIO28_PMU
C136
C111
C137
0603
4.7uF
0402
0402
2.2uF
2.2uF
C121
0402
1uF
GND
C106
C102
C103
0603
0603
0603
10uF
10uF
10uF
GND_VPROC_FB
0R
R119
0402
0402
1uF
GND
R119,C121
Based on your system level
design , if better FM performance
is needed on your system ,
please refer to FM desense
performance enhance proposal
[4]VPROC_PMU
[4]
[4]VPROC_FB
D
C
[2,3,4,5,7,9,15]
VIO18_PMU
C126
100nF
0201
C138
B
A
MT6572/TFBGA428/P0.4/B0.25/10.6X10.6
Title
BB- Power
Size Document Number Rev
D
Wednesday, January 02, 2013
Date: Sheet of 152
MT6572 REF PHONE
12345
V1.0
0
5 4 3 2 1
RF PART
U101-A
D
C
B
A
[7]RX_Q_P
[7]
[7] TX_I_P
[7] TX_I_N
[7] TX_Q_P
[7]TX_Q_N
RX_Q_N
[7] VM0
[7]
[7]
[7] VAPC1
VM1
TXBPI
B1
DL_Q_P
C1
DL_Q_N
A2
UL_I_P
B2
UL_I_N
B4
UL_Q_P
B3
UL_Q_N
A8
VM0
A7
VM1
D5
TXBPI
F2
APC
F3
VBIAS
MT6572/TFBGA428/P0.4/B0.25/10.6X10.6
D2
[7]
RX_I_P
DL_I_P
C2
DL_I_N
[7] RX_I_N
BPI_BUS[0:6] are 2.8V GPIO,power with DVDD28_BPI(VIO28_PMU)
B12
BPI_BUS0
B11
BPI_BUS1
C12
BPI_BUS2
A11
BPI_BUS3
D11
BPI_BUS4
C11
BPI_BUS5
A13
BPI_BUS6
A10
BPI_BUS7
B10
BPI_BUS8
D10
BPI_BUS9
E9
BPI_BUS10
E8
BPI_BUS11
B9
BPI_BUS12
B8
BPI_BUS13
E7
BPI_BUS14
D7
BPI_BUS15
D6
BSI_DATA2
C7
BSI_DATA1
F9
BSI_DATA0
F11
BSI_EN
G11
BSI_CLK
SH202
1
AT700A-BB&RF-BASE-1
GND
[7]BPI_BS0
[7]BPI_BS1
BPI_BS2
[7]
[7]BPI_BS3
BPI_BUS4=0,boot from emmc/nand(default)
BPI_BS4
BPI_BUS4=1,boot from SD/SPI-NAND
BPI_BS5
[6]
EINT_HP
W_PA_B1_EN
[7]
[6]GPIO_SPK_EN
[7]
W_PA_B8_EN
[9]TP_ID
[7]BSI-A_DAT2
[7]BSI-A_DAT1
[7]BSI-A_DAT0
[7]BSI-A_EN
[7]BSI-A_CK
90-ohm differential
SH201
1
AT700A-BB&RF-BASE-1
GND
[4] RESETB
[11] USB_DM
[11] USB_DP
R203 close to BB
[7] CLK1_BB
[4]
GND
for CAM,Power by CAM_IO
PAD201
MD PAD
GND
[4]
[4] AUD_MOSI
[4] PMIC_SPI_MOSI
[4] PMIC_SPI_MISO
[4]
PMIC_SPI_SCK
[4] PMIC_SPI_CS
[4]
[4,7] SRCLKENA
[4] EINT_PMIC
[3,4] SIM1_SCLK
[4] SIM1_SIO
[4] SIM2_SCLK
U101-E
E1
CLK26M
H2
CLK32K_BB
GND
for CTP
CLK32K_IN
M2
SYSRSTB
GND
G4
TESTMODE
C201
AC24
GND
FSOURCE
0201
NC(330PF)
J26
[4]
CHD_DP
CHD_DP
J25
[4] CHD_DM
CHD_DM
G26
USB_DM
G25
USB_DP
5.1K
R203
H25
USB_VRT
0402
C25
SCL_0
[10] SCL_0
C26
[10] SDA_0
SDA_0
B24
[9]
SCL_1
SCL_1
B23
[9]
SDA_1
SDA_1
F24
SPI_MISO
F25
SPI_MOSI
F23
SPI_SCK
E23
SPI_CS
K23
[12] MC1CMD
MC1_CMD
L21
MC1_CK
[12] MC1CK
K22
MC1_DAT0
[12] MC1DAT0
M22
[12]MC1DAT1
MC1_DAT1
M25
[12]MC1DAT2
MC1_DAT2
L26
MC1_DAT3
[12] MC1DAT3
B7
[9]
AUX_IN0
LCD_ID
B6
AUX_IN1
C5
AUX_IN2_XP
B5
AUX_IN3_YP
C4
AUX_IN4_XM
A5
AUX_IN5_YM
GND
MT6572/TFBGA428/P0.4/B0.25/10.6X10.6
PAD203
MD PAD
GND
[4] AUD_CLK
WATCHDOG
[4] SIM2_SIO
AUD_MISO
PMIC_SPI_CSN,AUD_DAT_MOSI
00,use pin map for LPDDR1
01,use pin map for LPDDR2
1x,use pin map for PCDDR3
J1
K5
K1
L2
L5
L4
K2
G2
H4
J2
H5
M3
J5
M1
PWM
SYSTEM
LCD
Parallel
BC 1.1
USB 2.0
i2C
SPI
KP
T-flash
UART
ADC
SPI&SIM PART
U101-D
AUD_DAT_MISO
AUD_CLK_MOSI
AUD_DAT_MOSI
PMIC_SPI_MOSI
PMIC_SPI_MISO
PMIC_SPI_SCK
PMIC_SPI_CSN
WATCHDOG
SRCLKENA
EINTX
SIM1_SCLK
SIM1_SIO
SIM2_SCLK
SIM2_SIO
MT6572/TFBGA428/P0.4/B0.25/10.6X10.6
D12
D12 PWM_A NP when power on,should add PD RES when use
PWM_A
E12
PWM_B
[9]EINT_CTP
N1
LPD17
N2
[9]
LCD_BK_EN_PMIC
LPD16
N3
LPD15
P2
LPD14
N4
LPD13
R2
LPD12
GND
N5
LPD11
NC
R1
LPD10
P5
VIO18_PMU
LPD9
T1
LPD8
R5
0201
LPD7
LPD6
LPD5
LPD4
LPD3
LPD2
LPD1
LPD0
LPCE0B
LPTE
LRSTB
LPRDB
LPA0
LPWRB
KROW0
KROW1
KROW2
KCOL0
KCOL1
KCOL2
UTXD1
URXD1
UTXD2
URXD2
MARK
T2
T5
R204
R205
U2
T3
U5
T4
R206
V2
R207
AD25
AB26
[9]LPTE
AC26
LRSTB
AA22
AB23
AC25
B25
KCOL0=0,force USB DL mode in bootrom
A24
KCOL0=1,NA(default)
B26
C24
D24
A25
KCOL2
E25
D25
E26
F26
MK201
1
SMT MARK
对应单软多硬设计by sunning 20130524
0R
0201
0R
0201
NC
0201
[9]
[9]GPIO_CTP_RSTB
[11]KCOL0
[14]KCOL1
[14]
R201
0201
R208
0201
R210
0201
R211
0201
MK202
1
SMT MARK
GND
1K
1K
1K
1K
MK203
1
SMT MARK
for GSENSOR
MIPI 100-ohm differential
GND
R202 close to BB
reserve for JTAG debug
R209
[3,4]
SIM1_SCLK
MK204
1
SMT MARK
U101-G
L25
[15]
SDA_2
CMPDN2
K25
SCL_2
[15]
CMRST2
H22
CMPDN
[10] CMPDN
J22
CMRST
[10] CMRST
R24
RDN0
R23
RDP0
R22
RDN1
R21
RDP1
R26
RCN
T26
RCP
P19
[9] MIPI_TDN0
[9] MIPI_TDN1
[9] MIPI_TDP1
R202
0402
TEST203
TEST204
TEST205
TDN0
P20
[9]MIPI_TDP0
TDP0
N25
TDN1
N26
TDP1
P23
TDN2
P24
TDP2
N20
[9] MIPI_TCN
TCN
N19
TCP
[9]MIPI_TCP
1.5K
P26
VRT
0402
MT6572/TFBGA428/P0.4/B0.25/10.6X10.6
GPIO输入电位(2ND)
组态
GPIO14(LPD0)
0
1
2
3
[2,3,4,5,7,9,15]
VIO18_PMU
NC(20K)
MT6572 support JTAG from below :
1. KP (recommand),JTAG:R209=20K,normal:R209=NC
2. MC1
3. CAM
for JTAG pin out from MC1/CAM, refer
JTMS
to HW design notice
JTCK
TEST201
TEST202
TEST206
TEST207
[4]
FCHR_ENB
Title
BB - peripheral
Size Document Number Rev
D
Wednesday, January 02, 2013
Date: Sheet of 153
0
0
1
1
CAM&LCM PART
MIPI_CAM
MIPI_LCD
单软多硬映射表
GPIO
GPIO18(LPD4)
MIPI_2nd_CAM
Parallel 8-bit
CMMCLK
CMPCLK
RCN_A
RCP_A
RDN1_A
RDP1_A
RDN0_A
RDP0_A
CMDAT3
CMDAT2
CMDAT1
CMDAT0
输入电位(1ST)
R204 R205
R206 R207
NC0R
NC
0
0R
NC NC
1
0
1
MT6572 REF PHONE
12345
D
Y22
[10]CMMCLK
Y23
[10]CMPCLK
V25
[10]
CMVSYNC
W25
[10]CMHSYNC
V24
[10]CMDAT7
V23
[10]CMDAT6
U22
[10]CMDAT5
U21
[10]CMDAT4
Y26
[10]CMDAT3
Y25
[10]CMDAT2
AA25
[10]CMDAT1
AB25
[10]CMDAT0
C
2G
3G
NC
B1&B8
900/1800/1900
B2&B5
850/1800/1900
NC
B
A
V1.0
5 4 3 2 1
1. charge part Close to Battery Connector.
(Rsense (R328) <10mm)
[11]VBUS
330K/1%
R329
0402
40mils
R331
E
U303
WPT2F30
B
34
0R
R310
0201
R328
0805
0.2R/1%
0R
R301
0201
16.9K/1%
0402
R334
R334,R335 must to be close to
27K/1%
PMIC AUXADC_REF pin
if battery NTC is 10kohm, R334=16.9K, R335=27K
0402
if battery NTC is 47kohm, R334=61.9K, R335=100K
Refer to MT6323 HW design notice
R335
GND
2. Main path should be 40mil.
(VBUS -> U303's E, -> U303's C -> R328 -> VBAT)
3. Star connection from R328 to BAT Connector
[4]VCDT
VCDT rating: 1.268V
VCDT rating: 1.268V
39K/1%
R324
GND
0402
3.3K
0402
1
U305
PNM723T703E0-2
23
4mil
Differential 4mil to PMU
4mil
R317
0402
C310
C359
0603
0603
22uF
NC(22uF)
GND
GND
[4,6,7,9]VBAT
BATSNS
[4]AUXADC_REF
[4,6,7,9]VBAT
1K
[4]BAT_ON
80mil
FV303
C361
0402
100nF
ESD9X5.0ST5G
[4]CHR_LDO
[4]VDRV
[4]ISENSE
[4]
ISENSE/BSTSNS 4mil
differential to Rsense
NC
R120
0201
[4]
VSYS_PMU
[2,3,4,5,7,9,15] VIO18_PMU
Refer to MT6323 design notice
for Buck GND layout rule
[4] BATSNS
[4] ISENSE
[4] BAT_ON
[4] VCDT
[4] VDRV
[4] CHR_LDO
40mil
4mil (VPA no use)
15mil
20mil
20mil
20mil
20mil
D
U301
MT6323/VFBGA145/P0.4/B0.25/5.8X5.8
0R
R336
0603
C362
100nF
GND
C315
0201
main mic
100nF
GND
earphone mic
[6] ACCDET
[7]
CLK4_AUDIO
GND
C313
2.2uF
0402
0402
[6] AU_VIN0_P
[6] AU_VIN0_N
[6] AU_VIN1_P
[6] AU_VIN1_N
[3] AUD_MOSI
[3] AUD_CLK
[3]
AUD_MISO
[3,7]
SRCLKENA
[3]
FCHR_ENB
[3] PMIC_SPI_SCK
[3]PMIC_SPI_MOSI
PMIC_SPI_MISO
[3]
[3] CHD_DM
[3]
[3] SIM1_SCLK
[3] SIM1_SIO
[3] SIM2_SCLK
[3] SIM2_SIO
[13]
[13] SIO
[13] SRST
[13] SCLK2
[13]
[13] SRST2
P1
VBAT_SPK
L2
GND_SPK
F2
AU_MICBIAS0
G2
AU_MICBIAS1
E4
AU_VIN0_P
AUDIO
F4
AU_VIN0_N
G3
AU_VIN1_P
G4
AU_VIN1_N
D2
AU_VIN2_P
D1
AU_VIN2_N
J2
AVDD28_ABB
D3
AVDD28_AUXADC
H2
GND_ABB
E2
ACCDET
E1
CLK26M
CHARGER
P13
BATSNS
P12
ISENSE
K3
BATON
A12
VCDT
M13
VDRV
N13
CHRLDO
CONTROL SIGNAL
M2
PWRKEY
A1
SYSRSTB
K4
RESETB
A9
FSOURCE
A7
INT
N12
EXT_PMIC_EN
GND
N2
PMU_TESTMODE
E7
AUD_MOSI
E8
AUD_CLK
B6
AUD_MISO
A2
SRCLKEN
M1
FCHR_ENB
D9
SPI_CLK
B7
SPI_CSN
D8
SPI_MOSI
B8
SPI_MISO
VBAT INPUT
F13
VBAT_VPROC
F14
VBAT_VPROC
G13
VBAT_VPROC
A13
VBAT_VPA
H13
VBAT_VSYS
P8
VBAT_LDOS3
P6
VBAT_LDOS3
analog LDO
P5
VBAT_LDOS2
P2
VBAT_LDOS1
J14
AVDD22_BUCK
M14
AVDD22_BUCK
A8
DVDD18_DIG
A5
DVDD18_IO
AUXADC
C2
AUXADC_VREF18
B1
AUXADC_AUXIN_GPS
B2
AVSS28_AUXADC
BC 1.1
A10
CHG_DM
A11
CHG_DP
CHD_DP
SCLK
SIO2
M11
K11
N11
M10
L11
K10
B5
E6
C5
D6
M9
K9
MT6323A
SIM1_AP_SCLK
SIMLS1_AP_SIO
SIM1_AP_SRST
SIM2_AP_SCLK
SIMLS2_AP_SIO
SIM2_AP_SRST
SIMLS1_SCLK
SIMLS1_SIO
SIMLS1_SRST
SIMLS2_SCLK
SIMLS2_SIO
SIMLS2_SRST
GND_LDO
J10
SIM LVS
GND_LDOH9GND_LDO
GND_LDO
H8
H10
C312
0402
1uF
GND
GND
[3] PMIC_SPI_CS
AUXADC_REF
[6] MICBIAS1
C314
0402
1uF
[14]
[3] WATCHDOG
[3] RESETB
[3] EINT_PMIC
R303
GND
PWRKEY
0402
[4,6,7,9] VBAT
NC
C323
0201
100nF
GND
if you use digital MIC,
please change cap (C312)
to 1.0uF
[6] MICBIAS0
[4]
VA_PMU
C316
C316 Close to PMIC
0402
1uF
GND
C304
C301
C303
0603
0603
0402
10uF
10uF
1uF
GND
C305
0402
1uF
C302
C306
0402
0603
1uF
10uF
GND
C317
0402
1uF
GND
HW trapping PIN
R303=20K,VM=1.8V
R303=NC,VM=1.2V
[4]
C307
C308
C309
0402
0402
0603
1uF
1uF
10uF
EARPHONE
DRIVER
BUCK OUTPUT
GND_VPROC_FB
ALDO OUTPUT
DLDO OUTPUT
RTC
GND_LDO
H5
SPK
REC
VPROC_FB
AVDD33_RTC
VEMC_3V3
GND_VREF
RTC_32K1V8
RTC_32K2V8
GND_ISINK
GND_VSYS
GND_VPROC
GND_VPROC
GND_VPROC
GND_LDOG8GND_LDOG9GND_LDOH6GND_LDOH7GND_LDOJ9GND_LDOJ8GND_LDOJ7GND_LDOJ6GND_LDO
G7
VCAM_IO
VCAM_AF
GND_VPA
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
K1
[6]
AU_SPKP
SPK_P
L1
SPK_N
AU_HSP
AU_HSN
AU_HPL
AU_HPR
ISINK0
ISINK1
ISINK2
ISINK3
VPROC
VPROC
VPROC
VPA
VPA
VPA_FB
VSYS
VA
VCN28
VTCXO
VCAMA
VCN33
VM
VRF18
VIO18
VIO28
VCN18
VCAMD
VMC
VMCH
VUSB
VSIM1
VSIM2
VGP1
VIBR
VGP2
VGP3
VREF
XIN
XOUT
[6]AU_SPKN
H1
[6]AU_HSP
G1
[6]AU_HSN
H4
[6]AU_HPL
J4
[6]AU_HPR
E9
C9
E10
C10
GND
1PS79SB30,115
D301
C14
L301
D14
LPS2520H1MM2
E14
B12
C12
A14
B14
D12
H14
M3
N3
L4
P3
M6
C3
J13
H11
L12
M4
J12
K14
L13
P7
L6
P4
N6
P9
N9
L8
M7
N8
L14
N7
P14
N14
D5
C4
A3
A4
B10
G11
E13
E11
F11
F10
K6
K8
F5
F6
F7
F8
F9
G5
G6
NC(1nF)
C357
0201
L301,L303 Please use inductor recommand by MTK
Refer to MT6323 design notice
D301,D302,Ifsm>500mA,Vf<500mV when If=100mA
L303 0.68uH
LPS2520H1MM2
D302
GND
1PS79SB30,115
[4]
VA_PMU
[8]
VCN_2V8_PMU
[2,7]
VTCXO_PMU
[8]
VCN_3V3_PMU
[5]
VM_PMU
[7]
VRF18_PMU
[2,3,4,5,7,9,15]
VIO18_PMU
[2,6,9]
VIO28_PMU
[8]
VCN_1V8_PMU
[10]
VCAMD_PMU
VCAMD_IO_PMU
[2]
VMC_PMU
[12]
VMCH_PMU
[2]
VUSB_PMU
[13]
VSIM1_PMU
[13]
VSIM2_PMU
[9]
CTP_2.8V_PMU
[4]
VIBR_PMU
[9]
CTP_1.8V_PMU
C320
100nF
0402
GND
[3]CLK32K_BB
32K_IN
32K_OUT
GND
0.68uH
1K
C356
C355
0402
0402
100nF
1uF
R312
GND
C354
0201
100nF
GND
X301
C324
0201
18pF
Close to chip
R333
GND
[5]
VEMC_3V3_PMU
2
1
Q13MC1461000200// Q13MC1462000200
3
GND
GND
NC
0201
C319
0201
18pF
[10]
[15]VGSENSOR_PMU
dedicate VSS ball, must return to cap then to main GND:
1. GND_VREF(N14) => C320
RTC 32K : X301+C324+C319=> mount, R333=> NC
32K-less: X301+C324=> remove, C319+R333=> 0R
GND_VPROC_FB
VSYS_PMU
0402
C325
0603
NC(22uF)
21
GND
GND
[7]DCXO_32K
[2]VPROC_PMU
[2]VPROC_FB
[2]
[4]
[10]
VCAMA_PMU
VRTC
==> for longer RTC time sustain after battery remove,
please refer to RTC design notice
C350
GB301
0201
BATML414R
NC
VXODIG domain select
MODE
DCXO + 32K XO
DCXO + 32K-Less
default
DCXO_
Logic
32K_EN
0(GND)
1(VTXCO28)
XMODE
VXODIG
1(VIO18) 1(VIO18)
1(VTXCO28) 1(VTXCO28)
Vibra
VIBR_PMU
C311
0402
1uF
GND
C
[4]
B
1
P
VIB301
N
2
Charger
D
C329 cap rating depends on
Phone OVP spec.
Before you select BJT U303, please take
power dissipation into consideration.
Refer to MT6323 design notice
TP302TP301
TP303
BAT CONN
C
B
CON301
GND
4
56
GND
3
2
1
D305
ZENER-MM3Z5V1-5
D305
VF : 4.85V~5.36V
500mW
Add Zenar Diode Place on the path
from VBAT to IC (Battery connector
or test point or IO connector)
Refer to MT6323 design
notice for Zener selection
FV302
ESD9X5.0ST5G
C360
0603
47uF
C329
0603
1uF/50V
GND
52
C
C
40mils
C
C
16
40mils
R328 Rsense
40mils
40mils 40mils
FV301
C345
C344
0603
0402
100nF
47uF
ESD9X5.0ST5G
GND
GND
A
Title
PMIC
Size Document Number Rev
D
Friday, December 28, 2012
12345
MT6572 REF PHONE
415
Date: Sheet of
A
V1.0
5 4 3 2 1
D
VIO18_PMU
HW trapping PIN
20K: VM=1.8V
NC : VM=1.2V
[5]EA0
[5]EA1
[5]EA2
[5]EA3
[5]EA4
[5]EA5
[5]EA6
[5]EA7
[5]EA8
0R
VM_PMU VIO_EMI
C
[5]ED31
[5]ED30
[5]ED29
[5]ED28
[5]ED27
[5]ED26
[5]ED25
[5]ED24
[5]ED23
[5]ED22
[5]ED21
[5]ED20
[5]ED19
[5]ED18
[5]ED17
[5]ED16
[5]ED15
[5]ED14
[5]ED13
[5]ED12
[5]ED11
[5]ED10
[5]ED9
[5]ED8
[5]ED7
[5]ED6
[5]ED5
[5]ED4
[5]ED3
[5]ED2
[5]ED1
B
[5]ED0
[5]EVREF
AF2
AC5
AE4
AD5
AF3
AF5
AE5
AB6
AB16
AE13
AE14
AC15
AF16
AE15
AE16
AF15
AC7
AE7
AC9
AF6
AB9
AF8
AE8
AE6
AE11
AE9
AF9
AC13
AF11
AF12
AE10
AD15
AB17
AC11
AE19
AE18
AE17
AC23
AF22
AE21
AD24
AC22
AE24
AE26
[5]EA9
AE25
[5]EA8
AD21
[5]EA7
AD22
[5]EA6
AB20
[5]EA5
AE22
[5]EA4
AF21
[5]EA3
AE23
[5]EA2
AF18
[5]EA1
AE20
[5]EA0
AF24
R1
0603
U101-F
ED31
ED30
ED29
ED28
ED27
ED26
ED25
ED24
ED23
ED22
ED21
ED20
ED19
ED18
ED17
ED16
ED15
ED14
ED13
ED12
ED11
ED10
ED9
ED8
ED7
ED6
ED5
ED4
ED3
ED2
ED1
ED0
VREF1
VREF0
EA18
EA17
EA16
EA15
EA14
EA13
EA12
EA11
EA10
EA9
EA8
EA7
EA6
EA5
EA4
EA3
EA2
EA1
EA0
DRAM
Data
DRAM
Address
DRAM
Ctrl
eMMC I/F
ERESET
MT6572/TFBGA428/P0.4/B0.25/10.6X10.6
ECS0_B
ECS1_B
EWR_B
ERAS_B
ECAS_B
EDQM0
EDQM1
EDQM2
EDQM3
EDQS0
EDQS1
EDQS2
EDQS3
EDQS0_B
EDQS1_B
EDQS2_B
EDQS3_B
EDCLK0_B
EDCLK0
EDCLK1_B
EDCLK1
NWRB
MC0_RSTB
MC0_DAT7
MC0_DAT6
MC0_DAT5
MC0_DAT4
MC0_DAT3
MC0_DAT2
MC0_DAT1
MC0_DAT0
MC0_CK
MC0_CMD
AF25
AD18
AF19
AB18
AC18
AB19
ECKE
AD12
AE12
AB13
AD8
Y13
AA9
AA14
Y8
AA13
Y9
Y14
AA8
Y18
AA18
AA19
Y19
Y4
ND0
AA2
ND1
V5
ND2
W1
ND3
Y3
ND6
DO NOT use these GPIO as enable signal @ eMMC boot
Y2
ND8
W2
ND9
(refer to design notice - GPIO selection)
W4
ND12
W3
ND13
V1
ND15
W5
NCEB
Y5
AB1
AD3
AC3
AC2
AD2
AE2
AE1
AB3
AB2
AC1
AE3
[5]ECKE
[5]EDQM1
EDQS1
[5]
[5]MC0_RSTB
[5]MC0_DAT7
[5]MC0_DAT6
[5]MC0_DAT5
[5]MC0_DAT4
[5]MC0_DAT3
[5]MC0_DAT2
[5]MC0_DAT1
[5]MC0_DAT0
[5]MC0_CK
[5]MC0_CMD
Memory MCP
[5]ECS0_B
[5]ECS1_B
[5]EDQM0
[5]EDQM2
[5]EDQM3
[5]EDQS0
[5]EDQS2
[5]EDQS3
[5]EDQS0_B
[5]EDQS1_B
[5]EDQS2_B
[5]EDQS3_B
[5]EDCLK_B
[5]EDCLK
240Ω
R454
0201
240Ω
0201
R455
GND
[5]EA9
[5]ED0
[5]ED1
[5]ED2
[5]ED3
[5]ED4
[5]ED5
[5]ED6
[5]ED7
[5]ED8
[5]ED9
[5]ED10
[5]ED11
[5]ED12
[5]ED13
[5]ED14
[5]ED15
[5]ED16
[5]ED17
[5]ED18
[5]ED19
[5]ED20
[5]ED21
ED22
[5]
[5]ED23
[5]ED24
[5]ED25
[5]ED26
[5]ED27
[5]ED28
[5]ED29
[5]ED30
[5]ED31
U3
CA0
T3
CA1
R3
CA2
R2
CA3
R1
CA4
K2
CA5
J2
CA6
J3
CA7
H3
CA8
H2
CA9
T8
DQ0
R8
DQ1
R7
DQ2
R9
DQ3
R6
DQ4
P7
DQ5
P8
DQ6
P9
DQ7
K9
DQ8
K8
DQ9
K7
DQ10
J6
DQ11
J9
DQ12
J7
DQ13
J8
DQ14
H8
DQ15
W7
DQ16
U6
DQ17
W8
DQ18
T5
DQ19
U7
DQ20
W9
DQ21
V8
DQ22
T6
DQ23
H6
DQ24
F8
DQ25
E9
DQ26
G7
DQ27
H5
DQ28
E8
DQ29
G6
DQ30
E7
DQ31
ZQ0
G3
ZQ0
ZQ1
F3
ZQ1
F6
VSSQ
F9
VSSQ
G10
VSSQ
H10
VSSQ
J5
VSSQ
K10
VSSQ
M5
VSSQ
P10
VSSQ
R5
VSSQ
T10
VSSQ
U10
VSSQ
V6
VSSQ
V9
VSSQ
T1
VSSCA
M1
VSSCA
H1
VSSCA
B9
VSSM
E1
VSSM
F2
VSS
F5
VSS
G1
VSS
L2
VSS
M8
VSS
U1
VSS
V2
VSS
V5
VSS
C3
VSSQM
A1
DNU
A2
DNU
A9
DNU
A10
DNU
B1
DNU
B10
DNU
E10
DNU
W1
DNU
W10
DNU
Y1
DNU
Y2
DNU
Y9
DNU
Y10
DNU
Memory MCP
Power
eMMC
LP-DDR2
U503
E6
VDD1
F1
VDD1
V1
VDD1
W6
VDD1
E5
VDD2
G2
VDD2
K1
VDD2
M7
VDD2
U2
VDD2
W5
VDD2
F7
VDDQ
F10
VDDQ
G5
VDDQ
H9
VDDQ
J10
VDDQ
L6
VDDQ
M6
VDDQ
N6
VDDQ
R10
VDDQ
T9
VDDQ
U5
VDDQ
V7
VDDQ
V10
VDDQ
J1
VDDCA
L1
VDDCA
T2
VDDCA
A8
VCC
B2
VCC
B8
VCCQ
A5
VDDI
B5
CLKM
C1
RST
C5
CMD
B4
DAT7
A4
DAT6
A6
DAT5
B6
DAT4
A7
DAT3
B7
DAT2
B3
DAT1
A3
DAT0
P1
CS0#
P2
CS1#
N1
CKE0
N2
CKE1
M3
CLK
L3
CLK#
P6
DQS0
P5
DQS0#
K6
DQS1
K5
DQS1#
U8
DQS2
U9
DQS2#
G8
DQS3
G9
DQS3#
N5
DM0
L5
DM1
T7
DM2
H7
DM3
K3
VREFCA
M9
VREFDQ
C2
NC
C4
NC
C6
NC
D1
NC
D2
NC
D3
NC
D4
NC
D5
NC
D6
NC
E2
NC
E3
NC
M2
NC
N3
NC
P3
NC
V3
NC
W2
NC
W3
NC
H9TP32A4GDMCPR-KDM
EMMC_VDDI
0603
C421
4.7uF
GND
NC
0402
C422
VIO_EMI
0603
C401
4.7uF
Put C402 & C403 between BB & memory.
C402
100nF
0201
0201
C403
100nF
C129
1uF
0402
0603
C110
4.7uF
VEMC_3V3_PMU
0201
100nF
4.7uF
0603
C412
C453
VIO_EMI
C404
0402
1uF
8.06K
0201
R452
8.06K
0201
R453
GND
GND
C410
[5]MC0_CK
[5]MC0_RSTB
[5]MC0_CMD
[5]MC0_DAT7
[5]MC0_DAT6
[5]MC0_DAT5
[5]MC0_DAT4
[5]MC0_DAT3
[5]MC0_DAT2
[5]MC0_DAT1
[5]MC0_DAT0
[5]ECS0_B
[5]ECS1_B
[5]ECKE
[5]EDCLK
[5]EDCLK_B
[5]EDQS0
[5]EDQS1
[5]EDQS1_B
[5]EDQS2
[5]EDQS3
[5]EDQM0
[5]EDQM1
[5]EDQM2
[5]EDQM3
[5]EVREF
100NF
0402
[5]EDQS0_B
[5]EDQS2_B
[5]EDQS3_B
[5]EVREF
VIO18_PMU
D
C
B
A
Title
Memory
Size Document Number Rev
D
Wednesday, January 02, 2013
Date: Sheet of
MT6572 REF PHONE
12345
515
A
V1.0
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