Lecroy LTXXX Digital Storage Oscilloscope Service Manual

LeCroy Waverunner2 Series Service Manual

LTXXX2-SM-E

Version D- December 2003

LeCroy Corporate Headquarters

700 Chestnut Ridge Road Chestnut Ridge, NY 10977-6499 USA

Tel: (845) 425-2000 Fax: (845) 425-8967 http://www.lecroy.com

Copyright © October 2001. LeCroy is a registered trade-mark of LeCroy Corporation. All rights reserved. Information in this publication supersedes all earlier versions. Specifications subject to change.

1. Warranty and Product Support

It is recommended that you thoroughly inspect the contents of the oscilloscope packaging immediately upon receipt. Check all contents against the packing list/invoice copy shipped with the instrument. Unless LeCroy is notified promptly of any missing or damaged item, responsibility for its replacement cannot be accepted. Contact your nearest LeCroy Customer Service Center or national distributor immediately (see chapter 2 for contact numbers).

1.1 Warranty

LeCroy warrants its oscilloscope products for normal use and operation within specifications for a period of three years from the date of shipment. Calibration each year is recommended to ensure in-spec. performance. Spares, replacement parts and repairs are warranted for 90 days. The instrument's firmware has been thoroughly tested and is thought to be functional, but is supplied without warranty of any kind covering detailed performance. Products not made by LeCroy are covered solely by the warranty of the original equipment manufacturer.

Under the LeCroy warranty, LeCroy will repair or, at its option, replace any product returned within the warranty period to a LeCroy authorized service center. However, this will be done only if the product is determined after examination by LeCroy to be defective due to workmanship or materials, and not to have been caused by misuse, neglect or accident, or by abnormal conditions or operation.

Read this First

1.2 Product Assistance

Note: This warranty replaces all other warranties, expressed or implied, including but not limited to any implied warranty of merchantability, fitness, or adequacy for any particular purpose or use. LeCroy shall not be liable for any special, incidental, or consequential damages, whether in contract or otherwise. The client will be responsible for the transportation and insurance charges for the return of products to the service facility. LeCroy will return all products under warranty with

Help on installation, calibration, and the use of LeCroy equipment is available from the LeCroy Customer Service Center in your country.

1.3 Maintenance Agreements

LeCroy provides a variety of customer support services under Maintenance Agreements. Such agreements give extended warranty and allow clients to budget maintenance costs after the initial three-year warranty has expired. Other services such as installation, training, enhancements and on-site repairs are available through special supplemental support agreements.

1.4 Staying Up to Date

LeCroy is dedicated to offering state-of-the-art instruments, by continually refining and improving the performance of LeCroy products. Because of the speed with which physical modifications may be implemented, this manual and related documentation may not agree in every detail with the products they describe. For example, there might be small discrepancies in the values of components affecting pulse shape,

transport prepaid.

Read this First 1-1

timing or offset, and — infrequently — minor logic changes. However, be assured the scope itself is in full order and incorporates the most up-to-date circuitry. LeCroy frequently updates firmware and software during servicing to improve scope performance, free of charge during warranty. You will be kept informed of such changes, through new or revised manuals and other publications.

Nevertheless, you should retain this, the original manual, for future reference to your scope’s unchanged hardware specifications.

1.5 Service and Repair

Please return products requiring maintenance to the Customer Service Department in your country or to an authorized service facility. The customer is responsible for transportation charges to the factory, whereas all in-warranty products will be returned to you with transportation prepaid. Outside the warranty period, you will need to provide us with a purchase order number before we can repair your LeCroy product. You will be billed for parts and labor related to the repair work, and for shipping.

1.6 How to return a Product

Contact the nearest LeCroy Service Center or office to find out where to return the product. All returned products should be identified by model and serial number. You should describe the defect or failure, and provide your name and contact number. In the case of a product returned to the factory, a Return Authorization Number (RAN) should be used.

Return shipments should be made prepaid. We cannot accept COD (Cash On Delivery) or Collect Return shipments. We recommend air-freighting.

It is important that the RAN be clearly shown on the outside of the shipping package for prompt redirection to the appropriate LeCroy department.

1.7 What Comes with Your Scope

The following items are shipped together with the standard configuration of this oscilloscope:

• Front Scope Cover

• 10:1 10 MΩ PP006 Passive Probe — one per channel

• Two 6.3A 250 V Fuses, AC Power Cord and Plug

• Operator’s Manual , Remote Control Manual, Hands-On Guide

• Performance Certificate or Calibration Certificate, Declaration of Conformity

Note: Wherever possible, please use the original shipping carton. If a substitute carton is used, it should be rigid and packed so that that the product is surrounded by a minimum of four inches or 10 cm of shock-absorbent material.

1-2 Read this First

2. General Information

2.1 Product Assistance

Help on installation, calibration, and the use of LeCroy equipment is available from your local LeCroy office, or from LeCroy’s

• Customer Care Center, 700 Chestnut Ridge Road, Chestnut Ridge,

New York 10977–6499, U.S.A., tel. (845) 578–6020

• European Service Center, Switzerland, tel. (41) 22/719 21 11.

• LeCroy Japan Corporation, Sasazuka Center Bldg – 6 Sasazuka, Shibuya-ku, Tokyo Japan 151-0073, tel. (81) 3 3376 9400

2.2 Installation for Safe and Efficient Operation

4, Rue Moïse Marcinhes, 1217 Meyrin 1, Geneva

th

floor, 1-6, 2-Chome,

Operating Environment

For safe operation of the instrument to its specifications, ensure that the operating environment is maintained within the following parameters:

Temperature ............. 5 to 40 °C (41 to 104 °F) rated.

Humidity.................... Maximum relative humidity 80 % RH (non-condensing) for

temperatures up to 31 °C decreasing linearly to 50 % relative humidity at 40 °C

Altitude...................... < 2000 m (6560 ft)

The oscilloscope has been qualified to the following EN61010-1 category:

Installation (Overvoltage) Category ........................ II

Protection Class..........................… ........................ I

Pollution Degree ......................... ............................ 2

General Information 2-1

Safety Symbols

Where the following symbols or indications appear on the instrument’s front or rear panels, or elsewhere in this manual, they alert the user to an aspect of safety.

........................... CAUTION: Refer to accompanying documents (for Safety-

........................... CAUTION: Risk of electric shock

............................ On (Supply)

related information). See elsewhere in this manual wherever the symbol is present.

[.................................... Standby (Supply)

............................ Earth (Ground) Terminal

...................... Alternating Current Only

........................ Chassis Terminal

............................ Earth (Ground) Terminal on BNC Connectors

WARNING................. Denotes a hazard. If a WARNING is indicated on the

instrument do not proceed until its conditions are understood and met.

WARNING

Any use of this instrument in a manner not specified by the manufacturer may impair the instrument’s safety protection.

2-2 General Information

The oscilloscope has not been designed to make direct measurements on the human body. Users who connect a LeCroy oscilloscope directly to a person do so at their own risk. Use only indoors.

Power Requirements

The oscilloscope operates from 90–132 V AC 45-440 Hz, and 180–250 V AC; 45–66 Hz. No voltage selection is required, since the instrument automatically adapts to the line voltage present.

Fuses

The power supply of the oscilloscope is protected against short-circuit and overload by means of two 6.3 A/250 V AC

Disconnect the power cord before inspecting or replacing a fuse. Open the fuse box by inserting a small screwdriver under the plastic cover and prying it open. For continued fire protection at all line voltages, replace only with fuses of the specified type and rating (see above).

“T”-rated fuses, located above the mains plug.

Ground

The oscilloscope has been designed to operate from a single-phase power source, with one of the current-carrying conductors (neutral conductor) at ground (earth) potential. Maintain the ground line to avoid an electric shock.

None of the current-carrying conductors may exceed 250 V rms with respect to ground potential. The oscilloscope is provided with a three-wire electrical cord containing a three-terminal polarized plug for mains voltage and safety ground connection. The plug's ground terminal is connected directly to the frame of the unit. For adequate protection against electrical hazard, this plug must be inserted into a mating outlet containing a safety ground contact.

CAUTION

Cleaning and Maintenance

Maintenance and repairs should be carried out exclusively by a LeCroy technician. Cleaning should be limited to the exterior of the instrument only, using a damp, soft cloth. Do not use chemicals or abrasive elements. Under no circumstances should moisture be allowed to penetrate the disk drive analyzer. To avoid electric shocks, disconnect the instrument from the power supply before cleaning.

Risk of electrical shock: No user-serviceable parts inside. Leave repair to qualified personnel.

General Information 2-3

Power On

Connect the oscilloscope to the power outlet and switch it on using the power On/Standby button, located near the left-hand corner of the instrument below the screen. After the instrument is switched on, auto-calibration is performed and a test of the disk drive analyzer's ADCs and memories is carried out. The full testing procedure takes approximately 10 seconds, after which time a display will appear on the screen.

2-4 General Information

S

pec

ificati

3 Specifications

3.1 Models

Waverunner2 LT372/262 Series: Two channels Waverunner2 LT584/374/354/264 Series: Four channels

3.2 Vertical System

Bandwidth (−3dB): LT584: 1 Ghz; LT374/372/354:500 MHz; LT264/262:350 MHz @ 50 Ω Bandwidth Limiter: 20 MHz and 200 MHz can be selected for each channel. Input Impedance: 50 Ω ± 1.0 %; 1 MΩ ± 1.0 % // 12 pF typical using PP006 probe Input Coupling: 1 MΩ: AC, DC, GND; 50 Ω: DC, GND Max Input: 50 Ω: 5 Vrms; 1 MΩ: 400 V max (peak AC <-5 kHz + DC) Vertical Resolution: 8 bits; up to 11 bits with enhanced resolution (ERES)

ons

Sensitivity (50 Ω or 1 MΩ): 2 mv - 10V/div fully variable Offset Range:

¾ 2 mV–99 mV/div: ± 1 V ¾ 100 mV–0.99 mV/div: ± 10 V ¾ 1 V–10 V/div: ± 100 V

Isolation - Channel to channel: >250:1 at same V/div settings

3.3 Timebase System

Timebases: Main and up to four zoom traces simultaneously Time/Div Range: LT374/372/LT584: 500 ps/div 1000 s/div, LT264/262/354: 1 ns/div to

1000 s/div

Clock Accuracy: ≤ 10 ppm Interpolator Resolution: 5 ps External Clock: ≤ 500 MHz, 50 Ω, or 1 MΩ impedance Roll Mode: time/div 500 ms - 1000 s/div or sample rate <100 kS/s max

Specifications 3-1

3.4 Acquisition System

Single Shot Sample Rate LT584/M/L LT374/M/L LT372 LT264/M LT262 LT354/M/ML 1 Channel Max 4 GS/s 4 GS/s 4 GS/s 1 GS/s 1 GS/s 1 GS/s 2 Channels Max 4 GS/s 4 GS/s 2 GS/s 1 GS/s 1 GS/s 1 GS/s 3-4 Channels Max 2 GS/s 2 GS/s NA 1 GS/s NA 1 GS/s Maximum Acq Points/Ch 1 Channel Max 500k/2M/8M 500k/2M/8M 500k 100k/1M 100k 500K/1M/2M 2 Channels Max 500k/2M/8M 500k/2M/8M 250k 100k/1M 100k 500K/1M/2M 3-4 Channels Max 250k/1M/4M 250k/1M/4M NA 100k/1M NA 250k/1M/4M

3.5 Acquisition Modes

Random Interleaved Sampling (RIS): 50 GS/s for repetitive signals 500 ps/div - 1 µs Single Shot: For transient and repetitive signals: 1ns/div - 1000s/div Sequence Mode:

LT262/264 2 - 400 segments LT584/354/372/374 2 - 1000 segments Memory Option M or L 2 - 400 segments Intersegment Time 50 µsec max

3.6 Acquisition Processing

Averaging: Summed averaging to 103 sweeps; continuous averaging with weigthing range

range from 1:1 to 1:1023 (standard). Summed averaging up to 10 WAVA)

Enhanced Resolution (ERES): From 8.5 to 11 bits vertical resolution

6

Envelope (Extrema): Envelope, floor, roof for up to 10

sweeps

6

sweeps (optional with

3-2 Specifications

3.7 Triggering System

Modes: NORMAL, AUTO, SINGLE and STOP Sources: Any input channel, External, EXT 10 or line; slope, level and coupling are unique

to each source (except line trigger). Inactive channels useable as trigger inputs.

Slope: Positive, Negative, Window Coupling Modes: DC,AC,HFREJ,LFREJ

AC Cutoff Frequency 7.5 Hz typical HFREJ, LFREJ 50 kHz typical Pre-trigger delay 0 - 100% of horizontal time scale Post-trigger delay 0 - 10000 divisions Hold-off by time or events Up to 20s or from 1 to 99,999,999 events Internal trigger range ±5 div

Maximum Trigger Frequency: Up to 500 MHz (350 MHz on LT264/262) External Trigger Input Range: ± 0.5 V, ± 5 V with Ext 10 Max external input @ 50Ω: ±5 V DC or 5Vrms Max external input @ 1MΩ: 400 Vmax (DC + peak AC < 5 kHz)

3.8 Automatic Setup

Auto Setup: Automatically sets timebase, trigger, and sensitivity to display a wide range of

repetitive signals. Vertical Find: Automatically sets the vertical sensitivity and offset for the selected channels

and display a waveform with maximum dynamic range.

3.9 Probes

Model PP006: PP006 with auto-detect: 10:1, 10 MΩ; one probe per channel Probe System: ProBus Intelligent Probe System supports active, high-voltage, current, and

differential probes, and differential amplifiers Scale Factors: Up to 12 automatically or manually selected

Specifications 3-3

3.10 Color Waveform Display

Type: VGA Color 8.4-inch flat-panel TFT-LCD Resolution: 640 x 480 resolution Screen Saver: Display blanks after 10 minutes (when screen saver is enabled) Real Time Clock: Date, hours, minutes, and seconds displayed with waveform Number of Traces: Display a maximum of eight traces. Simultaneously display channel,

zoom, memory, and math traces Grid Styles: Single, Dual, Quad, Octal, XY, Single+XY, Dual+XY; Full Screen gives

enlarged view of each style

Intensity Controls: Separate intensity control for grids and waveforms Waveform Styles: Sample dots joined or dots only — regular or bold sample point

highlighting Trace Overlap Display: Select opaque or transparent mode with automatic waveform

overlap management

3.11 Analog Persistence Display

Analog Persistence and Color Graded Persistence: Variable saturation levels; stores

each trace’s persistence data in memory Trace Selection: Activate Analog Persistence on a selected trace, top 2 traces, or all

traces

Persistence Aging Time: Select from 500 ms to infinite Trace Display: Opaque or transparent overlap Sweeps Displayed: All accumulated or all accumulated with last trace highlighted.

3.12 Zoom Expansion Traces

Style: Display up to four zoom traces Vertical Zoom: Up to 5x expansion, 50x with averaging Horizontal Zoom: Expand to 2 pts/div, magnify to 50 000x Autoscroll: Automatically scan and display any zoom or math trace

3.13 Rapid Signal Processing

Processor: Power PC Processing Memory: Up to 128 Mbytes Realtime Clock: Dates, hours, minutes, seconds, and time stamp trigger time to 1ns

resolution.

3.14 Internal waveform Memory

3-4 Specifications

Waveform: M1, M2, M3, M4; (Store full-length waveforms with 16 bits/data point) Zoom and Math: Four traces A, B, C, D with chained trace capability

3.15 Setup Storage

For front panel and instrument status: Four non-volatile memories and floppy drive are

standard; hard drive and memory card are optional

3.16 Interface

Remote Control: Full control of all front panel controls and internal functions via GPIB and

RS-232-C, or Ethernet (optional) GPIB Port: Full control via IEEE-488.2; configurable as talker/listener for computer control

and data transfer

RS-232-C: Asynchronous transfer rate of up to 115.2 kbaud Ethernet (optional): 10 Base-T Ethernet interface Floppy Drive: Internal, DOS-format, 3.5" high-density PC Card Slot (optional): Supports memory and hard drive cards External Monitor Port Standard: 15-pin D-Type VGA-compatible Centronics Port: Parallel printer interface Internal graphics printer (optional): Provides hardcopy output in <10 seconds

3.17 Outputs

Calibrator signal: 500 Hz–1 MHz square wave or DC level, Select from −1.0 to +1.0 into

1MΩ, output on front panel test point and ground lug Control signals: Rear panel, TTL level, BNC output, Choice of trigger ready, trigger out, or

Pass/Fail status (output resistance 300 Ω ± 10 %)

3.18 Environmental and Safety

Operating Conditions: Temperature 5–40° C rated accuracy, 0-45°C operating, -20° -

60°C non-operating; humidity 80 % RH non-condensing up to 35° C, derates to 50% max RH, non-condensing at 45°C; 4500 m (15000ft) max up to 25°C; Derates to 2000 m (6600ft) at 45°C.

CE Approved: EMC Directive 89/336/EEC; EN61326-1 Emissions and immunity, Low Voltage Directive 73/23/EEC; EN 61010-1 Product Safety (Installation Category II, Pollution Degree 2)

UL and cUL: UL Standard UL 3111-1; cUL Standard CSA C22.2 No. 1010-1

Specifications 3-5

3.19 General

Auto Calibration: Ensures specified DC and timing accuracy is maintained for 1 year

minimum.

Auto Calibration Time: <500ms Power Requirements: 90–132 V AC 45-440 Hz, and 180–250 V AC; 45–66 Hz; automatic

AC voltage selection, maximum power dissipation 150 VA–230 VA, depending on model

Battery Backup: Front panel settings retained for two years minimum Warranty and Calibration: Three years; calibration recommended yearly

3.20 Physical Dimensions

Dimensions (HWD): 210 mm x 350 mm x 300 mm (8.3" x 13.8" x 11.8"); height excludes

scope feet

Weight: 8 kg (18 lbs.) Shipping Weight: 12kg (27 lbs.)

3.21 Math Tools (Standard)

Simultaneously perform up to four math (signal) processing functions; traces can be chained together to perform math-on-math.

average (summed to 4000 sweeps) product Average (continuous weighted) ratio difference reciprocal (invert) enhanced resolution (to 11 bits) resample (deskew) envelope rescale (with units) FFT of 50 kpoint waveforms roof floor sin x/x identity sum negate

3-6 Specifications

3.22 Measure Tools (Standard)

Automated measurements; Display any five parameters together with their average, high, low, and standard deviations.

amplitude fall 90-10% period area fall 80-20% Phase base frequency rise 10-90% cycle mean maximum rise 20-80% cycle rms mean rms cycles minimum sdev delay +overshoot top ∆delay duty cycle peak-to-peak xamn xamx

–overshoot width

3.23 Pass/Fail

Test any five parameters against selectable thresholds. Limit testing is performed using masks created on the scope or PC. Set up a pass or fail condition to initiate actions such as hard-copy output, saving waveform to memory, GPIB SRQ, or pulse out.

3.24 Options

Extended math and Measurement: Adds math and advanced measurements for all general purpose applications. Includes all standard math and measurement tools, plus the following tools:

3.25 Extended math tools

Automated measurements; Display any five parameters together with their average, high, low, and standard deviations.

absolute value integrate differentiate square exp (base e) square root exp (base 10) trend (datalog) log (base e) histogram (200 events) log (base 10)

3.26 Cursor Measurements

Type From To

Relative time: First point on waveform Any other point on waveform Relative voltage: Select voltage level Any other voltage level Absolute time: Time and voltage relative to Ground and trigger Absolute voltage Voltage Ground

Specifications 3-7

3.27 Extended Measure Tools

cycle median first point

∆time@level, % and volts ∆time @level from trigger ∆time from clock to data + (setup

time) ∆time from clock to data - (hold time) fall @ level, % and volts std. Deviation duration

last point number of points median

rise @ level, % and volts

3.28 WaveAnalyzer

Includes the Extended Math and Measure Tools as well as expanded capabilities for performing FFT's, averaging, histograms, and histogram paramters.

3.29 WaveAnalyzer Tools (Standard)

Histograms with 18 histogram parameters up to 2 billion events Summed averaging to one million sweeps FFT capability expands the basic FFT to include:

FFT power averaging FFT power density – real and imaginary FFT on all acquisition points up to 25 Mpts

With Waveanalyzer FFT you get maximum resolution at wide frequency spans.

3.30 Other Application Solutions Available

Jitter and Timing Analysis (JTA) Digital Filter Package (DFP) PowerMeasure Analysis (PMA1) Communications Mask Testing (MT01/MT02) Polymask Mask Testing (PMSK) Advanced Optical Recording Measurements (AORM) for LT37X scopes Disk Drive Measurements (DDM) PRML Analysis (PRML)

3.31 Free Software Utilities

ScopeExplorer: Easy-to-use utility that provides a simple but powerful way to control your

scope remotely over RS-232-C, GPIB, or Ethernet. ActiveDSO: Active X controls for flexible Windows applications programming with remote control.

MaskMaker: Create your tolerance mask offline with this graphic tool. DSO Filter: Specify a set of filter coefficients offline and load them into the scope.

3-8 Specifications

3.32 Basic Triggers

Edge/Slope/Window/Line: Triggers when signal meets slope and level condition

3.33 SMART Trigger Types

State/Edge qualified: Triggers on any input source only if a given state (or transition) has

occurred on another source. Delay between sources is selectable by time or number of events.

Dropout: Triggers if the input signal drops out for longer than a selected time out between 25 ns and 20 s.

Pattern: Logic combination of 5 inputs (3 on 2 channel models); Each source can be high, low or don't care. Trigger entering or exiting the pattern.

TV: Triggers selectable fields (1,2,4 or 8) for NTSC, PAL SECAM, or non-standard video (up to 1500 lines).

3.34 SMART Triggers with Exclusion Technology

Signal or Pattern Width: Triggers on glitches or on pulse widths selectable from <2.5ns to

20 s or on intermittent faults.

Signal or Pattern Interval: Triggers on intervals selectable between 10 ns and 20 s Slew Rate: Triggers on edge rates; select limits for dV, dt, and slope. Select edge limits

between 2.5ns and 20s. Runt: Positive or negative runts defined by two voltage limits and two time limits selectable between 2.5 ns and 20 ns

3.35 Hardcopy

Print Screen is activated by a front-panel button or via remote control. Store screen image files or print to external printers including network printers and directories. Netwrok printing and file access requires the LAN10BT Ethernet option.

Supported printers include: B/W: LaserJet, DeskJet, Epson. An optional, internal high-resolution graphics printer is also

availablefor screen dumps; stripchart output formats capable of up to 200 cm/div.

Color: DeskJet 550C, Epson Stylus, Canon 200/600/800 series, HP7470 and HP7550 Hard copy Formats: TIFF b/w, TIFF color, BMP color, BMP compressed and HPGL

3.36 Waveform Output

Store waveforms to floppy disk or optional PC-Card hard drives and memory cards. Save any trace you choose and select Auto Store to automatically store the waveform after each trigger. Output Formats: The ASCII waveform output is compatible with spreadsheets, MATLAB, MathCad, etc. Binary output is also available for reduced file size.

Specifications 3-9

3.37 Documentation

Included with all WavePro Oscilloscopes: Operations Manual — hard copy, Remote

Programming Manual — hard copy, CD-ROM — PDF formatted manuals plus software utilities including: ScopeExplorer, ActiveDSO, MaskMaker, DSO-Filter and DSO-Net Print Gateway.

3-10 Specifications

4. Theory of Operation

4.1 Processor Board

MPC603e Processor

The PowerPC603e on the processor board is a 64-bit RISC processor having 2x32Kbyte cache and features high speed processing and quick memory access. The processor is designed to operate with an internal clock which is 5 times the external bus clock cycles and is used under the 32bit mode.

The board consists of two circuit-blocks:

• The 32bit block, that contains the main PowerPC processor, synchronous

dynamic RAM module, VGA interface, Super-I/O and main board interface.

• The 8bit block, which incorporates all peripherals and other interfaces for outer

connections.

These two circuit-blocks are connected through MC68150 (dynamic bus sizer).

Power Supply

The board requires two power sources (Vcc and +12V). +12V source is used for OP-amps and small-peripheral operation.

The processor requires 3.3V and 2.5V, and some other logic devices are operated by the +5V source. All of the signals are TTL compatible. An OP-amp and MOSFET transistor comprise the 3.3V and 2.5V power source. The reference voltage is taken through the voltage-resistor divider network across the +5V power source.

32bit Peripherals

There are 5 devices on the processor’s 32bit data bus:

• VGA video controller

• S-DRAM system

• bus sizer, an interface to 8bit circuit-block

• Super-I/O

• MAIN board

Theory of Operation 4-1

CPU’s Block Diagram

CPU : PowerPC603e

32bit BUS

SDRAM max 512MB

Super I/O

RS232C, Parallel, Floppy

MAIN Board I/F

VGA : 65545

BUS Sizer :

Flash PROM :

NVRAM : 128KB

Real Time Clock

Interrupt Controller

Front Panel I/F

GP-IB

Internal Printer I/F

Small Peripherals

PCMCIA type I/II/III

Other Control Ports

8bit BUS

Figure 4-1 CPU Block Diagram

4-2 Theory of Operation

SDRAM

The SDRAM circuit consists of one DIMM module, from 64MB to a maximum of 512MB. The DIMM module type is 168pin SDRAM, 3.3V unbuffered CL=2. The SDRAM control circuit is built with one CPLD, and several gate ICs. The SDM (IC87) located on the main control circuit generates all types of bus cycle timing (normal R/W, 2-beat/8-beat bursts of R/W), refresh cycles. Furthermore, the SDM has a register for setting the DIMM size, in order to adjust the memory mapping so as not to have gaps in memory mapping according with the memory capacity. Two multiplexers (IC9 and IC10) switch the address lines of odd and even addresses to be connected with the address lines of each DIMM.

Normal Access Timing

This is the simplest access possible: the processor puts an address onto the address bus and reads or writes the required data out of or to the SDRAM which corresponds with the bus. The bus width is 32bits, or 4bytes wide, and the CPU performs to read or write operations (of one through four bytes) which are chained in a bus cycle.

Burst Access Timing

A burst access, on the 603e configured with 32bit device operation, performs either two or eight successive reads in SDRAM (2-beat or 8-beat burst access). The idea is to put the beginning of an address onto the address bus and read/write data out of or to the SDRAM every clock cycle, without incrementing the address required by the processor (this is to be achieved by the SDRAM's Burst mode). The 8-beat access is indicated by an active "low" of NTBST signals and a 32bit access signal (SIZ2..0=011), and the 2-beat access is indicated by an active "high" of NTBST signals and an access size of 64 bits (SIZ2..0=100).

Refresh Timing

The 32 KHz clock from the RTC chip is used to generate the timing to refresh SDRAM. Without this clock, the SDRAM would not be refreshed and all the data in it would be erased. SDM detects the rising edge and the falling edge of this 32KHz clock. At the each edge, it generates the refresh cycles. The arbitration logic between other accesses (bus cycle with the processor and DMA cycle) and refresh cycles reside in the SDM.

Theory of Operation 4-3

Memory Mapping

When power is turned on, the internal software automatically sets the system's memory size to the largest capacity available with the DIMM that is installed (64MB 512MB DIMM size).

VGA controller

The VGA controller chip 65545(IC29) contains the logic circuits to decode its own addresses. It generates all the video signals (RGB, H/V, and all control lines to drive the flat panel), and controls its associated 1 MB video DRAM (to read, write and refresh). There are two 2Mb video DRAMs mounted but only 512KB of each of the DRAM's is used. All timings are extracted from the 16MHz bus clock; therefore, no external crystal or time-base is required. The horizontal and vertical synchronization signals are sent to the external video connector (a half pitch, D-SUB15 pin connector is used). The 65545 chip can support several bus interfaces (PCI, ISA, VL, etc), the system employs it for VL-bus applications with the mode of 256-color palette operations. The controller has an 18bit color palette and can display 256 colors out of the available 260,000. The power supply circuit for the liquid crystal panel has a MOSFET switch that switches the power supply of LCD to 3.3V or 5V. Also the VGA controller has a switch, it switches the max signal level for the LCD to

3.3V or 5V.

Super-I/O

This device controls RS-232C, floppy disk, and parallel port operations. The controller has its own time-base with a 24MHz crystal. RS-232C can be used by simply connecting the MAX232 buffer (IC31) to it. Since the Super I/O chip has a 16-byte buffer, high speed data transfer is easily carried out. A 2HD disk drive can be directly connected to the system without any external components other than a pull-up resistor; it can be operated in interruption mode. The parallel interface is also activated without other external components other than a pull-up resistor, for the use of 2-way communication.

Bus Control

The BUS (IC93) performs all bus cycles except those for SDRAM. When the bus cycle starts, the MPC603e must terminate the bus cycle by returning signals after acknowledging each of the data and addresses, from the outside. The BUS is used to generate the acknowledgement signals.

4-4 Theory of Operation

Bus Sizer

The MPC603e processor does not support dynamic bus sizing, which is performed with the 68K processor family. Each 8bits of the 32bit bus is fixed or assigned with the lower addresses, or 0 through 3 bits. Therefore, if an 8bit device were directly connected to the bus, this device would be seen in 4byte steps each in the memory map area. To avoid this, the 8bit-bus peripheral unit is connected to the 32bit-bus through the bus sizer, MC68150 (IC15). The bus sizer divides one bus cycle for accessing 32 bit-bus of the processor into four cycles each of 8bit accessing cycle, and/or assigns 8bit-bus data to a corresponding 8bits within the 32bits.

8bit Peripherals

The following devices are listed as 8bit data bus units:

• PCMCIA Interface

• Flash PROM

• NVRAM

• RTC

• Interrupt Controller

• GPIB Interface

• Small-peripherals Interface

• Internal printer Interface

• Front-Panel I/F

• Other registers and ports

PCMCIA, type I/II/III interface

This interface consists mainly of buffers for both data and address busses. IC65 (DF/F) holds control bits for the signals resetting the card, switching between the data area and the attribute area, and switching the card's modes. All bits in the register are reset to zero when the _RESET signal goes to active low, which means that their state is also guaranteed at power-up. IC66 and the IC67 invert the most significant address bits of the memory card whenever the SWAP jumper is plugged in, so that the first bytes are always allocated to "FFF00000", regardless of the size of the memory card. This allows the processor to boot directly from the PCMCIA memory card used.

Flash PROM

Two pieces of Intel's 29F016-compatible 2MB PROMs (IC45 and 46) are used. These ICs do not require any programming voltage to write. From a hardware point of view, a flash PROM is regarded the same as an EPROM in read mode. To erase or write to memory, commands are written into the data bus. Writing and erasing must be performed by monitoring the status-signals (RY/#BY) on the port (IC49). The program may be seen to start from the Flash PROM. The Flash PROM is, however, not regarded as the program or its program area even when start-up (even

Theory of Operation 4-5

when the screen appears) is completed, because the program must be processed in the SDRAM after transferring the program content from the Flash PROM into the SDRAM.

NVRAM

This memory chip is powered from V the NVRAM is powered by the lithium battery, when it is on, it is powered from V

in the RTC. When the main power is off,

CCO

CC

. The #CS1 signals are also controlled by the RTC. When the main power is turned off, the RTC sets the chip select "high" to place the SRAM in power-down mode to prevent any accidental overwriting. Stored panel setups (Setup1 - 4), the instruments last panel setup and trace memories M1-M4 are stored in the NVRAM.

RTC

The DS1689 real time clock has several functions:

• Keeps the time-of-day and current-date information while power is off.

• Generates the 32KHz clock for SDRAM refreshing.

• Generates a 128Hz periodic interrupt signal to force bus accessing from

the processor and allow periodic updating of the time display.

• Provides a unique ID that identifies the origination of scope ID.

• Feeds the power and the chip select signal to the NVRAM.

The RTC chip generates timing clocks necessary for time keeping and other circuits using a 32.768KHz crystal. A few discrete components around the RTC leave it powered by the lithium battery when the system is turned off. When the system is turned on this circuit charges the battery. Accesses from the processor are done through bus separation circuit, since addresses and data are multiplexed. A unique ID is written into the RTC by the RTC manufacturer, since every chip must have a different value stored in it.

4-6 Theory of Operation

Interrupt Controller

In order to prioritize and control several interrupt sources, it is necessary to use an IC of uPD71059. It scans eight interrupt signals and sends a unique interrupt signal to the processor when an (unmasked) interrupt signal appears. Interrupt levels are assigned as follows:

level 0 (lowest priority) FDC level 1 small peripherals level 2 RS232C level 3 GP-IB level 4 PCMCIA (I/O card mode) level 5 real time clock level 6 the MAIN board level 7 (highest priority) unused

The priority in the above can be changed by the software.

Small Peripheral Interface

This 8-bit interface is intended to allow external expansion of the board in addition to the processor board. The tri-state buffers drive the address and control lines, and bi-directional buffers drive data lines. The address decoding is processed on each expanded peripheral board. Since the acknowledgement toward each access is also returned by the expanded board, there is no restriction to the amount of waitstates. The bus clock runs at 16MHz, and a reset line reinitializes the boards as does the CPU. Four interrupt lines are also included in this interface, so that interrupt-driven boards can be used.

Front Panel

The front panel is accessed by serial read/write signals passing through IC47 and IC48. The CPU board can be reset by resetting the 3 buttons on the front panel. This function becomes effective by setting a bit of IC52 for enabling. Both the LED and the beeper are activated by serial writing.

Reset Circuit

When the power supply is turned on and V

exceeds 4.5V, IC4 detects this and

CC

starts generating the clock (IC2) After the clock is stabilized and counted 1024 times, the reset signal is released by IC86 after the time determined by C167. Whenever V

goes below 4.5V (even for a very short time), a reset pulse, in which

CC

the width is determined by C6, is generated. Resetting 3 buttons on the front panel also cause the reset pulse as did IC4 when the supply power voltage fell too low.

Theory of Operation 4-7

Bus Error Generation

The MPC603e expects NTA and NAACK signals for acknowledgement to the current bus cycle, and inserts wait states during the period NTA and NAACK are kept at “high” levels (any of external devices have not pulled these signals "low"). As long as any of the devices do not return the acknowledgement, the bus is kept in this wait-condition. An external circuit is then required to generate a bus-error signal to break the pending cycle after a given time-out. The bus error is generated by pulling the NTEA pin of the CPU down to “low”. This job is done by the BUS (IC93) which counts the number of wait-states that have already passed through the counter. With this operation, the system can successfully force the termination of the current cycle. Some devices, such as the VGA video controller, have their own logic to generate a bus error. Therefore, any access operations for those devices do not need this circuit.

GPIB Interface

GP-IB controller is the National Instrument’s NAT4882. It has NEC-7210 software compatible made and it includes bus drivers.

Internal Printer Interface

Printer control is the same as for the normal Centronics interface. This circuit consists of buffers only.

4-8 Theory of Operation

Relation of I/O Structure to the associated CPLDs

The following block-diagram describes the flow in the decoder and the relationships between the acknowledgement to be returned to the CPU and CPLDs. Three-line boxes are CPLDs, and one-line boxes indicate other ICs and function blocks.

• SDM does all the controls for the access of the SDRAM (Initialize memory,

Decode and Mapping, Read/Write, Burst Read/Write, Refresh).

• Bus controls is the bus cycle of the entire CPU board. (Decode all areas other

than SDRAM, Read/Write of 32bits bus, Read/Write of the bus via bus sizer, detection of bus error).

CPU BUS (Data)

Buffe

VGA Supper MAIN SDRAM

CPU BUS

To CPU

Decoder

71059 GP-IB (16bit) NVRAM RTC Small Peripherals Front Panel Flash ROM PCMCIA (16bit)

BUS sizer

MUX

Buffe

Address

Figure 4-2 I/O Structure

Theory of Operation 4-9

4.2 Main Board

Introduction The main board is divided into the following sections:

• Front End Based on the Hybrid HFE428, HSY632 switchyard to combine the input channels.

• A/D Converter & Digital Acquisition Memory Based on the HAM631.

• Trigger Based on the Hybrids HTR420 discriminator & MST429A smart trigger.

• Timebase Based on the MCG426 clock generator & MTB411A controller

• Main Board Control

4.2.1 Front End

The front end processes an analog signal for ADC and trigger, consists of High impedance buffer, amplifier HFE428, and trigger comparator HTR420.

The main functions of the Front end without the amplifier HFE428 and HTR420 are:

• Four channels opertion, calibration with Software control.

• Input protection (clamp+thermal detection) and coupling (AC, DC, 1MΩ, 50Ω).

• Attenuator by 10 & by 100.

• Offset control.

• Offset control of ±1V and CAL control of ±1.4V.

• Detection of 50Ω over loading.

• Input of signal for calibration.

The main functions of HFE428 are:

• Amplitude normalization for the ADC system : at the BNC the dynamic range is 16 mV to 80V FS (full scale) and the ADC/TRIG system input is 500 mV differential.

• Fine adjustment of gain and variable control

• Band width limiter of 20MHz, 200MHz

Main function of HFE420 are:

• Generation of trigger signal (analog input and digital output) with comparator

• Setting of trigger level (TRIG,VALIDATE)

• Setting of trigger coupling (DC,AC,LFREJ,HFREJ,HF)

• Setting of slope (+,-,WINDOW)

4-10 Theory of Operation

Control

Relay control The relay of the attenuator is set by selecting the input coupling and the gain as shown in the table below. RL1, 2 and 5 are driven with +5V/0V, and RL3, 4 is driven with +5V/-5V.

Input coupling

Control port Relay GND 1M,DC 1M,AC 50,DC GND/*MES RL2 H L L L

1M/*50 RL1 H H H L AC/*DC RL5 H L H L 1/*10 RL3 H X X X 1/*100 RL4 L X X X

Switch of attenuator

Control port Relay 2mV-99mV 100mV-0.99V 1V-10V 1/*10 RL3 H L L

1/*100 RL4 H H L

Divide gain

The gain ratio in each block and input range is a table below. At the BNC the dynamic range is 16 mV to 80V FS (full scale) and the output is 500 mV differential (HAD631 input).

Range V/div Block

ATT 1/*10 ATT 1/*100 HFE428 Total(ratio)

2mV 5mV 10mV 20mV 50mV 100mV 200mV 500mV 1V 2V 5V 10V

1 1 1 1 1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 1 1 1 1 1 1 1 1 0.1 0.1 0.1 0.1

31.25 12.5 6.25 3.125 1.25 6.25 3.125 1.25 6.25 3.125 1.25 0.625

31.25 12.5 6.25 3.125 1.25 0.625 0.3125 0.125 0.0625 0.03125 0.0125 0.00625

Analog control voltage

Circuit name signal level Signal name CHx OFFSET +/-4V Offset control signal CHx GAIN 0 to +4V HFE428 gain control signal CHx TRIG LVL1 +/-4V Trigger level control signal CHx TRIG LVL2 +/-4V Trigger level control signal for smart trigger/window CHx HYST 0 to +4V Trigger hysteresis control signal INT CAL 0 to +600mV Signal each CH commonness for calibration

Theory of Operation 4-11

Block diagram 1

HAM631

4-12 Theory of Operation

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