
6.
CIRCUIT
1.
KLM-833
Audio
signal
route
DESCRIPTION
Analog
Circuit
The
signal
IC40
(pin
Circuit
and
which
5,6,7)
FEED
passes
andgointo
BACK
IC39isde-emphasized
EFFECT
Volume
Control
Volume
Circuit.
at
Control
1/2
LevelofAudio
is
decidedbyRelay
SW.
LevelofAudio
ablebyInput
by
1/2
IC31
pass
filter
and
(3)
Q24.
Q24isamplifier
sending
while
signal
IC35isan
willbeoutput,
signal
this
Audio
This
trigger
sampling
level.
(OFF).
case,
signal
IC35iscontrolled
terminal).
SelectingofLPF-1,
CPU
addressisdecodedbydecoder
latch
data.
latch
output
terminal
1/2
IC33
of
FEED
work
and
1/2
of
pin27:COMP
While
Analog
Output
signaltoDigital
Analog
as
Audio
IC13isan
Analog
"H"atSampling,
sampling,itlets
Compander
signal
D/A
signal
signal
IC32
constructs
IC29
constructs
IC13isan
make
Audio
IC 29:
Constanceinorder
ON/OFF
ThisICworks
letting
IC30
IC39isan
willbeoutput,
signal
(=OFF).
while
REC
Overdub
IC22
pin28(DOFF
from
IC39.
signal
input
RY1
whichiscontrolledbyAttenuator
signal
amplifiedby1/2
LevelVR(VR101).
(4558)issenttoeachof(1)2kindsofLow-
LPF-1,
LPF-2
(2)
for
trigger
signaltoCPU
and
start
sampling
Analog
Switch
one
from
ThisICis
LPF-1,
controlledbyGate
OFFisselectedtooff
nottobe
senttoA/D
by Gate
(SOFF
comestobe
(Pin
Signal
terminalis"L"
LPF-2ismadebyCPU
Filter
selecting
pin
15.
When
"H"
1,2,3)
worksasPre-emphasis,
BACK
signal.
and
1/2
Analog
Compander
once
Compander
Analog
TerminalofGate
(LCOM
Switch
Sequencer)
Part
terminal)ofIC13isoutputasA/D
Circuit.
digitalized
after
through
Expander
Audio
Analog
Switch
signal
bypass
Muting
nottogenerate
and
smoothen
with
control
drive
VCA.
Analog
Switch
one
from
and
Circuit.
compressed
nottohave
D/A
with
Muting
and
Expander
CircuitisVCA
OFFisselectedinordertooff
SYNCSWisON(Sampling,
are
ON).
When
those
terminal)
from
Connector
Audio
Direct
OutVR102,
controlledbyAudio
port
PA7
accordingtoAudio
selecting
one
Audio
while
Array
while
signaliscontrolledbyIC47
delay
time
LPF-1
(4.5KHz)isselected.
IC33
(Pin
(Compressor+Expander)
and
works
ThisICis
Array
Audio
in
Digital
andisinputtoIC29,
1/2
IC34,
Circuit
works
while
Noiseatsignal
Audio
signal
signal
from
selecting
LPF-3,
one
Switches
becomes
CN-11
pin
IC31ischange
signal
re-amplified
1/2
IC36
signal
(IC23,
which
from
signal
REC
IC22
REC
CANCEL)
IC56
modeisx4,this
5,6,7),
as a
IC22.
compressing
Circuit
pin
Audio
signal
LPF-2orno
Array.
and
make
CANCEL.
pin29(SOFF
IC23.
This
and
let
IC47
and
Mix
Amp
IC32,
IC37
Bypass
controlled
("L"atDelay,
Switch
signal
bypass
error.
changes
IC32.
and
IC37.
with
IC30.
with
Compander
Sampling.
which
CPU
which
from
Sequencer,
are
"H"
has
while
sampling.
PA6
Audio
LPF-4orno
delay
ON,
Gate
and
off
time
sudden
terminal
signal
sound
Trigger
Array
output
8)
by
1/2
2
In
is,
to
to
A)
EFFECT
EFFECT
is
IC46
B)
FEED
FEED
by
control
PhaseofFEED
is
Analog
feedbacked
(Note:
latchedbyIC41.)
MODULATION
FREQ.
At
2/4
Circuitisconstructed.
latchedbyIC47
RM9todecide
INTENSITY
Data
and
tobeworkingasattenuatorinordertodecideMGINT.
IC53
By
the
datatopin2of
VCO:
2.
KLM-833
1)
Audio
A/D
The
signal
Succesive
into
IC3,
Gate
and
data
Array
data
and outputtoAnalog
2)
System
VCO
to
supplies
produces
Volume
Level
latchedbyIC44
control
BACK
BACK
IC41
and
BlockR.RM7todecide
invertedat1/2
SW.
Analog
IC54
(pin
from
CPU
lets
Analog
latches
latched
IC21
which
Signal
Control
data
from
and
BlockR.RM8todecide
Volume
Level
DataofCPU
IC41
lets
BACK
IC40
IC42
selectsifnormalorinverted
signalisreturnedtoIC35
SwitchiscontrolledbyCPU
PART
5,6,7
pin
and
IC47
oscillation
DATA
Switch
Scale
Data
data,
IC55
IC54
and
changes
Digital
Circuit
Path
signalismadetobe
signal
madetobe
after
linearization
Approximation
IC11—IC14
IC2
(74HC138)
Array
outputs
from
controls
from
Clock
control
IC21
pin
System
Timing
accordingly.
are
reads
Delay
address
D-RAM
D/Aismadetobe
which
returnstoGate
IC18tooutput
Path
D/C
voltageissent
13.
With
ClocktoIC22
which
Circuit
CPU
DATA
IC44
lets
Control
Analog
FEED
signal
output
(pin
1,2,3).
8,9,10),
Data
Analog
frequency.
BUS
IC51,52control
whichisfrom
worksasD/A
mix
system
Triangle
from
SW.
DATAislatchedbyIC50
with
clock.
S/HbyIC15
S/Hisat
BUSDO-
Analog
basic
switches
EFFECT
DATA
BUSislatched
Switches
BACK
from
BlockR.RM7
output.
Wave
CPU
DATA
IC49,
IC48
BlockR.RM10
CPU
and
input
voltagetocontrol
and
IC17
andtobe
(12bit)byD/A
Registers.
decoders.
value
from
accesses
Circuitasanalog
the
voltage,
controls
And
DATA
D-RAM.
Array
D/A
signal.
S/HatIC16,
signal.
from
Analog
IC21
generates
pin
31.
Gate
each
partofSDD-2000.
IC45,
level.
IC42,
IC43
level.
and
DATA
Oscillator
BUS
control
DATA
latched
1/2
IC14.
Digital
IC18
memorized
BUSofCPU
And
output
and
Output
1/2
Circuit
Array
D7
the
is
BUS
and
Gate
IC14
and
IC22
-19-

8.
CHECK
Caution:
a.
This
product
faci:ofybe
Therefore,donot
seemed
b,
Waitatfeast10minutes
before
1)
Clock
,H
Setting:
rear
airsw
D.
n)
Connect
833
c)
Checkifvalueofthe
cl'i
Adjust
iS
necessary,
rnaking
check
paneltocenter.
:
to;
TIM
£
0
and
VR8toobtain
outofabove
AND
has
been
foreshipment.
adjust
any
adjustments,.
and
adjustment—1
(any
program
LEVELVR!
0
INTENSITY
0
frequency
observe
countertoTP1
frequency.
range.
ADJUSTMENT
adjusted
any
after
number
DIRECT
0
FRECX.
:
0
counteris4
above
completelyatthe
points
VR
valueifthe
other
turningonthe
OK)
Set
TUNE
EFFECT
0
TIMEk.4
0FF
test
pointofKLM-
OikHz!
observed
lOOHz.
than
1
F.BACK
MODE
DELAY
PROCEDURE
31
LFO
a)Sat1\ncj:ianyProgramnumberO
those
power
VR
on
0
value
AlfSW
10
D.TIME
0
b)
Connect
onKtIV!-833
c}Cofifsrmsf t
cl)
Adjust
waveformisdifferent
4)
Maximum
check
and
adjustment
t
EVEL
VR
0
iINTENS11V
1 "'o
oscilloscope
and
observe
A
"
/
\
o pofthewaveforrnis0
VR6
to
obtain
output
level
K)
DIRECT
0
FREQ.
0
(0.5V/div,
waveform
./
\
■
/
Fig,
EFFECT
VR
0
\
TIMEx4
OFF
0.5V/div,
described
,/\
/
A
/
\
1
DC)toTP3
\
V.
above
waveformifobserved
fromthe abovedescription,
cheek
and
adjustment
F
BACK
0
MODE
DELAY
below,
GND
2)
Clock
check
and
adjustment—2
a?
Setting:
rear
<TT
J.TIME
o
*
Off
MODE.
b)
Connect
quency.
elONthe
POLY-800,
Cl
C2
C3
B3
BendUp(Bend
Note:.
MIDI:
(any
program
paneltocenter,
LEVEL
S'/y
1
0
""
the
7
INTENSITY
:
o
MIDI
frequency
MIDI
SW.,
Key
Key
VR
number
DIRECT
'""
FREO.
SW.
and
countertoTP1
and
valueoncounter
Key
Key
Range
Max)
ReceiveCHmustbeICiH.,
OK)
VR
o
o"'
record
play
MIDI
EFFECT
TIME:k4
any
10rOO0Hz
20,,OOOHz
40,OO0Hz
7
5,644
BO/QQOHz
MIDIeditinformationmustbeX4mode.,
Support
note
range
mustbeCl,
Set
TUNE
F.BACK
o
~
MODE
OF?
sound
with
and
observe
Keyboard
Hz
VR
o""
SEQ
fre
such
on
as
a)
Set11ng:(an ypr
ai
rsw
D.TiME
0
any
b(
Connect
this
c}Con nect
on
To
vo1umeof
i'S
d)
Checkifthe
1
EVEL VR
10
INTENSITY
value
OK
standard
unit's
Input
osci11
KLlvi-833
get
the
standardsicjnaIgen erator.
!\Is
BAD
x
click
observed
VR1onKLM-833.
ogramnurnberOK31
DIRECT
'?
0
signal
Jack,,
©scope(2V
and
observe
VR
«
FREO.
0
generator
/'cljv,
waveform
waveformasbelow,
"\I\
\
fi
-\/-
J
U
GOOD
Fig,
2
waveformisGOOD,Ifnot,,
EFFECT
TIMEx4
OFF
(1KHz
50/usec/div,AC}toTP
F.BACK
0
MODE
DEI
AY
sine
wave)
describedasbelow.
adjust
r
\
f
"•,.
output
\
I/l
BAD
adjust
1
i
;
to
2
clj
Confirmifthe
Adjust
e)
ts
VR7toobtain
outofabove
valueonthe
above
range.
counteriswithin
valueifthe
observed
80KHz
value
■•-23•

5)
Analog
a)
Setting:
ATTSW
-10
D.TIME
0
b)
Input
10dBm,
and
observe
Converter
(any
LEVEL
INTENSITY
sine
Freq.:
check
program
VR
7
0
toneburst
400Hz,
EFFECT
*l
and
number
DIRECT
0
FREQ.
0
wave
width:
OUT
with
100
msec
adjustment
OK)
VR
EFFECT
22
TIMEx4
OFF
(=Sine
Pulse
Wave)
100msec)toInput
oscilloscope.
F.BACK
0
MODE
DELAY
(level:
*2
*3
Jack
7)
VCA
check
a)
Setting:
ATT
-10
TIME
b)
InputSG(sine
Jack
c)
Connect
(play
d)
Connect
EFFECT
Key
0
on
(any
SW.
LEVELVR
INTENSITY
and
play
MIDI
any
key
oscilloscope
OUT
and
adjustment
program
7
0
number
DIRECT
0
FREQ.
0
OK)
VR
waveof1KHz,
sampling.
Keyboard
and
playback
continuously)
(DC
0.2V/div,
and
observe
Key
on
waveformasbelow.
Key
EFFECT
31
TIMEx4
OFF
2.5V
F.BACK
0
MODE
SAMPLING
P-P)toInput
sampling
20msec/div)
on
note,
to
Fig.
3
c)
When
you
cannot
get
Adjust
linearity
correct
at*3with
waveformasabove;
VR3,oradjust
KLM-833tominimizeDCdriftinpart*3of
form.
("Description
as
Service
(Page
16)
6)
Feed
back
a)
Setting:
ATTSW
-10
D.TIME
120msec
b)
Connect
to
(any
LEVEL
INTENSITY
EFFECT
sineburst
Input
Jack.
c)
Set
parameter
no
ringing
d)
Adjust
occursinabove
e)
Confirmif....
no
ringing
is
VR5
ringing
occurs
even
-30±1
Manual
check
program
7
0
oscilloscope
wave
when
occurs
of
the
above
for
SDD-1000.
and
adjustment
number
VR
DIRECT
OUT
and
(Freq.:
valueofFEED
input
the
nottogenerate
c).
without
with
parameter
and
phase
OK)
VR
0
FREQ.
0
(AC
TIME
0.5V/div,
confirm
400Hz,
width:
BACKto28
same
sineburst
ringingincase
any
input.
valueofFEED
changes.
figureisalmost
Please
EFFECT
22
OFF
ringing
VR4
on
the
wave
same
refertoit.)
F.BACK
30
x4
MODE
DELAY
0.5msec/div)
when
input
100msec)
and
to
confirm
waveasb).
ringing
BACK
NG
e)
Confirmifthe
adjust
VR2onKLM-833.
GOOD
Fig.
observed
waveformisGOOD.Ifnot,
NG
4
-24-

CPU
juPD7810
Note:
>jPD7810
(4
Kbyte).
doesn't
contain
program
LATCH
INC/OEC
SP
EA
V
B
D
E
V
B'
H1
BUFFER
memory
BLOCK
1
•I
A
c
DIAGRAM
I
I
G,R
PROGRAM
MEMORY
G,R
(MPO7811
only)
INTERNAL
[PSW
Si
X
ALU
8/16)
CONTROL
I!
is li
DATA
BUS
-
CONTROL
a
MEMORY
(256-BYTEI
IT
0
INST.
REG
INST.
OECODER
CONTROL
ICO
PA7-0
PB7-0
PC7-0
PD7-0
PF7-0
NMI
MODE
0.1
PAO
PA1
'A2
PB2
PB3C
PB4C
PB5C
PB6C
PB7
PCO/TxO
PCI/RxD
PC2/SCK
PC3/INT2
PC4/TO
PC5/CI
PC6/CO0
PC7/COJ
MA\
INT1
MODE1
RESET
MODEO
X2
X1
:
Port
A
:
Port
B
:
Port
C
:
Port
D
:
Port
F
:
Non
Maskable
:
Mode0,1
PIN
CONFIGURATION
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
PIN
2
3
4
5
6
7
8
9
0
1
2
3
4
S
7
8
9
20
21
22
23
24
25
26
27
28
29
30
31
32
NAMES
Interrupt
^
X1,
X2
AN7-0
RD
WR
ALE
RESET
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
:
Crystal
:
Analog
,:Read
:
Write
:
Address
:
Reset
3VQ0
3
PD7
3
PD6
3
PD5
3
PD4
3
PD3
3
PD2
3PD1
3PD0
3
PF7
3PF6
0
PF5
3
PF4
3
PF3
0
PF2
0
PF1
0 PFO
0
ALE
0
VTE
0
R"D"
0
AVcc
0
VAREF
0
AN7
0
AN6
O
AN5
O
AN4
0
AN3
0
AN2
0
AN1
13
AN0
0
AVSS
Input
Strobe
Strobe
Latch
Enabl
GATE
ARRAY
6463626160S958 57666554S35251504948474645444342414039383736353433
nnnnnnnnnnnnnnnnnnnflnnnrnnnnnnnn
MB60H144
PIN
CONFIGURATION
EJECTOR
WARK
o
UUUUUUUUUJJUU
92021222324252627 28 293031
PIN
DEFINITIONS
Pin
Pin
Pin
Pin
Pin
Pin
Pin
I/O
no.
name
1
I
RESE
I
2
REC
I
3
PROG
4
I
RCAN
32
10
11
12
13
14
15
16
I
5
BY
6
TRIG
I
7
0
BY PA
I
8
INC1
I
9
INC2
I
TEST
I/O
CPU
I/O
CPU6
I/O
CPU
I/O
CPU4
I/O
CPU3
VSS
-
Fujitsu
IN
7
5
CMOS
no.
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
I/O
I/O
I/O
I/O
I
I
I
I
I
I
0
0
0
0
0
I
-
Gate
name
CPU2
CPU1
CPUO
CS
WR
RD
AD2
AD1
ADO
PENA
CONP
DOFF
SOFF
MUTE
CK1
VDD
Array
no.
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
"H"
Version
I/O
•
0
0
0
0
0
0
0
0
0
0
0
0
0
0
-
name
COUT
SH
DA12
DA11
DA10
DA
9
DA8
DA
7
DA
6
DA
5
DA
4
DA
3
DA
2
DA1
CAS
VSS
Pin
Assign
no.
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
I/O
0
0
0
0
0
0
0
0
0
0
0
0
0
I
0
-
Pin
name
WE
C138
B138
A138
A7
A1
A5
A2
A4
AO
A3
RAS
A6
DOUT
DIN
VDD
-26-