Korg SDD2000 Schematic

DIGITAL

DELAY

SDD-2000

SERVICE

1.

SPECIFICATIONS

2.

STRUCTURAL

3.

BLOCK

4.

CIRCUIT

5.PCBOARD

6.

CIRCUIT

7.

TROUBLE

8.

CHECK

9.

REFERENCE

10.

PARTS

KEIO

ELECTRONIC

DIAGRAM

AND

LIST

DIAGRAM

DESCRIPTION

SHOOTING

ADJUSTMENT

DATA

CHART

LABORATORY

MANUAL

CONTENTS

PROCEDURE

TOKYO/JAPAN

2

3

7

8

15

19

21

23

25

27

CORPORATION

1.

SPECIFICATIONS

Input Input

Output

Frequency

response

(Unity)

level:

Impedance:

Max

clip

Output

Impedance:

Max

clip

20Hz~20KHz,

30Hz~18KHz,

(X1

mode)

30Hz~4.5KHz,

(X4

mode)

level:

-35dBm

-10dBm

47kft

500kft

+6dBm

+19dBm

-35dBm

-10dBm

600ft

-20dBm

+6dBm

+3dBm

±1dB

+1dB,-3dB

+1dB,

(Direct)

(Effect)

(Direct)

(Effect)

(Direct)

(Effect)

-3dB

(Effect)

•

Power

consumption

•

Accessories

Options

17W

Rack

mounting

4

washers)

Signal

cord,

(PS-1,

S-2),IUrack

kit(4screws,

MIDI

cable,

FootSW

case

•

Dynamic

•

S/N

ratio

•

Distortion

•

Delay

time

Feedback

•

Modulation

range

90dB

(IHF)

(Effect)ormore

95dB

(IHF)

(Direct)ormore

80dB(IHF)

0.05%

0.1%

0~4368msec

0~

1092msec(1~

step)

0~4368msec

63

steps

0~31

33:

110%

0^-31

-31:110%

Waveform:

Modulation

(Frequency

Delay

(Intensity

(Effect)

(Direct)

(Effect)

(1msec

(X1

mode)

(X4

(Positive

(Opposite

Triangle

frequency:

0:0.1Hz,

time

modulation

31)

step)

10msec-

mode)

phase)0:0%,

wave

(A)

0.1Hz~

31:

10Hz)

range:

1msec

10Hz

2:1

•

Dimensions

•

Weight

•

Power

supply

voltage

482

(W)

X44(H)X344(D)

4.5kg

AC100V#50/60Hz

mm

-2-

2.

STRUCTURAL

DIAGRAM

-3-

PART

A

B

C

0

E

F

G

H

No.

PART

FEB3x6ZMC

FEB3»10

BZMC

FEB4«8

BZMC

TP2GB

3»6

FHN3ZMC

FHN4ZMC

VN7ZMC

VN9ZMC

NAME

BZMC

QTY

PART

No.

1

2

3

4

5

6

7

8

9

10

11

12

13

14

IS

16

17

18

19

26

5

1

13

5

1

3

1

20

21

22

23

24

25

26

27

PART

CHASSIS

FRONT

CHASSIS

METAL

FITTINGOFFRONT

METAL

FITTINGOFFRONT

METAL

FITTINGOFPHONE

HEAT

SINK

METAL

FITTINGOFBUSHING

VR

HOLDER

SHIELDING

PLATE

RUBBER

FEET

KLM-825

KLM-829

KLM-831

KLM-832

KLM-833

TACTSWKNOB

POWER

TRANSFORMER

VR

ROTARY

ENCOOER

POWER

SW

BUSHING

WIRE

BAND

WIRE

BAND

PLASTIC

RIVET

SNAP

PLATE

NAME

PANEL

JACK

TA-802

TB-802

L

R

PART

CODE

64069300

64069400

64063600

64063601

64069600

64063800

64064000

79022102

63000300

50007800

34082610

34082910

34083100

34083200

34083300

62011001

62011202

62011000

40008900

40009000

36019100

37003100

37506100

54005300

54007100

54011000

45402400

-4-

PART

No.

2

3

5

No.

PART

TP2GB3x6

TP2GF3*8

FEHS

4x8

WK4

BZMC

NAME

BZMC

A

B

C

0

OTY

11

4

6

7

8

9

10

PART

CHASSIS

FRONT

PANEL

COVER

FRONT

PANEL

PLATE

FILTER

KNOB

BOARO

MASK

NAME

RADIATION

LEO

VR

POWERSWKNOB

ROTARYVR(SW)

NAME

KNOB

SMALL

PART

COOE

64069300

64069200

64069500

64063700

68600700

55005100

63001000

62013200

62011100

62007400

-5-

-6-

HEAD

ROOM

/._DELAY

OFF

EMPHASIS

FEEDBACK

LEVEL

PROGRAMMABLE

CO

■

00

5

o

g

*

PROG.NO

o

DATA/TIM£(n>5)

o o

QlSPLAY

o

o o

00

[k"lM-833~~]

CN9!

|CN9

T10I

TA802orlB802

.1

1

o

O

H

a

I

SKI

:PME265MC533

100V

1

17V

220V

24UV

Fl.

250V

250

V.T

F2

1A

500mA

F3

125v

250V.

2A

250V

T1A

250V.T315mA

F4

0.5A

T101

TA-802

TB-8C2

KLM-831

DATA/TlME(mS)

-9-

00

(a)

o

6.

CIRCUIT

1.

KLM-833

Audio

signal

route

DESCRIPTION

Analog

Circuit

The

signal

IC40

(pin

Circuit

and

which

5,6,7)

FEED

passes

andgointo

BACK

IC39isde-emphasized

EFFECT

Volume

Control

Volume

Circuit.

at

Control

1/2

LevelofAudio

is

decidedbyRelay

SW.

LevelofAudio

ablebyInput

by

1/2

IC31

pass

filter

and

(3)

Q24.

Q24isamplifier

sending

while

signal

IC35isan

willbeoutput,

signal

this

Audio

This

trigger

sampling

level.

(OFF).

case,

signal

IC35iscontrolled

terminal).

SelectingofLPF-1,

CPU

addressisdecodedbydecoder

latch

data.

latch

output

terminal

1/2

IC33

of

FEED

work

and

1/2

of

pin27:COMP

While

Analog

Output

signaltoDigital

Analog

as

Audio

IC13isan

Analog

"H"atSampling,

sampling,itlets

Compander

signal

D/A

signal

IC32

constructs

IC29

constructs

IC13isan

make

Audio

IC 29:

Constanceinorder

ON/OFF

ThisICworks

letting

IC30

IC39isan

willbeoutput,

signal

(=OFF).

while

REC

Overdub

IC22

pin28(DOFF

from

IC39.

signal

input

RY1

whichiscontrolledbyAttenuator

signal

amplifiedby1/2

LevelVR(VR101).

(4558)issenttoeachof(1)2kindsofLow-

LPF-1,

LPF-2

(2)

for

trigger

signaltoCPU

and

start

sampling

Analog

Switch

one

from

ThisICis

LPF-1,

controlledbyGate

OFFisselectedtooff

nottobe

senttoA/D

by Gate

(SOFF

comestobe

(Pin

Signal

terminalis"L"

LPF-2ismadebyCPU

Filter

selecting

15.

When

"H"

1,2,3)

worksasPre-emphasis,

BACK

signal.

and

1/2

Analog

Compander

once

Compander

Analog

TerminalofGate

(LCOM

Switch

Sequencer)

Part

terminal)ofIC13isoutputasA/D

Circuit.

digitalized

after

through

Expander

Audio

Analog

Switch

signal

bypass

Muting

nottogenerate

and

smoothen

with

control

drive

VCA.

Analog

Switch

one

from

and

Circuit.

compressed

nottohave

D/A

with

Muting

and

Expander

CircuitisVCA

OFFisselectedinordertooff

SYNCSWisON(Sampling,

are

ON).

When

those

terminal)

from

Connector

Audio

Direct

OutVR102,

controlledbyAudio

port

PA7

accordingtoAudio

selecting

one

Audio

while

Array

while

signaliscontrolledbyIC47

delay

time

LPF-1

(4.5KHz)isselected.

IC33

(Pin

(Compressor+Expander)

and

works

ThisICis

Array

Audio

in

Digital

andisinputtoIC29,

1/2

IC34,

Circuit

works

while

Noiseatsignal

Audio

signal

from

selecting

LPF-3,

one

Switches

becomes

CN-11

IC31ischange

signal

re-amplified

1/2

IC36

signal

(IC23,

which

from

signal

REC

IC22

REC

CANCEL)

IC56

modeisx4,this

5,6,7),

as a

IC22.

compressing

Circuit

Audio

signal

LPF-2orno

Array.

and

make

CANCEL.

pin29(SOFF

IC23.

This

and

let

IC47

and

Mix

Amp

IC32,

IC37

Bypass

controlled

("L"atDelay,

Switch

signal

bypass

error.

changes

IC32.

and

IC37.

with

IC30.

with

Compander

Sampling.

which

CPU

which

from

Sequencer,

are

"H"

has

while

sampling.

PA6

Audio

LPF-4orno

delay

ON,

Gate

and

off

time

sudden

terminal

signal

sound

Trigger

Array

output

8)

by

1/2

2

In

is,

to

A)

EFFECT

is

IC46

B)

FEED

by

control

PhaseofFEED

is

Analog

feedbacked

(Note:

latchedbyIC41.)

MODULATION

FREQ.

At

2/4

Circuitisconstructed.

latchedbyIC47

RM9todecide

INTENSITY

Data

and

tobeworkingasattenuatorinordertodecideMGINT.

IC53

By

the

datatopin2of

VCO:

2.

KLM-833

1)

Audio

A/D

The

signal

Succesive

into

IC3,

Gate

and

data

Array

data

and outputtoAnalog

2)

System

VCO

to

supplies

produces

Volume

Level

latchedbyIC44

control

BACK

IC41

and

BlockR.RM7todecide

invertedat1/2

SW.

Analog

IC54

(pin

from

CPU

lets

Analog

latches

latched

IC21

which

Signal

Control

data

from

and

BlockR.RM8todecide

Volume

Level

DataofCPU

IC41

lets

BACK

IC40

IC42

selectsifnormalorinverted

signalisreturnedtoIC35

SwitchiscontrolledbyCPU

PART

5,6,7

and

IC47

oscillation

DATA

Switch

Scale

Data

data,

IC55

IC54

and

changes

Digital

Circuit

Path

signalismadetobe

signal

madetobe

after

linearization

Approximation

IC11—IC14

IC2

(74HC138)

Array

outputs

from

controls

from

Clock

control

IC21

System

Timing

accordingly.

are

reads

Delay

address

D-RAM

D/Aismadetobe

which

returnstoGate

IC18tooutput

Path

D/C

voltageissent

13.

With

ClocktoIC22

which

Circuit

CPU

DATA

IC44

lets

Control

Analog

FEED

signal

output

(pin

1,2,3).

8,9,10),

Data

Analog

frequency.

BUS

IC51,52control

whichisfrom

worksasD/A

mix

system

Triangle

from

SW.

DATAislatchedbyIC50

with

clock.

S/HbyIC15

S/Hisat

BUSDO-

Analog

basic

switches

EFFECT

DATA

BUSislatched

Switches

BACK

from

BlockR.RM7

output.

Wave

CPU

DATA

IC49,

IC48

BlockR.RM10

CPU

and

input

voltagetocontrol

and

IC17

andtobe

(12bit)byD/A

Registers.

decoders.

value

from

accesses

Circuitasanalog

the

voltage,

controls

And

DATA

D-RAM.

Array

D/A

signal.

S/HatIC16,

signal.

from

Analog

IC21

generates

31.

Gate

each

partofSDD-2000.

IC45,

level.

IC42,

IC43

level.

and

DATA

Oscillator

BUS

control

DATA

latched

1/2

IC14.

Digital

IC18

memorized

BUSofCPU

And

output

and

Output

1/2

Circuit

Array

D7

the

is

BUS

and

Gate

IC14

and

IC22

-19-

Korg SDD2000 Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual