Kontron CP308 User Manual

» User Guide «

3U CompactPCI Processor Board based on

the Intel® Core™2 Duo Processor with

the Mobile Intel® GS45 Express Chipset

CP308

Doc. ID: 1027-4487, Rev. 3.0

December 23, 2009

P R E L I M I N A R Y

If it’s embedded, it’s Kontron.

Preface CP308

Revision History

Publication Title:

Doc. ID: 1027-4487

Rev. Brief Description of Changes Date of Issue

1.0 Initial issue 3-Apr-2009

2.0 General update, added description of the CP308-Media module 20-Jul-2009

3.0 General update, made changes to Appendix B, CP308-MEDIA
Module

CP308: 3U CompactPCI Processor Board based on the Intel® Core™2
Duo Processor with the Mobile Intel® GS45 Express Chipset

23-Dec-2009

Imprint

Kontron Modular Computers GmbH may be contacted via the following:

MAILING ADDRESS TELEPHONE AND E-MAIL

Kontron Modular Computers GmbH +49 (0) 800-SALESKONTRON

Sudetenstraße 7 [e-mail]

D - 87600 Kaufbeuren Germany

P R E L I M I N A R Y

For further information about other Kontron products, please visit our Internet web site:
www.kontron.com.

Disclaimer

Copyright © 2009 Kontron AG. All rights reserved. All data is for information purposes only and
not guaranteed for legal purposes. Information has been carefully checked and is believed to
be accurate; however, no responsibility is assumed for inaccuracies. Kontron and the Kontron
logo and all other trademarks or registered trademarks are the property of their respective own­ers and are recognized. Specifications are subject to change without notice.

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CP308 Preface

Table of Contents

Revision History .........................................................................................................ii

Imprint ........................................................................................................................ii

Disclaimer ..................................................................................................................ii

Table of Contents ......................................................................................................iii

List of Tables .............................................................................................................xi

List of Figures ..........................................................................................................xv

Proprietary Note ..................................................................................................... xvii

Trademarks ............................................................................................................ xvii

Environmental Protection Statement ...................................................................... xvii

Explanation of Symbols ........................................................................................ xviii

For Your Safety .......................................................................................................xix

High Voltage Safety Instructions .........................................................................xix

Special Handling and Unpacking Instructions ....................................................xix

General Instructions on Usage ................................................................................xx

Two Year Warranty ..................................................................................................xxi

1. Introduction ............................................................................. 1 - 3

1.1 Board Overview ....................................................................................... 1 - 3

1.1.1 Board Introduction .......................................................................... 1 - 3

1.1.2 Board-Specific Information ............................................................. 1 - 4

1.2 System Expansion Capabilities ............................................................... 1 - 5

1.2.1 CP308-HDD Module ....................................................................... 1 - 5

1.2.2 CP308-MEDIA Module ................................................................... 1 - 5

1.2.3 CP-RIO3-04 Rear I/O Module ......................................................... 1 - 5

1.2.4 USB 2.0 NAND Flash Module ......................................................... 1 - 5

1.3 Board Diagrams ...................................................................................... 1 - 5

1.3.1 Functional Block Diagram ............................................................... 1 - 6

1.3.2 Front Panel ..................................................................................... 1 - 7

1.3.3 Board Layout .................................................................................. 1 - 8

1.4 Technical Specification ............................................................................ 1 - 9

1.5 Kontron Software Support ..................................................................... 1 - 14

1.6 Standards .............................................................................................. 1 - 15

P R E L I M I N A R Y

1.7 Related Publications ............................................................................. 1 - 16

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Preface CP308

2. Functional Description ............................................................ 2 - 3

2.1 CPU, Memory and Chipset ......................................................................2 - 3

2.1.1 CPU .................................................................................................2 - 3

2.1.2 Memory ...........................................................................................2 - 5

2.1.3 Mobile Intel® GS45 Express Chipset Overview ..............................2 - 6

2.1.3.1 Intel® GS45 Graphics Memory Controller Hub .......................2 - 6

2.1.3.2 I/O Controller Hub ICH9M-SFF ...............................................2 - 6

2.2 Peripherals ...............................................................................................2 - 7

2.2.1 Timer ...............................................................................................2 - 7

2.2.2 Watchdog Timer ..............................................................................2 - 7

2.2.3 Battery .............................................................................................2 - 7

2.2.4 Reset ...............................................................................................2 - 8

2.2.5 SPI Flash for uEFI BIOS .................................................................2 - 8

2.2.6 USB 2.0 NAND Flash Module .........................................................2 - 9

2.2.7 8HP Expansion Modules .................................................................2 - 9

2.2.8 Integrated Trusted Platform Module (iTPM) ....................................2 - 9

2.3 Board Interfaces ....................................................................................2 - 10

2.3.1 Front Panel LEDs ..........................................................................2 - 10

2.3.1.1 Watchdog and Temperature Status LEDs .............................2 - 10

2.3.1.2 General Purpose LEDs .........................................................2 - 11

2.3.2 SMC LED ......................................................................................2 - 12

2.3.3 DIP Switch SW1 ............................................................................2 - 12

2.3.4 USB Interfaces ..............................................................................2 - 13

2.3.4.1 Front Panel USB Connectors J4 and J5 ...............................2 - 13

P R E L I M I N A R Y

2.3.5 Graphics Controller .......................................................................2 - 13

2.3.5.1 Graphics Memory Usage ......................................................2 - 14

2.3.5.2 Graphics Resolution .............................................................2 - 14

2.3.5.3 VGA Analog Interface and Connector J3 ..............................2 - 14

2.3.6 Gigabit Ethernet ............................................................................2 - 15

2.3.7 Serial ATA Connectors J7 and J8 ..................................................2 - 16

2.3.8 CompactPCI Interface ...................................................................2 - 16

2.3.8.1 Board Functionality when Installed in System Controller Slot 2 - 16

2.3.8.2 Board Functionality when Installed in Peripheral Slot (Passive
Mode) 2 - 17

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CP308 Preface

2.3.8.3 Front/Rear I/O Configuration ............................................... 2 - 17

2.3.8.4 Board Insertion/Replacement under Power ......................... 2 - 17

2.3.8.5 Power Ramping .................................................................... 2 - 17

2.3.8.6 ENUM# Interrupt .................................................................. 2 - 17

2.3.9 CompactPCI Connectors J1 and J2 ............................................. 2 - 18

2.3.9.1 CompactPCI Connector Keying ........................................... 2 - 18

2.3.9.2 CompactPCI Connectors J1 and J2 Pinouts ........................ 2 - 19

2.3.10 Optional Rear I/O Interface ........................................................... 2 - 22

2.3.10.1 Optional Rear I/O Interface on CompactPCI Connector J2 .. 2 - 23

2.3.10.2 Rear I/O Configuration ......................................................... 2 - 25

2.4 System Management Controller ............................................................ 2 - 27

2.4.1 Sensors Implemented on the CP308 ............................................ 2 - 27

3. Installation ............................................................................... 3 - 3

3.1 Safety Requirements ............................................................................... 3 - 3

3.2 CP308 Initial Installation Procedures ...................................................... 3 - 4

3.3 Standard Removal Procedures ............................................................... 3 - 5

3.4 Insertion/Removal under Power ............................................................. 3 - 6

3.4.1 Replacement under Power in Peripheral Slot ................................. 3 - 6

3.5 Installation of CP308 Peripheral Devices ................................................ 3 - 9

3.5.1 USB Device Installation ................................................................ 3 - 10

3.5.2 USB 2.0 NAND Flash Module Installation .................................... 3 - 10

3.5.3 Installation of External Serial ATA Devices ................................... 3 - 11

3.5.4 2.5” HDD/SSD Installation ............................................................ 3 - 11

3.5.5 CompactFlash Card Installation .................................................... 3 - 11

3.5.6 SD/SDHC Card Installation .......................................................... 3 - 11

3.5.7 PCI Express Mini Card Installation ............................................... 3 - 12

3.5.8 Rear I/O Device Installation .......................................................... 3 - 12

3.5.9 Battery Replacement .................................................................... 3 - 12

P R E L I M I N A R Y

3.6 Software Installation .............................................................................. 3 - 13

4. Configuration ........................................................................... 4 - 3

4.1 DIP Switch Configuration ........................................................................ 4 - 3

4.2 Jumper Description ................................................................................. 4 - 4

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Preface CP308

4.2.1 uEFI BIOS Settings .........................................................................4 - 4

4.2.2 I/O Address Map .............................................................................4 - 5

4.3 CP308-Specific Registers ........................................................................4 - 6

4.3.1 Status Register 0 (STAT0) ...............................................................4 - 6

4.3.2 Status Register 1 (STAT1) ...............................................................4 - 7

4.3.3 Control Register 0 (CTRL0) ............................................................4 - 7

4.3.4 Control Register 1 (CTRL1) ............................................................4 - 8

4.3.5 Device Protection Register (DPROT) ..............................................4 - 9

4.3.6 Reset Status Register (RSTAT) .....................................................4 - 10

4.3.7 Board Interrupt Configuration Register (BICFG) ...........................4 - 11

4.3.8 Status Register 2 (STAT2) .............................................................4 - 12

4.3.9 Board ID Register (BID) ................................................................4 - 13

4.3.10 Board and PLD Revision Register (BREV) ...................................4 - 13

4.3.11 Geographic Addressing Register (GEOAD) ..................................4 - 13

4.3.12 Watchdog Timer Control Register (WTIM) ....................................4 - 14

4.3.13 LED Configuration Register (LCFG) .............................................4 - 16

4.3.14 LED Control Register (LCTRL) .....................................................4 - 17

4.3.15 General Purpose Output Register (GPOUT) .................................4 - 18

4.3.16 General Purpose Input Register (GPIN) .......................................4 - 19

4.4 SMC-Specific Registers .........................................................................4 - 20

4.4.1 SMC Controller Status Register 0 (ICSTA0) ..................................4 - 20

4.4.2 SMC Controller Status Register 1 (ICSTA1) ..................................4 - 21

4.4.3 SMC Keyboard Controller-Style Interface .....................................4 - 21

P R E L I M I N A R Y

5. Power Considerations ............................................................. 5 - 3

5.1 System Power ..........................................................................................5 - 3

5.1.1 CP308 Baseboard ...........................................................................5 - 3

5.1.2 Backplane .......................................................................................5 - 4

5.1.3 Power Supply Units .........................................................................5 - 4

5.1.3.1 Start-Up Requirement .............................................................5 - 4

5.1.3.2 Power-Up Sequence ...............................................................5 - 4

5.1.3.3 Tolerance ................................................................................5 - 5

5.1.3.4 Regulation ...............................................................................5 - 5

5.2 Power Consumption ................................................................................5 - 6

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5.3 Power Consumption of CP308 Accessories ........................................... 5 - 8

5.4 Start-Up Currents of the CP308 .............................................................. 5 - 8

5.5 +5 V STDBY Currents During Main Power-Off ....................................... 5 - 8

6. Thermal Considerations ......................................................... 6 - 3

6.1 Board Internal Thermal Monitoring .......................................................... 6 - 3

6.1.1 Placement of the Temperature Sensors ......................................... 6 - 3

6.2 Processor Thermal Monitoring and Regulation ....................................... 6 - 4

6.2.1 Digital Thermal Sensor (DTS) ......................................................... 6 - 4

6.2.2 Thermal Diode Sensor .................................................................... 6 - 4

6.2.3 Thermal Monitor 1 (TM1) ................................................................ 6 - 4

6.2.4 Thermal Monitor 2 (TM2) ................................................................ 6 - 5

6.2.5 TM1 and TM2 Operation ................................................................. 6 - 5

6.2.6 Catastrophic Cooling Failure Sensor .............................................. 6 - 5

6.3 Chipset Thermal Monitor ......................................................................... 6 - 6

6.3.1 Internal Thermal Sensors ............................................................... 6 - 6

6.3.2 External Thermal Sensors .............................................................. 6 - 6

6.3.3 Catastrophic Trip Point Thermtrip ................................................... 6 - 6

6.4 External Thermal Regulation ................................................................... 6 - 7

6.4.1 Operational Limits for the CP308 .................................................... 6 - 9

6.4.2 Peripherals .................................................................................... 6 - 10

A. CP308-HDD Module .................................................................A - 3

A.1 Overview .................................................................................................A - 3

A.2 Technical Specifications ..........................................................................A - 4

A.3 CP308-HDD Module Functional Block Diagram .....................................A - 5

A.4 Front Panel of the 8HP CP308 with CP308-HDD Module ......................A - 6

A.5 CP308-HDD Module Layout ....................................................................A - 7

P R E L I M I N A R Y

A.6 Module Interfaces (Front Panel and Onboard) ........................................A - 8

A.6.1 Keyboard/Mouse Interface ..............................................................A - 8

A.6.2 Universal Serial Port .......................................................................A - 9

A.6.3 USB Interfaces ..............................................................................A - 10

A.6.4 USB 2.0 NAND Flash Module .......................................................A - 10

A.6.5 DVI-D Interface .............................................................................A - 11

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Preface CP308

A.6.6 CompactFlash Card Socket ......................................................... A - 12

A.6.7 SATA Interface ............................................................................. A - 13

A.6.8 Battery .......................................................................................... A - 14

B. CP308-MEDIA Module ............................................................ B - 3

B.1 Overview ................................................................................................. B - 3

B.2 Technical Specifications ......................................................................... B - 4

B.3 CP308-MEDIA Module Functional Block Diagram ................................. B - 6

B.4 Front Panel of the 8HP CP308 with CP308-MEDIA Module .................. B - 7

B.5 CP308-MEDIA Module Layout ................................................................ B - 8

B.6 Module Interfaces (Front Panel and Onboard) ....................................... B - 9

B.6.1 DisplayPort Interfaces .................................................................... B - 9

B.6.2 HD Audio Interfaces ......................................................................B - 11

B.6.2.1 HD Audio Specifications .......................................................B - 11

B.6.2.2 Mic-In, Line-In and Line-Out Interfaces ............................... B - 12

B.6.2.3 S/P-DIF-Out Interface .......................................................... B - 13

B.6.2.4 CD-In Interface .................................................................... B - 13

B.6.2.5 Internal Line-Out Mono Interface ......................................... B - 13

B.6.3 COM Interface .............................................................................. B - 14

B.6.4 PCI Express Mini Card Socket ..................................................... B - 14

B.6.5 SDHC Interface ............................................................................ B - 16

B.6.6 SATA Interface ............................................................................. B - 17

B.6.7 CompactFlash Card Socket ......................................................... B - 18

B.6.8 Battery .......................................................................................... B - 19

P R E L I M I N A R Y

C. CP-RIO3-04 Rear I/O Module ................................................. C - 3

C.1 Overview ................................................................................................. C - 3

C.2 Technical Specifications ......................................................................... C - 4

C.3 Front Panels ...........................................................................................C - 5

C.4 Module Layout: 4HP and 8HP Versions .................................................C - 6

C.5 Module Interfaces ................................................................................... C - 7

C.5.1 USB Interfaces ............................................................................... C - 7

C.5.2 VGA Interface ................................................................................. C - 8

C.5.3 Gigabit Ethernet Interface .............................................................. C - 9

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CP308 Preface

C.5.4 COM Interface ..............................................................................C - 10

C.5.5 Peripheral Control Interface ..........................................................C - 11

C.5.6 Serial ATA Interfaces SATA4 and SATA5 ......................................C - 12

C.5.7 Rear I/O Interface on CompactPCI Connector rJ2 .......................C - 13

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P R E L I M I N A R Y

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CP308 Preface

List of Tables

1-1 4HP CP308 Main Specifications ................................................................ 1 - 9

1-2 Standards ................................................................................................ 1 - 15

1-3 Additional Standards for Boards Ordered with Ruggedized Service ....... 1 - 16

1-4 Related Publications ................................................................................ 1 - 16

2-1 Processors Supported on the CP308 ........................................................ 2 - 3

2-3 CPU Frequency in the Various SpeedStep® Modes ................................. 2 - 4

2-2 Maximum Power Dissipation of the Processors (CPU only) ...................... 2 - 4

2-4 Supported/Recommended Memory Configurations .................................. 2 - 5

2-5 Watchdog Status LED and Temperature Status LED Function ............... 2 - 10

2-6 General Purpose LED Function ............................................................... 2 - 11

2-7 POST Code Sequence ............................................................................ 2 - 12

2-8 POST Code Example .............................................................................. 2 - 12

2-9 DIP Switch SW1 Function ....................................................................... 2 - 12

2-10 USB Connectors J4 and J5 Pinout .......................................................... 2 - 13

2-11 D-Sub VGA Connector J3 Pinout ............................................................ 2 - 14

2-12 Pinout of J6A/B Based on the Implementation ........................................ 2 - 15

2-13 SATA Connectors J7 and J8 Pinout ......................................................... 2 - 16

2-14 CompactPCI Bus Connector J1 System Controller Slot Pinout ............... 2 - 19

2-15 CompactPCI Bus Connector J1 Peripheral Slot Pinout ........................... 2 - 20

2-16 64-bit CompactPCI Bus Connector J2 Pinout (CP308 Front I/O Vers.) ... 2 - 21

2-17 Rear I/O CompactPCI Bus Connector J2 Pinout (CP308 Rear I/O Vers.) 2 - 23

2-18 GPIO Signal Description .......................................................................... 2 - 24

2-19 SATA Port Features ................................................................................. 2 - 26

2-20 Processor and Chipset Sensors and Signals .......................................... 2 - 27

2-21 CPCI-Specific Sensors ............................................................................ 2 - 27

2-22 Onboard Temperature Sensors ............................................................... 2 - 28

P R E L I M I N A R Y

2-23 Onboard Power Supply Sensors and Signals ......................................... 2 - 28

2-24 Rear I/O Fan Sensors and Signals .......................................................... 2 - 28

2-25 SMC General Sensors and Signals ......................................................... 2 - 28

4-1 DIP Switch SW1 Functionality ................................................................... 4 - 3

4-2 Jumper for Clearing the uEFI BIOS Settings ............................................. 4 - 4

4-3 I/O Address Map ........................................................................................ 4 - 5

ID 1027-4487, Rev. 3.0 Page xi

Preface CP308

4-4 Status Register 0 (STAT0) .......................................................................... 4 - 6

4-5 Status Register 1 (STAT1) .......................................................................... 4 - 7

4-6 Control Register 0 (CTRL0) ....................................................................... 4 - 7

4-7 Control Register 1 (CTRL1) ....................................................................... 4 - 8

4-8 Device Protection Register (DPROT) ......................................................... 4 - 9

4-9 Reset Status Register (RSTAT) ................................................................ 4 - 10

4-10 Board Interrupt Configuration Register (BICFG) ...................................... 4 - 11

4-11 Status Register 2 (STAT2) ........................................................................ 4 - 12

4-12 Board ID Register (BID) ........................................................................... 4 - 13

4-13 Board and PLD Revision Register (BREV) .............................................. 4 - 13

4-14 Geographic Addressing Register (GEOAD) ............................................. 4 - 13

4-15 Watchdog Timer Control Register (WTIM) ............................................... 4 - 15

4-16 LED Configuration Register (LCFG) ........................................................ 4 - 16

4-17 LED Control Register (LCTRL) ................................................................ 4 - 17

4-18 General Purpose Output Register (GPOUT) ............................................ 4 - 18

4-19 General Purpose Input Register (GPIN) .................................................. 4 - 19

4-20 SMC Controller Status Register 0 (ICSTA0) ............................................ 4 - 20

4-21 SMC Controller Status Register 1 (ICSTA1) ............................................ 4 - 21

5-1 Maximum Input Power Voltage Limits ........................................................ 5 - 3

5-2 DC Operational Input Voltage Ranges ....................................................... 5 - 3

5-3 Input Voltage Characteristics ..................................................................... 5 - 5

5-4 Power Consumption: CP308 in EFI Shell Mode ........................................ 5 - 7

5-5 Power Consumption: CP308 with Linux® / Win.® XP in IDLE Mode ......... 5 - 7

5-6 Power Consumption: CP308 with Linux® /Windows® XP, Memory Test ... 5 - 7

P R E L I M I N A R Y

5-7 Power Consumption: CP308 TDP at 75% ................................................. 5 - 7

5-8 Power Consumption: CP308 TDP at 100% ............................................... 5 - 7

5-9 Power Consumption of CP308 Accessories .............................................. 5 - 8

5-10 Start-Up Currents of the CP308 ................................................................. 5 - 8

5-11 +5 V STDBY Start-Up Currents During Main Power-Off ............................ 5 - 8

A-1 CP308-HDD Module Specifications .......................................................... A - 4

A-2 Serial Port Connector J5 Pinout ................................................................ A - 9

A-3 USB Connectors J2 and J3 Pinout .......................................................... A - 10

A-4 DVI-D Connector J1 Pinout ...................................................................... A - 11

A-5 CompactFlash Connector J9 Pinout ....................................................... A - 12

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CP308 Preface

A-6 SATA Connector J7 Pinout ...................................................................... A - 13

B-1 CP308-MEDIA Module Specifications ....................................................... B - 4

B-2 DisplayPort Connectors J2 and J4 Pinout ................................................. B - 9

B-3 Audio Output Interface Configuration ...................................................... B - 10

B-4 HD Audio Specifications .......................................................................... B - 11

B-5 CD-In Connector J9 Pinout ...................................................................... B - 13

B-6 Internal Line-Out Mono Connector J10 Pinout ........................................ B - 13

B-7 Serial Port Connector J1 (COM1) Pinout ................................................ B - 14

B-8 PCI Express Mini Card Connector J5 Pinout ........................................... B - 15

B-9 SD/SDHC Card Socket J3 Pinout ........................................................... B - 16

B-10 SATA Connector J7 Pinout ...................................................................... B - 17

B-10 CompactFlash Connector J9 Pinout ........................................................ B - 18

C-1 CP-RIO3-04 Rear I/O Module Main Specifications ................................... C - 4

C-2 USB Connectors J11 and J12 Pinout ........................................................ C - 7

C-3 D-Sub VGA Connector J7 Pinout .............................................................. C - 8

C-4 Pinout of J10A/B Based on the Implementation ........................................ C - 9

C-5 COM Connectors J2a (COM1) and J3a (COM2) Pinout ........................ C - 10

C-6 Serial Port Connectors J2 (COM1) and J3 (COM2) Pinout ..................... C - 10

C-7 Peripheral Connector J13 Pinout ............................................................. C - 11

C-8 SATA Connectors J5 and J6 Pinout ......................................................... C - 12

C-9 Rear I/O CompactPCI Connector rJ2 Pinout ........................................... C - 14

P R E L I M I N A R Y

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List of Figures

1-1 CP308 Functional Block Diagram ............................................................ 1 - 6

1-2 4 HP CP308 Front Panel ......................................................................... 1 - 7

1-3 4HP CP308 Board Layout (Top View) ...................................................... 1 - 8

1-4 4HP CP308 Board Layout (Bottom View) ................................................ 1 - 8

2-1 USB Connectors J4 and J5 .................................................................... 2 - 13

2-2 D-Sub VGA Con. J3 ............................................................................... 2 - 14

2-3 Dual Gigabit Ethernet Connector J6A/B ................................................ 2 - 15

2-4 SATA Con. J7 and J8 ............................................................................. 2 - 16

2-5 CPCI Connectors J1/J2 ......................................................................... 2 - 18

3-1 Connecting a Peripheral Device to the 4HP CP308 ................................ 3 - 9

3-2 Connecting a Peripheral Device to the 8HP CP308 with CP308-HDD .... 3 - 9

3-3 Connecting a Peripheral Device to the 8HP CP308 with CP308-MEDIA 3 - 10

4-1 DIP Switch SW1 ....................................................................................... 4 - 3

6-1 Temperature Sensor Placement (CP308 Top View) ................................ 6 - 3

6-2 Operational Limits for the CP308 with Core™2 Duo 1.2 GHz ................ 6 - 9

6-3 Operational Limits for the CP308 with Core™2 Duo 1.86 GHz ............... 6 - 9

6-4 Operational Limits for the CP308 with Core™2 Duo 2.26 GHz ............. 6 - 10

A-1 CP308-HDD Module Functional Block Diagram ...................................... A - 5

A-2 Front Panel of the 8HP CP308 with CP308-HDD Module ....................... A - 6

A-3 CP308-HDD Module Layout (Top View) .................................................. A - 7

A-4 CP308-HDD Module Layout (Bottom View) ............................................. A - 7

A-5 Keyboard/Mouse Connector J4 ............................................................... A - 8

A-6 Adapter for Connecting Mouse/Keyboard via PS/2 ................................. A - 8

A-7 Keyboard/Mouse Connector J4 Pinout .................................................... A - 9

A-8 Serial Port Connector J5 .......................................................................... A - 9

A-9 USB Connectors J2 and J3 .................................................................... A - 10

P R E L I M I N A R Y

A-10 DVI-D Connector J1 ............................................................................... A - 11

A-11 CompactFlash Connector J9 ................................................................. A - 12

A-12 SATA Connector J7 ................................................................................ A - 13

B-1 CP308-MEDIA Module Functional Block Diagram ................................... B - 6

B-2 Front Panel of the 8HP CP308 with CP308-MEDIA Module .................... B - 7

B-3 CP308-MEDIA Module Layout (Top View) ............................................... B - 8

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Preface CP308

B-4 CP308-MEDIA Module Layout (Bottom View) ......................................... B - 8

B-5 DisplayPort Connectors J2 and J4 .......................................................... B - 9

B-6 Triple Audio Jack J8 .............................................................................. B - 12

B-7 S/P-DIF-Out Connector J6 .................................................................... B - 13

B-8 CD-In Connector J9 ............................................................................... B - 13

B-9 Internal Line-Out Mono Connector J10 ................................................. B - 13

B-10 Serial Port Connector J1 (COM1) ......................................................... B - 14

B-11 PCI Express Mini Card Connector J5 .................................................... B - 15

B-12 SD/SDHC Card Socket J3 .................................................................... B - 16

B-13 SATA Connector J7 ............................................................................... B - 17

B-14 CompactFlash Connector J13 ............................................................... B - 18

C-1 CP-RIO3-04 Front Panels, 4HP and 8HP Versions ................................ C - 5

C-2 CP-RIO3-04 Rear I/O Module Layout, 4HP Version ............................... C - 6

C-3 CP-RIO3-04 Rear I/O Module Layout, 8HP Version .............................. C - 6

C-4 USB Connectors J11/J12 ........................................................................ C - 7

C-5 D-Sub VGA Connector J7 ....................................................................... C - 8

C-6 Dual Gigabit Ethernet Con. J10A/B ......................................................... C - 9

C-7 COM Connectors J2a (COM1) and J3a (COM2) .................................. C - 10

C-8 Serial Port Connectors J2 (COM1) and J3 (COM2) .............................. C - 10

C-9 Peripheral Con. J13 ............................................................................... C - 11

C-10 SATA Con. J5 and J6 ............................................................................ C - 12

C-11 Rear I/O CompactPCI Connector rJ2 .................................................... C - 13

P R E L I M I N A R Y

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Proprietary Note

This document contains information proprietary to Kontron. It may not be copied or transmitted
by any means, disclosed to others, or stored in any retrieval system or media without the prior
written consent of Kontron or one of its authorized agents.

The information contained in this document is, to the best of our knowledge, entirely correct.
However, Kontron cannot accept liability for any inaccuracies or the consequences thereof, or
for any liability arising from the use or application of any circuit, product, or example shown in
this document.

Kontron reserves the right to change, modify, or improve this document or the product
described herein, as seen fit by Kontron without further notice.

Trademarks

This document may include names, company logos and trademarks, which are registered
trademarks and, therefore, proprietary to their respective owners.

Environmental Protection Statement

This product has been manufactured to satisfy environmental protection requirements where
possible. Many of the components used (structural parts, printed circuit boards, connectors,
batteries, etc.) are capable of being recycled.

Final disposition of this product after its service life must be accomplished in accordance with
applicable country, state, or local laws or regulations.

P R E L I M I N A R Y

ID 1027-4487, Rev. 3.0 Page xvii

Preface CP308

Explanation of Symbols

Caution, Electric Shock!

This symbol and title warn of hazards due to electrical shocks (> 60V)
when touching products or parts of them. Failure to observe the pre­cautions indicated and/or prescribed by the law may endanger your
life/health and/or result in damage to your material.

Please refer also to the section “High Voltage Safety Instructions” on
the following page.

Warning, ESD Sensitive Device!

This symbol and title inform that electronic boards and their compo­nents are sensitive to static electricity. Therefore, care must be taken
during all handling operations and inspections of this product, in
order to ensure product integrity at all times.

Please read also the section “Special Handling and Unpacking
Instructions” on the following page.

Warning!

This symbol and title emphasize points which, if not fully understood
and taken into consideration by the reader, may endanger your health
and/or result in damage to your material.

Note ...

This symbol and title emphasize aspects the reader should read
through carefully for his or her own advantage.

P R E L I M I N A R Y

Page xviii ID 1027-4487, Rev. 3.0

CP308 Preface

For Your Safety

Your new Kontron product was developed and tested carefully to provide all features
necessary to ensure its compliance with electrical safety requirements. It was also designed
for a long fault-free life. However, the life expectancy of your product can be drastically reduced
by improper treatment during unpacking and installation. Therefore, in the interest of your own
safety and of the correct operation of your new Kontron product, you are requested to conform
with the following guidelines.

High Voltage Safety Instructions

Warning!

All operations on this device must be carried out by sufficiently skilled
personnel only.

Caution, Electric Shock!

Before installing a not hot-swappable Kontron product into a system
always ensure that your mains power is switched off. This applies
also to the installation of piggybacks.

Serious electrical shock hazards can exist during all installation,
repair and maintenance operations with this product. Therefore,
always unplug the power cable and any other cables which provide
external voltages before performing work.

Special Handling and Unpacking Instructions

ESD Sensitive Device!

Electronic boards and their components are sensitive to static elec­tricity. Therefore, care must be taken during all handling operations
and inspections of this product, in order to ensure product integrity at
all times.

Do not handle this product out of its protective enclosure while it is not used for operational
purposes unless it is otherwise protected.

P R E L I M I N A R Y

Whenever possible, unpack or pack this product only at EOS/ESD safe work stations. Where
a safe work station is not guaranteed, it is important for the user to be electrically discharged
before touching the product with his/her hands or tools. This is most easily done by touching a
metal part of your system housing.

It is particularly important to observe standard anti-static precautions when changing piggy­backs, ROM devices, jumper settings etc. If the product contains batteries for RTC or memory
backup, ensure that the board is not placed on conductive surfaces, including anti-static plas­tics or sponges. They can cause short circuits and damage the batteries or conductive circuits
on the board.

ID 1027-4487, Rev. 3.0 Page xix

Preface CP308

General Instructions on Usage

In order to maintain Kontron’s product warranty, this product must not be altered or modified in
any way. Changes or modifications to the device, which are not explicitly approved by Kontron
and described in this manual or received from Kontron’s Technical Support as a special
handling instruction, will void your warranty.

This device should only be installed in or connected to systems that fulfill all necessary
technical and specific environmental requirements. This applies also to the operational
temperature range of the specific board version, which must not be exceeded. If batteries are
present, their temperature restrictions must be taken into account.

In performing all necessary installation and application operations, please follow only the
instructions supplied by the present manual.

Keep all the original packaging material for future storage or warranty shipments. If it is
necessary to store or ship the board, please re-pack it as nearly as possible in the manner in
which it was delivered.

Special care is necessary when handling or unpacking the product. Please consult the special
handling and unpacking instruction on the previous page of this manual.

P R E L I M I N A R Y

Page xx ID 1027-4487, Rev. 3.0

CP308 Preface

Two Year Warranty

Kontron grants the original purchaser of Kontron’s products a TWO YEAR LIMITED HARDWARE

WARRANTY

implied by anyone on behalf of Kontron are valid unless the consumer has the express written
consent of Kontron.

Kontron warrants their own products, excluding software, to be free from manufacturing and
material defects for a period of 24 consecutive months from the date of purchase. This warranty
is not transferable nor extendible to cover any other users or long-term storage of the product.
It does not cover products which have been modified, altered or repaired by any other party
than Kontron or their authorized agents. Furthermore, any product which has been, or is sus­pected of being damaged as a result of negligence, improper use, incorrect handling, servicing
or maintenance, or which has been damaged as a result of excessive current/voltage or tem­perature, or which has had its serial number(s), any other markings or parts thereof altered, de­faced or removed will also be excluded from this warranty.

If the customer’s eligibility for warranty has not been voided, in the event of any claim, he may
return the product at the earliest possible convenience to the original place of purchase, togeth­er with a copy of the original document of purchase, a full description of the application the
product is used on and a description of the defect. Pack the product in such a way as to ensure
safe transportation (see our safety instructions).

as described in the following. However, no other warranties that may be granted or

Kontron provides for repair or replacement of any part, assembly or sub-assembly at their own
discretion, or to refund the original cost of purchase, if appropriate. In the event of repair, re­funding or replacement of any part, the ownership of the removed or replaced parts reverts to
Kontron, and the remaining part of the original guarantee, or any new guarantee to cover the
repaired or replaced items, will be transferred to cover the new or repaired items. Any exten­sions to the original guarantee are considered gestures of goodwill, and will be defined in the
“Repair Report” issued by Kontron with the repaired or replaced item.

Kontron will not accept liability for any further claims resulting directly or indirectly from any
warranty claim, other than the above specified repair, replacement or refunding. In particular,
all claims for damage to any system or process in which the product was employed, or any loss
incurred as a result of the product not functioning at any given time, are excluded. The extent
of Kontron liability to the customer shall not exceed the original purchase price of the item for
which the claim exists.

Kontron issues no warranty or representation, either explicit or implicit, with respect to its
products’ reliability, fitness, quality, marketability or ability to fulfil any particular application or
purpose. As a result, the products are sold “as is,” and the responsibility to ensure their
suitability for any given task remains that of the purchaser. In no event will Kontron be liable for
direct, indirect or consequential damages resulting from the use of our hardware or software
products, or documentation, even if Kontron were advised of the possibility of such claims prior
to the purchase of the product or during any period since the date of its purchase.

Please remember that no Kontron employee, dealer or agent is authorized to make any
modification or addition to the above specified terms, either verbally or in any other form, written
or electronically transmitted, without the company’s consent.

P R E L I M I N A R Y

ID 1027-4487, Rev. 3.0 Page xxi

Preface CP308

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Page xxii ID 1027-4487, Rev. 3.0

CP308 Introduction

Chapter 1

1

Introduction

ID 1027-4487, Rev. 3.0 Page 1 - 1

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Introduction CP308

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P R E L I M I N A R Y

Page 1 - 2 ID 1027-4487, Rev. 3.0

CP308 Introduction

1. Introduction

1.1 Board Overview

1.1.1 Board Introduction

The CP308 is a highly integrated 3U, 4HP CompactPCI system controller board optionally
expandable to 8HP and available either as a front I/O version or as a rear I/O version. It has
been designed to support the small form factor (SFF) Intel® Core™2 Duo mobile processor
and the high-performance, small form factor Mobile Intel® GS45 Express Chipset with the
Intel® 82801IUX I/O Controller Hub (ICH9M-SFF). The CP308 uses Aptio®, AMI’s next
generation BIOS firmware based on the Unified Extensible Firmware Interface (uEFI)
specification and the Intel® Platform Innovation Framework for EFI.

The board supports the Intel® Core™2 Duo processors ranging from 1.2 GHz to 2.26 GHz
processor speed built on 45-nm process technology and in a 956-ball Micro-FCBGA package
providing 64 kB L1 and up to 6 MB L2 cache as well as up to 1066 MHz front side bus (FSB)
speed.

The CP308 utilizes the Intel® GS45 Graphics Memory Controller Hub (GS45 GMCH) and the
ICH9M-SFF I/O Controller Hub.

Two SO-DIMM sockets are available on the CP308 to provide up to 8 GB dual-channel, third­generation Double Data Rate (DDR3) memory without Error Checking and Correcting running
at 800/1066 MHz.

The CP308 comes with two Gigabit Ethernet ports with Wake-on-LAN support (available on front
I/O and switchable to rear I/O), one high-resolution VGA interface (CRT), two COM ports, one
High-Definition Audio (HDA) interface, one PS/2 interface as well as onboard connectors such
as one high-speed graphics extension connector (PCIe x16) and one high-speed I/O extension
connector for flexible 8HP expandability. In addition, four SATA interfaces, two for the onboard
SATA connectors and two for the high-speed I/O extension connector or rear I/O are provided.
Further interfaces include up to eight USB 2.0 ports, two on front I/O, two on rear I/O, three for
the onboard high-speed I/O extension connector and one on the onboard USB 2.0 connector.
The CP308 provides support for one USB 2.0 NAND Flash module, two 8HP I/O expansion mod­ules, and one rear I/O module.

The board supports one 32-bit/33 MHz CompactPCI interface. When installed in the system
slot, the interface is enabled, and when installed in a peripheral slot, the CP308 is isolated from
the CompactPCI bus.

The CP308 provides safety and security via an Integrated Trusted Platform Module (iTPM) 1.2
included in the chipset. System management control is provided through a dedicated onboard
System Management Controller (SMC).

P R E L I M I N A R Y

Designed for stability and packaged in a rugged format, the board fits into all applications
situated in industrial environments, including I/O intensive applications where only one slot is
available for the CPU, making it a perfect core technology for long-life applications.
Components which have high temperature tolerance have been selected from embedded
technology programs, and therefore offer long-term availability.

There are various operating systems available for the CP308. For detailed information, please
contact Kontron.

ID 1027-4487, Rev. 3.0 Page 1 - 3

Introduction CP308

1.1.2 Board-Specific Information

The CP308 is a CompactPCI single-board computer based on the Intel® Core™2 Duo
processor built on 45-nm process technology and specifically designed for use in highly
integrated platforms with solid mechanical interfacing for a wide range of industrial environment
applications.

Some of the CP308's outstanding features are:

• Support for the following small form factor processors:

• Intel® Core™2 Duo processor SU9300 (ULV), 1.2 GHz, 800 MHz FSB, 3 MB L2 cache

• Intel® Core™2 Duo processor SL9400 (LV), 1.86 GHz, 1066 MHz FSB, 6 MB L2 cache

• Intel® Core™2 Duo processor SP9300 (SV), 2.26 GHz, 1066 MHz FSB, 6 MB L2 cache

• 956-ball Micro-FCBGA package

• 64 kB L1 and up to 6 MB L2 cache on-die, running at CPU speed

• Mobile Intel® GS45 Express Chipset with 82801IUX (ICH9M-SFF)

• Up to 8 GB DDR3 SDRAM memory without ECC running at 800/1066 MHz

• Integrated 3D high performance VGA controller

• Analog display support for up to QXGA (2048 x 1536 pixels) resolution

• Two Gigabit Ethernet interfaces with Wake-on-LAN support (Intel® 82574L), switchable
to rear I/O

• Four Serial ATA (SATA) interfaces:

• Two SATA interfaces for the standard SATA onboard connectors for installing Serial

ATA 2.5” Hard Disk Drives (HDD) or Solid State Drives (SSD)

• Two SATA interfaces switchable either to the high-speed I/O extension connector or

to rear I/O

• Eight USB ports:

• Two USB 2.0 on front I/O

• Two USB 2.0 on rear I/O

• Three USB 2.0 interfaces for the onboard high-speed I/O extension connector

• One onboard USB 2.0 port for the USB 2.0 NAND Flash module

• One USB 2.0 NAND Flash module either on the 4HP or on the 8HP version

• One PS/2 interface available on the high-speed I/O extension connector

• Compatible with CompactPCI Specification PICMG 2.0 Rev. 3.0 and usable in the system
controller slot as well as in a peripheral slot (the PCI interface is isolated in peripheral slot)

• TCG 1.2-compliant Integrated Trusted Platform Module (iTPM)

P R E L I M I N A R Y

• Two SPI Flash chips for redundant uEFI BIOS

• System Management Controller (SMC) for system control and hardware monitoring

• Watchdog timer

• Real-time clock

• Two COM ports:

• One COM port either on the front panel or on the rear I/O

• One COM port on the rear I/O

• Peripheral extension connectors:

• High-speed I/O extension connector

• High-speed graphics extension connector

• SPI extension connector

• 4HP or 8HP, 3U CompactPCI

• Several rear I/O configurations

• Power-up sequencing and in-rush current optimized design

• Passive heat sink solution for forced airflow cooling

• AMI Aptio®, a uEFI-compliant platform firmware (AMIBIOS8 successor)

Page 1 - 4 ID 1027-4487, Rev. 3.0

CP308 Introduction

1.2 System Expansion Capabilities

1.2.1 CP308-HDD Module

The CP308-HDD module for the 8HP CP308 version provides legacy PC I/O ports. It includes
one digital DVI port, two USB 2.0 ports, one COM port, a PS/2 keyboard and mouse port, one
USB 2.0 NAND Flash connector, and one CompactFlash card socket. A SATA hard disk
interface is also available for installing a Serial ATA 2.5” HDD or SSD.

For further information concerning the CP308-HDD module, refer to Appendix A.

1.2.2 CP308-MEDIA Module

The CP308-MEDIA module for the 8HP CP308 version provides multimedia I/O ports. It
includes two DisplayPorts, one S/P-DIF-Out port, one triple audio jack (Mic-In, Line-In and
Line-Out), one CD-In port, one internal line-out mono port, one COM port, one PCI Express
Mini Card connector, one SD/SDHC card socket, and one CompactFlash card socket. A SATA
hard disk interface is also available for installing a Serial ATA 2.5” HDD or SSD.

For further information concerning the CP308-MEDIA module, refer to Appendix B.

1.2.3 CP-RIO3-04 Rear I/O Module

The CP-RIO3-04 rear I/O module has been designed for use with the CP308 board from
Kontron and provides comprehensive rear I/O functionality.

For further information concerning the CP-RIO3-04 rear I/O module, refer to Appendix C.

1.2.4 USB 2.0 NAND Flash Module

The CP308 provides support for one optional USB 2.0 NAND Flash module. For further infor­mation, refer to chapter 2.2.6, "USB 2.0 NAND Flash Module".

1.3 Board Diagrams

The following diagrams provide additional information concerning board functionality and
component layout.

P R E L I M I N A R Y

ID 1027-4487, Rev. 3.0 Page 1 - 5

Introduction CP308

1.3.1 Functional Block Diagram

Figure 1-1: CP308 Functional Block Diagram

P R E L I M I N A R Y

Page 1 - 6 ID 1027-4487, Rev. 3.0

CP308 Introduction

CP308

USB 2.0

LEGEND:

Watchdog and Overtemperature Status LEDs:

WD (green): Watchdog Status

TH (green): Overtemperature Status

System Management Controller LED:

SMC LED (red/green/red+green): System Management Controller

Status

General Purpose LEDs:

LED 0..3 (red/green/red+green): General Purpose/ POST Code

Integral Ethernet LEDs:

ACT (green): Ethernet Link/Activity

SPEED (green/orange): Ethernet Speed

SPEED ON (orange): 1000 Mbit

SPEED ON (green): 100 Mbit

SPEED OFF: 10 Mbit

Note ...

If the General Purpose LEDs LED 0..3 are lit red
during boot-up, a failure is indicated before the
uEFI BIOS has started.

For further information, please contact Kontron.

1.3.2 Front Panel

Figure 1-2: 4 HP CP308 Front Panel

Note ...

P R E L I M I N A R Y

For information regarding the front panel of an 8HP CP308, refer to Appendix A,
CP308-HDD Module and Appendix B, CP308-MEDIA Module.

ID 1027-4487, Rev. 3.0 Page 1 - 7

Introduction CP308

1
2
3
4

J7

J8

J9

Intel®

Core™2 Duo

Intel®

GS45

ICH9M-

SFF

J2

J1

DDR3 SODIMM Socket

Channel B

DDR3 SODIMM Socket

Channel A

ON

J3

VGA

SW1

J4

USB

J5

USB

J6 A

GbE A

J6 B

GbE B

WD/TH LEDs

J14

J15

J12

USB

NAND

Flash

Module

Memory Modules

1

1

J16

JP1 JP2

JP3

SMC LED

LED 0

LED 1

LED 2

LED 3

1.3.3 Board Layout

Figure 1-3: 4HP CP308 Board Layout (Top View)

Figure 1-4: 4HP CP308 Board Layout (Bottom View)

P R E L I M I N A R Y

Page 1 - 8 ID 1027-4487, Rev. 3.0

CP308 Introduction

1.4 Technical Specification

Table 1-1: 4HP CP308 Main Specifications

CP308 SPECIFICATIONS

CPU The CP308 supports the following 45-nm microprocessors:

• Intel® Core™2 Duo processor SU9300 (ULV), 1.2 GHz, 800 MHz FSB,

3 MB L2 cache

• Intel® Core™2 Duo processor SL9400 (LV), 1.86 GHz, 1066 MHz FSB,

6 MB L2 cache

• Intel® Core™2 Duo processor SP9300 (SV), 2.26 GHz, 1066 MHz FSB,

6 MB L2 cache

All microprocessors are provided in a 956-ball Micro-FCBGA package.

Memory Main Memory:

• Up to 8 GB Dual-Channel DDR3 SDRAM memory on two SODIMM sockets

• 800/1066 MHz memory bus

• Error Checking and Correction (ECC) not provided

Processor and Memory

Cache structure:

• 64 kB L1 on-die full-speed processor cache

• 32 kB for instruction cache

• 32 kB for data cache

• Up to 6 MB L2 on-die full speed processor cache

FLASH Memory:

• Two SPI Flash chips for redundant uEFI BIOS

• USB 2.0 NAND Flash memory optionally available

Serial EEPROM:

• 24LC64 (64 kbit)

P R E L I M I N A R Y

ID 1027-4487, Rev. 3.0 Page 1 - 9

Introduction CP308

Table 1-1: 4HP CP308 Main Specifications (Continued)

CP308 SPECIFICATIONS

Intel® GS45 GMCH Intel® GS45 Graphics Memory Controller Hub (GS45 GMCH):

• Support for a single Core™2 Duo microprocessor

• 64-bit AGTL/AGTL+ based System Bus interface up to 1066 MHz

• System Memory interface with optimized support for dual-channel

DDR3 SDRAM memory at 800/1066 MHz without ECC

• DMI interface to ICH9M-SFF

• Integrated 2D and 3D Graphics Engines or PCIe x16 port

• HDA interface support

• C-LINK interface to ICH9M-SFF

• TCG 1.2-compliant Integrated Trusted Platform Module (iTPM)

Intel® ICH9M-SFF 82801IUX I/O Controller Hub (ICH9M-SFF):

• PCI Rev. 2.3 compliant with support for 32-bit/33 MHz PCI opera-

tions

• Power management logic support

• Enhanced DMA controller, interrupt controller, and timer functions

Chipset

•

USB 2.0 host interface with up to eight USB ports available on the
CP308

• SATA Host Controller with four ports, 3 Gbit/s transfer rate and RAID

0/1 support

•

Six x1 PCI Express ports:

• Two are used for Gigabit Ethernet

• Four are used for 8HP I/O expansion (configurable either to

4 x1 PCIe or 1 x4 PCIe)

•

System Management Bus (SMBus) compatible with most I²C™ devices

• Low Pin Count (LPC) interface

• SPI Flash interface support

• HDA interface support

• DMI interface to GS45 GMCH

• C-LINK interface to GS45 GMCH

• RTC controller

P R E L I M I N A R Y

Page 1 - 10 ID 1027-4487, Rev. 3.0

CP308 Introduction

Table 1-1: 4HP CP308 Main Specifications (Continued)

CP308 SPECIFICATIONS

CompactPCI Compliant with CompactPCI Specification PICMG® 2.0 R 3.0:

• System master operation

• 32-bit /33 MHz master interface

• 3.3 V or 5 V (universal PCI interface)

The CP308 is not equipped either with a handle microswitch or with a blue
LED and has no PCI signal precharge. When installed in a peripheral slot, the
CP308 is isolated from the CompactPCI bus. It receives power from the back­plane and supports rear I/O.

CP308 removal under power:

When installed in a peripheral slot, the CP308 supports hot plugging on
the power interface through a dedicated power controller, but not on the
PCI interface.

Hot swapping of peripheral boards controlled by the CP308:

When installed in the system controller slot, the CP308 supports the hot swap­ping of other boards. Individual clocks for each slot and Enum signal handling
are in compliance with the PICMG 2.1 Hot Swap Specification.

The CP308 itself, however, is not hot swappable. When installed in the system
controller slot, the system must be powered down in order to replace the
board.

Rear I/O The following interfaces are routed to the rear I/O connector J2:

Interfaces

• COM1 and COM2 (3.3V TTL signaling)

• 2 x USB 2.0

• VGA (analog)

• 2x Gigabit Ethernet

• 2x SATA

• System management signals

• General purpose signals

VGA Built-in Intel 3D Graphics accelerator for enhanced graphics performance:

• Supports resolutions up to QXGA (2048 x 1536 pixels)

• CRT hot plug support

• Dynamic Video Memory Technology (DVMT5.0)

Gigabit Ethernet Two 10 Base-T/100 Base-TX/1000 Base-T Gigabit Ethernet interfaces

based on the Intel® 82574L Ethernet PCI Express bus controller individu­ally switchable to front I/O or rear I/O:

• Dual RJ-45 connector on the front panel

• Automatic mode recognition (Auto-Negotiation)

• Automatic cabling configuration recognition (Auto-MDI/X)

• Wake-on-LAN support

Cabling requirement: Category 5, UTP, four-pair cabling

P R E L I M I N A R Y

ID 1027-4487, Rev. 3.0 Page 1 - 11

Introduction CP308

Table 1-1: 4HP CP308 Main Specifications (Continued)

CP308 SPECIFICATIONS

USB Eight USB ports supporting UHCI (USB 1.1) and EHCI (USB 2.0):

• Two USB 2.0 ports on the front I/O

• Two USB 2.0 ports on the rear I/O interface

• Three USB 2.0 interfaces for the onboard high-speed I/O extension con-

nector

• One onboard USB 2.0 port for the USB 2.0 NAND Flash module

Serial Two 16C550-compatible UARTs:

• COM1 available on the I/O expansion module or on rear I/O

• COM2 available on rear I/O only

Keyboard and Mouse USB keyboard and mouse support

I/O Expansion
Interfaces

Interfaces

Mass Storage Onboard USB 2.0 NAND Flash:

P R E L I M I N A R Y

I/O expansion to 8HP board version:

• 2x SATA

• Graphics ports either:

• PCIe x16 or

• SDVO (Serial Digital Video Output), HDMI (High-Definition Multime-

dia Interface), and DP (DisplayPort)

• 3x USB2.0

• 4 x1 PCIe or 1 x4 PCIe

• HDA

• PS/2

• SPI

• COM

• Monitor and control signals

• Onboard USB 2.0 NAND Flash module supported on J14

SATA: Integrated Serial ATA Host Controllers

• Provide independent DMA operation on four ports:

• Two onboard SATA interfaces

• Two SATA interfaces switchable to rear I/O or to the 8HP expansion

module

• Data transfer rates up to 3 Gbit/s

• High-performance RAID 0/1 functionality on all SATA ports

Front Panel Connectors • VGA: 15-pin D-Sub connector

• USB: two 4-pin, type A connectors

• Ethernet: dual RJ-45 connector

Onboard Connectors

Sockets

Page 1 - 12 ID 1027-4487, Rev. 3.0

• Two 7-pin, L-form standard SATA II connectors

• One USB 2.0 NAND Flash connector

• High-speed graphics extension connector

• High-speed I/O extension connector

• SPI extension connector

• Two 204-pin DDR3 SODIMM sockets

• CompactPCI Connectors J1 and J2

CP308 Introduction

Table 1-1: 4HP CP308 Main Specifications (Continued)

CP308 SPECIFICATIONS

LEDs Watchdog and Overtemperature Status LEDs:

• WD (green) Watchdog Status

• TH (green) Overtemperature Status

System Management Controller LED:

• SMC LED (red/green/red+green): System Management Controller Status

General Purpose LEDs:

• LED 0..3 (red/green/red+green): General Purpose / POST Code

Integral Ethernet LEDs:

• ACT (green) Network /Link Activity

• SPEED (green/orange) Network Speed

Watchdog Software-configurable Watchdog generates an IRQ or a hardware reset.

Thermal Management CPU overtemperature protection is provided by:

HW Monitoring

• Internal processor temperature control unit

• CPU shut down via hardware monitor

• Standard heat sink

System Management
Controller

System Management Control with the NXP LPC2136 32-bit microcontroller for
monitor and control of:

• Several system power voltages

• One fan speed input

• One fan PWM output

• Processor, memory, and board temperature

• Further CompactPCI boards installed in the system via the IPMB bus on

the J1 CompactPCI Connector

uEFI BIOS

AMI Aptio®, AMI’s next-generation BIOS firmware based on the uEFI Speci­fication and the Intel Platform Innovation Framework for EFI.

• LAN boot capability for diskless systems (standard PXE)

• Redundant image; automatic fail-safe recovery in case of a damaged

image

• Non-volatile storage of setting in the SPI Flash (battery only required

for the RTC)

• Compatibility Support Module (CSM) providing legacy BIOS compati-

Software

bility based on AMIBIOS8

• Command shell for diagnostics and configuration

• EFI shell commands executable from mass storage device in a Pre-OS

environment (open interface)

• SMC support in the command shell

P R E L I M I N A R Y

Operating Systems There are various operating systems available for the CP308. For detailed

information, please contact Kontron.

ID 1027-4487, Rev. 3.0 Page 1 - 13

Introduction CP308

Note ...

When a battery is installed, refer to the operational specifications
of the battery as this determines the storage temperature of the
CP308 (See "Battery" below).

Note ...

When additional components are installed, refer to their opera­tional specifications as this will influence the operational and stor­age temperature of the CP308.

Table 1-1: 4HP CP308 Main Specifications (Continued)

CP308 SPECIFICATIONS

Mechanical 3U, 4HP, CompactPCI-compliant form factor

Power Consumption See Chapter 5 for details.

Temperature Range Operational: 0°C to +60°C Standard (depending on processor version

and airflow in the system)

Storage: -55°C to +85°C Without hard disk and without battery

General

Battery 3.0V lithium battery for RTC with battery socket.

Recommended type: CR2025

Temperature ranges:

Operational (load): -20°C to +70°C typical (refer to the battery manufac-

Storage (no load): -55°C to +70°C typical (no discharge)

Climatic Humidity 93% RH at 40°C, non-condensing (acc. to IEC 60068-2-78)

Dimensions 100 mm x 160 mm

Board Weight 460 grams (4 HP CP308 with copper heat sink, front panel, two 2 GB SODIMM

memory modules, and battery but without USB NAND Flash module)

330 grams (4 HP CP308 with aluminum heat sink, front panel, two 2 GB

P R E L I M I N A R Y

SODIMM memory modules, and battery but without USB NAND Flash module)

Note ...

For a description of the additional 8HP version interfaces, refer to Appendix A,
CP308-HDD Module and Appendix B, CP308-MEDIA Module.

1.5 Kontron Software Support

turer’s specifications for exact range)

Kontron is one of the few CompactPCI and VME vendors providing inhouse support for most
of the industry-proven real-time operating systems that are currently available. Due to its close
relationship with the software manufacturers, Kontron is able to produce and support BSPs and
drivers for the latest operating system revisions thereby taking advantage of the changes in
technology.

Page 1 - 14 ID 1027-4487, Rev. 3.0

CP308 Introduction

1.6 Standards

This product complies with the requirements of the following standards:

Table 1-2: Standards

TYPE ASPECT STANDARD

CE Emission EN55022

EN61000-6-3

Immission EN55024

EN61000-6-2

Electrical Safety EN60950-1

Mechanical Mechanical Dimensions IEEE 1101.10

Environmental Climatic Humidity IEC60068-2-78

(see note below)

WEEE Directive 2002/96/EC

Waste electrical and electronic equipment

RoHS Directive 2002/95/EC

Restriction of the use of certain hazardous sub­stances in electrical and electronic equipment

Note ...

Kontron performs comprehensive environmental testing of its products in accor­dance with applicable standards.

Customers desiring to perform further environmental testing of Kontron prod­ucts must contact Kontron for assistance prior to performing any such testing.
This is necessary, as it is possible that environmental testing can be destructive
when not performed in accordance with the applicable specifications.

In particular, for example, boards without conformal coating must not be
exposed to a change of temperature exceeding 1K/ minute, averaged over a
period of not more than five minutes. Otherwise, condensation may cause irre­versible damage, especially when the board is powered up again.

Kontron does not accept any responsibility for damage to products resulting
from destructive environmental testing.

P R E L I M I N A R Y

ID 1027-4487, Rev. 3.0 Page 1 - 15

Introduction CP308

In addition, boards ordered with the ruggedized service comply with the following standards as
well.

Table 1-3: Additional Standards for Boards Ordered with Ruggedized Service

TYPE ASPECT STANDARD REMARKS

Environmental Vibration

(Sinusoidal)

Single Shock IEC60068-2-27 Ruggedized version test parameters:

Permanent Shock IEC60068-2-29 Ruggedized version test parameters:

IEC60068-2-6 Ruggedized version test parameters:

• 10-300 (Hz) frequency range

• 2 (g) acceleration

• 1 (oct/min) sweep rate

• 10 cycles/axis

•3 axis

• 30 (g) acceleration

• 9 (ms) shock duration half sine

• 3 number of shocks per direction (total: 18)

• 6 directions

• 5 (s) recovery time

• 15 (g) acceleration

• 11 (ms) shock duration half sine

• 500 number of shocks per direction

• 6 directions

• 51 (s) recovery time

1.7 Related Publications

The following publications contain information relating to this product.

Table 1-4: Related Publications

PRODUCT PUBLICATION

CompactPCI Systems and
Boards

P R E L I M I N A R Y

Serial ATA Serial ATA 1.0a Specification

Platform Firmware Unified Extensible Firmware Interface (uEFI) specification, version 2.1

All Kontron products Product Safety and Implementation Guide, ID 1021-9142

CompactPCI Specification PICMG 2.0, Rev. 3.0
CompactPCI System Management Specification PICMG 2.9 Rev. 1.0
CompactPCI Hot Swap Specification PICMG 2.1 Rev. 2.0

Kontron’s CompactPCI System Manual, ID 19954

Page 1 - 16 ID 1027-4487, Rev. 3.0

CP308 Functional Description

Chapter 1

2

Functional Description

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P R E L I M I N A R Y

Functional Description CP308

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P R E L I M I N A R Y

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CP308 Functional Description

2. Functional Description

2.1 CPU, Memory and Chipset

2.1.1 CPU

The CP308 supports the Intel® Core™2 Duo processors with 1.2 GHz (SU9300), 1.86 GHz
(SL9400) and 2.26 GHz (SP9300) built on 45-nm process technology delivering optimized
power-efficient computing and outstanding dual-core performance with low power
consumption.

The following list sets out some of the key features of these processors:

• Two mobile execution cores in one single processor

• Support of Intel® 64 Architecture

• Up to 1066 MHz, Source-Synchronous Front Side Bus (FSB)

• 64 kB L1 cache (32 kB instruction cache and 32 kB write-back data cache)

• Up to 6 MB L2 cache

• SSE4 instruction set

• Intel® Dynamic Acceleration Technology (Turbo Mode)

• Enhanced Intel® Virtualization Technology (VT-d1)

• Advanced Power Management features including Enhanced Intel® SpeedStep® tech­nology

• Enhanced Multi-Threaded Thermal Management (EMTTM)

The following tables indicate the Intel® Core™2 Duo processors supported on the CP308, their
maximum power dissipation and their frequency in the various SpeedStep® modes.

Table 2-1: Processors Supported on the CP308

SPEED

PACKAGE

L2 CACHE

FSB

1)

ULV: Ultra Low Voltage

2)

LV: Low Voltage

3)

SV: Standard Voltage

Core™2 Duo

1.2 GHz (ULV
3 MB L2 Cache

956-ball Micro-FCBGA 956-ball Micro-FCBGA 956-ball Micro-FCBGA

3 MB 6 MB 6 MB

800 MHz 1066 MHz 1066 MHz

1)

)

Core™2 Duo

1.86 GHz (LV

6 MB L2 Cache

2)

Core™2 Duo

)

2.26 GHz (SV
6 MB L2 Cache

3)

)

P R E L I M I N A R Y

ID 1027-4487, Rev. 3.0 Page 2 - 3

Functional Description CP308

Table 2-2: Maximum Power Dissipation of the Processors (CPU only)

FREQUENCY MODE

Maximum Power

4)

HFM

Maximum Power

5)

LFM

Maximum Power

Super LFM

4)

HFM High Frequency Mode

5)

LFM Low Frequency Mode

Core™2 Duo

1.2 GHz (ULV)

3 MB L2 Cache

10 W

(1.2 GHz)

10 W

(1.2 GHz)

8 W

(600 MHz)

Core™2 Duo

1.86 GHz (LV)

6 MB L2 Cache

17 W

(1.86 GHz)

16.7 W

(1.6 GHz)

10 W

(800 MHz)

Table 2-3: CPU Frequency in the Various SpeedStep® Modes

Core™2 Duo

FREQUENCY

1.2 GHz (ULV)

3 MB L2 Cache

2.26 GHz -- -- x

1.86 GHz -- x --

Core™2 Duo

1.86 GHz (LV)

6 MB L2 Cache

Core™2 Duo

2.26 GHz (SV)

6 MB L2 Cache

25 W

(2.26 GHz)

20 W

(1.6 GHz)

11 W

(800 MHz)

Core™2 Duo

2.26 GHz (SV)

6 MB L2 Cache

1.6 GHz -- x x

1.33 GHz -- -- --

1.2 GHz x -- --

1.0 GHz -- -- --

800 MHz -- x x

600 MHz x -- --

P R E L I M I N A R Y

Page 2 - 4 ID 1027-4487, Rev. 3.0

CP308 Functional Description

2.1.2 Memory

The CP308 supports a dual-channel (64-bit) DDR3 memory without Error Checking and Cor­recting (ECC) running at 800/1066 MHz. It provides two 204-pin sockets for two standard
DDR3 SODIMM modules that support up to 8 GB system memory. The maximum memory size
per channel is 4 GB. The available memory module configuration can be either 1 GB, 2 GB,
4 GB or 8 GB. However, due to internal memory allocations, the amount of memory available
to applications is less than the total physical memory in the system. For example, the chipset’s
Dynamic Video Memory Technology (DVMT 5.0) dynamically allocates the proper amount of
system memory required by the operating system and the application.

Table 2-4: Supported/Recommended Memory Configurations

CHANNEL A

(SODIMM)

1 GB -- 1 GB 1 GB minus the allocated memory for DVMT and iTPM

1 GB 1 GB 2 GB 2 GB minus the allocated memory for DVMT and iTPM

2 GB -- 2 GB 2 GB minus the allocated memory for DVMT and iTPM

2 GB 2 GB 4 GB 4 GB minus the allocated memory for DVMT and iTPM

4 GB -- 4 GB 4 GB minus the allocated memory for DVMT and iTPM

4 GB 4 GB 8 GB 8 GB minus the allocated memory for DVMT and iTPM

Channel B

(SODIMM)

Note ...

Channel A must always be populated when operating the CP308.

Note ...

Only qualified DDR3 SODIMM modules from Kontron are authorized for use
with the CP308. Replacement of the SODIMM modules by the customer without
authorization from Kontron will void the warranty.

TOTAL

PHYSICAL

MEMORY

TOTAL MEMORY AVAILABLE

TO APPLICATIONS

P R E L I M I N A R Y

ID 1027-4487, Rev. 3.0 Page 2 - 5

Functional Description CP308

2.1.3 Mobile Intel® GS45 Express Chipset Overview

The Mobile Intel® GS45 Express Chipset consists of the following devices:

• Intel® GS45 Graphics Memory Controller Hub (Intel® GS45 GMCH)

• Intel® 82801IUX I/O Controller Hub (ICH9M-SFF)

The Mobile Intel® GS45 Express Chipset provides the processor interface for the Intel®
Core™2 Duo microprocessors, two DDR3 channels, and a high-performance graphics accel­erator. The ICH9M-SFF is a centralized controller for the boards’ I/O peripherals, such as the
PCI, PCI Express, USB 2.0, SATA II, SPI and LPC ports.

2.1.3.1 Intel® GS45 Graphics Memory Controller Hub

The Intel® GS45 GMCH is a highly integrated hub that provides the CPU interface (optimized
for the Intel® Core™2 Duo microprocessor), two DDR3 SDRAM system memory interfaces at
800 MHz or 1066 MHz, a x4 DMI interface as well as a C-Link interface to the ICH9M-SFF and
either two high-performance internal graphics engines or one PCI Express x16 port for an ex­ternal graphics chip. Additionally, the GS45 GMCH provides an Integrated Trusted Platform
Module (iTPM) for enhanced security.

2.1.3.2 I/O Controller Hub ICH9M-SFF

The ICH9M-SFF is a highly integrated multifunctional I/O Controller Hub that provides the in­terface to the PCI bus and integrates many of the functions needed in today's PC platforms, for
example, PCI Express, SATA controller, USB host controller supporting USB 2.0, LPC inter­face, and an SPI Flash BIOS interface controller. The ICH9M-SFF communicates with the host
controller over a dedicated DMI interface and a dedicated C-Link interface.

The I/O Controller Hub feature set comprises:

• PCI 2.3 interface with eight PCI IRQ inputs

• Eight USB controllers with up to twelve USB 1.1 or USB 2.0 ports (up to eight ports are
used on the CP308)

• Controller link interface to the GS45 GMCH

• DMI interface to the GS45 GMCH

• Two SATA I/II host controllers with four SATA ports and RAID 0/1 support

• Six PCI Express ports, two for GbE and either 4 x1 PCIe or 1 x4 PCIe for I/O expansion

P R E L I M I N A R Y

• HDA controller

• SPI interface

• LPC interface

• RTC controller

Page 2 - 6 ID 1027-4487, Rev. 3.0

CP308 Functional Description

2.2 Peripherals

The following standard peripherals are available on the CP308 board:

2.2.1 Timer

The CP308 is equipped with the following timers:

• Real-Time Clock
The ICH9M-SFF contains an MC146818A-compatible real-time clock, which performs
timekeeping functions and includes 256 bytes of general purpose battery-backed CMOS
RAM. Features include an alarm function, programmable periodic interrupt and a 100­year calendar. All battery-backed CMOS RAM data remains stored in an additional EE­PROM. This prevents data loss in case the CP308 is operated without battery.

• Counter/Timer
In addition to the three 8254-style counters, the ICH9M-SFF includes four individual high­precision event timers (HPET) that may be used by the operating system. They are im­plemented as a single counter each with its own comparator and value register.

2.2.2 Watchdog Timer

A user-configurable Watchdog timer with four different modes of operation is available. For
further information, refer to Chapter 4.3.12, Watchdog Timer Control Register.

2.2.3 Battery

The CP308 is provided with a 3.0 V “coin cell” lithium battery for the RTC.

Note ...

If an 8HP expansion module is used on the CP308, either the CP308 or the
expansion module may be equipped with a battery.

Using one battery on the CP308 and one on the expansion module simulta­neously may result in premature discharge of the batteries.

To replace the battery, proceed as follows:

• Turn off power.

• Remove the battery.

• Place the new battery in the socket.

• Make sure that you insert the battery the right way round. The plus pole must be on the top!

The lithium battery must be replaced with an identical battery or a battery type recommended
by the manufacturer. A suitable battery type is CR2025.

Note ...

P R E L I M I N A R Y

The user must be aware that the battery’s operational temperature range is
less than the CP308’s storage temperature range.

For exact range information, refer to the battery manufacturer’s specifications.

ID 1027-4487, Rev. 3.0 Page 2 - 7

Functional Description CP308

Note ...

Care must be taken to ensure that the battery is correctly replaced.

The battery should be replaced only with an identical or equivalent type
recommended by the manufacturer.

Dispose of used batteries according to the manufacturer’s instructions.

The typical life expectancy of a 170 mAh battery (CR2025) is 5 - 6 years with
an average on-time of 8 hours per working day at an operating temperature of
30°C. However, this typical value varies considerably because the life
expectancy is dependent on the operating temperature and the standby time
(shutdown time) of the system in which it operates.

To ensure that the lifetime of the battery has not been exceeded, it is recom­mended to exchange the battery after 4 - 5 years.

2.2.4 Reset

The CP308 is automatically reset by a precision voltage monitoring circuit that detects a drop
in voltage below the acceptable operating limit of 4.7 V for the 5 V line and below 3.1 V for the

3.3 V line, or in the event of a power failure of the DC/DC converters. Other reset sources in­clude the Watchdog timer and the push-button switch on the 8HP front panel. The CP308 re­sponds to any of these sources by initializing local peripherals.

A reset will be generated if one the following events occurs:

• +5 V supply falls below 4.7 V typical; level-sensitive

• +3.3 V supply falls below 3.1 V typical; level-sensitive

• Power failure of at least one onboard DC/DC converter; level-sensitive

• Push-button "RESET" pressed (only on CP308-HDD); edge-sensitive

• Watchdog expired; edge-sensitive

• CompactPCI backplane PRST# input (CompactPCI connector J2, pin C17); edge-sensi­tive

• CompactPCI backplane RST# input (software configurable when the board is in periph­eral mode); edge-sensitive

• SMC controller generates a reset; configurable to level-sensitive or edge-sensitive (see
Chapter 4.4.1, SMC Controller Status Register 0)

P R E L I M I N A R Y

2.2.5 SPI Flash for uEFI BIOS

The CP308 provides two SPI Flash chips for redundant uEFI BIOS. The fail-over mechanism
for the uEFI BIOS recovery can be controlled via the SMC controller or the DIP switch SW1,
switch 1. If one SPI Flash is corrupted, the SMC can enable the second SPI Flash and boot the
system again.

The SPI Flash includes a hardware write protection option, which can be configured via the
uEFI BIOS. If write protection is enabled, the SPI Flash cannot be written to.

Page 2 - 8 ID 1027-4487, Rev. 3.0

CP308 Functional Description

2.2.6 USB 2.0 NAND Flash Module

The CP308 supports one optional USB 2.0 NAND Flash module qualified by Kontron. The USB

2.0 NAND Flash module is connected to the onboard connector J14. If an 8HP expansion mod­ule is used with the CP308, it is not possible to install a USB 2.0 NAND Flash module on the
4HP CP308. Refer to Appendix A, CP308-HDD Module, for connecting a USB 2.0 NAND Flash
module to the 8HP CP308.

The USB 2.0 NAND Flash module is a USB 2.0-based NAND Flash drive with a built-in full
hard-disk emulation and a high data transfer rate. It is optimized for embedded systems pro­viding high performance, reliability and security.

Note ...

Only qualified USB 2.0 NAND Flash modules from Kontron are authorized for
use with the CP308. Failure to comply with the above will void the warranty and
may result in damage to the board or the system.

2.2.7 8HP Expansion Modules

The CP308 supports the CP308-HDD and the CP308-MEDIA as optional 8HP expansion mod­ules via the 120-pin high-speed graphics extension connector J15, the 120-pin high-speed I/O
extension connector J12, and the 10-pin SPI connector J9.

For further information regarding the CP308-HDD module, refer to Appendix A. For further in­formation regarding the CP308-MEDIA module, refer to Appendix B.

2.2.8 Integrated Trusted Platform Module (iTPM)

The Integrated Trusted Platform Module (iTPM) included in the chipset consists of firmware,
Intel® Management Engine resources and dedicated hardware within the ICH9M-SFF and the
GS45 GMCH. The iTPM supports all requirements of the TPM Specification Version 1.2, Level
2, Revision 103, as published by the Trusted Computing Group.

P R E L I M I N A R Y

ID 1027-4487, Rev. 3.0 Page 2 - 9

Functional Description CP308

2.3 Board Interfaces

2.3.1 Front Panel LEDs

The CP308 is equipped with one Watchdog Status LED (WD LED), one Temperature Status
LED (TH LED), four General Purpose/POST code LEDs (LED 0..3), and one SMC LED. Their
functionality is described in the following chapters and reflected in the registers mentioned in
Chapter 4, Configuration.

2.3.1.1 Watchdog and Temperature Status LEDs

The CP308 provides one Watchdog Status LED (WD LED) and one Temperature Status LED
(TH LED).

Note ...

If the TH LED flashes at regular intervals, it indicates that the processor junction
temperature or the GS45 GMCH junction temperature has reached a level
beyond which permanent silicon damage may occur. Upon assertion of Ther­mtrip, the respective device will shut off its internal clocks (thus halting program
execution) in an attempt to reduce the junction temperature.

Once activated, Thermtrip remains latched until a cold restart of the CP308 is
undertaken (all power off and then on again).

Table 2-5: Watchdog Status LED and Temperature Status LED Function

LED COLOR

WD LED green The WD LED is not

TH LED green The TH LED is not lit

P R E L I M I N A R Y

FUNCTION

DURING BOOT-UP

lit during boot-up.

during boot-up.

FUNCTION AFTER BOOT-UP

Watchdog Status

The WD LED states are:

• Off: Watchdog inactive

• Green: Watchdog active, waiting to be triggered

Temperature Status

The TH LED states are:

• Off: If the CPU junction temperature is below 105°C

• Green: In case of overtemperature of the CPU (105°C

junction temperature)

• Green blinks: If a Thermtrip event occurred on the CPU or the

GS45 GMCH
In this event, all General Purpose LEDs
(LED3..LED0) are lit red.

Page 2 - 10 ID 1027-4487, Rev. 3.0

CP308 Functional Description

2.3.1.2 General Purpose LEDs

The CP308 provides four General Purpose LEDs (LED0..3) on the front panel. They are de­signed to indicate the boot-up POST code after which they are available to the application.

If the LED0..3 are lit red during boot-up, a failure is indicated before the uEFI BIOS has started.
In this case, check the power supply. If the power supply appears to be functional and the LEDs
are still red, please contact Kontron.

The POST code is indicated during the boot-up phase. After boot-up, the LEDs indicate Gen­eral Purpose or Port 80 signals, depending on the uEFI BIOS settings. The default setting after
boot-up is General Purpose.

Table 2-6: General Purpose LED Function

FUNCTION DURING

LED COLOR

FUNCTION

DURING BOOT-UP

uEFI BIOS POST

(if POST code config. is

enabled)

FUNCTION

AFTER BOOT-UP

LED3 red When lit up during boot-up, it indi-

cates a power failure.

green -- uEFI BIOS POST bit 3

red+green -- --

LED2 red When lit up during boot-up, it indi-

cates a hardware reset.

green -- uEFI BIOS POST bit 2

red+green -- --

LED1 red When lit up during boot-up, it indi-

cates a uEFI BIOS boot failure.

green -- uEFI BIOS POST bit 1

red+green -- --

LED0 red When lit up during boot-up, it indi-

cates a uEFI BIOS boot failure.

green -- uEFI BIOS POST bit 0

red+green -- --

--

and bit 7

--

and bit 6

--

and bit 5

--

and bit 4

General Purpose or Port 80

Default: General Purpose

General Purpose or Port 80

Default: General Purpose

General Purpose or Port 80

Default: General Purpose

P R E L I M I N A R Y

General Purpose or Port 80

Default: General Purpose

For further information regarding the configuration of the General Purpose LEDs, refer to Chap­ter

4.3.13, LED Configuration Register, and

Chapter

4.3.14, LED Control Register.

Note ...

The bit allocation for Port 80 is the same as for the POST code.

ID 1027-4487, Rev. 3.0 Page 2 - 11

Functional Description CP308

How to Read the 8-Bit POST Code

Due to the fact that only 4 bits are available and 8 bits must be displayed, the POST code output
is multiplexed on the General Purpose LEDs.

Table 2-7: POST Code Sequence

STATE GENERAL PURPOSE LEDs

0 All LEDs are OFF; start of sequence

1 High nibble

2 Low nibble

The following is an example of the General Purpose LEDs’ operation if the POST configuration
is enabled (see also Table 2-6, “General Purpose LED Function”).

Table 2-8: POST Code Example

LED3 LED2 LED1 LED0 RESULT

HIGH NIBBLE

LOW NIBBLE

POST CODE

Note ...

Under normal operating conditions, the General Purpose LEDs should not re­main lit during boot-up. They are intended to be used only for debugging purpos­es. In the event that a General Purpose LED lights up during boot-up and the
CP308 does not boot, please contact Kontron for further assistance.

off (0) on (1) off (0) off (0) 0x4

off (0) off (0) off (0) on (1) 0x1

0x41

2.3.2 SMC LED

The CP308 provides one bicolor SMC LED (red/green) designed to display the status of the
system management controller. The SMC LED is directly connected to the NXP LPC2136 SMC
controller.

P R E L I M I N A R Y

2.3.3 DIP Switch SW1

The CP308 is equipped with one 4-bit DIP switch, SW1, used for board configuration.

Table 2-9: DIP Switch SW1 Function

SWITCH FUNCTION

1 SPI Flash boot configuration

2 Clear uEFI BIOS settings

3 Reserved

4 PCB Index 01: Reset configuration

PCB Index 00: Reserved

For further information on the configuration of the DIP switch, refer to section 4.1, “DIP Switch
Configuration”.

Page 2 - 12 ID 1027-4487, Rev. 3.0

CP308 Functional Description

Figure 2-1: USB Connectors

J4 and J5

J4

J5

4231

4231

Table 2-10: USB Connectors J4 and J5 Pinout

PIN SIGNAL FUNCTION I/O

1VCC VCC --

2 UV0- Differential USB- I/O

3 UV0+ Differential USB+ I/O

4GND GND --

2.3.4 USB Interfaces

The CP308 supports eight USB 2.0 ports: two on front I/O, three on the high-speed I/O
extension connector J12, two on the rear I/O CompactPCI connector J2, and one on the USB

2.0 NAND Flash connector J14. On the USB 2.0 rear I/O ports, it is strongly recommended to
use a cable below 3 meters in length for USB 2.0 devices. All eight ports are high-speed, full­speed, and low-speed capable. Hi-speed USB 2.0 allows data transfers of up to 480 Mb/s.

One USB peripheral may be connected to each port. For connecting more USB devices to the
CP308 than there are available ports, an external USB hub is required.

2.3.4.1 Front Panel USB Connectors J4 and J5

The CP308 has two USB 2.0 interfaces that are implemented as two 4-pin, type A USB connec­tors on the front panel, J4 and J5, with the following pinout:

2.3.5 Graphics Controller

The GS45 GMCH includes a highly integrated graphics accelerator delivering high
performance 3D, 2D graphics capabilities. The internal graphics controller has two
independent display pipes allowing for support of two independent display screens.

Integrated 2D/3D Graphics:

• Intel® Gen 5.0 integrated graphics engine with 10 fully-programmable cores

• Support of HDMI, DP, TV-Out, LVDS, CRT and SDVO

• Intel® Dynamic Video Memory Technology (DVMT 5.0)

• Support of PAVP (Protected Audio-Video Path) for Protected Intel® HD Audio (Video and
Audio) Playback

• High-performance MPEG-2 decoding

• WMV9 (VC-1) and H.264 (AVC) support

• Hardware acceleration for MPEG2 VLD/iDCT

• Microsoft DirectX10 support

• Blu-ray support @ 40 Mb/s

• Hardware motion compensation

• Intermediate Z in classic rendering

Note ...

The CP308 host interfaces can be used with maximum 500 mA continuous
load current as specified in the Universal Serial Bus Specification, Revision

2.0. Short-circuit protection is provided. All the signal lines are EMI-filtered.

P R E L I M I N A R Y

ID 1027-4487, Rev. 3.0 Page 2 - 13

Functional Description CP308

Figure 2-2: D-Sub VGA Con. J3

15

6

10

11

1

5

Table 2-11: D-Sub VGA Connector J3 Pinout

PIN SIGNAL FUNCTION I/O

1 Red Red video signal output O

2 Green Green video signal output O

3 Blue Blue video signal output O

10* VGA_DETECT Monitor detection signal I

13 Hsync Horizontal sync. TTL Out

14 Vsync Vertical sync. TTL Out

12 Sdata

I

²

C data

I/O

15 Sclk

I

²

C clock

I/O

9 VCC Power +5V, 1.5 A fuse

protection

O

5,6,7,8 GND Ground signal --

4,11 NC -- --

2.3.5.1 Graphics Memory Usage

The GS45 GMCH supports the Dynamic Video Memory Technology (DVMT 5.0). This
technology ensures the most efficient use of all available memory for maximum 3D graphics
performance. DVMT dynamically responds to application requirements allocating display and
texturing memory resources as required.

The graphics controller is fed with data from the GS45 memory controller. The graphics perfor­mance is directly related to the amount of memory bandwidth available.

2.3.5.2 Graphics Resolution

The GS45 GMCH can directly drive a progressive scan analog monitor up to a resolution of
2048 x 1536 pixels (QXGA).

2.3.5.3 VGA Analog Interface and Connector J3

The 15-pin female connector J3 is used to connect a VGA analog monitor to the CP308.

P R E L I M I N A R Y

* Pin 10 is normally defined as Ground but is used on the CP308 as detection signal of a con-

nected monitor if the uEFI BIOS setting for the CP308 is “AUTO” (the uEFI BIOS default set­ting is “FRONT”).

Note ...

Page 2 - 14 ID 1027-4487, Rev. 3.0

If the automatic VGA detection mechanism on the CP308 is used, the user
must ensure that the VGA cable and the connected monitor have a GND signal
on pin 10. Otherwise the interface is not operable.

CP308 Functional Description

8

1

8

1

J6B

J6A

Figure 2-3: Dual Gigabit Ethernet

Connector J6A/B

2.3.6 Gigabit Ethernet

The CP308 board includes two 10Base-T/100Base-TX/
1000Base-T Ethernet ports based on two Intel® 82574L
Gigabit Ethernet controllers, which are connected to the
x1 PCI Express interfaces of the ICH9M-SFF.

The Intel® 82574L Gigabit Ethernet Controller’s archi­tecture is optimized to deliver high performance with
the lowest power consumption. The controller's archi­tecture includes independent transmit and receive
queues and a PCI Express interface that maximizes the
use of bursts for efficient bus usage.

The Boot-from-LAN and Wake-on-LAN features are
supported. Wake-on-LAN is available on all Ethernet interfaces. After an operating system
shutdown, a 1000Base-T Gigabit connection is automatically reduced to 100 Mbit or 10 Mbit
operation and the Ethernet controller waits to receive a broadcast or unicast packet with an ex­plicit data pattern to assert a signal or a PME message to wake up the system. If the main pow­er is switched off after an OS shutdown, a 5V standby supply must be provided over the J2 rear
I/O CompactPCI connector to continue powering the Wake-on-LAN relevant devices.

Note ...

The Ethernet transmission can operate effectively using a CAT5 cable with a
maximum length of 100 m.

The Ethernet connectors are realized as RJ-45 connectors. The interfaces provide automatic
detection and switching between 10Base-T, 100Base-TX and 1000Base-T data transmission
(Auto-Negotiation). Auto-wire switching for crossed cables is also supported (Auto-MDI/X).

RJ-45 Connector J6A/B Pinout

The J6A/B connector supplies the 10Base-T, 100Base-TX and 1000Base-T interfaces to the
Ethernet controller.

Table 2-12: Pinout of J6A/B Based on the Implementation

MDI / STANDARD ETHERNET CABLE

10BASE-T 100BASE-TX 1000BASE-T 10BASE-T 100BASE-TX 1000BASE-T

I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL

O TX+ O TX+ I/O BI_DA+ 1 I RX+ I RX+ I/O BI_DB+

O TX- O TX- I/O BI_DA- 2 I RX- I RX- I/O BI_DB-

I RX+ I RX+ I/O BI_DB+ 3 O TX+ O TX+ I/O BI_DA+

PIN

MDIX / CROSSED ETHERNET CABLE

P R E L I M I N A R Y

----I/OBI_DC+4----I/OBI_DD+

----I/OBI_DC-5----I/OBI_DD-

I RX- I RX- I/O BI_DB- 6 O TX- O TX- I/O BI_DA-

----I/OBI_DD+7----I/OBI_DC+

----I/OBI_DD-8----I/OBI_DC-

ID 1027-4487, Rev. 3.0 Page 2 - 15

Functional Description CP308

Figure 2-4: SATA Con. J7 and J8

J7

J8

71

71

Table 2-13: SATA Connectors J7 and J8 Pinout

PIN SIGNAL FUNCTION I/O

1 GND Ground signal --

2 SATA_TX0/1+ Differential Transmit + O

3 SATA_TX0/1- Differential Transmit - O

4 GND Ground signal --

5 SATA_RX0/1- Differential Receive - I

6 SATA_RX0/1+ Differential Receive + I

7 GND Ground signal --

Ethernet LED Status

ACT (green): This LED monitors network connection and activity. The LED lights up when a

valid link (cable connection) has been established. The LED goes temporarily off if network
packets are being sent or received through the RJ-45 port. When this LED remains off, a valid
link has not been established due to a missing or a faulty cable connection.

SPEED (green/orange): This LED lights up to indicate a successful 100Base-TX or
1000BASE-T connection. When green, it indicates a 100Base-TX connection and when orange
it indicates a 1000Base-T connection. When not lit and the ACT-LED is active, the connection
is operating at 10Base-T.

2.3.7 Serial ATA Connectors J7 and J8

The CP308 is equipped with two standard SATA connectors, J7 (SATA1) and J8 (SATA0),
which are used to connect standard HDDs/SSDs and other SATA devices to the CP308.

Note ...

If one of the onboard SATA connectors will be used, due to the big SATA con­nector and the stiff SATA cable, the CP308 will exceed the thickness of 4HP.

P R E L I M I N A R Y

Note ...

To ensure secure connectivity, the SATA connectors support the use of SATA II
cables (SATA cables with locking latch).

2.3.8 CompactPCI Interface

The CP308 supports a flexible CompactPCI interface with a hot plug power interface (no PCI
hot swap). In the system controller slot the PCI interface is in transparent mode, and in the pe­ripheral slot the CompactPCI interface is isolated so that it cannot communicate with the Com­pactPCI bus. This mode is known as "passive mode".

2.3.8.1 Board Functionality when Installed in System Controller Slot

In a system controller slot, the CompactPCI interface is provided as 32-bit/33 MHz PCI inter­face.

Page 2 - 16 ID 1027-4487, Rev. 3.0

CP308 Functional Description

The CP308 supports up to seven peripheral slots through a CompactPCI backplane.

Note ...

The CP308 supports universal PCI V(I/O) signaling voltages with one common
resistor configuration. For both 5V and 3.3 V PCI signaling voltages, 2.7 kΩ pull-
up resistors are used.

2.3.8.2 Board Functionality when Installed in Peripheral Slot (Passive Mode)

In a peripheral slot, the board receives power but does not communicate on the CompactPCI
bus; all CompactPCI signals are isolated.

2.3.8.3 Front/Rear I/O Configuration

The CP308 is available in two versions:

• CP308 front I/O version

• CP308 rear I/O version

Please ensure that the correct version is stated on the order. If the CP308 is ordered with front
I/O configuration, the board provides a 64-bit termination to the backplane via the CompactPCI
connector J2. If the CP308 is ordered with rear I/O configuration, various I/O interfaces and sig­nals are available via the CompactPCI connector J2, such as USB, SATA, GbE, VGA, and
COM, as well as power and management signals.

2.3.8.4 Board Insertion/Replacement under Power

The following features are implemented on the CP308:

• Power ramping (hot plugging)

• ENUM signal handling (hot swapping of peripheral boards)

Power ramping on the CP308 provides the hot plug functionality on the power interface. The
PCI signal interface does not provide hot swap functionality. No microswitch, no blue LED and
no signal precharge are provided on the CP308.

The ENUM signal on the CP308 allows for hot swapping of peripheral boards with hot swap
capability when the CP308 is installed in the system controller slot.

Note ...

The CP308 itself is not hot swappable when inserted in a system controller slot.
When inserted in a peripheral slot, the CP308 is hot pluggable.

P R E L I M I N A R Y

2.3.8.5 Power Ramping

On the CP308 a special power controller is used to ramp up the onboard supply voltages. This
is done to avoid transients on the +3.3V and +5V power supplies from the system. When the
power supply is stable, the power controller generates an onboard reset to put the board into
a defined state.

2.3.8.6 ENUM# Interrupt

If the board is operated in the system controller slot, the ENUM signal is an input.

ID 1027-4487, Rev. 3.0 Page 2 - 17

Functional Description CP308

J2

EDCBA

1

22

1

J1

25

F Z

Note:

Pinrow F: GND
Pinrow Z: NC

Figure 2-5: CPCI Connectors

J1/J2

2.3.9 CompactPCI Connectors J1 and J2

The CP308 provides two CompactPCI connectors, J1 and
J2, with the following functionality:

• J1: 32-bit CompactPCI interface with PCI bus
signals, arbitration, clock and power

• J2: arbitration, clock and optionally either rear I/O
interface functionality or 64-bit termination

The CP308 is designed for a CompactPCI bus architecture
and the board is capable of driving up to seven
CompactPCI slots with individual arbitration and clock
signals.

The CompactPCI standard is electrically identical to the
PCI local bus. However, these systems are enhanced to
operate in rugged industrial environments and to support
multiple slots.

2.3.9.1 CompactPCI Connector Keying

CompactPCI backplane connectors support guide lugs to
ensure a correct polarized mating (3.3 V or 5 V V(I/O)
coding).

The CP308 supports universal (3.3 V and 5 V) PCI V(I/O)
signaling voltages with one common termination resistor
configuration. Therefore, the CP308 can be inserted in
both, 3.3V and 5 V CompactPCI systems and provides it­self no guide lug.

P R E L I M I N A R Y

Page 2 - 18 ID 1027-4487, Rev. 3.0

CP308 Functional Description

2.3.9.2 CompactPCI Connectors J1 and J2 Pinouts

The CP308 is provided with two 2 mm x 2 mm pitch female CompactPCI bus connectors, J1
and J2.

Table 2-14: CompactPCI Bus Connector J1 System Controller Slot Pinout

PIN ROW Z ROW A ROW B ROW C ROW D ROW E ROW F

25 NC 5V REQ64# ENUM# 3.3V 5V GND

24 NC AD[1] 5V V(I/O) AD[0] ACK64# GND

23 NC 3.3V AD[4] AD[3] 5V AD[2] GND

22 NC AD[7] GND 3.3V AD[6] AD[5] GND

21 NC 3.3V AD[9] AD[8] M66EN C/BE[0]# GND

20 NC AD[12] GND V(I/O) AD[11] AD[10] GND

19 NC 3.3V AD[15] AD[14] GND AD[13] GND

18 NC SERR# GND 3.3V PAR C/BE[1]# GND

17 NC 3.3V IPMB SCL IPMB SDA GND PERR# GND

16 NC DEVSEL# PCIXCAP V(I/O) STOP# LOCK# GND

15 NC 3.3V FRAME# IRDY# BDSEL# TRDY# GND

12-14 Key Area

11 NC AD[18] AD[17] AD[16] GND C/BE[2]# GND

10 NC AD[21] GND 3.3V AD[20] AD[19] GND

9 NC C/BE[3]# NC AD[23] GND AD[22] GND

8 NC AD[26] GND V(I/O) AD[25] AD[24] GND

7 NC AD[30] AD[29] AD[28] GND AD[27] GND

6 NC REQ0# CPCI_PRESENT# 3.3V CLK0 AD[31] GND

5NCNC NC RST#GNDGNT0#GND

4 NC IPMB PWR HEALTHY# V(I/O) RSV RSV GND

3 NC INTA# INTB# INTC# 5V INTD# GND

2NCTCK5V TMSNC TDI GND

1 NC 5V NC TRST# NC 5V GND

P R E L I M I N A R Y

ID 1027-4487, Rev. 3.0 Page 2 - 19

Functional Description CP308

Table 2-15: CompactPCI Bus Connector J1 Peripheral Slot Pinout

PIN Z A B C D E F

25 NC 5V * * 3.3V 5V GND

24 NC * 5V V(I/O) * * GND

23 NC 3.3V * * 5V * GND

22 NC * GND 3.3V * * GND

21 NC 3.3V * * * * GND

20 NC * GND V(I/O) * * GND

19 NC 3.3V * * GND * GND

18 NC * GND 3.3V * * GND

17 NC 3.3V IPMB SCL IPMB SDA GND * GND

16 NC * * V(I/O) * * GND

15 NC 3.3V * * BDSEL# * GND

14-12 Key Area

11 NC * * * GND * GND

10 NC * GND 3.3V * * GND

9 NC * NC * GND * GND

8NC* GND V(I/O)* * GND

7 NC * * * GND * GND

6 NC * CPCI_PRESENT# 3.3V * * GND

5NCNC NC RST#**GND * GND

4 NC IPMB PWR HEALTHY# V(I/O) RSV RSV GND

3NC* * * 5V * GND

P R E L I M I N A R Y

2NCTCK 5V TMS NC TDI GND

1 NC 5V NC TRST# NC 5V GND

Note ...

A * indicates that the signal normally present at this pin is disconnected from the
CompactPCI bus when the CP308 is inserted in a peripheral slot.

** When the CP308 is inserted in a peripheral slot, the function of the RST# sig-

nal can be enabled or disabled.

Page 2 - 20 ID 1027-4487, Rev. 3.0

CP308 Functional Description

Table 2-16: 64-bit CompactPCI Bus Connector J2 Pinout (CP308 Front I/O Vers.)

PIN ROW Z ROW A ROW B ROW C ROW D ROW E ROW F

22 NC NC NC NC NC NC GND

21 NC CLK6 GND RSV RSV RSV GND

20 NC CLK5 GND RSV RSV RSV GND

19 NC GND GND RSV RSV RSV GND

18 NC RSV RSV RSV RSV RSV GND

17 NC RSV RSV PRST# REQ6# GNT6# GND

16 NC RSV RSV DEG# RSV RSV GND

15 NC RSV RSV FAL# REQ5# GNT5# GND

14 NC AD[35] AD[34] AD[33] RSV AD[32] GND

13 NC AD[38] RSV RSV AD[37] AD[36] GND

12 NC AD[42] AD[41] AD[40] RSV AD[39] GND

11 NC AD[45] RSV RSV AD[44] AD[43] GND

10 NC AD[49] AD[48] AD[47] RSV AD[46] GND

9 NC AD[52] GND RSV AD[51] AD[50] GND

8 NC AD[56] AD[55] AD[54] GND AD[53] GND

7 NC AD[59] RSV RSV AD[58] AD[57] GND

6 NC AD[63] AD[62] AD[61] GND AD[60] GND

5 NC C/BE[5]# GND RSV C/BE[4]# PAR64 GND

4 NC V(I/O) RSV C/BE[7]# RSV C/BE[6]# GND

3 NC CLK4 GND GNT3# REQ4# GNT4# GND

2 NC CLK2 CLK3 SYSEN# GNT2# REQ3# GND

1 NC CLK1 GND REQ1# GNT1# REQ2# GND

Note ...

The 64-bit CompactPCI signals are not used on the board, but all 64-bit control and
address signals are terminated to V(I/O).

P R E L I M I N A R Y

ID 1027-4487, Rev. 3.0 Page 2 - 21

Functional Description CP308

2.3.10 Optional Rear I/O Interface

The CP308 board provides optional rear I/O connectivity for peripherals. When the rear I/O
module is used, the signals of some of the main board/front panel connectors are routed to the
rear I/O module interface.

For the system rear I/O feature a special backplane is necessary. The CP308 with rear I/O is
compatible with all standard 3U CompactPCI passive backplanes with rear I/O support on the
system slot.

The CP308 rear I/O provides the following interfaces (all signals are available on J2 only if the
board is ordered with rear I/O functionality):

• Two USB 2.0 ports

• Two Gigabit Ethernet ports without LED signals

• Two SATA ports

• Two COM ports (3.3 V TTL level)

• VGA analog port

• One fan control input

• One PWM output

• Management and control signals

• Input for +5V standby power

• Geographic addressing (GA[4..0])

Note ...

The pinout of the rear I/O CompactPCI connector on the CP308 is not compat­ible with that of the CP302, CP303, CP304, CP306, etc., but is compatible with
the pinout of CP307’s and CP305’s rear I/O CompactPCI connector. For this
reason, only rear I/O modules specially designed for the CP308, the CP307 or
the CP305 can be used with the board.

P R E L I M I N A R Y

Page 2 - 22 ID 1027-4487, Rev. 3.0

CP308 Functional Description

2.3.10.1 Optional Rear I/O Interface on CompactPCI Connector J2

Warning!

To support the rear I/O feature, a 3U CompactPCI backplane with rear I/O
support is required. Do not plug a rear I/O configured board in a backplane
without rear I/O support. Failure to comply with the above will result in damage
to your board.

Table 2-17: Rear I/O CompactPCI Bus Connector J2 Pinout (CP308 Rear I/O Vers.)

PIN ROW Z ROW A ROW B ROW C ROW D ROW E ROW F

22 NC GA4 GA3 GA2 GA1 GA0 GND

21 NC CLK6 GND

20 NC CLK5 GND

19 NC GND GND

18 NC

17 NC

16 NC

15 NC

14 NC

13 NC

12 NC

11 NC

10 NC NC

9NC

8NC

1RXD / in 1DCD# / in 1DTR# / out GPI1/2CTS# / in1CTS# / in GND

1TXD / out GPI0/2RXD / in PRST# REQ6# GNT6# GND

1DSR# / in 1RTS# / out DEG# GND 1RI# / in GND

PWR_5VSTDBY
/ in

lPA_DA+ / bi lPA_DA- / bi GPO1/2RTS# /

lPA_DB+ / bi lPA_DB- / bi GPI4/2RI# / in lPA_DD+ / bi lPA_DD- / bi GND

lPB_DA+ / bi lPB_DA- / bi RIO_1V9 / out lPB_DC+ / bi lPB_DC- / bi GND

lPB_DB+ / bi lPB_DB- / bi GPI3/2DCD# / inlPB_DD+ / bi lPB_DD- / bi GND

SATA4TXP /
out

SATA4TXN /
out

FAN_SENSE / inFAL# REQ5# GNT5# GND

GPO0/2TXD /
out

GND VGA_HSYNC /

NC VGA_BLUE /

USB1P / bi USB3P / bi USB1_5V / out GND

USB1N / bi USB3N / bi USB3_5V / out GND

PWR_BTN# / inPWR_SLPS3#

/ out

lPA_DC+ / bi lPA_DC- / bi GND

out

VGA_RED /
out

out

out

GPO2/2DTR# /
out

NC SATA5TXP /

GND SATA5TXN /

RIO_3.3V / out GND

NC GND

GND

out

GND

out

P R E L I M I N A R Y

7NCNC

6NC

5NC

4 NC VI/O

3 NC CLK4 GND GNT3# REQ4# GNT4# GND

2 NC CLK2 CLK3 SYSEN# GNT2# REQ3# GND

1 NC CLK1 GND REQ1# GNT1# REQ2# GND

ID 1027-4487, Rev. 3.0 Page 2 - 23

SATA4RXP / in NC VGA_GREEN /

SATA4RXN / in GND VGA_VSYNC /

GPI2/2DSR# / inVGA_I2C_DAT

/ bi

out

out

RIO_5V / out VGA_I2C_CLK

/ out

PWM_OUT /
out

GND SATA5RXP / in GND

NC SATA5RXN / in GND

GPIO_CFG0 / inNC GND

NC GND

Functional Description CP308

Warning!

The RIO_XXX signals are power supply OUTPUTS to supply the rear I/O mod­ule with power. These pins MUST NOT be connected to any other power
source, either within the backplane itself or within a rear I/O module.

Failure to comply with the above will result in damage to your board.

Note ...

The signal on the GPIO configuration pin D4 tolerates only 3.3 V signalling and
has an internal pull-up resistor to 3.3V.

The pins for the interfaces COM1 and GPIO/COM2 (pins A18, A17, A16, B18,
B17, B16, B10, B7, C18, C14, C13, C11, D18, D10, E18, and E16) tolerate
only 3.3 V signaling and their inputs have internal pull-up resistors.

Legend for Table 2-17:

SATAx Serial ATA port

lPx Gigabit Ethernet port

USBx USB interface and power

VGAx VGA signals

COM1x COM1 port

GPIOx COM2 port or GPIO

PWRx Power Management signals

5V/3.3V Power

GPIO_CFG0 GPIO configuration (GPIO or COM2)

With the GPIO_CFG0 signal on the rear I/O module an active COM2 or GPIO interface can be
selected.

Table 2-18: GPIO Signal Description

P R E L I M I N A R Y

GPIO SIGNAL DESCRIPTION

GPIO_CFG0 0 = GPIO

1 = COM2

Note ...

The default value is 1 if the pin is not connected (pull-up resistor on CP308). If
the pin is connected, the default value depends on the rear I/O module.

Page 2 - 24 ID 1027-4487, Rev. 3.0

CP308 Functional Description

2.3.10.2 Rear I/O Configuration

Rear I/O interfaces are only available on the rear I/O version of the board.

In order to implement the system rear I/O feature, a rear I/O backplane is necessary. This
backplane must comply with the CompactPCI Specification PICMG 2.0 R3.0, October 1999.

Warning!

To support the rear I/O feature, a 3U CompactPCI backplane with rear I/O
support is required. Do not plug a rear I/O configured board in a backplane
without rear I/O support. Failure to comply with the above will result in damage
to your board.

Ethernet Interfaces

Gigabit Ethernet signals are available either on the front RJ-45 connector or on the rear I/O
interface due to the implemented switches on the CP308.

Both Gigabit Ethernet channels are individually switchable to front or rear I/O. Switching over
from front to rear I/O or vice versa is effected using the uEFI BIOS settings (default: front I/O).

VGA Interface

VGA signals are available either on the front VGA connector, J3, or on the rear I/O interface
due to the implemented switch on the CP308. Switching over from front to rear I/O or vice versa
is effected using the uEFI BIOS or the board-specific registers (default: front I/O).

Note ...

The CP308 provides 150 Ω termination resistors for the red, green and blue
VGA signals.

Thus, further 150 Ω termination resistors are necessary on the rear I/O module
to reach the required 75 Ω termination for the VGA connection.

Serial Interface COM1 and COM2

COM1 is available either on the high-speed I/O extension connector, J12, or on the rear I/O
interface. Switching over from J12 to rear I/O or vice versa is effected using the uEFI BIOS
settings or the board-specific registers.

COM2 can be used only on the rear I/O interface and can be alternatively configured as GPIO
port.

USB Interfaces

Two dedicated USB 2.0 ports are available on the rear I/O CompactPCI connector J2.

Note ...

P R E L I M I N A R Y

It is strongly recommended to use cables less than 3 metres in length for the
USB rear I/O interfaces.

ID 1027-4487, Rev. 3.0 Page 2 - 25

Functional Description CP308

SATA Interface

The CP308 provides up to four SATA interfaces. Two of them are switched either to the high­speed I/O extension connector J12 or to the rear I/O CompactPCI connector J2.

Table 2-19: SATA Port Features

SATA

PORT

SATA0 J8

SATA1 J7

SATA4 J2 Rear I/O SATA HDD/SSD

SATA5 J2 Rear I/O SATA HDD/SSD

CONNECTOR USAGE AVAILABLE WITH REMARK

External SATA HDD

on the CP308
baseboard

on the CP308
baseboard

J12 Onboard SATA HDD/SSD

drives

e.g. 2.5” or 3.5” SATA
HDDs/SSDs

External SATA HDD
drives

e.g. 2.5” or 3.5” SATA
HDDs/SSDs

drive connected to a rear
I/O transition module
such as the CP-RIO3-04

drive mounted on the
CP308-HDD or the
CP308-MEDIA module

drive connected to a rear
I/O transition module
such as the CP-RIO3-04

CP308 4HP and 8HP
front and rear I/O board
versions

CP308 4HP and 8HP
front and rear I/O board
versions

CP308 4HP or 8HP rear
I/O board versions

CP308 8HP front and rear
I/O board versions

CP308 4HP or 8HP rear
I/O board versions

Standard onboard SATA2
connector with locking mech­anism

Standard onboard SATA2
connector with locking mech­anism

Both SATA channels, SATA4
and SATA5, are switched
together either to J2 or J12;
they cannot be switched indi­vidually

Both SATA channels, SATA4
and SATA5, are switched
together either to J2 or J12;
they cannot be switched indi­vidually

Both SATA channels, SATA4
and SATA5, are switched
together either to J2 or J12;
they cannot be switched indi­vidually

J12 CompactFlash card

socket on the CP308-

P R E L I M I N A R Y

Page 2 - 26 ID 1027-4487, Rev. 3.0

HDD or the CP308­MEDIA module via the
SATA-to-PATA bridge

CP308 8HP front and rear
I/O board versions

Both SATA channels, SATA4
and SATA5, are switched
together either to J2 or J12;
they cannot be switched indi­vidually

CP308 Functional Description

2.4 System Management Controller

A dedicated System Management Controller (SMC) on the CP308 manages system relevant
tasks and supports SMC commands and sensors.

The SMC can measure onboard voltages and temperature values, and control and supervise
fans and other CompactPCI cards in a system. The control and supervision of CompactPCI
cards is performed via the I²C bus (IPMB) on the CompactPCI connector J1.

The SMC communicates with the processor via the Keyboard Controller Style (KCS) interface,
which is at the I/O location 0xCA2 and 0xCA3.

To read status information (e.g. POST code) and configure some CPLD registers, the SMC can
directly communicate with the onboard CPLD chip via an I²C interface.

2.4.1 Sensors Implemented on the CP308

The CP308 implements several sensors such as sensors for temperature, voltage, power sup­ply, fan, etc.

Table 2-20: Processor and Chipset Sensors and Signals

FUNCTION DESCRIPTION

PLT reset Status of the platform reset signal

Board reset Reset the host processor

S3 sleep state Status of chipset sleep state

Power button Set chipset power button signal

uEFI BIOS Flash select uEFI BIOS fail-over control

Table 2-21: CPCI-Specific Sensors

FUNCTION DESCRIPTION

CPCI GA[4:0] CPCI Geographic address

CPCI SYSEN# CPCI System slot indication

CPCI DEG# CPCI power derate status

CPCI FAL# CPCI power fail status

P R E L I M I N A R Y

ID 1027-4487, Rev. 3.0 Page 2 - 27

Functional Description CP308

Table 2-22: Onboard Temperature Sensors

FUNCTION DESCRIPTION

Processor temperature Current processor die temperature (Temp 1)

Board temperature Current board temperature (Temp 1)

DDR3 temperature Current temperature of the Temp 2 sensor below the SODIMM module

Processor overtemperature Indicates a catastrophic cooling failure; processor temp. > 125°C

Processor internal thermal monitor Status of processor internal thermal monitor (processor host)

GMCH internal thermal monitor Status of GMCH internal thermal monitor (Aux2 trip point)

Table 2-23: Onboard Power Supply Sensors and Signals

FUNCTION DESCRIPTION

PGOOD main Status of all power good signals

PGOOD SMC Power good reset signal (cold reset)

Power controller fail Power controller fail signal for onboard 5 V, 3.3 V and V(I/O)

Voltage 3.3 V Board 3.3 V supply

Voltage 5 V Board 5 V supply

CPCI I²C supply CPCI I²C bus voltage

Table 2-24: Rear I/O Fan Sensors and Signals

FUNCTION DESCRIPTION

Fan sense Status of fan

Fan PWM Fan control signal

P R E L I M I N A R Y

Table 2-25: SMC General Sensors and Signals

FUNCTION DESCRIPTION

SMC LED One bicolor LED (red, green and red+green)

HW logic index CP308 hardware and logic index

POST code POST code values from the host I/O ports

Page 2 - 28 ID 1027-4487, Rev. 3.0

CP308 Installation

Chapter 1

3

Installation

ID 1027-4487, Rev. 3.0 Page 3 - 1

P R E L I M I N A R Y

Installation CP308

This page has been intentionally left blank.

P R E L I M I N A R Y

Page 3 - 2 ID 1027-4487, Rev. 3.0

CP308 Installation

3. Installation

The CP308 has been designed for easy installation. However, the following standard precau­tions, installation procedures, and general information must be observed to ensure proper in­stallation and to preclude damage to the board, other system components, or injury to
personnel.

3.1 Safety Requirements

The following safety precautions must be observed when installing or operating the CP308.
Kontron assumes no responsibility for any damage resulting from failure to comply with these
requirements.

Warning!

Due care should be exercised when handling the board due to the fact that the
heat sink can get very hot. Do not touch the heat sink when installing or
removing the board.

In addition, the board should not be placed on any surface or in any form of
storage container until such time as the board and heat sink have cooled down
to room temperature.

Caution!

If your board type is not specifically qualified as being hot swap capable,
switch off the CompactPCI system power before installing the board in a free
CompactPCI slot. Failure to do so could endanger your life or health and may
damage your board or system.

Note ...

Certain CompactPCI boards require bus master and/or rear I/O capability. If
you are in doubt whether such features are required for the board you intend
to install, please check your specific board and/or system documentation to
make sure that your system is provided with an appropriate free slot in which
to insert the board.

ESD Equipment!

This CompactPCI board contains electrostatically sensitive devices. Please
observe the necessary precautions to avoid damage to your board:

• Discharge your clothing before touching the assembly. Tools must be dis­charged before use.

• Do not touch components, connector-pins or traces.

• If working at an anti-static workbench with professional discharging
equipment, please do not omit to use it.

P R E L I M I N A R Y

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Installation CP308

3.2 CP308 Initial Installation Procedures

The following procedures are applicable only for the initial installation of the CP308 in a system.
Procedures for standard removal and insertion/removal under power are found in their respec-
tive chapters.

To perform an initial installation of the CP308 in a system proceed as follows:

1. Ensure that the safety requirements indicated in Chapter 3.1 are observed.

Warning!

Failure to comply with the instruction below may cause damage to the
board or result in improper system operation.

2. Ensure that the board is properly configured for operation in accordance with application
requirements before installing. For information regarding the configuration of the CP308
refer to Chapter 4. For the installation of CP308-specific peripheral devices and rear I/O
devices refer to the appropriate sections in Chapter 3.

Warning!

Care must be taken when applying the procedures below to ensure that
neither the CP308 nor other system boards are physically damaged by
the application of these procedures.

3. To install the CP308 perform the following:

1. Ensure that no power is applied to the system before proceeding.

Warning!

Even though power may be removed from the system, the CP308 front
panel cables and, when installed, the RIO transition module front panel ca­bles may have power applied which comes from an external source.

P R E L I M I N A R Y

In addition, these cables may be connected to devices that can be dam­aged by electrostatic discharging or short-circuiting of pins.

It is the responsibility of the system designer or integrator to ensure that
appropriate measures are taken to preclude damage to the system or inju­ry to personnel which may arise from the handling of these cables (con­necting or disconnecting).

Kontron disclaims all liability for damages or injuries resulting from failure
to comply with the above.

Warning!

When performing the next step, DO NOT push the board into the back­plane connectors. Use the ejector handle to seat the board into the back­plane connectors.

2. Carefully insert the board into the slot designated by the application requirements for

the board until it makes contact with the backplane connectors.

Page 3 - 4 ID 1027-4487, Rev. 3.0

CP308 Installation

3. Using the ejector handle, engage the board with the backplane. When the ejector han­dle is locked, the board is engaged.

4. Fasten the front panel retaining screws.

5. Connect all external interfacing cables to the board as required.

6. Ensure that the board and all required interfacing cables are properly secured.

The CP308 is now ready for initial operation. Except for the uEFI BIOS, at this point there is no
other software installed. For software installation and further operation of the CP308, refer to
appropriate CP308 software (uEFI BIOS, BSP, OS), application, and system documentation.

3.3 Standard Removal Procedures

To remove the board proceed as follows:

1. Ensure that the safety requirements indicated in Chapter 3.1 are observed. Particular at­tention must be paid to the warning regarding the heat sink!

Warning!

Care must be taken when applying the procedures below to ensure that
neither the CP308 nor system boards are physically damaged by the
application of these procedures.

2. Ensure that no power is applied to the system before proceeding.

Warning!

Even though power may be removed from the system, the CP308 front
panel cables and, when installed, the RIO transition module front panel ca­bles may have power applied which comes from an external source.

In addition, these cables may be connected to devices that can be dam­aged by electrostatic discharging or short-circuiting of pins.

It is the responsibility of the system designer or integrator to ensure that
appropriate measures are taken to preclude damage to the system or inju­ry to personnel which may arise from the handling of these cables (con­necting or disconnecting).

Kontron disclaims all liability for damages or injuries resulting from failure
to comply with the above.

3. Disconnect any interfacing cables that may be connected to the board.

4. Unscrew the front panel retaining screws.

5. Disengage the board from the backplane by first unlocking the board ejection handle and
then by pressing the handle as required until the board is disengaged.

6. After disengaging the board from the backplane, pull the board out of the slot.

P R E L I M I N A R Y

Warning!

Due care should be exercised when handling the board due to the fact that
the heat sink can get very hot. Do not touch the heat sink when changing
the board.

7. Dispose of the board as required.

ID 1027-4487, Rev. 3.0 Page 3 - 5

Installation CP308

3.4 Insertion/Removal under Power

The CP308 is designed for use either as a CompactPCI system controller or as an autonomous
CPU board in a CompactPCI peripheral slot.

When installed in the system controller slot, the CP308 provides all required functions for sup­porting the hot swapping of peripheral boards which are capable of being hot swapped. In this
configuration the CP308 itself is not hot-swappable.

When installed in a CompactPCI peripheral slot, the CP308 operates autonomously, meaning
that it only draws power from the CompactPCI backplane. There is no interfacing with the Com­pactPCI bus, clocks or other control signals. In this configuration, the CP308 supports hot plug­ging. This simply means that the board can be installed or removed from the system while
under power.

Warning!

Always ensure that all functions in progress are properly terminated or put into
a safe state prior to hot plugging the CP308.

Failure to comply with the above may result in improper operation or damage
to other system components, e.g. operating system failure, data loss, uncon­trolled processing, etc.

Note ...

In order to use the hot plug function of the CP308, a hot swap-capable back­plane is required.

3.4.1 Replacement under Power in Peripheral Slot

This procedure assumes that the system supports hot plugging, and that the replacement for
the board to be hot plugged is configured hardware- and software-wise for operation in the ap­plication.

To replace the CP308 proceed as follows:

1. Ensure that the safety requirements indicated in Chapter 3.1 are observed. Particular at­tention must be paid to the warning regarding the heat sink!

P R E L I M I N A R Y

Warning!

Care must be taken when applying the procedures below to ensure that
neither the CP308 nor other system boards are physically damaged by
the application of these procedures.

2. Ensure that the board may be removed from the system.

Note ...

The performance of this step is a function of the application. Consult the
application description/procedure for determining when the CP308 board
may be removed from the system.

Page 3 - 6 ID 1027-4487, Rev. 3.0

CP308 Installation

3. Disconnect any interfacing cables that may be connected to the board.

Warning!

The CP308 front panel cables and, when installed, the RIO transition mod­ule front panel cables may have power applied which comes from an ex­ternal source.

In addition, these cables may be connected to devices that can be dam­aged by electrostatic discharging or short-circuiting of pins.

It is the responsibility of the system designer or integrator to ensure that
appropriate measures are taken to preclude damage to the system or inju­ry to personnel which may arise from the handling of these cables (con­necting or disconnecting).

Kontron disclaims all liability for damages or injuries resulting from failure
to comply with the above.

4. Unscrew the front panel retaining screws.

5. Unlock the ejector handle.

6. Using the ejector handle, disengage the board from the backplane and carefully remove
it from the system.

Warning!

Due care should be exercised when handling the board due to the fact that
the heat sink can get very hot. Do not touch the heat sink when changing
the board.

7. Dispose of the “old” board as required observing the safety requirements indicated in
Chapter 3.1.

8. Obtain the replacement CP308 board.

Warning!

When performing the next step, DO NOT push the board into the back­plane connectors. Use the ejector handle to seat the board into the back­plane connectors.

9. Carefully insert the “new” board into the “old” board slot until it makes contact with the
backplane connectors.

10. Using the ejector handle, engage the board with the backplane. When the ejector handle
is locked, the board is engaged.

11. Fasten the front panel retaining screws.

P R E L I M I N A R Y

ID 1027-4487, Rev. 3.0 Page 3 - 7

Installation CP308

12. Connect all required interfacing cables to the board.

Warning!

The CP308 front panel cables and, when installed, the RIO transition mod­ule front panel cables may have power applied which comes from an ex­ternal source.

In addition, these cables may be connected to devices that can be dam­aged by electrostatic discharging or short-circuiting of pins.

It is the responsibility of the system designer or integrator to ensure that
appropriate measures are taken to preclude damage to the system or inju­ry to personnel which may arise from the handling of these cables (con­necting or disconnecting).

Kontron disclaims all liability for damages or injuries resulting from failure
to comply with the above.

Replacement of the CP308 under power is now complete.

P R E L I M I N A R Y

Page 3 - 8 ID 1027-4487, Rev. 3.0

CP308 Installation

USB 2.0 NAND

Flash Module

SATA con. for external

SATA devices

USB 2.0 NAND

Flash Module

2.5” Serial ATA HDD/SSD

CP308-HDD

Module

3.5 Installation of CP308 Peripheral Devices

The CP308 is designed to accommodate various peripheral devices, such as USB devices, Se­rial ATA devices, a CompactFlash card, an SD/SDHC card, a PCI Express Mini Card, etc. The
following figures show the placement of modules and peripheral devices on the CP308.

Figure 3-1: Connecting a Peripheral Device to the 4HP CP308

Figure 3-2: Connecting a Peripheral Device to the 8HP CP308 with CP308-HDD

P R E L I M I N A R Y

ID 1027-4487, Rev. 3.0 Page 3 - 9

Installation CP308

PCI Express

Mini Card

2.5” Serial ATA HDD/SSD

SD/SDHC

Card

Figure 3-3: Connecting a Peripheral Device to the 8HP CP308 with CP308-MEDIA

The following chapters provide information regarding installation aspects of peripheral devices.

3.5.1 USB Device Installation

The CP308 supports all USB Plug and Play computer peripherals (e.g. keyboard, mouse,
printer, etc.).

Note ...

All USB devices may be connected or removed while the host or other
peripherals are powered up.

3.5.2 USB 2.0 NAND Flash Module Installation

P R E L I M I N A R Y

A

USB 2.0 NAND Flash module may be connected to the

the onboard USB 2.0 NAND Flash connector, J14.

This optionally available module must be physically installed on the CP308 prior to installation
of the CP308 in a system.

During installation it is necessary to ensure that the USB 2.0 NAND Flash module is properly
seated in the onboard USB 2.0 NAND Flash connector, i.e. the pins are aligned correctly and
not bent. To ensure a correct installation of the USB 2.0 NAND Flash module on the CP308, a
special low-profile screw with the corresponding stand-off bolt from Kontron must be used. Do
not use any other screws or stand-off bolts as they may cause improper installation.

CP308 or the CP308

-HDD module via

Note ...

Only qualified USB 2.0 NAND Flash modules from Kontron are authorized for
use with the CP308 or the CP308-HDD. Use of unqualified USB 2.0 NAND
Flash modules or improper installation will void the warranty and may result in
damage to the board or the system.

Page 3 - 10 ID 1027-4487, Rev. 3.0

CP308 Installation

3.5.3 Installation of External Serial ATA Devices

The following information pertains to external SATA devices which may be connected to the
CP308 via normal cabling.

Some symptoms of incorrectly installed SATA devices are:

• Device on a SATA channel does not spin up: check power cables and cabling. May also
result from a bad power supply or SATA device.
The SATA connector on the CP308 provides only a data connection. The power for this
device must be supplied by a separate connector. For further information, refer to the
respective documentation of the device.

• SATA device fail message at boot-up: may be a bad cable or lack of power going to the
drive.

3.5.4 2.5” HDD/SSD Installation

One 2.5” SATA HDD/SSD may be connected to the 8HP CP308 via the CP308-HDD or the
CP308-MEDIA module and the respective SATA connector. For further information regarding
the CP308-HDD module, refer to Appendix A in this manual. For further information regarding
the CP308-MEDIA module, refer to Appendix B in this manual.

3.5.5 CompactFlash Card Installation

The 8HP CP308 equipped with the CP308-HDD module or the CP308-MEDIA module provides
a CompactFlash card socket with ejector. The CompactFlash card socket supports all available
CompactFlash ATA cards type I and type II. For further information regarding the CP308-HDD
module, refer to Appendix A in this manual. For further information regarding the CP308-ME­DIA module, refer to Appendix B in this manual.

Note ...

The CP308-HDD/CP308-MEDIA does not support removal and reinsertion of
the CompactFlash storage card while the board is in a powered-up state. Con­necting the CompactFlash card while the power is on, which is known as "hot
plugging", may damage your system.

3.5.6 SD/SDHC Card Installation

The 8HP CP308 equipped with the CP308-MEDIA module provides an SD/SDHC card socket
for the installation an SD or an SDHC card. For further information regarding the CP308-MEDIA
module, refer to Appendix B in this manual.

Note ...

The CP308-MEDIA does not support removal and reinsertion of the SD/ SDHC
card while the board is in a powered-up state. Connecting the SD/SDHC card
while the power is on may damage your system.

P R E L I M I N A R Y

ID 1027-4487, Rev. 3.0 Page 3 - 11

Installation CP308

3.5.7 PCI Express Mini Card Installation

The 8HP CP308 equipped with the CP308-MEDIA module provides a PCI Express Mini Card
connector for installing a PCI Express Mini Card. The CP308-MEDIA module supports PCI Ex­press Mini Cards such as PCI Express Mini Card SSD, PCI Express Mini Card WLAN, PCI Ex­press Mini Card Bluetooth, etc. For further information regarding the CP308-MEDIA module,
refer to Appendix B in this manual.

Note ...

The CP308-MEDIA does not support removal and reinsertion of the PCI Ex­press Mini Card while the board is in a powered-up state. Connecting the PCI
Express Mini Card while the power is on may damage your system.

3.5.8 Rear I/O Device Installation

For physical installation of rear I/O devices, refer to the documentation provided with the device
itself.

Note ...

VGA and Ethernet can be used either on the front panel or on the rear I/O.
SATA 4 and 5 as well as COM1 can be used either on the 8HP expansion
module or on the rear I/O. It is not possible to use any of the above-mentioned
interfaces on the front or the 8HP expansion and on the rear I/O simulta­neously.

3.5.9 Battery Replacement

The lithium battery must be replaced with an identical battery or a battery type recommended
by the manufacturer. A suitable battery type is CR2025.

Note ...

The user must be aware that the battery’s operational temperature range is
less than the CP308’s storage temperature range.

For exact range information, refer to the battery manufacturer’s specifications.

Note ...

P R E L I M I N A R Y

Care must be taken to ensure that the battery is correctly replaced.

The battery should be replaced only with an identical or equivalent type
recommended by the manufacturer.

Dispose of used batteries according to the manufacturer’s instructions.

The typical life expectancy of a 170 mAh battery (CR2025) is 5 - 6 years with
an average on-time of 8 hours per working day at an operating temperature of
30°C. However, this typical value varies considerably because the life
expectancy is dependent on the operating temperature and the standby time
(shutdown time) of the system in which it operates.
To ensure that the lifetime of the battery has not been exceeded it is
recommended to exchange the battery after 4 - 5 years.

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CP308 Installation

3.6 Software Installation

The installation of the Ethernet and all other onboard peripheral drivers is described in detail in
the relevant Driver Kit files.

Installation of an operating system is a function of the OS software and is not addressed in this
manual. Refer to appropriate OS software documentation for installation.

Note ...

Users working with pre-configured operating system installation images for
Plug and Play compliant operating systems, for example Windows® XP, Win­dows® XP Embedded, must take into consideration that the stepping and revi­sion ID of the chipset and/or other onboard PCI devices may change. Thus, a
re-configuration of the operating system installation image deployed for a pre­vious chipset stepping or revision ID is in most cases required. The correspond­ing operating system will detect new devices according to the Plug and Play
configuration rules.

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Installation CP308

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CP308 Configuration

Chapter 1

4

Configuration

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Configuration CP308

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CP308 Configuration

4. Configuration

4.1 DIP Switch Configuration

The DIP switch consists of four switches for board configuration: switch 1 for the SPI Flash con­figuration, switch 2 for the uEFI BIOS configuration, switch 3 reserved for future use, and switch
4 for reset configuration (PCB index 01)/reserved for future use (PCB index 00).

Figure 4-1: DIP Switch SW1

The following table indicates the functionality of the four switches integrated in the DIP switch.

Table 4-1: DIP Switch SW1 Functionality

SWITCH SETTING FUNCTIONALITY

1 OFF Normal boot from the primary SPI Flash

ON Normal boot from the secondary SPI Flash

2 OFF Normal boot using the uEFI BIOS settings

ON Clear the uEFI BIOS settings and use the default values

3 -- Reserved for future use

4

(PCB index: 01)

4

(PCB index: 00)

The default setting is indicated by using italic bold.

OFF Edge-sensitive reset configuration (ICH9M-SFF reset implementation)

ON Level-sensitive reset configuration (FPGA PGOOD logic to ICH9M-SFF)

-- Reserved for future use

P R E L I M I N A R Y

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Configuration CP308

To clear the uEFI BIOS settings, proceed as follows:

1. Set DIP switch SW1, switch 2, to the ON position.

2. Apply power to the system.

3. After approximately 30 seconds, remove power from the system.

4. Set DIP switch SW1, switch 2, to the OFF position.

Note ...

If switch 2 is in the ON position, the CP308 is not completely booting (no VGA
output). After setting switch 2 back to the OFF position, the CP308 performs a
complete boot operation.

4.2 Jumper Description

The CP308 has three solder jumpers, one for clearing the uEFI BIOS settings (JP3), one re­served for factory use (JP2) and one reserved for future use (JP1).

4.2.1 uEFI BIOS Settings

If the system does not boot (due to, for example, the wrong uEFI BIOS configuration or wrong
password setting), the uEFI BIOS settings may be cleared via the solder jumper JP3.

Table 4-2: Jumper for Clearing the uEFI BIOS Settings

JP3 DESCRIPTION

Open Normal boot using the uEFI BIOS settings

Closed Clear the uEFI BIOS settings and use the default values

The default setting is indicated by using italic bold.

To clear the uEFI BIOS settings, proceed as follows:

1. Set the jumper JP3 to the Closed position.

2. Apply power to the system.

3. After approximately 30 seconds, remove power from the system.

4. Set the jumper JP3 to the Open position.

P R E L I M I N A R Y

Note ...

If Jumper JP3 is in the Closed position, the CP308 is not completely booting (no
VGA output). After setting Jumper JP3 back to the Open position, the CP308
performs a complete boot operation.

Page 4 - 4 ID 1027-4487, Rev. 3.0

CP308 Configuration

4.2.2 I/O Address Map

The following table indicates the CP308-specific registers. The blue-shaded table cells indicate
SMC-specific registers.

Table 4-3: I/O Address Map

ADDRESS DEVICE

0x080 uEFI BIOS POST Code Low Byte Register (POSTL)

0x081 uEFI BIOS POST Code High Byte Register (POSTH)

0x082 - 0x083 Reserved

0x084 Debug Low Byte Register (DBGL)

0x085 Debug High Byte Register (DBGH)

0x280 Status Register 0 (STAT0)

0x281 Status Register 1 (STAT1)

0x282 Control Register 0 (CTRL0)

0x283 Control Register 1 (CTRL1)

0x284 Device Protection Register (DPROT)

0x285 Reset Status Register (RSTAT)

0x286 Board Interrupt Configuration Register (BICFG)

0x287 Status Register 2 (STAT2)

0x288 Board ID Register (BID)

0x289 Board and PLD Revision Register (BREV)

0x28A Geographic Addressing Register (GEOAD)

0x28B Reserved

0x28C Watchdog Timer Control Register (WTIM)

0x28D - 0x28F Reserved

0x290 LED Configuration Register (LCFG)

0x291 LED Control Register (LCTRL)

0x292 General Purpose Output Register (GPOUT)

0x293 General Purpose Input Register (GPIN)

0x294 - 0x299 Reserved

0x29A - 0x29C Reserved

0x29D SMC Controller Status Register 0 (ICSTA0)

0x29E SMC Controller Status Register 1 (ICSTA1)

0x29F Reserved

0xCA2; 0xCA3 SMC KCS Interface

P R E L I M I N A R Y

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Configuration CP308

4.3 CP308-Specific Registers

The following registers are special registers which the CP308 uses to watch the onboard
hardware special features and a number of CompactPCI control signals.

Normally, only the system uEFI BIOS uses these registers, but they are documented here for
application use as required.

Note ...

Take care when modifying the contents of these registers as the system uEFI
BIOS may be relying on the state of the bits under its control.

4.3.1 Status Register 0 (STAT0)

The Status Register 0 holds general/common status information.

Table 4-4: Status Register 0 (STAT0)

REGISTER NAME STATUS REGISTER 0 (STAT0)

ADDRESS 0x280

BIT NAME DESCRIPTION

7 Res. Reserved 0 R

6 BBEI uEFI BIOS boot end indication:

0 = uEFI BIOS is booting
1 = uEFI BIOS boot is finished

5 - 4 BFSS Boot Flash selection status:

00 = Primary boot Flash active
01 = Secondary boot Flash active
10 = External boot Flash active
11 = Reserv ed

3 DIP4 DIP switch SW1, switch 4 (PCB index 01: reset configuration /PCB

index 00: reserved):

P R E L I M I N A R Y

2 DIP3 DIP switch SW1, switch 3 (Reserved):

1 DIP1 DIP switch SW1, switch 2 (Clear the uEFI BIOS settings):

0 = Switch on
1 = Switch off

0 = Switch on
1 = Switch off

0 = Switch on
1 = Switch off

RESET
VAL UE

0R

00 R

N/A R

N/A R

N/A R

ACCESS

0 DIP0 DIP switch SW1, switch 1 (Select SPI Flash):

0 = Switch on
1 = Switch off

Page 4 - 6 ID 1027-4487, Rev. 3.0

N/A R

CP308 Configuration

4.3.2 Status Register 1 (STAT1)

The Status Register 1 holds board-specific status information.

Table 4-5: Status Register 1 (STAT1)

REGISTER NAME STATUS REGISTER 1 (STAT1)

ADDRESS 0x281

BIT NAME DESCRIPTION

7 - 4 Res. Reserved 0000 R

3 CSYS CPCI system slot identification (SYSEN signal):

0 = Installed in a system slot
1 = Installed in a peripheral slot

2 CENUM CPCI system enumeration (ENUM signal):

0 = Indicates the insertion or removal of a hot swap peripheral board

when the CP308 operates as the system controller board

1 = No hot swap event

1 CFAL CPCI power supply status (FAL signal):

0 = Power supply failure
1 = Power in normal state

0 CDEG CPCI power supply status (DEG signal):

0 = Power derating
1 = Power in normal state

RESET

VAL UE

N/A R

N/A R

N/A R

N/A R

4.3.3 Control Register 0 (CTRL0)

The Control Register 0 holds one bit for specifying the boot Flash to be updated.

Table 4-6: Control Register 0 (CTRL0)

ACCESS

REGISTER NAME CONTROL REGISTER 0 (CTRL0)

ADDRESS 0x282

BIT NAME DESCRIPTION

7 - 6 Res. Reserved 00 R

5 BFUS Boot Flash update selection:

0 = Select default boot Flash for update
1 = Select alternative boot Flash for update

4 - 0 Res. Reserved 00000 R

RESET

VAL UE

0R/W

ACCESS

P R E L I M I N A R Y

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Configuration CP308

4.3.4 Control Register 1 (CTRL1)

The Control Register 1 holds board-specific control information.

Table 4-7: Control Register 1 (CTRL1)

REGISTER NAME CONTROL REGISTER 1 (CTRL1)

ADDRESS 0x283

BIT NAME DESCRIPTION

7 - 6 VGAM VGA Mode Configuration:

00 = Automatic VGA Front Detection
01 = Front VGA (uEFI BIOS default)
10 = Rear VGA
11 = VGA disabled

5 SSATA SATA4/5 routing selection:

0 = Rear I/O
1 = 8HP expansion module

4 CRST CPCI reset in peripheral slot:

0 = Disable CPCI reset to board
1 = Enable CPCI reset to board

3 Res. Reserved 0 R

2 SCOM1 COM1 routing selection:

0 = Rear I/O
1 = 8HP expansion module

1 - 0 Res. Reserved 00 R

RESET
VAL UE

N/A R/W

N/A

(see note

below)

0R/W

N/A

(see note

below)

ACCESS

R/W

R/W

Note ...

The reset value of the SSATA and SCOM1 bits depends on the board version
ordered. If the CP308 is ordered as a rear I/O version, the reset value is 0. If the
CP308 is ordered as a front I/O version, an automatic switch over to the 8HP
expansion module is processed per default.

P R E L I M I N A R Y

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CP308 Configuration

4.3.5 Device Protection Register (DPROT)

The Device Protection Register holds the write protect signals for Flash devices.

Table 4-8: Device Protection Register (DPROT)

REGISTER NAME DEVICE PROTECTION REGISTER (DPROT)

ADDRESS 0x284

BIT NAME DESCRIPTION

7 - 2 Res. Reserved 000000 R

1 EEWP EEPROM write protection:

0 = EEPROM not write protected
1 = EEPROM write protected
Writing a ’1’ to this bit sets the bit. If this bit is set, it cannot be
cleared.

0 BFWP Boot Flash write protection:

0 = Boot Flash not write protected
1 = Boot Flash write protected
Writing a ’1’ to this bit sets the bit. If this bit is set, it cannot be
cleared.

RESET

VAL UE

0R/W

0R/W

ACCESS

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P R E L I M I N A R Y

Configuration CP308

4.3.6 Reset Status Register (RSTAT)

The Reset Status Register is used to determine the host’s reset source.

Table 4-9: Reset Status Register (RSTAT)

REGISTER NAME RESET STATUS REGISTER (RSTAT)

ADDRESS 0x285

BIT NAME DESCRIPTION

7 PORS Power-on reset status:

0 = System reset generated by software (warm reset)
1 = System reset generated by power-on (cold reset)

Writing a ’1’ to this bit clears the bit.

6 Res. Reserved 0 R

5 SRST Software reset status:

0 = Reset is logged by SMC
1 = Reset is not logged by SMC

The uEFI BIOS/ software sets the bit to inform the SMC that the next
reset should not be logged.

Writing a ’1’ from the host to this bit sets the bit. After setting the bit,
it may be cleared via the SMC.

4 Res. Reserved 0 R

3 IPRS SMC controller reset:

0 = System reset not generated by SMC
1 = System reset generated by SMC

Writing a ’1’ to this bit clears the bit.

2 FPRS Front panel push button reset status (CP308-HDD):

0 = System reset not generated by front panel reset
1 = System reset generated by front panel reset

Writing a ’1’ to this bit clears the bit.

RESET
VAL UE

N/A R/W

0R/W

0R/W

0R/W

ACCESS

P R E L I M I N A R Y

1 CPRS CompactPCI reset status (PRST signal):

0 = System reset not generated by CPCI reset input
1 = System reset generated by CPCI reset input

Writing a ’1’ to this bit clears the bit.

0 WTRS Watchdog timer reset status:

0 = System reset not generated by Watchdog timer
1 = System reset generated by Watchdog timer

Writing a ’1’ to this bit clears the bit.

0R/W

0R/W

Note ...

The Reset Status Register is set to the default values by power-on reset, not by
PCI reset.

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CP308 Configuration

4.3.7 Board Interrupt Configuration Register (BICFG)

The Board Interrupt Configuration Register holds a series of bits defining the interrupt routing
for the Watchdog. If the Watchdog timer fails, it can generate an IRQ5 interrupt.

The enumeration signal is generated by a hot swap compatible board after insertion and prior
to removal. The system uses this interrupt signal to force software to configure the new board.
The derate signal indicates that the power supply is beginning to derate its power output.

Table 4-10: Board Interrupt Configuration Register (BICFG)

REGISTER NAME BOARD INTERRUPT CONFIGURATION REGISTER (BICFG)

ADDRESS 0x286

BIT NAME DESCRIPTION

7 - 6 CFICF CPCI fail signal interrupt configuration (FAL signal):

00 = Disabled
01 = IRQ5
10 = Reserved
11 = Reserv ed

5 CEICF CPCI enumeration signal to IRQ5 routing (ENUM signal):

0 = Disabled
1 = Enabled

4 CDICF CPCI derate signal to IRQ5 routing (DEG signal):

0 = Disabled
1 = Enabled

3 - 2 KICF KCS interrupt configuration:

00 = Disabled
01 = IRQ11
10 = IRQ10
11 = Reserv ed

1 - 0 WICF Watchdog interrupt configuration:

00 = Disabled
01 = IRQ5
10 = Reserved
11 = Reserv ed

RESET

VAL UE

00 R/W

0R/W

0R/W

00 R/W

00 R/W

ACCESS

P R E L I M I N A R Y

ID 1027-4487, Rev. 3.0 Page 4 - 11

Configuration CP308

4.3.8 Status Register 2 (STAT2)

The Status Register 2 holds status information related to the 8HP I/O expansion module and
the rear I/O expansion module.

Table 4-11: Status Register 2 (STAT2)

REGISTER NAME STATUS REGISTER 2 (STAT2)

ADDRESS 0x287

BIT NAME DESCRIPTION

7 - 6 Res. Reserved 00 R

5 - 4 RCFG Rear I/O configuration:

00 = Rear I/O disabled (CP308 front I/O version with 64-bit termina-

tion on the CompactPCI connector J2)
01 = COM1, GPIO
10 = Reserved
11 = COM1, COM2
The default value depends on the CP308 version ordered (front I/O
or rear I/O) and the rear I/O Module used.

3 - 2 GCFG 8HP graphics expansion configuration:

00 = PCI Express Graphics port implementation on 8HP graphics

expansion
01 = 8HP GMCH graphics expansion with implemented HDA audio

stream (DP, HDMI)
10 = 8HP GMCH graphics expansion without implemented HDA

audio stream
11 = No 8HP graphics expansion present (onboard pull-up resistors)

The default value depends on the 8HP graphics expansion used.

1 - 0 IOCFG 8HP I/O expansion configuration:

00 = 8HP I/O expansion does not use any PCI Express interface

from the ICH9M-SFF
01 = 8HP I/O expansion needs one x4 PCI Express configuration

from the ICH9M-SFF

P R E L I M I N A R Y

10 = 8HP I/O expansion needs four x1 PCI Express configuration

from the ICH9M-SFF
11 = No 8HP I/O expansion present (onboard pull-up resistors)

The default value depends on the 8HP I/O expansion used.

RESET
VAL UE

N/A R

N/A R

N/A R

ACCESS

Page 4 - 12 ID 1027-4487, Rev. 3.0

CP308 Configuration

4.3.9 Board ID Register (BID)

Each Kontron board is provided with a unique board-type identifier in the form of a hexadecimal
number, as indicated in the following register.

Table 4-12: Board ID Register (BID)

REGISTER NAME BOARD ID REGISTER (BID)

ADDRESS 0x288

BIT NAME DESCRIPTION

7 - 0 BID Board identification

0xB1 = CP308

RESET

VAL UE

0xB1 R

ACCESS

4.3.10 Board and PLD Revision Register (BREV)

The Board and PLD Revision Register signals to the software when differences in the board
and the Programmable Logic Device (PLD) require different handling by the software. It starts
with the value 0x00 for the initial board prototypes and will be incremented with each change
in hardware as development continues.

Table 4-13: Board and PLD Revision Register (BREV)

REGISTER NAME BOARD AND PLD REVISION REGISTER (BREV)

ADDRESS 0x289

BIT NAME DESCRIPTION

7 - 4 BREV Board revision N/A R

3 - 0 PREV PLD revision N/A R

RESET

VAL UE

ACCESS

4.3.11 Geographic Addressing Register (GEOAD)

The Geographic Addressing Register describes the CompactPCI geographic addressing sig­nals.

Table 4-14: Geographic Addressing Register (GEOAD)

REGISTER NAME GEOGRAPHIC ADDRESSING REGISTER (GEOAD)

ADDRESS 0x28A

BIT NAME DESCRIPTION

7 - 5 Res. Reserved 000 R

4 - 0 GA CPCI geographic address N/A R

ID 1027-4487, Rev. 3.0 Page 4 - 13

RESET

VAL UE

ACCESS

P R E L I M I N A R Y

Configuration CP308

4.3.12 Watchdog Timer Control Register (WTIM)

The CP308 has one Watchdog timer provided with a programmable timeout ranging from 125
msec to 4096 sec. Failure to strobe the Watchdog timer within a set time period results in a
system reset or an interrupt. The interrupt mode can be configured via the Board Interrupt
Configuration Register (0x286).

There are four possible modes of operation involving the Watchdog timer:

• Timer only mode

• Reset mode

• Interrupt mode

• Dual stage mode

At power on the Watchdog is not enabled. If not required, it is not necessary to enable it. If re­quired, the bits of the Watchdog Timer Control Register must be set according to the applica­tion requirements. To operate the Watchdog, the mode and time period required must first be
set and then the Watchdog enabled. Once enabled, the Watchdog can only be disabled or the
mode changed by powering down and then up again. To prevent a Watchdog timeout, the
Watchdog must be retriggered before timing out. This is done by writing a ’1’ to the WTR bit. In
the event a Watchdog timeout does occur, the WTE bit is set to ’1’. What transpires after this
depends on the mode selected.

The four operational Watchdog timer modes can be configured by the WMD[1:0] bits, and are
described as follows:

Timer only mode - In this mode the Watchdog is enabled using the required timeout period.
Normally, the Watchdog is retriggered by writing a ’1’ to the WTR bit. In the event a timeout
occurs, the WTE bit is set to ’1’. This bit can then be polled by the application and handled ac­cordingly. To continue using the Watchdog, write a ’1’ to the WTE bit, and then retrigger the
Watchdog using WTR. The WTE bit retains its setting as long as no power down-up is done.
Therefore, this bit may be used to verify the status of the Watchdog.

Reset mode - This mode is used to force a hard reset in the event of a Watchdog timeout. In
addition, the WTE bit is not reset by the hard reset, which makes it available if necessary to
determine the status of the Watchdog prior to the reset.

Interrupt mode - This mode causes the generation of an interrupt in the event of a Watchdog
timeout. The interrupt handling is a function of the application. If required, the WTE bit can be
used to determine if a Watchdog timeout has occurred.

P R E L I M I N A R Y

Dual stage mode - This is a complex mode where in the event of a timeout two things occur: 1)
an interrupt is generated, and 2) the Watchdog is retriggered automatically. In the event a sec­ond timeout occurs immediately following the first timeout, a hard reset will be generated. If the
Watchdog is retriggered normally, operation continues. The interrupt generated at the first tim­eout is available to the application to handle the first timeout if required. As with all of the other
modes, the WTE bit is available for application use.

Page 4 - 14 ID 1027-4487, Rev. 3.0

CP308 Configuration

Table 4-15: Watchdog Timer Control Register (WTIM)

REGISTER NAME WATCHDOG TIMER CONTROL REGISTER (WTIM)

ADDRESS 0x28C

BIT NAME DESCRIPTION

7 WTE Watchdog timer expired status bit

0 = Watchdog timer has not expired
1 = Watchdog timer has expired.

Writing a ’1’ to this bit resets it to 0.

6 - 5 WMD Watchdog mode

00 = Timer only mode
01 = Reset mode
10 = Interrupt mode
11 = Cascaded mode (dual-stage mode)

4 WEN/WTR Watchdog enable/ Watchdog trigger control bit:

0 = Watchdog timer not enabled

Prior to the Watchdog being enabled, this bit is known as WEN.
After the Watchdog is enabled, it is known as WTR. Once the
Watchdog timer has been enabled, this bit cannot be reset to 0.
As long as the Watchdog timer is enabled, it will indicate a ’1’.

1 = Watchdog timer enabled

Writing a ’1’ to this bit causes the Watchdog to be retriggered to
the timer value indicated by bits WTM[3:0].

3 - 0 WTM Watchdog timeout settings:

0000 = 0.125 s
0001 = 0.25 s
0010 = 0.5 s
0011 = 1 s
0100 = 2 s
0101 = 4 s
0110 = 8 s
0111 = 16 s
1000 = 32 s
1001 = 64 s
1010 = 128 s
1011 = 256 s
1100 = 512 s
1101 = 1024 s
1110 = 2048 s
1111 = 4096 s

RESET

VAL UE

0R/W

00 R/W

0R/W

0000 R/W

ACCESS

P R E L I M I N A R Y

ID 1027-4487, Rev. 3.0 Page 4 - 15

Configuration CP308

4.3.13 LED Configuration Register (LCFG)

The LED Configuration Register holds a series of bits defining the onboard configuration for the
front panel General Purpose LEDs.

Table 4-16: LED Configuration Register (LCFG)

REGISTER NAME LED CONFIGURATION REGISTER (LCFG)

ADDRESS 0x290

BIT NAME DESCRIPTION

7 - 4 Res. Reserved 0000 R

3 - 0 LCON General Purpose LED Configuration:

0000 = POST

0001 = General Purpose Mode

0010 - 1111 = R eserve d

1)

2)

RESET
VAL UE

0000 R/W

ACCESS

Regardless of the selected configuration, the General Purpose LEDs are used to signal a num­ber of fatal onboard hardware errors, such as:

LED3: Power good status not reached (red)
LED2: Hardware reset active/not deactivated (red)
LED1: uEFI BIOS boot failure (red)
LED0: uEFI BIOS boot failure (red)

1)

In uEFI BIOS POST mode (default), the LEDs build a binary vector to display uEFI BIOS
POST code during the uEFI BIOS boot phase. In doing so, the higher 4-bit nibble of the 8-bit
uEFI BIOS POST code is displayed followed by the lower nibble followed by a pause. uEFI
BIOS POST code is displayed in general in green color.

LED3: POST bit 3 and bit 7 (green)
LED2: POST bit 2 and bit 6 (green)
LED1: POST bit 1 and bit 5 (green)
LED0: POST bit 0 and bit 4 (green)

For further information on reading the 8-Bit uEFI BIOS POST Code, refer to Chapter 2.3.1.2,

P R E L I M I N A R Y

“General Purpose LEDs”.

2)

Configured for General Purpose Mode, the LEDs are dedicated to functions as follows:

LED3: LED 3, controlled by HOST (red/green)
LED2: LED 2, controlled by HOST (red/green)
LED1: LED 1, controlled by HOST (red/green)
LED0: LED 0, controlled by HOST (red/green)

Page 4 - 16 ID 1027-4487, Rev. 3.0

CP308 Configuration

4.3.14 LED Control Register (LCTRL)

The LED Control Register enables the user to switch on and off the General Purpose LEDs.

Table 4-17: LED Control Register (LCTRL)

REGISTER NAME LED CONTROL REGISTER (LCTRL)

ADDRESS 0x291

BIT NAME DESCRIPTION

7 - 4 LCMD LED command:

0000 = Get LED 0
0001 = Get LED 1
0010 = Get LED 2
0011 = Get LED 3
0100 - 0111 = Reserved
1000 = Set LED 0
1001 = Set LED 1
1010 = Set LED 2
1011 = Set LED 3
1100 - 1111 = R eserved

3 - 0 LCOL LED color:

0000 = Off
0001 = Green
0010 = Red
0011 = Red+Green
0100 - 1111 = Reserv ed

Note ...

This register can only be used if the General Purpose LEDs indicated in the
“LED Configuration Register” (Table 4-16) are configured in General Purpose
Mode.

RESET

VAL UE

0000 R/W

0000 R/W

ACCESS

ID 1027-4487, Rev. 3.0 Page 4 - 17

P R E L I M I N A R Y

Configuration CP308

4.3.15 General Purpose Output Register (GPOUT)

The General Purpose Output Register holds the general purpose output signals of the rear I/O
CompactPCI connector J2. This register can be used only if the CP308 is ordered as a rear I/O
version and the rear I/O GPIO operation is configured through the dedicated rear I/O module
configuration signal on the CompactPCI J2 connector.

Table 4-18: General Purpose Output Register (GPOUT)

REGISTER NAME GENERAL PURPOSE OUTPUT REGISTER (GPOUT)

ADDRESS 0x292

BIT NAME DESCRIPTION

7 - 3 Res. Reserved 00000 R

2 GPO2 General purpose output 2 signal (3.3 V TTL):

0 = Output low
1 = Output high

1 GPO1 General purpose output 1 signal (3.3 V TTL):

0 = Output low
1 = Output high

0 GPO0 General purpose output 0 signal (3.3 V TTL):

0 = Output low
1 = Output high

RESET
VAL UE

0R/W

0R/W

0R/W

ACCESS

P R E L I M I N A R Y

Page 4 - 18 ID 1027-4487, Rev. 3.0

CP308 Configuration

4.3.16 General Purpose Input Register (GPIN)

The General Purpose Input Register holds the general purpose input signals of the rear I/O
CompactPCI connector J2. This register can be used only if the CP308 is ordered as a rear I/O
version and the rear I/O GPIO operation is configured through the dedicated rear I/O module
configuration signal on the CompactPCI J2 connector.

Table 4-19: General Purpose Input Register (GPIN)

REGISTER NAME GENERAL PURPOSE INPUT REGISTER (GPIN)

ADDRESS 0x293

BIT NAME DESCRIPTION

7 - 5 Res. Reserved 000 R

4 GPI4 General purpose input 4 signal (3.3 V TTL):

0 = Input low
1 = Input high

3 GPI3 General purpose input 3 signal (3.3 V TTL):

0 = Input low
1 = Input high

2 GPI2 General purpose input 2 signal (3.3 V TTL):

0 = Input low
1 = Input high

1 GPI1 General purpose input 1 signal (3.3 V TTL):

0 = Input low
1 = Input high

0 GPI0 General purpose input 0 signal (3.3 V TTL):

0 = Input low
1 = Input high

RESET

VAL UE

1R

1R

1R

1R

1R

ACCESS

Note ...

The CP308 provides pull-up resistors on the rear I/O signal pins GPI[4:0], which
leads to the default setting “input high” if the inputs are not connected.

The general purpose inputs support 3.3 V TTL signaling only (not 5V friendly).

ID 1027-4487, Rev. 3.0 Page 4 - 19

P R E L I M I N A R Y

Configuration CP308

4.4 SMC-Specific Registers

The following registers are special registers which the CP308 uses to monitor and configure
the System Management Controller.

4.4.1 SMC Controller Status Register 0 (ICSTA0)

The SMC Controller Status Register 0 holds the bit for selecting the SPI Flash and provides
status information about basic reset and power management settings from the SMC controller.

Table 4-20: SMC Controller Status Register 0 (ICSTA0)

REGISTER NAME SMC CONTROLLER STATUS REGISTER 0 (ICSTA0)

ADDRESS 0x29D

BIT NAME DESCRIPTION

7 HFSEL SPI boot Flash selection:

0 = Select default boot Flash device
1 = Select alternative boot Flash device

6 - 3 Res. Reserved 0000 R

2 HPWRB Power button signal to chipset:

0 = No power button signal to the chipset
1 = Power button signal generated to the chipset

1 HRST Host reset (edge-sensitive reset):

0 = No host reset
1 = Host reset generated

0 HPGD Power-on host reset (cold reset / level-sensitive reset):

0 = No power-on host reset
1 = Power-on host reset generated

Note ...

This register can be configured only by the SMC controller and is set to the

P R E L I M I N A R Y

default values by power-on reset, not by PCI reset.

RESET
VAL UE

0R

0R

0R

0R

ACCESS

Page 4 - 20 ID 1027-4487, Rev. 3.0