Kontron CP306 User Manual

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CP306
3U CompactPCI
Pentium® M Based CPU Board
Manual ID: 26799
Revision Index: 03
Issue Date: February 9, 2006
User Guide
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P R E L I M I N A R Y
Page 3
Preface CP306
Revision History
Publication Title: CP306: 3U CompactPCI Pentium® M Based CPU Board
ID Number: 26799
Rev.
Index
01 Initial issue Oct 2003
02 General update including an additional appendix Aug 2004
03 General update, new lead-free Gigabit Ethernet controller, compli-
ance with RoHS and WEEE
Brief Description of Changes Date of Issue
Feb 09, 2006
Imprint
Kontron Modular Computers GmbH may be contacted via the following:
MAILING ADDRESS TELEPHONE AND E-MAIL
Kontron Modular Computers GmbH +49 (0) 800-SALESKONTRON
Sudetenstraße 7 sales@kontron.com D - 87600 Kaufbeuren Germany
For further information about other Kontron Modular Computers products, please visit our
P R E L I M I N A R Y
Internet web site: www.kontron.com
Disclaimer
Copyright © 2006 Kontron AG. All rights reserved. All data is for information purposes only and not guaranteed for legal purposes. Information has been carefully checked and is believed to be accurate; however, no responsibility is assumed for inaccuracies. Kontron and the Kontron logo and all other trademarks or registered trademarks are the property of their respective own­ers and are recognized. Specifications are subject to change without notice.
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CP306-26799-03-060209-ml
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CP306 Preface
Table of Contents
Revision History ........................................................................................................ ii
Imprint ....................................................................................................................... ii
Disclaimer ................................................................................................................. ii
Table of Contents ..................................................................................................... iii
List of Tables ............................................................................................................ xi
List of Figures ......................................................................................................... xv
Proprietary Note .................................................................................................... xvii
Trademarks ........................................................................................................... xvii
Environmental Protection Statement ..................................................................... xvii
Explanation of Symbols ....................................................................................... xviii
For Your Safety ...................................................................................................... xix
High Voltage Safety Instructions ........................................................................ xix
Special Handling and Unpacking Instructions ................................................... xix
General Instructions on Usage ........................................................................... xx
Two Year Warranty ................................................................................................. xxi
Chapter
1. Introduction ................................................................................................. 1 - 3
1.1 System Overview .................................................................................. 1 - 3
1.2 Board Overview ..................................................................................... 1 - 4
1.2.1 Board Introduction ........................................................................ 1 - 4
1.2.2 Board-Specific Information ........................................................... 1 - 5
1.3 Optional Modules .................................................................................. 1 - 6
1.3.1 CP306-IDE1 Module ..................................................................... 1 - 6
1
P R E L I M I N A R Y
1.3.2 CP-RIO3-03 Rear I/O Module ....................................................... 1 - 6
1.4 System Relevant Information ................................................................ 1 - 6
1.5 Board Diagrams .................................................................................... 1 - 7
1.5.1 Functional Block Diagram ............................................................. 1 - 7
1.5.2 Front Panel ................................................................................... 1 - 8
1.5.3 Board Layouts ............................................................................... 1 - 9
1.6 Technical Specification ...................................................................... 1 - 10
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Preface CP306
1.7 Kontron Software Support ................................................................... 1 - 14
1.8 Standards ............................................................................................ 1 - 15
1.9 Related Publications ............................................................................ 1 - 16
Chapter
2. Functional Description ................................................................................ 2 - 3
2.1 CPU, Memory and Chipset .................................................................... 2 - 3
2.1.1 CPU ............................................................................................... 2 - 3
2.1.2 Memory ......................................................................................... 2 - 5
2.1.3 855GME Chipset Overview ........................................................... 2 - 5
2.1.4 Graphics and Memory Controller Hub (855GME) ......................... 2 - 6
2.1.5 I/O Controller Hub ICH4 ................................................................ 2 - 7
2.2 Peripherals ............................................................................................. 2 - 7
2.2.1 Timer ............................................................................................. 2 - 7
2.2.2 Watchdog Timer ............................................................................ 2 - 7
2.2.3 Battery ........................................................................................... 2 - 8
2.2.4 Reset ............................................................................................. 2 - 8
2.2.5 SMBus Devices ............................................................................. 2 - 9
2.2.6 Thermal Management/System Monitoring .................................... 2 - 9
2
2.2.7 Serial EEPROM ............................................................................ 2 - 9
2.2.8 FLASH Memory ........................................................................... 2 - 10
2.2.8.1 BIOS FLASH (Firmware Hub) ................................................. 2 - 10
P R E L I M I N A R Y
2.2.8.2 CompactFlash Socket ............................................................. 2 - 10
2.2.9 PCI-to-PCI Bridge ....................................................................... 2 - 11
2.3 Board Interfaces .................................................................................. 2 - 12
2.3.1 General Purpose LED Output ..................................................... 2 - 12
2.3.2 USB Interfaces ............................................................................ 2 - 12
2.3.3 Graphics Controller ..................................................................... 2 - 13
2.3.3.1 Video Memory Usage ............................................................. 2 - 13
2.3.3.2 Video Resolution ..................................................................... 2 - 14
2.3.3.3 CRT Interface and Connector J3 ............................................ 2 - 14
2.3.4 Universal Serial Ports (UART) .................................................... 2 - 15
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CP306 Preface
2.3.4.1 Serial Port Interface COM1 and COM2 .................................. 2 - 15
2.3.4.2 Serial Port Configuration ........................................................ 2 - 15
2.3.5 Ethernet ...................................................................................... 2 - 16
2.3.5.1 Fast Ethernet .......................................................................... 2 - 17
2.3.5.2 Gigabit Ethernet ..................................................................... 2 - 18
2.3.6 EIDE Interface ............................................................................ 2 - 19
2.3.7 CompactPCI Bus Interface ......................................................... 2 - 21
2.3.7.1 CompactPCI Connector Keying .............................................. 2 - 21
2.3.7.2 CompactPCI Connectors J1 and J2 Pinouts .......................... 2 - 22
2.3.8 Optional Rear I/O Interface on CompactPCI Connector J2 ........ 2 - 24
2.3.8.1 Optional Rear I/O Interface on CompactPCI Connector J2 .... 2 - 25
2.3.8.2 Rear I/O Configuration ............................................................ 2 - 27
2.3.9 Extension Connectors J10 and J11 ............................................ 2 - 27
2.3.9.1 I/O Extension Connector J10 .................................................. 2 - 28
2.3.9.2 PCI Extension Connector J11 ................................................ 2 - 28
Chapter
3. Installation .................................................................................................. 3 - 3
3.1 Safety Requirements ............................................................................. 3 - 3
3.2 CP306 Initial Installation Procedures .................................................... 3 - 4
3.3 Standard Removal Procedures ............................................................. 3 - 5
3.4 Hot Swap Procedures ........................................................................... 3 - 5
3.5 Installation of CP306 Peripheral Devices .............................................. 3 - 5
3.5.1 CompactFlash Installation ............................................................ 3 - 5
3.5.2 USB Device Installation ................................................................ 3 - 6
3.5.3 Rear I/O Device Installation .......................................................... 3 - 6
3
P R E L I M I N A R Y
3.5.4 Battery Replacement .................................................................... 3 - 6
3.5.5 Hard Disk Installation .................................................................... 3 - 6
3.6 Software Installation .............................................................................. 3 - 7
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Preface CP306
Chapter
4. Configuration ............................................................................................... 4 - 3
4.1 Jumper Description ................................................................................ 4 - 3
4.1.1 CompactFlash Configuration ......................................................... 4 - 3
4.1.2 Clearing BIOS CMOS Setup ......................................................... 4 - 3
4.1.3 Shorting Chassis GND (Shield) to Logic GND .............................. 4 - 3
4.2 Interrupts ................................................................................................ 4 - 4
4.3 Onboard PCI Interrupt Routing .............................................................. 4 - 5
4.4 Memory Map .......................................................................................... 4 - 5
4.4.1 Memory Map for the 1st Megabyte ............................................... 4 - 5
4.4.2 I/O Address Map ........................................................................... 4 - 6
4.5 Special Registers Description ................................................................ 4 - 7
4.5.1 Watchdog ...................................................................................... 4 - 7
4.5.2 Watchdog Trigger .......................................................................... 4 - 7
4.5.3 Watchdog Timer ........................................................................... 4 - 8
4
4.5.4 Watchdog, CompactPCI Interrupt Configuration Register ............ 4 - 9
4.5.5 I/O Status .................................................................................... 4 - 10
4.5.6 I/O Configuration Register ........................................................... 4 - 11
4.5.7 Board Version ............................................................................. 4 - 12
4.5.8 Hardware Index ........................................................................... 4 - 12
4.5.9 Logic Version .............................................................................. 4 - 12
P R E L I M I N A R Y
4.5.10 LED Control ................................................................................. 4 - 13
Chapter
5. Phoenix BIOS ............................................................................................. 5 - 3
5.1 The Setup Guide .................................................................................... 5 - 3
5.1.1 Introduction to Setup ..................................................................... 5 - 3
5.1.2 The Main Menu ............................................................................. 5 - 4
5.1.3 The Menu Bar ............................................................................... 5 - 4
5
5.1.4 The Legend Bar ............................................................................ 5 - 5
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CP306 Preface
5.1.5 The Field Help Window ................................................................. 5 - 6
5.1.6 The General Help Window ............................................................ 5 - 6
5.1.7 Main Menu Selections .................................................................. 5 - 7
5.1.8 Master and Slave Sub-Menus ...................................................... 5 - 7
5.2 The Advanced Menu ........................................................................... 5 - 10
5.2.1 Advanced Chipset Control .......................................................... 5 - 11
5.2.2 PCI/PNP Configuration ............................................................... 5 - 12
5.2.2.1 PCI/PNP ISA IRQ Resource Exclusion .................................. 5 - 13
5.2.3 Memory Cache ........................................................................... 5 - 14
5.2.4 I/O Device Configuration Menu 4 HP Version ............................ 5 - 16
5.2.5 I/O Device Configuration Menu 8 HP Version ............................ 5 - 18
5.2.6 Keyboard Features ..................................................................... 5 - 21
5.2.7 Miscellaneous ............................................................................. 5 - 22
5.3 The Security Menu .............................................................................. 5 - 23
5.4 The Power Menu ................................................................................. 5 - 24
5.5 Boot Menu ........................................................................................... 5 - 25
5.6 OEM Features Menu ........................................................................... 5 - 27
5.6.1 PC Health ................................................................................... 5 - 29
5.6.2 Watchdog Settings ...................................................................... 5 - 30
5.6.3 Temperature Management ......................................................... 5 - 32
5.6.4 Front-Rear I/O ............................................................................. 5 - 33
5.6.5 System Info ................................................................................. 5 - 34
5.7 The Exit Menu ..................................................................................... 5 - 35
5.7.1 Saving Values ............................................................................. 5 - 35
5.7.2 Exit Discarding Changes ............................................................ 5 - 35
5.7.3 Load Setup Defaults ................................................................... 5 - 36
5.7.4 Discard Changes ........................................................................ 5 - 36
5.7.5 Save Changes ............................................................................ 5 - 36
P R E L I M I N A R Y
5.8 PhoenixBIOS Messages ..................................................................... 5 - 37
5.9 Phoenix Phlash16 ............................................................................... 5 - 42
5.9.1 Installation ................................................................................... 5 - 42
5.9.2 Create the Crisis Recovery Diskette ........................................... 5 - 42
5.9.3 Updating the Crisis Recovery Diskette ....................................... 5 - 43
5.9.4 Executing Phoenix Phlash16 ...................................................... 5 - 43
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Preface CP306
5.9.4.1 Command Line Mode .............................................................. 5 - 43
5.9.5 JRC JUMPtec® Remote Control ................................................. 5 - 45
5.10 POST Errors and Beep Codes ............................................................ 5 - 46
5.10.1 Recoverable POST Errors .......................................................... 5 - 46
5.10.2 Terminal POST Errors ................................................................. 5 - 46
5.10.3 Test Points and Beep Codes ...................................................... 5 - 46
Chapter
6. Power Considerations ................................................................................. 6 - 3
6.1 System Power ........................................................................................ 6 - 3
6.2 CP306 Voltage Ranges ......................................................................... 6 - 3
6.3 Backplane Requirements ....................................................................... 6 - 4
6.4 Power Supply Units ............................................................................... 6 - 4
6.4.1 Voltage Ramp ............................................................................... 6 - 4
6.4.2 Voltage Sequencing Requirements ............................................... 6 - 4
6.4.3 Rise Time Diagram ....................................................................... 6 - 5
6.4.4 Recommended Operating Conditions ........................................... 6 - 5
6.4.5 Supply Voltage Regulation ............................................................ 6 - 6
6.5 Power Consumption of the CP306
6.5.1 Power Consumption Using Pentium® M and Real Applications ... 6 - 7
6.5.2 Power Consumption Using Pentium® M and Testing Application 6 - 8
6.5.3 Power Consumption Using Celeron® M and Real Applications .... 6 - 9
6
.............................................................. 6 - 6
P R E L I M I N A R Y
6.5.4 Power Consumption Using Celeron® M and Testing Application 6 - 10
6.6 Power Consumption of CP306 Accessories ........................................ 6 - 11
6.7 Start-Up Current of the CP306 .................................................................. 6 - 11
Chapter
7. System Considerations ............................................................................... 7 - 3
7.1 Thermal Management ............................................................................ 7 - 3
7.1.1 Passive Thermal Regulation ......................................................... 7 - 3
7.1.1.1 CPU Internal Thermal Supervision ........................................... 7 - 3
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CP306 Preface
7.1.1.2 CPU External Thermal Supervision .......................................... 7 - 4
7.1.1.3 CPU Emergency Thermal Supervision ..................................... 7 - 4
7.1.1.4 Thermal Management Recommendations ............................... 7 - 5
7.1.2 Active Thermal Regulation ............................................................ 7 - 5
7.1.2.1 Heat Sinks ................................................................................ 7 - 5
7.1.2.2 Forced Air Flow ........................................................................ 7 - 6
7.1.2.3 Peripherals ............................................................................... 7 - 8
Annex
A. CP306-IDE1 ............................................................................................... A - 3
A.1 Overview ............................................................................................... A - 3
A.2 Technical Specifications ........................................................................ A - 3
A.3 CP306-IDE1 Module Functional Block Diagram ................................... A - 4
A.4 CP306-IDE1 Module Front Panel .......................................................... A - 5
A.5 CP306-IDE1 Module Layout ................................................................. A - 6
A.5.1 CP306-IDE1 Module Layout ......................................................... A - 6
A.6 Module Interfaces (Front Panel and Onboard) ...................................... A - 7
A.6.1 Keyboard/Mouse Interface ............................................................ A - 7
A.6.1.1 Keyboard Connector CON6 Pinout .......................................... A - 8
A.6.2 Universal Serial Ports (UART) ...................................................... A - 8
A.6.2.1 Serial Port Connectors CON2 and CON5 Pinouts ................... A - 9
A.6.2.2 Serial Port Configuration ........................................................ A - 10
A.6.3 Parallel Port Interface ................................................................. A - 10
A
P R E L I M I N A R Y
A.6.3.1 Parallel Port Connector CON1 Pinout .................................... A - 12
A.6.4 EIDE Interface (Secondary Port) ................................................ A - 12
A.6.4.1 Onboard EIDE Connector CON4 Pinout ................................ A - 15
A.6.4.2 EIDE Connectors CON3 and CON9 Pinouts .......................... A - 16
A.6.5 Floppy Drive Interface ................................................................. A - 17
A.6.6 I/O Extension Interface Connector CON10 ................................. A - 19
A.6.7 Speaker Connector J3 ................................................................ A - 19
A.6.8 Reserved Jumpers ...................................................................... A - 19
A.7 Jumper Description ............................................................................. A - 20
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Preface CP306
A.7.1 Shorting Chassis GND (Shield) to Logic GND ........................... A - 20
A.7.2 Serial Port Setting ...................................................................... A - 20
A.7.2.1 RS422 and RS485 COM1 Termination .................................. A - 21
A.7.2.2 RS422 and RS485 COM2 Termination .................................. A - 21
Annex
B. CP-RIO3-03 Rear I/O ................................................................................. B - 3
B.1 Overview ............................................................................................... B - 3
B.2 Front Panels ......................................................................................... B - 4
B.3 Module Layout: 4HP and 8HP Versions ............................................... B - 5
B.4 Module Interfaces ................................................................................. B - 6
B.4.1 USB Interfaces ............................................................................. B - 6
B.4.1.1 USB Connectors CON3/CON4 Pinout .................................... B - 6
B.4.2 VGA Interface ............................................................................... B - 7
B.4.2.1 VGA Connector CON6 Pinout .................................................. B - 7
B.4.3 Fast Ethernet Interface ................................................................. B - 8
B.4.3.1 RJ45 Connector CON2 Pinout ................................................. B - 8
B.4.4 Serial Port Interfaces .................................................................... B - 8
B.4.4.1 Serial Port Connectors CON8 and CON10 Pinouts ................. B - 9
B.4.5 Fan Control Interface (Optional) ................................................... B - 9
B
B.4.5.1 Fan Control Connector CON9 Pinout ...................................... B - 9
B.4.6 EIDE Interface .............................................................................. B - 9
P R E L I M I N A R Y
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B.4.6.1 EIDE Connector CON7 Pinout ................................................. B - 9
B.4.7 Rear I/O interface on Compact PCI Connector CON1 ............... B - 11
B.5 Jumper Setting .................................................................................... B - 13
B.5.1 COM Port Configuration ............................................................. B - 13
B.5.1.1 COM1 Configuration .............................................................. B - 13
B.5.1.2 COM2 Configuration .............................................................. B - 13
B.5.2 Shorting Chassis GND (Shield) to Logic GND ........................... B - 13
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CP306 Preface
List of Tables
1-1 System Relevant Information ................................................................... 1 - 6
1-2 CP306 4HP Version Main Specifications ............................................... 1 - 10
1-1 Standards ............................................................................................... 1 - 15
1-2 Related Publications ............................................................................. 1 - 16
2-1 Supported Intel® Pentium® M Processors on the CP306 ....................... 2 - 4
2-2 Maximum Power Dissipation of Intel® Pentium® M (CPU only) .............. 2 - 4
2-3 Intel® Pentium® M Core Voltage in the Various Frequency Modes ........ 2 - 4
2-4 Supported Intel® Celeron® M Processors on the CP306 ........................ 2 - 5
2-5 Maximum Power Dissipation of Intel® Celeron® M (CPU only) .............. 2 - 5
2-6 SMBus Device Addresses ....................................................................... 2 - 9
2-7 EEPROM Address Map ........................................................................... 2 - 9
2-8 CompactFlash Connector J8 Pinout ...................................................... 2 - 11
2-9 USB Connectors J4 and J5 Pinout ........................................................ 2 - 13
2-10 Partial List of Display Modes Supported ................................................ 2 - 14
2-11 CRT Connector J3 Pinout ...................................................................... 2 - 15
2-12 COM Port Configuration Matrix .............................................................. 2 - 15
2-13 RJ45 Connector J6-A Pinout ................................................................. 2 - 17
2-14 Pinouts of J6-B Based on the Implementation ....................................... 2 - 18
2-15 J7 (Secondary EIDE) Pinout .................................................................. 2 - 20
2-16 Coding Key Colors ................................................................................ 2 - 21
2-17 CompactPCI Bus Connector J1 Pinout ................................................. 2 - 22
2-18 64-bit CompactPCI Bus Connector J2 Pinout ....................................... 2 - 23
2-19 Rear I/O CompactPCI Bus Connector J2 Pinout ................................... 2 - 25
4-1 CompactFlash Configuration ................................................................... 4 - 3
4-2 Clearing BIOS CMOS Setup .................................................................... 4 - 3
4-3 Shorting Chassis GND (Shield) to Logic GND ......................................... 4 - 3
P R E L I M I N A R Y
4-4 Interrupt Setting ....................................................................................... 4 - 4
4-5 PCI Interrupt Routing ............................................................................... 4 - 5
4-6 Memory Map for the 1st Megabyte .......................................................... 4 - 5
4-7 I/O Address Map ...................................................................................... 4 - 6
4-8 Watchdog Timer ....................................................................................... 4 - 8
4-9 Watchdog, CompactPCI Interrupt Configuration Register ....................... 4 - 9
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Preface CP306
4-10 I/O Status Register ................................................................................. 4 - 10
4-11 I/O Configuration Register ..................................................................... 4 - 11
4-12 Board ID Register .................................................................................. 4 - 12
4-13 Hardware Index Register ....................................................................... 4 - 12
4-14 Logic Version Register .......................................................................... 4 - 12
4-15 LED Control Register ............................................................................ 4 - 13
5-1 The Menu Bar ........................................................................................... 5 - 4
5-2 The Legend Bar ........................................................................................ 5 - 5
5-3 Main Menu Selections .............................................................................. 5 - 7
5-4 Master/Slave Sub-Menu Options ............................................................. 5 - 9
5-5 Advanced Chipset Control Options ........................................................ 5 - 11
5-6 PCI/PNP Configuration Options ............................................................. 5 - 12
5-7 PCI/PNP ISA IRQ Resource Exclusion Options ..................................... 5 - 13
5-8 Memory Cache Configuration Options ................................................... 5 - 15
5-9 I/O Device Configuration Options 4 HP Version ..................................... 5 - 17
5-10 I/O Device Configuration Options 8 HP Version ..................................... 5 - 19
5-11 Keyboard Features Options ................................................................... 5 - 21
5-12 Miscellaneous Options ........................................................................... 5 - 22
5-13 Security Menu Options ........................................................................... 5 - 23
5-14 Power Menu Options .............................................................................. 5 - 24
5-15 OEM Features Options ........................................................................... 5 - 28
5-16 SpeedStep Frequency Table .................................................................. 5 - 29
5-17 Watchdog Settings Options .................................................................... 5 - 31
5-18 Temperature Management Options ........................................................ 5 - 32
P R E L I M I N A R Y
5-19 Front-Rear I/O Options ........................................................................... 5 - 33
5-20 System Info Options ............................................................................... 5 - 34
5-21 COM Ports Pinout ................................................................................... 5 - 45
5-22 Checkpoint and Beep Codes .................................................................. 5 - 47
6-1 Absolute Maximum Ratings ...................................................................... 6 - 3
6-2 DC Operational Input Voltage Ranges ..................................................... 6 - 3
6-3 Input Voltage Characteristics .................................................................... 6 - 5
6-4 Power Consumption BIOS Pentium® M ................................................... 6 - 7
6-5 Power Consumption Win 2000 IDLE Mode Pentium® M ......................... 6 - 7
6-6 Power Consumption Win 2000 100% CPU Usage Pentium® M .............. 6 - 7
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CP306 Preface
6-7 Power Consumption Win 2000 3D Mark Benchmark Pentium® M .......... 6 - 7
6-8 Power Consumption Win 2000 High Power Tool Pentium® M ................ 6 - 8
6-9 Power Consumption BIOS Celeron® M ................................................... 6 - 9
6-10 Power Consumption Win 2000 IDLE Mode Celeron® M ......................... 6 - 9
6-11 Power Consumption Win 2000 100% CPU Usage Celeron® M .............. 6 - 9
6-12 Power Consumption Win 2000 3D Mark Benchmark Celeron® M .......... 6 - 9
6-13 Power Consumption Win 2000 High Power Tool Celeron® M ............... 6 - 10
6-14 Power Consumption Table for CP306 Accessories ............................... 6 - 11
6-15 Start-Up Current of the CP306 with Pentium® M Processors ............... 6 - 11
6-16 Start-Up Current of the CP306 with Celeron® M Processors ................ 6 - 11
A-1 CP306-IDE1 Module Main Specifications ................................................ A - 3
A-2 Keyboard Connector CON6 Pinout .......................................................... A - 8
A-3 Serial Port Connectors CON2 and CON5 Pinouts ................................... A - 9
A-4 26-Pin MDR Connector Pinout ............................................................... A - 12
A-5 Pinout of the AT 44-Pin Connector ........................................................ A - 15
A-6 Pinouts of EIDE Connectors CON3 and CON9 ..................................... A - 16
A-7 Floppy Drive Connector CON7 Pinout ................................................... A - 18
A-8 Shorting Chassis GND (Shield) to Logic GND ....................................... A - 20
A-9 Jumper Setting to Configure COM1 ....................................................... A - 20
A-10 Jumper Setting to Configure COM2 ....................................................... A - 20
A-11 Jumper Settings for RS422 RXD Termination (COM1) .......................... A - 21
A-12 Jumper Settings for RS422 TXD and RS485 Termination (COM1) ....... A - 21
A-13 Jumper Settings for RS422 RXD Termination (COM2) .......................... A - 21
A-14 Jumper Settings for RS422 TXD and RS485 Termination (COM2) ....... A - 21
B-1 USB Connector CON3/CON4 Pinout ....................................................... B - 6
B-2 VGA Connector CON6 Pinout .................................................................. B - 7
B-3 RJ45 Connector CON2 Pinout ................................................................. B - 8
B-4 Serial Port Connectors CON8 and CON10 Pinouts ................................. B - 9
P R E L I M I N A R Y
B-5 Fan Control Connector CON9 Pinout ...................................................... B - 9
B-6 Pinout of AT Standard EIDE Connector CON7 ...................................... B - 10
B-7 Rear I/O CompactPCI Bus Connector CON1 Pinout ............................. B - 11
B-8 COM1 Configuration using Jumper J3 ................................................... B - 13
B-9 COM2 Configuration using Jumper J2 ................................................... B - 13
B-10 Shorting Chassis GND (Shield) to Logic GND ....................................... B - 13
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Preface CP306
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P R E L I M I N A R Y
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CP306 Preface
List of Figures
1-1 CP306 Functional Block Diagram ............................................................ 1 - 7
1-2 CP306 4HP Front Panel .......................................................................... 1 - 8
1-3 CP306 Board Layout (Front View) ........................................................... 1 - 9
1-4 CP306 Board Layout (Reverse View) ...................................................... 1 - 9
2-1 855GME Chipset Functional Block Diagram ............................................ 2 - 6
2-2 CompactFlash Socket Connector J8 ..................................................... 2 - 10
2-3 USB Connectors J4 and J5 .................................................................... 2 - 12
2-4 D-SUB CRT Connector J3 ..................................................................... 2 - 14
2-5 Dual Fast Ethernet Connector J6 .......................................................... 2 - 16
2-6 Fast Ethernet Controller J6-A ................................................................ 2 - 17
2-7 EIDE Interface Connector J7 ................................................................. 2 - 20
2-8 CPCI Connectors J1/J2 ......................................................................... 2 - 21
2-9 Extension Connectors J10 and J11 ....................................................... 2 - 28
5-1 Main Menu - Screen Display .................................................................... 5 - 4
5-2 Master/Slave Sub-Menu - Screen Display ............................................... 5 - 8
5-3 Advanced Menu - Screen Display .......................................................... 5 - 10
5-4 Advanced Chipset Control - Screen Display .......................................... 5 - 11
5-5 PCI/PNP Configuration - Screen Display ............................................... 5 - 12
5-6 PCI/PNP ISA IRQ Resource Exclusion - Screen Display ...................... 5 - 13
5-7 Memory Cache - Screen Display ........................................................... 5 - 14
5-8 I/O Device Configuration Menu 4 HP Version - Screen Display ............ 5 - 16
5-9 I/O Device Configuration Menu 8 HP Version - Screen Display ............ 5 - 18
5-10 Keyboard Features Menu - Screen Display .......................................... 5 - 21
5-11 Miscellaneous Menu - Screen Display .................................................. 5 - 22
5-12 Security Menu - Screen Display ............................................................. 5 - 23
5-13 Power Menu - Screen Display ............................................................... 5 - 24
P R E L I M I N A R Y
5-14 Boot Menu - Screen Display .................................................................. 5 - 25
5-15 OEM Features Menu - Screen Display .................................................. 5 - 27
5-16 PC Health - Screen Display ................................................................... 5 - 29
5-17 Watchdog Settings - Screen Display .................................................... 5 - 30
5-18 Temperature Management - Screen Display ........................................ 5 - 32
5-19 Front-Rear I/O - Screen Display ........................................................... 5 - 33
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Preface CP306
5-20 System Info - Screen Display ................................................................ 5 - 34
5-21 Exit Menu - Screen Display .................................................................... 5 - 35
6-1 Voltage Ramp of the CP3-SVE180 AC Power Supply ............................. 6 - 5
7-1 Mobile Pentium® M Temperature Vs. Airspeed Graph. ............................... 7 - 6
7-2 Mobile Celeron® M Temperature Vs. Airspeed Graph ................................. 7 - 7
A-1 CP306IDE1 Module Functional Block Diagram ....................................... A - 4
A-2 CP306-IDE1 Module Front Panel ............................................................ A - 5
A-3 CP306-IDE1 Module Layout (Front Side) ................................................ A - 6
A-4 CP306-IDE1 Module Layout (Reverse Side) ........................................... A - 6
A-5 Keyboard/Mouse Connector .................................................................... A - 7
A-6 Adapter for Connecting Mouse/Keyboard via PS/2 ................................. A - 7
A-7 PC-Compatible D-SUB Serial Interface Connectors CON2 and CON5 .. A - 9
A-8 Serial Port Configuration Diagram ......................................................... A - 10
A-9 PC-Compatible Parallel Interface Connector CON1 ............................... A - 11
A-10 Front Side EIDE Interface Connectors CON3 and CON4 .................... A - 13
A-11 Rear Side EIDE Interface Connector CON9 ......................................... A - 13
A-12 Floppy Drive Interface Connector CON7 .............................................. A - 17
A-13 I/O Extension Interface Connector CON10 ........................................... A - 19
B-1 CP-RIO3-03 Front Panels, 4HP and 8HP Versions ................................ B - 4
B-2 CP-RIO3-03 Module Layout, 4HP Version ............................................. B - 5
B-3 CP-RIO3-03 Module Layout, 8HP Version ............................................. B - 5
B-4 USB Connector CON3/CON4 ................................................................. B - 6
B-5 D-SUB VGA Connector ........................................................................... B - 7
B-6 Ethernet/Fast Ethernet Connector ........................................................... B - 8
P R E L I M I N A R Y
B-7 PC-Compatible D-SUB Serial Interface ................................................... B - 8
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CP306 Preface
Proprietary Note
This document contains information proprietary to Kontron Modular Computers GmbH. It may not be copied or transmitted by any means, disclosed to others, or stored in any retrieval sys­tem or media without the prior written consent of Kontron Modular Computers GmbH or one of its authorized agents.
The information contained in this document is, to the best of our knowledge, entirely correct. However, Kontron Modular Computers GmbH cannot accept liability for any inaccuracies or the consequences thereof, or for any liability arising from the use or application of any circuit, product, or example shown in this document.
Kontron Modular Computers GmbH reserves the right to change, modify, or improve this doc­ument or the product described herein, as seen fit by Kontron Modular Computers GmbH without further notice.
Trademarks
Kontron Modular Computers GmbH, the PEP logo and, if occurring in this manual, “CXM” are trademarks owned by Kontron Modular Computers GmbH, Kaufbeuren (Germany). In addi­tion, this document may include names, company logos and trademarks, which are registered trademarks and, therefore, proprietary to their respective owners.
Environmental Protection Statement
This product has been manufactured to satisfy environmental protection requirements where possible. Many of the components used (structural parts, printed circuit boards, connectors, batteries, etc.) are capable of being recycled.
Final disposition of this product after its service life must be accomplished in accordance with applicable country, state, or local laws or regulations.
P R E L I M I N A R Y
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Preface CP306
Explanation of Symbols
Caution, Electric Shock!
This symbol and title warn of hazards due to electrical shocks (> 60V) when touching products or parts of them. Failure to observe the pre­cautions indicated and/or prescribed by the law may endanger your life/health and/or result in damage to your material.
Please refer also to the section “High Voltage Safety Instructions” on the following page.
Warning, ESD Sensitive Device!
This symbol and title inform that electronic boards and their compo­nents are sensitive to static electricity. Therefore, care must be taken during all handling operations and inspections of this product, in order to ensure product integrity at all times.
Please read also the section “Special Handling and Unpacking Instructions” on the following page.
Warning!
This symbol and title emphasize points which, if not fully understood and taken into consideration by the reader, may endanger your health and/or result in damage to your material.
Note ...
This symbol and title emphasize aspects the reader should read through carefully for his or her own advantage.
P R E L I M I N A R Y
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CP306 Preface
For Your Safety
Your new Kontron product was developed and tested carefully to provide all features neces­sary to ensure its compliance with electrical safety requirements. It was also designed for a long fault-free life. However, the life expectancy of your product can be drastically reduced by improper treatment during unpacking and installation. Therefore, in the interest of your own safety and of the correct operation of your new Kontron product, you are requested to conform with the following guidelines.
High Voltage Safety Instructions
Warning!
All operations on this device must be carried out by sufficiently skilled personnel only.
Caution, Electric Shock!
Before installing your new Kontron product into a system always ensure that your mains power is switched off. This applies also to the installation of piggybacks.
Serious electrical shock hazards can exist during all installation, repair and maintenance operations with this product. Therefore, always unplug the power cable and any other cables which provide external voltages before performing work.
Special Handling and Unpacking Instructions
ESD Sensitive Device!
Electronic boards and their components are sensitive to static elec­tricity. Therefore, care must be taken during all handling operations and inspections of this product, in order to ensure product integrity at all times.
Do not handle this product out of its protective enclosure while it is not used for opera­tional purposes unless it is otherwise protected.
Whenever possible, unpack or pack this product only at EOS/ESD safe work stations. Where a safe work station is not guaranteed, it is important for the user to be electrically discharged before touching the product with his/her hands or tools. This is most easily done by touching a metal part of your system housing.
It is particularly important to observe standard anti-static precautions when changing piggybacks, ROM devices, jumper settings etc. If the product contains batteries for RTC or memory backup, ensure that the board is not placed on conductive surfaces, includ­ing anti-static plastics or sponges. They can cause short circuits and damage the batter­ies or conductive circuits on the board.
P R E L I M I N A R Y
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Preface CP306
General Instructions on Usage
In order to maintain Kontron’s product warranty, this product must not be altered or mod­ified in any way. Changes or modifications to the device, which are not explicitly approved by Kontron Modular Computers GmbH and described in this manual or received from Kontron’s Technical Support as a special handling instruction, will void your warranty.
This device should only be installed in or connected to systems that fulfill all necessary technical and specific environmental requirements. This applies also to the operational temperature range of the specific board version, which must not be exceeded. If batter­ies are present, their temperature restrictions must be taken into account.
In performing all necessary installation and application operations, please follow only the instructions supplied by the present manual.
Keep all the original packaging material for future storage or warranty shipments. If it is necessary to store or ship the board, please re-pack it as nearly as possible in the man­ner in which it was delivered.
Special care is necessary when handling or unpacking the product. Please consult the special handling and unpacking instruction on the previous page of this manual.
P R E L I M I N A R Y
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CP306 Preface
Two Year Warranty
Kontron Modular Computers GmbH grants the original purchaser of Kontron’s products a TWO
YEAR
LIMITED HARDWARE WARRANTY as described in the following. However, no other warran-
ties that may be granted or implied by anyone on behalf of Kontron are valid unless the con­sumer has the express written consent of Kontron Modular Computers GmbH.
Kontron Modular Computers GmbH warrants their own products, excluding software, to be free from manufacturing and material defects for a period of 24 consecutive months from the date of purchase. This warranty is not transferable nor extendible to cover any other users or long-term storage of the product. It does not cover products which have been modified, altered or repaired by any other party than Kontron Modular Computers GmbH or their autho­rized agents. Furthermore, any product which has been, or is suspected of being damaged as a result of negligence, improper use, incorrect handling, servicing or maintenance, or which has been damaged as a result of excessive current/voltage or temperature, or which has had its serial number(s), any other markings or parts thereof altered, defaced or removed will also be excluded from this warranty.
If the customer’s eligibility for warranty has not been voided, in the event of any claim, he may return the product at the earliest possible convenience to the original place of purchase, together with a copy of the original document of purchase, a full description of the application the product is used on and a description of the defect. Pack the product in such a way as to ensure safe transportation (see our safety instructions).
Kontron provides for repair or replacement of any part, assembly or sub-assembly at their own discretion, or to refund the original cost of purchase, if appropriate. In the event of repair, refunding or replacement of any part, the ownership of the removed or replaced parts reverts to Kontron Modular Computers GmbH, and the remaining part of the original guarantee, or any new guarantee to cover the repaired or replaced items, will be transferred to cover the new or repaired items. Any extensions to the original guarantee are considered gestures of goodwill, and will be defined in the “Repair Report” issued by Kontron with the repaired or replaced item.
Kontron Modular Computers GmbH will not accept liability for any further claims resulting directly or indirectly from any warranty claim, other than the above specified repair, replace­ment or refunding. In particular, all claims for damage to any system or process in which the product was employed, or any loss incurred as a result of the product not functioning at any given time, are excluded. The extent of Kontron Modular Computers GmbH liability to the cus­tomer shall not exceed the original purchase price of the item for which the claim exists.
Kontron Modular Computers GmbH issues no warranty or representation, either explicit or implicit, with respect to its products’ reliability, fitness, quality, marketability or ability to fulfil any particular application or purpose. As a result, the products are sold “as is,” and the responsibility to ensure their suitability for any given task remains that of the purchaser. In no event will Kontron be liable for direct, indirect or consequential damages resulting from the use of our hardware or software products, or documentation, even if Kontron were advised of the possibility of such claims prior to the purchase of the product or during any period since the date of its purchase.
P R E L I M I N A R Y
Please remember that no Kontron Modular Computers GmbH employee, dealer or agent is authorized to make any modification or addition to the above specified terms, either verbally or in any other form, written or electronically transmitted, without the company’s consent.
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Preface CP306
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P R E L I M I N A R Y
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CP306 Introduction
Chapter 1
1
Introduction
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P R E L I M I N A R Y
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Introduction CP306
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P R E L I M I N A R Y
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CP306 Introduction
1. Introduction
1.1 System Overview
The CompactPCI board described in this manual operates with the PCI bus architecture to support additional I/O and memory-mapped devices as required by various industrial applications. For detailed information concerning the CompactPCI standard, please consult the complete Peripheral Component Interconnect (PCI) and CompactPCI Specifications. For further information regarding these standards and their use, visit the home page of the
PCI Industrial Computer Manufacturers Group (PICMG).
Many system-relevant CompactPCI features that are specific to Kontron Modular Computers CompactPCI systems may be found described in the Kontron CompactPCI System Manual. Due to its size, this manual cannot be downloaded via the internet. Please refer to the section “Related Publications” at the end of this chapter for the relevant ordering information.
The CompactPCI System Manual includes the following information:
• Common information that is applicable to all system components, such as safety information, warranty conditions, standard connector pinouts etc.
• All the information necessary to combine Kontron’s racks, boards, backplanes, power supply units and peripheral devices in a customized CompactPCI system, as well as configuration examples.
• Data on rack dimensions and configurations as well as information on mechanical and electrical rack characteristics.
• Information on the distinctive features of Kontron CompactPCI boards, such as functionality, hot swap capability. In addition, an overview is given for all existing Kontron CompactPCI boards with links to the relating data sheets.
• Generic information on the Kontron CompactPCI backplanes, such as the slot assignment, PCB form factor, distinctive features, clocks, power supply connectors and signalling environment, as well as an overview of the Kontron CompactPCI standard backplane family.
• Generic information on the Kontron CompactPCI power supply units, such as the input/ output characteristics, redundant operation and distinctive features, as well as an overview of the Kontron CompactPCI standard power supply unit family.
P R E L I M I N A R Y
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Introduction CP306
1.2 Board Overview
1.2.1 Board Introduction
The CP306 is a lead-free CompactPCI system controller board. It has been designed to support all Intel® Pentium® M processors with 400 MHz PSB (Processor Side Bus) in 479 µFCBGA packaging.
A key performance factor of the Intel® Pentium® M processor is the newly designed CPU core with an integrated 64 kB L1 and up to 2048 kB L2 cache, which provide more CPU power per MHz than an Intel® Pentium® 4 processor.
The Pentium® M has the advantage of very low power consumption, whilst at the same time providing impressive processor speeds ranging from 1.1 GHz through 1.8 GHz with a Processor Side Bus (PSB) running at 400 MHz. The CP306 utilizes the Intel® 855GME and I/O Controller Hub 4 (ICH4) chipset.
The board includes up to 1 GB of soldered Double Data Rate (DDR) memory with Error Checking and Correcting (ECC) for rugged environments. The memory operates at 266 MHz (PC2300) and at 333 MHz (PC2700).
The CP306 offers more features and expandability than other CompactPCI boards in its class. The board comes with an onboard Ultra ATA/100 interface, one Gigabit Ethernet port (Intel® 82541PI), one Fast Ethernet port (integrated in the chipset), two USB 2.0 ports on the front panel, one CompactFlash type II socket and a built-in Intel 3D Graphics accelerator with up to 64 MB of shared memory for enhanced graphics performance with a VGA CRT-display interface. Several onboard connectors provide flexible 8HP expandability.
The board supports one configurable 32-bit, 33 MHz, CompactPCI interface.
The optional CP306-IDE1 module has been designed to make available all the legacy PC I/O ports. It includes two COM ports, a PS/2 keyboard and mouse port, a parallel port, floppy, a 2.5" onboard hard disk interface and a 2nd IDE connector, i.e., for a CD-ROM.
Designed for stability and packaged in a rugged format, the board fits into all applications situated in industrial environments, including I/O intensive applications where only one slot is available for the CPU, making it a perfect core technology for long life applications. Components which have high temperature tolerance have been selected from embedded technology programs, and therefore offer long-term availability.
P R E L I M I N A R Y
The board is offered with the Microsoft® Windows® 2000, Windows® XP and Windows® XP Embedded operating systems. Kontron further supports, as a standard, Linux and VxWorks®. Please contact Kontron Modular Computers for further information concerning other operating systems.
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CP306 Introduction
1.2.2 Board-Specific Information
The CP306 is a CompactPCI Pentium® M based single-board computer specifically designed for use in highly integrated platforms with solid mechanical interfacing for a wide range of industrial environment applications.
Some of the CP306's outstanding features are:
• Intel® Pentium® M microprocessor up to 1.8 GHz
• Up to 2048 kB L2 cache on-die, running at CPU speed
• 400 MHz processor system bus
• 855GME and 82801 (ICH4) chipset
• Up to 1024 MB DDR SDRAM memory running at 333 MHz (PC2700)
• Integrated 3D high performance VGA controller
• Analog display support up to 2048 x 1536 pixels at 16-bit and 60 Hz
• One Fast Ethernet interface (82559-style)
• One Gigabit Ethernet interface (82541PI)
• Two EIDE Ultra ATA/100 interfaces
• Onboard CompactFlash type II socket (True IDE with DMA)
• Four USB ports
• Two Front USB 2.0
• Two Rear I/O USB 2.0
• One 32-bit PCI-to-PCI bridge at 33 MHz
• Compatible with CompactPCI spec. Rev. 3.0
• 1 MB onboard FWH for BIOS
• Hardware Monitor (LM87)
• Watchdog timer
• Real-time clock
• Two COM ports on Rear I/O (with an optional two on the front I/O on 8HP version)
• PCI extension connector
• I/O extension connector (LPC, AC97 Link)
• 4HP or 8HP, 3U CompactPCI
• Several rear I/O configurations
• Jumperless board configuration
• Extended temperature range: -40°C to + 85°C (optional)
• Passive heat sink solution
• Phoenix BIOS
P R E L I M I N A R Y
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Introduction CP306
1.3 Optional Modules
1.3.1 CP306-IDE1 Module
The CP306-IDE1 module provides all legacy PC I/O ports. It includes two COM ports, a PS/2 keyboard and mouse port, a parallel port, floppy and hard disk interface with 2 connectors. This additional capability opens up the broadest range of expansion possibilities.
For standalone applications the module provides the mounting for a 2.5” hard disk drive or FLASH disk. Refer to Appendix A for further information on the CP306-IDE1 module.
1.3.2 CP-RIO3-03 Rear I/O Module
Designed for use with a 32-bit rear I/O variant of the CP306 and a backplane with system slot rear I/O capability, this module provides rear I/O interfacing for two standard RS232 serial interfaces, one Fast Ethernet interface, two USB 2.0 interfaces, and the primary EIDE interface. Refer to Appendix C for further information on the CP-RIO3-03 Rear I/O module.
1.4 System Relevant Information
The following system relevant information is general in nature but should still be considered when developing applications using the CP306.
Table 1-1: System Relevant Information
SUBJECT INFORMATION
System Configuration A CP306 master board can support up to 7 peripheral boards with 32-bit and 33
MHz.
Master/Slave Functionality The CP306 can operate only as a master board.
Board Location in the System The CP306 board must be installed in a master slot of a CompactPCI backplane.
Hot Swap Compatibility The CP306 supports the addition or removal of other boards whilst in a powered-
up state. Individual clocks for each slot and ENUM signal handling are in compli­ance with the PICMG 2.1 Hot Swap specification.
Hardware Requirements The CP306 can be installed in any CompactPCI 3U rack.
Operating Systems The CP306 can operate under the following operating systems:
P R E L I M I N A R Y
Microsoft
Microsoft
Microsoft Linux VxWorks®
Please contact Kontron Modular Computers for further information concerning other operating systems.
® Windows® 2000 ® Windows® XP ® Windows® XP Embedded
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CP306 Introduction
1.5 Board Diagrams
The following diagrams provide additional information concerning board functionality and component layout.
1.5.1 Functional Block Diagram
Figure 1-1: CP306 Functional Block Diagram
BIOS
Flash
LOGIC
UART
I/O
Extension
AC-LINK
Power
Supply
4 x USB’s
LPC
Tem p.
Monitor
Mobile
Pentium M
I/O Controller
Hub 4
ICH4
Reset Clock
AGTL/400 MHz
PCI 32-bit/33 M Hz
Graphic Memory
Controller
GMCH
855-GME
HUB
Primary IDE ATA/100
with CompactFlash only ATA/33
Secondary IDE ATA/100
Hub
VGA-CRT
333 MHz
DDR-SDRAM
Soldered
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Ethernet
Switch
USB
(x2)
Fast
Ethernet
RJ45
PCI
Extension
J2
Rear I/O
PCI Bridge
32-bit/33 MHz
J1
32-bit
CPCI
Front Panel ConnectorsCPU
Onboard ConnectorsBus Connectors
Gigabit
Ethernet
Controller
Ethernet
RJ45
EIDE
P R E L I M I N A R Y
Compact-
Flash
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Introduction CP306
1.5.2 Front Panel
Figure 1-2: CP306 4HP Front Panel
LEGEND:
CP 306
CP306: 4HP version
General Purpose LEDs
WD/GP (green): Watchdog or General Purpose; when lit during
bootup, it indicates a PCI reset is active.
TH/GP (green): Overtemperature Status or General Purpose;
when lit during bootup, it indicates a power failure.
Integral Ethernet LEDs
ACT (green): Ethernet Link/Activity
SPEED (green/orange):Ethernet Speed
Fast Ethernet
Speed on (green): 100 Mbit
Speed off: 10 Mbit
Gigabit Ethernet
Speed on (orange): 1000 Mbit
Speed on (green): 100 Mbit
Speed off: 10 Mbit
P R E L I M I N A R Y
Note ...
For an illustration of the 8HP version front panel, please see Appendix A, CP306-IDE1 module.
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CP306 Introduction
1.5.3 Board Layouts
Figure 1-3: CP306 Board Layout (Front View)
J7
J3
GP-LEDs
J4
J5
J6
3940
IC10
12
MAG
MAG
Gigabit Ethernet 82541PI
Firmware
Hub
IC8
J8
DC/DC
1
246
J10 J11
DDR RAM
145
2
GMCH
Figure 1-4: CP306 Board Layout (Reverse View)
DC/DC Converter
IC9
CPU
79
80
IC35
PCI
Bridge
DC/DC
Converter
Clock
JP2
DDR SDRAM
IC23
ICH4
R294
C191
IC22
LOGIC
P R E L I M I N A R Y
C393
C466
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Introduction CP306
1.6 Technical Specification
Table 1-2: CP306 4HP Version Main Specifications
CP306 SPECIFICATIONS
CPU The CP306 supports the following microprocessors:
Intel® Pentium® M processors with 400 MHz PSB (Processor Side Bus)
and SpeedStep® technology in 479 µFCBGA packaging.
Intel® Pentium® M 1.1 GHz (LV) with 1 MB L2 cache
Intel® Pentium® M 733, 1.4 GHz (LV) with 2 MB L2 cache
Intel® Pentium® M 1.6 GHz with 1 MB L2 cache
Intel® Pentium® M 745, 1.8 GHz with 2 MB L2 cache
Intel® Celeron® M processors with 400 MHz PSB (Processor Side Bus)
in 479 µFCBGA packaging.
Intel® Celeron® M up to 1.3 GHz with up to 512 kB L2 cache
Please contact Kontron Modular Computers for further information concerning the suitability of other Intel processors for use with the CP306.
Memory Main Memory:
Up to 1024 MB DDR333 (PC2700) soldered DDR SDRAM memory
Cache structure:
Processor and Memory
64 kB L1 on-die full speed processor cache
32 kB for instruction cache
32 kB for data cache
Up to 2048 kB L2 on-die full speed processor cache
FLASH Memory:
1 MB FLASH for BIOS
Memory Extension:
CompactFlash socket type II (true IDE mode)
Serial EEPROM: 24LC64 (64 kbit)
Intel® 855GME chipset 855GME Graphics Memory Controller Hub (GMCH)
Support for a single Pentium® M microprocessor
64-bit AGTL/AGTL+ based System Bus interface at 400 MHz
64-bit System Memory interface with optimized support for
P R E L I M I N A R Y
DDR SDRAM memory at 333 MHz with ECC (additional 8-bits for ECC)
Integrated 2D and 3D Graphics Engines
Integrated H/W Motion Compensation Engine
Integrated 350 MHz DAC
Intel® ICH4 82801DB I/O Controller Hub (ICH4)
Chipset
PCI Rev. 2.2 compliant with support for 32-bit/33 MHz PCI operations
Power management logic support
Enhanced DMA controller, interrupt controller, and timer functions
Integrated IDE controller Ultra ATA/100/66/33
USB 2.0 host interface with up to four USB ports available on the CP306
One integrated LAN controller (82559 style)
System Management Bus (SMBus) compatible with most I²C™ devices
Low Pin Count (LPC) interface
Firmware Hub (FWH) interface support
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CP306 Introduction
Table 1-2: CP306 4HP Version Main Specifications (Continued)
CP306 SPECIFICATIONS
CompactPCI C6ompliant with CompactPCI Specification PICMG® 2.0 R 3.0
System master operation
32-bit / 33 MHz master interface
3.3V / 5.0V compatible (default configuration is 5.0V)
Rear I/O The following interfaces are routed to the rear I/O connector J2:
COM1 and COM2 (TTL signaling)
2 x USB 2.0
CRT VGA
Fast Ethernet
Primary EIDE
General purpose signals
Hot Swap The CP306 supports the addition or removal of other boards whilst in a
powered-up state. Individual clocks for each slot and Enum signal handling are in compliance with the PICMG 2.1 Hot Swa p Specification.
VGA Built-in Intel 3D Graphics accelerator for enhanced graphics performance.
Supports resolutions of up to 2048 x 1536 by 16-bit at a 60 Hz refresh
rate or up to 1280 x 1024 by 24-bit true colors at an 85 Hz refresh rate.
Hardware motion compensation for software MPEG2 and MPEG4 de-
coding
The graphics controller provides flexible allocation of video memory
up to 64 MB.
Interfaces
Gigabit Ethernet One 10 Base-T/100 Base-TX/1000 Base-T Gigabit Ethernet interface based
on the Intel® 82541PI Ethernet PCI bus controller.
One RJ45 connector on the front panel
Automatic mode recognition
Automatic cabling configuration recognition
Cabling requirement: Category 5, UTP, four-pair cabling
Fast Ethernet One 10Base-T/100Base-TX Fast Ethernet port integrated within the ICH4
controller (82559-style):
One RJ45 connector on the front panel
Support for rear I/O interfacing
May only be operated at either of the above interfacing points
Automatic mode recognition
Cabling requirement: Category 5, UTP, two-pair cabling.
USB Four USB ports supporting UHCI and EHCI:
Two USB 2.0 connectors on the front panel
Two USB 2.0 on the rear I/O interface
P R E L I M I N A R Y
Serial Up to Four UARTs, 16C550 compatible.
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Two on the 4HP version (rear I/O)
Additional two on the CP306-IDE1 module
Page 35
Introduction CP306
Table 1-2: CP306 4HP Version Main Specifications (Continued)
CP306 SPECIFICATIONS
LPT Only available in conjunction with the CP306-IDE1 module
Multi-Mode
Keyboard and Mouse Keyboard and Mouse are supported
Mass Storage EIDE Ultra ATA/100/66/33
Interfaces
CompactFlash:
Parallel Port
Standard Mode IBM PC/XT, PC/AT, and PS/2 compatible bi-directional
parallel port
Standard flatcable pinout
TTL level signals
USB keyboard support on 4HP and 8HP
PS/2 only with CP306-IDE1 module (8HP)
Two interfaces
One for CompactFlash and Rear I/O (with CompactFlash only up
to ATA 33)
One 40-pin, 2.54 mm, male pinrow connector (standard)
Up to four devices (one CompactFlash and up to three hard disks or
CD-ROMs)
Optional 44-pin, 2.0 mm, male pinrow connector for mounting a 2.5"
disk drive on 8HP extension (CP306-IDE1 module).
CompactFlash type II socket (true IDE mode with DMA)
Supports type I and II CompactFlash cards and Microdrive™
Floppy Disk (only with CP306-IDE1 module):
Supports 5.25 or 3.5 inch floppy drives
1.44 or 2.88 MB, 3.5 inch floppy disks
I/O extension interface I/O extension interface:
Female, pinrow connector
LPC devices
AC97 link; this interface is without A97 Codec
PCI Interface PCI extension interface
P R E L I M I N A R Y
Supports up to three PCI master devices
32-bit / 33 MHz interface
Female pinrow connector
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CP306 Introduction
Table 1-2: CP306 4HP Version Main Specifications (Continued)
CP306 SPECIFICATIONS
Mechanical 3U, 4HP, CompactPCI compliant form factor
Power Consumption See Chapter 5 for details
Temperature Range Operational: 0°C to +60°C Standard
-25°C to +75°C E1 (optional; only with designated CPU types)
-40°C to +85°C E2 (optional; only with designated CPU types)
Storage: -55°C to +85°C Without hard disk
-40°C to +65°C With hard disk
Climatic Humidity 93% RH at 40°C, non-condensing (acc. to IEC 60068-2-78)
General
Dimensions 100 mm x 160 mm
Board Weight 313 grams (4HP variants with heat sink and without mezzanine boards)
Battery 3.0V lithium battery for RTC with battery socket. Recommended types:
• VARTA CR2025
• PANASONIC BR2020
Front Panel Connectors VGA: 15-pin D-SUB connector
USB: two 4-pin connectors
Ethernet: two RJ-45 connectors
Onboard Connectors
Sockets
One EIDE interface supporting Ultra ATA/100/66/33 for two devices
(hard disks or CD-ROMs) on a 40-pin 2.54mm connector.
CompactFlash socket for type I, II and MicroDrive devices (primary
EIDE interface)
I/O extension connector
PCI extension connector
CompactPCI Connector J1 and J2
LEDs System status:
• TH/GP: green: overtemperature status or general purpose; when remains lit during bootup, it indicates a PCI reset is active.
• WD/GP: green: Watchdog or general purpose; when remains lit during bootup, it indicates a power failure.
Gigabit Ethernet status:
• ACT: green: network activity
• SPEED: green/orange: network speed
Fast Ethernet status:
• ACT: green: network activity
• SPEED: green: network speed
HW Monitoring
Watchdog Software configurable Watchdog generates IRQ, NMI, or hardware reset.
P R E L I M I N A R Y
Thermal Management CPU overtemperature protection is provided by:
System Monitor LM87 hardware monitor for supervision of:
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• Internal processor temperature control unit
• CPU shut down via hardware monitor
• Custom-designed heat sinks
• All system power voltages
• One fan speed input
Page 37
Introduction CP306
Table 1-2: CP306 4HP Version Main Specifications (Continued)
CP306 SPECIFICATIONS
Software BIOS Phoenix BIOS with 1 MB of Flash memory and having the following features:
QuietBoot
BootBlock
MultiBoot III
LAN-boot capability for diskless systems
Boot from USB floppy
BIOS boot support for USB keyboards
Software enable/disable function for the rear I/O, Ethernet
Plug and play capability
BIOS parameters are saved in the EEPROM
Board serial number is saved within the EEPROM
Software
Operating Systems Operating systems supported:
PC Health Monitoring
Microsoft® Windows® 2000
Microsoft® Windows® XP
Microsoft® Windows® XP Embedded
Linux
VxWorks® Please contact Kontron Modular Computers for further information concerning other operating systems.
Note ...
For a description of the additional 8HP version interfaces, please refer to the Technical Specifications table in Appendix A, CP306-IDE1 module.
1.7 Kontron Software Support
Kontron is one of the few CompactPCI and VME vendors providing inhouse support for most of the industry-proven real-time operating systems that are currently available. Due to its close relationship with the software manufacturers, Kontron is able to produce and support BSPs and drivers for the latest operating system revisions thereby taking advantage of the changes in
P R E L I M I N A R Y
technology.
Finally, customers possessing a maintenance agreement with Kontron can be guaranteed hotline software support and are supplied with regular software updates. A dedicated web site is also provided for online updates and release downloads.
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CP306 Introduction
1.8 Standards
This Kontron Modular Computers’ product complies with the requirements of the following standards:
Table 1-1: Standards
TYPE ASPECT STANDARD REMARKS
CE Emission EN55022
EN61000-6-3
Immission EN55024
EN61000-6-2
Electrical Safety EN60950-1 --
Mechanical Mechanical
Dimensions
Environmental Vibration
(Sinusoidal)
Random Vibration (Broadband)
Permanent Shock IEC60068-2-29 15g/11ms/500/1s
Single Shock IEC60068-2-27 30g/9ms/18/5s
IEEE1101.10 --
IEC60068-2-6 5g/10-300Hz/10
IEC60068-2-64 (3U boards)
--
--
acceleration / frequency range / 10 cycles per axis
20-500Hz,0.05g²/500-2000Hz,
0.005g²/3.5g rms/30min./axis frequency range1 / frequency range2 /acceleration /
cycle / duration
peak acceleration / shock duration half sine / number of shocks / recovery time
peak acceleration / shock duration / number of shocks / recovery time in seconds
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Climatic Humidity IEC60068-2-78 93% RH at 40°C, non-condensing
WEEE Directive
2002/96/EC
RoHS Directive
2002/95/EC
Waste electrical and electronic equipment
Restriction of the use of certain hazardous sub­stances in electrical and electronic equipment
Note ...
The values in the above table are valid for boards which are ordered with the ruggedized service. For more information, please contact your local Kontron office.
P R E L I M I N A R Y
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Introduction CP306
1.9 Related Publications
The following publications contain information relating to this product.
Table 1-2: Related Publications
PRODUCT PUBLICATION
CompactPCI Systems and Boards
CompactFlash Cards CF+ and CompactFlash Specification Revision 2.1
CompactPCI Specification 2.0, Rev. 3.0
CompactPCI Packet Switching Backplane Specification PICMG 2.16 Rev. 2.0 CompactPCI System Management Specification PICMG 2.9 Rev. 1.0 CompactPCI Hot Swap Specification PICMG 2.1 Rev. 2.0
Hot Swap Specification PICMG 2.1
PEP Modular Computers’ CompactPCI System Manual, ID 19954
P R E L I M I N A R Y
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CP306 Functional Description
Chapter 1
2
Functional Description
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P R E L I M I N A R Y
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Functional Description CP306
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P R E L I M I N A R Y
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CP306 Functional Description
2. Functional Description
2.1 CPU, Memory and Chipset
2.1.1 CPU
The CP306 supports the latest Intel® Pentium® M processor family up to speeds of 1.8 GHz. The Intel® sumption. This processor is based on a new core which is optimized for low power consump­tion.
The Intel® Pentium® M supports the latest Intel® SpeedStep® technology, which enables real­time dynamic switching of the voltage and frequency between several modes. This is achieved by switching the bus ratios, core operating voltage, and core processor speeds without reset­ting the system. The frequency for the Pentium® M processor may also be selected in the BIOS.
The following list sets out some of the key features of this processor:
Pentium® M microprocessors offer exceptional performance with low power con-
• Supports Intel Architecture with Dynamic Execution
• High performance, low power core
• On-die, primary 32 kB instruction cache and 32 kB write-back data cache
• On-die, second level cache with Advanced Transfer Cache Architecture
• Intel® Celeron® M with 512 kB L2 cache
• Intel® Pentium® M with 1024 kB L2 cache
• Intel® Pentium® M with 2048 kB L2 cache
• Advanced Branch Prediction and Data Prefetch Logic
• Streaming SIMD Extensions 2 (SSE2)
• 400 MHz, source-synchronous processor system bus Advanced Power Management features including Enhanced Intel® SpeedStep® Technol-
®
ogy (only Intel
Pentium® M processors)
P R E L I M I N A R Y
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Functional Description CP306
The following tables indicate the Intel® Pentium® M processors supported on the CP306, their maximum power dissipation and their core voltage in the various frequency modes.
Table 2-1: Supported Intel® Pentium® M Processors on the CP306
SPEED 1.1 GHz 1.4 GHz 1.6 GHz 1.8 GHz
PACKAGE
L2 CACHE
CORE VOLTAGE
PROCESSOR
µFCBGA µFCBGA µFCBGA µFCBGA
1024 kB 2048 kB 1024 kB 2048 kB
0.956 - 1.180 V 0.988 - 1.116 V 0.956 - 1.484 V 0.988 - 1.276 V
400 MHz 400 MHz 400 MHz 400 MHz
SIDE BUS
Table 2-2: Maximum Power Dissipation of Intel® Pentium® M (CPU only)
FREQUENCY MODE 1.1 GHz 1.4 GHz 1.6 GHz 1.8 GHz
Maximum Power HFM
Maximum Power LFM
1)
HFM High Frequency Mode (maximum frequency of the CPU)
2)
LFM Low Frequency Mode (frequency is 600 MHz)
1)
2)
12 W 10 W 25.4 W 21 W
4 W 7.5 W 4 W 7.5 W
Note ...
Only the 1.1 GHz and 1.4 GHz versions are able to run in the extended temper­ature range because of the lower power dissipation.
Table 2-3: Intel® Pentium® M Core Voltage in the Various Frequency Modes
Vcore
FREQUENCY
1.1 GHz 1.4 GHz 1.6 GHz 1.8 GHz
P R E L I M I N A R Y
1.8 GHz -- -- -- 1.276 V
1.6 GHz -- -- 1.484 V 1.228 V
1.4 GHz -- 1.116 V 1.420 V 1.180 V
1.3 GHz -- 1.116 V -- --
1.2 GHz -- 1.100 V 1.276 V 1.132 V
1.1 GHz 1.180 V -- -- --
1.0 GHz 1.164 V 1.052 V 1.164 V 1.084 V
900 MHz 1.100 V 1.036 V -- --
800 MHz 1.020 V 1.020 V 1.036 V 1.036 V
600 MHz 0.956 V 0.988 V 0.956 V 0.988 V
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CP306 Functional Description
The following tables provide information on the Intel® Celeron® M processors supported on the CP306 and its maximum power dissipation.
Table 2-4: Supported Intel® Celeron® M Processors on the CP306
SPEED 600 MHz 1.3 GHz
PACKAGE
L2 CACHE
CORE VOLTAGE
PROCESSOR
SIDE BUS
Table 2-5: Maximum Power Dissipation of Intel® Celeron® M (CPU only)
FREQUENCY MODE 600 MHz 1.3 GHz
Maximum Power 7 W 24.5 W
Note ...
The Intel® Celeron® M processors do not support the Intel® SpeedStep® fea­ture. These processors always run with a fixed frequency.
µFCBGA µFCBGA
-- 512 kB
0.956 V 1.356 V
400 MHz 400 MHz
2.1.2 Memory
The CP306 has one bank of DDR333 (PC2700) memory, which has 256 MB, 512 MB or 1024 MB onboard soldered memory, and it also supports ECC.
2.1.3 855GME Chipset Overview
The Intel® 855GME chipset consists of the following devices:
• 82855GME Graphics and Memory Controller Hub (GMCH) with Accelerated Hub Archi­tecture (AHA) bus
• 82801DB I/O Controller Hub 4 (ICH4) with AHA bus
• 82802AC Firmware Hub (FWH)
The GMCH provides the processor interface for the Pentium® M microprocessor, the memory bus and includes a high performance graphics accelerator. The ICH4 is a centralized controller for the boards’ I/O peripherals, such as the PCI, USB 2.0, EIDE, LAN and AUDIO ports. The Firmware Hub (FWH) provides the non-volatile storage for the BIOS.
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Functional Description CP306
Figure 2-1: 855GME Chipset Functional Block Diagram
Intel Processor
(400 FSB)
333 MHz
DDR-SDRAM
(PC2700)
SM Bus
PCI
SIO
2 USB Controllers;
4 Ports
LAN
Interface
Standard
Monitor
AC ‘97
6 Channel
ATA 100 IDE
Channels (2)
GMCH
82855 GME
Intel Hub Architecture
ICH4
82801DB
2.1.4 Graphics and Memory Controller Hub (855GME)
The 855GME Graphics Memory Controller Hub (GMCH) is a highly integrated hub that pro­vides the CPU interface (optimized for the Intel®
Pentium® M), the DDR SDRAM system mem-
ory interface (optimized for DDR200/PC1600, DDR266/PC2100 and DDR333/PC2700), a hub link interface to the ICH4 and high performance internal graphics.
Graphics and Memory Controller Hub Feature Set
Host Interface
The 855GME is optimized for the Intel® Processor Side Bus (PSB) frequency of 400 MHz using 1.05 V AGTL signalling. Single-ended AGTL termination is supported for single processor configurations. The AGTL bus supports 32­bit host addressing for decoding up to 4 GB memory address space.
Pentium® M microprocessors. The chipset supports a
System Memory Interface
The 855GME integrates a system memory Dual Data Rate (DDR) SDRAM controller with a 72-
P R E L I M I N A R Y
bit wide interface including ECC bits. The chipset supports DDR200, DDR266 and DDR333 (PC1600, PC2100 and PC2700) DDR SDRAM for system memory. The default memory speed for the CP306 is DDR333 (PC2700).
855GME Graphics Controller
The 855GME includes a highly integrated graphics accelerator and H/W Motion Compensation engines for software MPEG2 decoding delivering high performance 3D and 2D video capabil­ities. The internal graphics controller provides an interface for a standard CRT display.
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CP306 Functional Description
2.1.5 I/O Controller Hub ICH4
The ICH4 is a highly integrated multifunctional I/O Controller Hub that provides the interface to the PCI Bus and integrates many of the functions needed in today's PC platforms, for example, Ultra DMA 100/66/33 controller, USB host controller supporting USB 2.0, LPC interface, FWH Flash BIOS interface controller, LAN interface and an AC97 digital controller. The ICH4 com­municates with the host controller over a dedicated hub interface.
I/O Controller Hub Feature set comprises:
• PCI 2.2 interface with eight IRQ inputs
• Bus Master EIDE controller UltraDMA 100/66/33
• Three USB controllers with up to six USB 1.1 or USB 2.0 ports (max. of 4 ports available)
• Hub interface for a 855GME chipset
•FWH interface
• LPC interface
• AC97 2.1 interface
• Integrated LAN controller, 82559 style
• RTC controller
2.2 Peripherals
The following standard peripherals are available on the CP306 board:
2.2.1 Timer
The CP306 is equipped with the following timers:
• Real-Time Clock The ICH4 contains a MC146818A-compatible real-time clock with 256 bytes of battery­backed RAM. The real-time clock performs timekeeping functions and includes 256 bytes of general purpose battery-backed CMOS RAM. Features include an alarm function, programmable periodic interrupt and a 100-year calendar. All battery-backed CMOS RAM data remains stored in an additional EEPROM. This prevents data loss in case the CP306 is operated without battery.
• Counter/Timer Three 8254-style counter/timers are included on the CP306 as defined for the PC/AT.
2.2.2 Watchdog Timer
A watchdog timer is provided, which forces either an IRQ5, NMI, or Reset condition (configurable in the watchdog register). The watchdog time can be programmed in 12 steps ranging from 125 msec up to 256 seconds. If the watchdog timer is enabled, it cannot be stopped.
P R E L I M I N A R Y
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Functional Description CP306
2.2.3 Battery
The CP306 is provided with a 3.0V “coin cell” lithium battery for the RTC.
To replace the battery please proceed as follows:
• Turn off power
• Remove the battery
• Place the new battery in the socket.
• Make sure that you insert the battery the right way round. The plus pole must be on the top!
The lithium battery must be replaced with an identical battery or a battery type recommended by the manufacturer. Suitable batteries include the VARTA CR2025 and PANASONIC BR2020
Warning!
Care must be taken to ensure that the battery is correctly replaced.
The battery should be replaced only with an identical or equivalent type recommended by the manufacturer.
Dispose of used batteries according to the manufacturer’s instructions.
The typical life expectancy of a 170 mAh battery (VARTA CR2025) is 5 - 6 years with an average on-time of 8 hours per working day at an operating temperature of 30°C. However, this typical value varies considerably because the life expectancy is dependent on the operating temperature and the standby time (shutdown time) of the system in which it operates.
To ensure that the lifetime of the battery has not been exceeded it is recom­mended to exchange the battery after 4 - 5 years.
2.2.4 Reset
The CP306 is automatically reset by a precision voltage monitoring circuit that detects a drop in voltage below the acceptable operating limit of 4.725 V for the 5 V line and below 3.0 V for the 3.3 V line, or in the event of a power failure of the DC/DC converter. Other reset sources include the watchdog timer and the optional local push-button switch. The CP306 responds to any of these sources by initializing local peripherals.
A reset will be generated by the following conditions:
P R E L I M I N A R Y
• +5 V supply falls below 4.75 V.
• +3.3 V supply falls below 3.0 V.
• Power failure of the DC/DC converter for the processor
• Pushbutton "RESET" pressed (only on 8HP)
• Watchdog overflow
• CompactPCI backplane PRST input
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CP306 Functional Description
2.2.5 SMBus Devices
The CP306 provides a System Management Bus (SMBus) for access to several system monitoring and configuration functions. The SMBus consists of a two-wire I The following table describes the function and address of every onboard SMBus device.
Table 2-6: SMBus Device Addresses
DEVICE SMB ADDRESS
Hardware Monitor LM87 0101110xb
EEPROM 24LC64 1010111xb
Clock 1101001xb
SPD 1010000xb
²
C bus interface.
2.2.6 Thermal Management/System Monitoring
The LM87 can be used to monitor several critical hardware parameters of the system, including power supply voltages, fan speeds and temperatures, all of which are very important for the proper operation and stability of a high-end computer system. The LM87 provides an I²C serial bus interface.
The voltages of the onboard power supply core; +12 V, -12 V, +5 V, +3.3 V, +2.5 V, and Vcore are supervised. One fan tachometer output can be measured using the LM87's FAN1 input.
The temperature sensors on the LM87 monitor the CPU temperature and the ambient temperature around the CPU to ensure that the system is operating at a safe temperature level. If the temperature is too high, the sensors automatically reduce the CPU clock frequency, depending on the mode chosen in the BIOS set.
2.2.7 Serial EEPROM
This EEPROM is connected to the I²C bus provided by the ICH4.
Table 2-7: EEPROM Address Map
ADDRESS FUNCTION
0x000 - 0x0FF CMOS backup
0x100 - 0x1FF Production data
0x200 - 0x3FF OS Bootparameter
0x400 - 0x7FF User
P R E L I M I N A R Y
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Functional Description CP306
2.2.8 FLASH Memory
There are two flash devices available as described below, one for the BIOS and one for the CompactFlash socket.
2.2.8.1 BIOS FLASH (Firmware Hub)
For simple BIOS updating a standard onboard 1 MB Firmware Hub device is used.
The FWH stores both the system BIOS and video BIOS. It can be updated as new versions of the BIOS become available. You may easily upgrade your BIOS using the Phoenix Phlash16 utility.
2.2.8.2 CompactFlash Socket
To enable flexible flash extension a CompactFlash (CF) type II socket, J8, is available.
CF is a very small removable mass storage device. It provides true IDE functionality compatible with the 16-bit ATA/ATAPI-4 interface and full DMA support. CF cards are also available for data storage using a Microdrive hard disk.
The CompactFlash socket is connected to the primary EIDE port.
The board supports both CF types (type I and type II). CompactFlash is available in both CF type I and CF type II cards. The Microdrive is a CF type II card.
Figure 2-2: CompactFlash Socket Connector J8
J8
P R E L I M I N A R Y
Note ...
The easiest way to remove the CompactFlash card is to affix a wide piece of adhesive tape to the top side, then pull it out and afterwards remove the tape.
The following table provides the pinout for the CompactFlash Connector J8.
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CP306 Functional Description
Table 2-8: CompactFlash Connector J8 Pinout
I/O DESCRIPTION SIGNAL PIN PIN SIGNAL DESCRIPTION I/O
-- Ground signal GND 1 2 D03 Data 3 I/O
I/O Data 4 D04 3 4 D05 Data 5 I/O
I/O Data 6 D06 5 6 D07 Data 7 I/O
O Chip select 0 IDE_CS0 7 8 GND (A10) -- --
-- -- GND (ATASEL) 9 10 GND (A09) -- --
-- -- GND (A08) 11 12 GND (A07) -- --
-- 5 V power VCC 13 14 GND (A06) -- --
-- -- GND (A05) 15 16 GND (A04) -- --
-- -- GND (A03) 17 18 A02 Address 2 O
O Address 1 A01 19 20 A00 Address 0 O
I/O Data 0 D00 21 22 D01 Data 1 I/O
I/O Data 2 D02 23 24 NC (IOCS16) -- --
-- -- NC (CD2) 25 26 NC (CD1) -- --
I/O Data 11 D11 27 28 D12 Data 12 I/O
I/O Data 13 D13 29 30 D14 Data 14 I/O
I/O Data 15 D15 31 32 IDE_CS1 Chip select 1 O
-- -- NC (VS1) 33 34 DIOR I/O read O
O I/O write DIOW 35 36 5 V (WE) Write enable --
I Interrupt INTRQ 37 38 VCC 5 V power --
O Master/Slave CSEL
(GND/pull-up)
O Reset Reset 41 42 IORDY I/O ready I
O DMA request DMARQ (INPACK) 43 44 DMACK DMA acknowledge I
I/O Activity DASP LED 45 46 PDIAG ATA detection I/O
I/O Data 08 D08 47 48 D09 Data 09 I/O
I/O Data 10 D10 49 50 GND -- --
39 40 NC (VS2) -- --
P R E L I M I N A R Y
2.2.9 PCI-to-PCI Bridge
The Texas Instruments® PCI2050B bridge is a 32-bit 33 MHz PCI-to-PCI bridge device. It sup­ports up to seven CompactPCI loads through a passive backplane.
The PCI2050B is a second generation PCI-to-PCI bridge and is fully compliant with the PCI Lo­cal Bus Specification Rev. 2.2.
The PCI-to-PCI bridge allows the primary and secondary PCI bus to operate concurrently. A master and target on the same PCI bus can communicate while the other PCI bus is busy.
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Functional Description CP306
2.3 Board Interfaces
2.3.1 General Purpose LED Output
The CP306 provides two software programmable GP LEDs. After reset the default configuration for the two front LEDs is Overtemperature and Watchdog status. Additionally, if the TH LED remains on during bootup, it indicates a PCI reset is active, and if the WD LED remains on during bootup, it indicates a power failure. In this case, please check the power supply. If the power supply appears to be functional and this LED remains on, please contact Kontron Support. The LEDs can be configured via two onboard registers. For more information please see Chapter 4
The LED control logic remains in the same state until the next system reset.
Note ...
If the overtemperature LED flashes on and off at regular intervals it indicates that the processor junction temperature has reached a level beyond which per­manent silicon damage may occur. Upon assertion of Thermtrip, the processor will shut off its internal clocks (thus halting program execution) in an attempt to reduce the processor junction temperature.
Configuration.
Once activated, Thermtrip remains latched until a cold restart of the CP306 is undertaken (all power off and then on again).
2.3.2 USB Interfaces
The CP306 supports four USB 2.0 ports (two front I/O and two on the rear I/O). On the two rear I/O ports it is strongly recommended to use a cable below 3 metres in length for USB 2.0 devices. All four ports are high-speed, full-speed, and low-speed capable. Hi-speed USB 2.0 allows data transfers of up to 480 Mb/s - 40 times faster than a full-speed USB (USB 1.1).
One USB peripheral may be connected to each port. To connect more than four USB devices an external hub is required.
The USB power supply is protected by a self-resettable 500 mA fuse.
Figure 2-3: USB Connectors J4 and J5
P R E L I M I N A R Y
1324
J4
1324
J5
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CP306 Functional Description
The CP306 has two USB interfaces implemented on a 4-pin connector with the following pinout:
Table 2-9: USB Connectors J4 and J5 Pinout
PIN SIGNAL FUNCTION I/O
1 VCC VCC signal --
2 UV0- Differential USB- --
3 UV0+ Differential USB+ --
4 GND GND signal --
Note ...
The USB power supply to the USB connector provides a 500 mA continuous load current and 900 mA short-circuit protection. All the signal lines are EMI fil­tered.
2.3.3 Graphics Controller
The 855GME includes a highly integrated graphics accelerator delivering high performance 3D, 2D video capabilities. The internal graphics controller provides interfaces to a standard progressive scan monitor. This interface is only active when running in internal graphics mode.
Integrated 2D/3D Graphics:
• 3D hyperpipelined architecture
• Full 2D hardware acceleration
• Intel® 855GME D.V.M. Technology graphics core
• Integrated 350 Mhz DAC
• Resolution up to 1600 x 1200 @ 100 Hz and 2048 x 1536 @ 75 Hz with True colors
• Integrated H/W Motion Compensation engines for software MPEG2 decode
2.3.3.1 Video Memory Usage
The 855GME chipset supports the new Dynamic Video Memory Technology (D.V.M.T.). This new technology ensures the most efficient use of all available memory for maximum 3D graphics performance. D.V.M.T. dynamically responds to application requirements allocating display and texturing memory resources as required.
The operating system requires a minimum of 1 MB and a maximum of 64 MB of system mem­ory to support legacy VGA. System properties will display up to 64MB less than physical sys­tem memory available to the operating system.
P R E L I M I N A R Y
The graphics driver for the Intel® 855GME configuration will request up to 64 MB of memory from the OS By reallocating memory to the system, memory is freed up for other applications when not needed by the graphics sub-system. Thus, efficient memory usage is ensured for op­timal graphics and system memory performance.
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Functional Description CP306
2.3.3.2 Video Resolution
The 855GME has an integrated 350 MHz RAMDAC that can directly drive a progressive scan analog monitor up to a resolution of 1600x1200 @ 100 Hz and 2048 x 1536 @ 75 Hz.
Table 2-10: Partial List of Display Modes Supported
COLOR RESOLUTION VERSUS HORIZONTAL FREQUENCY
DISPLAY MODE
640 x 480 XXXXXXXXXXXX
800 x 600 XXXXXXXXXXXX
1024 x 7680 XXXXXXXXXXXX
1280 x 1024 XXXXXXXXXXXX
1600 x 1200 XXXXXXXXXXXX
1920 x 1440 X X X X X X X X X
2048 x 1536 X X X X X X
8-BIT INDEXED 16-BIT 32-BIT
60 75 85 100 60 75 85 100 60 75 85 100
2.3.3.3 CRT Interface and Connector J3
Figure 2-4: D-SUB CRT Connector J3
10
5
15
P R E L I M I N A R Y
11
1
6
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CP306 Functional Description
The 15-pin female connector J3 is used to connect a CRT monitor to the CP306 board.
Table 2-11: CRT Connector J3 Pinout
PIN SIGNAL FUNCTION I/O
1 Red Red video signal output O
2 Green Green video signal output O
3 Blue Blue video signal output O
13 Hsync Horizontal sync. TTL out
14 Vsync Vertical sync. TTL out
12 Sdata
15 Sclk
²
I
C data
²
I
C clock
I/O
O
9 VCC Power +5V 200 mA, no
fuse protection
5,6,7,8,10 GND Signal ground --
4,11 Free -- --
O
2.3.4 Universal Serial Ports (UART)
2.3.4.1 Serial Port Interface COM1 and COM2
Two PC-compatible serial ports with TTL signal level are available on CompactPCI rear I/O in­terface. These two COM ports, which are fully compatible with the 16550 controller, include a complete set of handshaking and modem control signals, maskable interrupt generation and data transfer of up to 460.8 kB/s. Both ports are only available on the CompactPCI rear I/O interface.
Serial Ports COM1 and COM2 can be enabled/disabled under SW control. Selection can be made inside the BIOS or via the rear I/O configuration register.
2.3.4.2 Serial Port Configuration
Table 2-12: COM Port Configuration Matrix
BOARD
REAR I/O VARIANT
UART1 UART2 UART3 UART4
P R E L I M I N A R Y
4HP board No -- -- -- --
4HP board Yes Rear I/O COM1 Rear I/O COM2 -- --
8HP board with
CP306-IDE 1
8HP board with
CP306-IDE 1
8HP board with
CP306-IDE 1
• 1) UART1 / UART2 are disabled via the BIOS settings
• 2) Selection of UART3 / UART4 settings is made via the BIOS
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No -- -- Front I/O COM1 Front I/O COM2
Yes Rear I/O COM1 Rear I/O COM2 Front I/O COM3 Front I/O COM4
Yes --
1)
--
1)
Front I/O COM1 or COM3
2)
Front I/O COM2 or COM4
2)
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Functional Description CP306
2.3.5 Ethernet
The CP306 board includes one Fast Ethernet 10BASE-T/100BASE-TX port by Intel, ICH4 chipset, integrated LAN controller and one Gigabit 10Base-T/100Base-TX/1000Base-T Ether­net port based on the Intel® 82541PI Gigabit Ethernet PCI Bus Controller.
Figure 2-5: Dual Fast Ethernet Connector J6
Gigabit Ethernet
8
J6-B
1
8
J6-A
1
Fast Ethernet
Note ...
The maximum length of cabling over which the Ethernet transmission can oper­ate effectively depends upon the transceiver in use.
P R E L I M I N A R Y
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CP306 Functional Description
2.3.5.1 Fast Ethernet
The CP306 board includes one 10Base-T/100Base-TX Ethernet port integrated within the ICH4 chipset (82559 style).
The Boot from LAN feature is supported; for details please refer to section 5.5, BIOS Features Setup, in chapter 5, CMOS Setup.
Figure 2-6: Fast Ethernet Controller J6-A
8
1
8
J6-A
1
Fast Ethernet
The Ethernet connector is realized as an RJ45 connector. The interface provides automatic de­tection and switching between 10Base-T and 100Base-TX data transmission. The Ethernet channel may be configured via the BIOS setting or the rear I/O Configuration Register for front I/O or rear I/O. The standard software configuration is front I/O.
RJ45 Connector J6-A Pinout
The J6-A connector supplies the 10Base-T/100Base-TX interfaces to the Ethernet controller.
Table 2-13: RJ45 Connector J6-A Pinout
PIN SIGNAL FUNCTION I/O
1 TX+ Transmit + O
2 TX- Transmit - O
3 RX+ Receive + I
4NC -- --
5NC -- --
6 RX- Receive - I
7NC -- --
8NC -- --
P R E L I M I N A R Y
Ethernet LED Status
Green: ACT: This LED monitors network connection and activity. The LED lights up when net-
work packets are sent or received through the RJ45 port. When this LED is not lit, it means that either the computer is not sending or receiving network data, or the cable connection is faulty.
Green: SPEED: This LED lights up to indicate a successful 100Base-TX connection. When not lit, the connection is operating at 10Base-T.
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Functional Description CP306
2.3.5.2 Gigabit Ethernet
The Intel® 82541PI Gigabit Ethernet Controller architecture is optimized to deliver high perfor­mance with the lowest power consumption. The controller's architecture includes independent transmit and receive queues to limit PCI bus traffic, and a PCI interface that maximizes the use of bursts for efficient bus usage.
The Boot from LAN feature is supported. For details please refer to Chapter 5.
Figure 2-7: Gigabit Ethernet Connector J6-B
Gigabit
Ethernet
8
J6-B
1
8
1
The Ethernet connectors are realized as RJ45 connectors. The interfaces provide automatic detection and switching between 10Base-T, 100Base-TX and 1000Base-T data transmission. Auto-wire switching for crossed cables is supported.
RJ45 Connector J6-B Pinouts
The J6-B connector supplies the 10Base-T, 100Base-TX and 1000Base-T interfaces to the Ethernet controller.
Table 2-14: Pinouts of J6-B Based on the Implementation
MDI / STANDARD ETHERNET CABLE PIN MDIX / CROSSED ETHERNET CABLE
10BASE-T 100BASE-TX 1000BASE-T 10BASE-T 100BASE-TX 1000BASE-T
P R E L I M I N A R Y
I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL
O TX+ O TX+ I/O BI_DA+ 1 I RX+ I RX+ I/O BI_DB+
O TX- O TX- I/O BI_DA- 2 I RX- I RX- I/O BI_DB-
I RX+ I RX+ I/O BI_DB+ 3 O TX+ O TX+ I/O BI_DA+
----I/OBI_DC+4----I/OBI_DD+
----I/OBI_DC-5----I/OBI_DD-
I RX- I RX- I/O BI_DB- 6 O TX- O TX- I/O BI_DA-
----I/OBI_DD+7----I/OBI_DC+
----I/OBI_DD-8----I/OBI_DC-
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CP306 Functional Description
Ethernet LED Status
ACT (green): This LED monitors network connection and activity. The LED lights up when net-
work packets are sent or received through the RJ45 port. When this LED is not lit, it means that either the computer is not sending or receiving network data, or the cable connection is faulty.
SPEED (green/orange): This LED lights up to indicate a successful Base-TX connection. When green, it indicates a 100Base-TX connection, and when orange, it indicates a 1000Base­TX connection. When not lit, the connection is operating at 10Base-T.
2.3.6 EIDE Interface
The EIDE interface supports the following modes:
• Programmed I/O (PIO): CPU controls data transfer.
• 8237-style DMA: DMA offloads the CPU, supporting transfer rates of up to 16 MB/sec.
• Ultra DMA: DMA protocol on IDE bus supporting host and target throttling and transfer rates of up to 33 MB/sec.
• ATA-66: DMA protocol on IDE bus supporting host and target throttling and transfer rates of up to 66 MB/sec. ATA-66 protocol is similar to Ultra DMA and is device driver compat­ible.
• ATA-100: DMA protocol on IDE bus allows host and target throttling. The ICH4 ATA-100 logic can achieve read transfer rates of up to 100 MB/sec and write transfer rates up to 88 MB/sec.
There are two independent EIDE ports available. The primary port is connected to the Com­pactFlash socket and the CompactPCI rear I/O connector. The secondary EIDE interface is a 40-pin, 2-row male connector AT standard interface for an EIDE hard disk.
The secondary EIDE interface provides support for two devices (one master and one slave). All hard disks can be used in cylinder head sector (CHS) mode with the BIOS also supporting the logical block addressing (LBA) mode.
Note ...
The secondary EIDE interface supports a maximum of two devices connected in the master-slave mode. To configure the first as a master disk and the sec­ond as a slave disk, please refer to the hard disk manufacturer’s documenta­tion.
Note ...
ATA-66 and ATA-100 are faster timings and require a specialized cable which has additional grounding wires to reduce reflections, noise, and inductive cou­pling. This cable will also support all legacy IDE drives.
The blue end of the ATA-100 cable must connect to the motherboard, the gray connector to the UltraDMA / 100 slave device and the black connector to the UltraDMA / 100 master device.
P R E L I M I N A R Y
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Functional Description CP306
Figure 2-7: EIDE Interface Connector J7
3940
12
The following table sets out the pinout of the J7 connector, giving the corresponding signal names. The maximum length of cable that may be used is 35 cm.
Table 2-15: J7 (Secondary EIDE) Pinout
I/O DESCRIPTION SIGNAL PIN PIN SIGNAL DESCRIPTION I/O
O Reset HD IDERESET 1 2 GND HD data 7 --
I/O HD data 7 HD7 3 4 HD8 HD data 8 I/O
I/O HD data 6 HD6 5 6 HD9 HD data 9 I/O
I/O HD data 5 HD5 7 8 HD10 HD data 10 I/O
I/O HD data 4 HD4 9 10 HD11 HD data 11 I/O
I/O HD data 3 HD3 11 12 HD12 HD data 12 I/O
I/O HD data 2 HD2 13 14 HD13 HD data 13 I/O
I/O HD data 1 HD1 15 16 HD14 HD data 14 I/O
P R E L I M I N A R Y
I/O HD data 0 HD0 17 18 HD15 HD data 15 I/O
-- Ground signal GND 19 20 -- -- --
I DMA request IDEDRQ 21 22 GND Ground signal --
O I/O write IOW 23 24 GND Ground signal --
O I/O read IOR 25 26 GND Ground signal --
I I/O channel ready IOCHRDY 27 28 GND Ground signal --
O DMA Ack IDEDACKA 29 30 GND Ground signal --
I Interrupt request IDEIRQ 31 32 NC -- --
O Address 1 A1 33 34 ATA100 Detect ATA100 I
O Address 0 A0 35 36 A2 Address 2 O
O HD select 0 HCS0 37 38 HCS1 HD select 1 O
I LED driving LED 39 40 GND Ground signal --
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CP306 Functional Description
2.3.7 CompactPCI Bus Interface
The complete CompactPCI connector configuration comprises two connectors named J1 and J2
Their function is as follows:
• J1: 32-bit CompactPCI interface with PCI bus
signals, arbitration, clock and power
• J2: has optional rear I/O interface functionality or 64-
bit termination
The board is capable of driving up to seven CompactPCI slots, with individual arbitration and clock signals. In addition to standard CompactPCI system functionality, the CP306 also supports hot swap capability which means that hot swappable boards can be removed from or installed in the system whilst it is running.
The CP306 is designed for a CompactPCI bus architecture. The CompactPCI standard is electrically identical to the PCI local bus. However, these systems are enhanced to operate in rugged industrial environments and to support multiple slots.
2.3.7.1 CompactPCI Connector Keying
CompactPCI connectors support guide lugs to ensure a correct polarized mating. A proper mating is further assured by the use of color coded keys for 3.3 V and 5 V operation.
Figure 2-8: CPCI Connectors
J1/J2
22
J2
1
25
J1
Color coded keys prevent inadvertent installation of a 5 V peripheral board into a 3.3 V slot. The CP306 board may be ordered as either a 3.3 V or a 5 V version. Backplane connectors are always keyed according to the signaling (VIO) level. Coding key colors are defined as follows:
Table 2-16: Coding Key Colors
SIGNALING VOLTAGE KEY COLOR
3.3 V Cadmium Yellow
5 V Brilliant Blue
Universal board (5V and 3.3V) None
The default setting is indicated by using italic bold.
1
Z B D F
A C E
P R E L I M I N A R Y
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Functional Description CP306
2.3.7.2 CompactPCI Connectors J1 and J2 Pinouts
The CP306 is provided with two 2 mm x 2 mm pitch female CompactPCI bus connectors, J1 and J2.
Table 2-17: CompactPCI Bus Connector J1 Pinout
PIN ROW A ROW B ROW C ROW D ROW E ROW F
25 5V REQ64# ENUM# 3.3V 5V GND
24 AD[1] 5V V(I/O) AD[0] ACK64# GND
23 3.3V AD[4] AD[3] 5V AD[2] GND
22 AD[7] GND 3.3V AD[6] AD[5] GND
21 3.3V AD[9] AD[8] M66EN# C/BE[0]# GND
20 AD[12] GND V(I/O) AD[11] AD[10] GND
19 3.3V AD[15] AD[14] GND AD[13] GND
18 SERR# GND 3.3V PAR C/BE[1]# GND
17 3.3V NC NC GND PERR# GND
16 DEVSEL GND V(I/O) STOP# LOCK# GND
15 3.3V FRAME# IRDY# GND TRDY# GND
12-14 Key Area
11 AD[18] AD[17] AD[16] GND C/BE[2]# GND
10 AD[21] GND 3.3V AD[20] AD[19] GND
9 C/BE[3]# NC AD[23] GND AD[22] GND
8 AD[26] GND V(I/O) AD[25] AD[24] GND
7 AD[30] AD[29] AD[28] GND AD[27] GND
6 REQ0# GND 3.3V CLK0 AD[31] GND
5NC NC RST# GND GNT0 GND
4 NC NC V(I/O) INTP INTS GND
P R E L I M I N A R Y
3 INTA# INTB# INTC# 5V INTD# GND
2 TCK 5V TMS NC TDI GND
1 5V -12V TRST# +12V 5V GND
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CP306 Functional Description
Table 2-18: 64-bit CompactPCI Bus Connector J2 Pinout
PIN ROW Z ROW A ROW B ROW C ROW D ROW E ROW F
22 GND NC NC NC NC NC GND
21 GND CLK6 GND LAN_MDR0- LAN_MDR1-
20 GND CLK5 GND LAN_MDR0+ GND RSV GND
19 GND GND GND RSV RSV RSV GND
18 GND RSV RSV RSV GND RSV GND
17 GND RSV GND PRST# REQ6# GNT6# GND
16 GND RSV RSV DEG# GND RSV GND
15 GND RSV GND FAL# REQ5# GNT5# GND
14 GND AD[35] AD[34] AD[33] GND AD[32] GND
13 GND AD[38] GND V(I/O) AD[37] AD[36] GND
12 GND AD[42] AD[41] AD[40] GND AD[39] GND
11 GND AD[45] GND V(I/O) AD[44] AD[43] GND
10 GND AD[49] AD[48] AD[47] GND AD[46] GND
9 GND AD[52] GND V(I/O) AD[51] AD[50] GND
8 GND AD[56] AD[55] AD[54] GND AD[53] GND
7 GND AD[59] GND V(I/O) AD[58] AD[57] GND
6 GND AD[63] AD[62] AD[61] GND AD[60] GND
5 GND C/BE[5]# GND V(I/O) C/BE[4]# PAR64 GND
LAN_MDR1+
GND
4 GND V(I/O) RSV C/BE[7]# GND C/BE[6]# GND
3 GND CLK4 GND GNT3# REQ4# GNT4# GND
2 GND CLK2 CLK3 SYSEN# GNT2# REQ3# GND
1 GND CLK1 GND REQ1# GNT1# REQ2# GND
Note ...
The 64-bit CompactPCI signals are not used on the board, but all 64 control signals are terminated to V(I/O).
P R E L I M I N A R Y
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Functional Description CP306
2.3.8 Optional Rear I/O Interface on CompactPCI Connector J2
The CP306 board provides optional rear I/O connectivity for special compact systems. Some standard PC interfaces are implemented and assigned to the front panel and to the rear connector J2.
When the rear I/O module is used, the signals of some of the main board/front panel connectors are routed to the module interface. Thus the rear I/O module makes it much easier to remove the CPU in the rack as there is practically no cabling on the CPU board.
For the system rear I/O feature a special backplane is necessary. The CP306 with rear I/O is compatible with all standard CompactPCI passive backplanes with rear I/O support on the system slot.
The CP306 rear I/O provides the following interfaces (all signals are available on J2 only if the board is ordered with rear I/O functionality):
The CP306 comes with the following features:
• 32-bit/33 MHz CompactPCI and rear I/O
• Two USB 2.0 ports
• One Fast Ethernet port without LED
• Primary EIDE Port with ATA100 (only ATA33 with CompactFlash)
• Two COM ports (TTL level)
• CRT VGA port
• One fan control input
• One general purpose output
• Input for external backup battery
Note ...
The pinout for the Ethernet, USB, COM, EIDE and VGA ports is identical to the CP302, CP303 and CP304 pinouts.
P R E L I M I N A R Y
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CP306 Functional Description
2.3.8.1 Optional Rear I/O Interface on CompactPCI Connector J2
The CP306 conducts a wide range of I/O signals through the rear I/O connector J2.
Warning!
To support the rear I/O feature a special backplane is necessary. Do not plug a rear I/O configured board in a non-system slot rear I/O backplane. This will damage the board.
Table 2-19: Rear I/O CompactPCI Bus Connector J2 Pinout
PIN Z A B C D E F
22 GNDNCNCNCNCNC GND
21 GND CLK6 GND TDN1 RDN1 RDP1 GND
20 GND CLK5 GND TDP1 GND RIO_VCC GND
19 GND GND GND RES RES RIO_+3.3V GND
18 GND RES UV2- UV4+ RTC Bat RIO_+3.3V GND
17 GND RES ROUT (GND) PRST# REQ6# GNT6# GND
16 GND RES UV2+ DEG# GND UV4- GND
15 GND RES GOUT (GND) FAL# REQ5# GNT5# GND
14 GND 2RIN 2DSR 2RTS VSYNC (GND) 2CTS GND
13 GND 2RXD FANSENSE
(GND)
12 GND 1DSR 1RTS 1CTS HSYNC (GND) 2TXD GND
11 GND 1DTR BOUT (GND) IDE_PD[9] 1DCD 1RIN GND
10 GND IDE_PD[8] IDE_RST# 1TXD IDE_PD[10] 1RXD GND
9 GND IDE_PD[6] IDE_PD[7] IDE_PD[4] IDE_PD[5] IDE_PD[11] GND
8 GND IDE_PD[3] IDE_PD[12] IDE_PD[2] GND IDE_PD[1] GND
7 GND IDE_PD[14] IDE_PD[0] IDE_PD[15] IDE_PDRQ# IDE_PIOW# GND
6 GND IDE_PIOR IDE_PIORDY IDE_PDACK# IDE_PD [13] IDE_PIRQ14 GND
5 GND IDE_PA[1] GND IDE_PA[0] IDE_PA[2] TH_GP/
4 GND VIO RIO_VCC IDE_PCS1# GND IDE_PCS3# GND
BOUT (VIO) 2DTR 2DCD GND
GND
SLP_S3
P R E L I M I N A R Y
3 GND CLK4 GND GNT3# REQ4# GNT4# GND
2 GND CLK2 CLK3 SYSEN# GNT2# REQ3# GND
1 GND CLK1 GND REQ1# GNT1# REQ2# GND
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Warning!
The RIO_XXX signals are power supply OUTPUTS to supply the rear I/O mod­ule with power. These pins MUST NOT be connected to any other power source, either within the backplane itself or within a rear I/O module.
Failure to comply with the above will result in damage to your board.
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Functional Description CP306
Legend for table on preceding page
IDE Signals
IDE Primary IDE signals
Ethernet1
TDP1/TDN1 Transmit Differential Pair.
RDP1/RDN1 Receive Differential Pair.
USB ports
USB1+/- USB data differential data signals
USB3+/- USB data differential data signals
Serial Ports 1 and 2
1DSR, 1DTR, 1RTS, 1DTS, 1TXT, 1RXD, 1DCD, 1RIN
2DSR, 2DTR, 2RTS, 2DTS, 2TXT, 2RXD, 2DCD, 2RIN
COM1 Serial port signals; TTL level
COM2 Serial port signals; TTL level
CONTROL Signals
FANSENSE Schmitt Trigger fan tachometer inputs; TTL level
TH_GP/SLEP_S3 General purpose output, TTL level
This signal indicates the sleep state of S3.
P R E L I M I N A R Y
VGA CRT signals
ROUT Red signal
GOUT Green signal
BOUT* Blue signal
HSYNC Horizontal Sync.
VSYNC Vertical Sync.
* Note that this signal (BOUT) appears twice in the rear I/O CompactPCI bus connector J2 pinout in order to provide compatibility with the CP302. Pin number B11 refers to the CP306 and C13 refers to the CP302. The default configuration is CP306 (B11).
Reserved Signals
RES Reserved (leave open)
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CP306 Functional Description
2.3.8.2 Rear I/O Configuration
Rear I/O interfaces are only available on rear I/O versions of the board.
In order to implement the system rear I/O feature, a system slot rear I/O backplane is necessary. This backplane must comply with the CompactPCI Specification PICMG 2.0 R3.0, October 1999.
Ethernet Interface
Fast Ethernet signals are available on the front RJ45 connector and on the rear I/O interface.
The combination of both front and rear I/O is not supported. Both Fast Ethernet channels are decoupled, but enabled separately. It is not possible to operate both the rear and front I/O at the same time. Switching over from front to rear I/O or vice versa is effected under BIOS control without the need to plug/unplug Ethernet cables.
VGA Interface
The VGA signals are available on J2 if the board is ordered for rear I/O configuration. In this configuration the rear and front I/O interfaces are active, but must not be used simultaneously. The 75 ohm termination resistor for the red, green and blue video signals are equipped on the CP306.
Note ...
Both VGA ports are electrically identical and not separated. Do not connect devices at both connectors (front I/O and rear I/O) at the same time. Doing so will result in poor signal quality.
Warning!
To support the rear I/O feature a special backplane is necessary. Do not plug a rear I/O configured board in a non-system slot rear I/O backplane. This will damage the board.
Serial Interface COM1 and COM2
The COM1 and COM2 port can be used only on the rear I/O interface.
USB Interface
There are four independent USB interfaces available, two ports are routed to the 4-pin front I/O connector. The other two ports are only available on the rear I/O connector.
Note ...
All four USB ports may be used at the same time. It is strongly recommended to use cables less than 3 metres in length for the rear I/O interfaces.
P R E L I M I N A R Y
2.3.9 Extension Connectors J10 and J11
The I/O extension connectors provide cost-effective, flexible configuration options.
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Functional Description CP306
Figure 2-9: Extension Connectors J10 and J11
1
246
45
1
2
J10 J11
2.3.9.1 I/O Extension Connector J10
On the Intel® 855GME chipset platform, the Super I/O (SIO) component has migrated to the Low Pin Count (LPC) interface. On the 4HP version there is no Super I/O device implemented. To provide a flexible configuration of further low speed PC devices e.g. Super I/O, IPMI or CAN controller, the LPC port is connected to the I/O extension connector. The I/O extension interface contains all the necessary signals to connect up to three LPC devices.
In addition to the LPC interface; the digital AC97 link is connected to the I/O extension connector (J10). The ICH4 integrated digital link allows several external codecs configurations on 8HP, e.g. audio with an audio codec, a modem with a modem codec, or an integrated audio/ modem codec.
P R E L I M I N A R Y
Note ...
The AC97 Codec does not include external sound card logic.
79
80
2.3.9.2 PCI Extension Connector J11
For a flexible configuration an onboard PCI extension connector is available. This interface contains all the necessary signals to enable the 32-bit, 33 MHz PCI bus to connect three PCI master devices. To support the three PCI master devices there are three sets of the following signals available: CLOCK, REQ and GNT.
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CP306 Installation
Chapter
3
Installation
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P R E L I M I N A R Y
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CP306 Installation
3. Installation
The CP306 has been designed for easy installation. However, the following standard precau­tions, installation procedures, and general information must be observed to ensure proper in­stallation and to preclude damage to the board, other system components, or injury to personnel.
3.1 Safety Requirements
The following safety precautions must be observed when installing or operating the CP306. Kontron assumes no responsibility for any damage resulting from failure to comply with these requirements.
Warning!
Due care should be exercised when handling the board due to the fact that the heat sink can get very hot. Do not touch the heat sink when installing or removing the board.
In addition, the board should not be placed on any surface or in any form of storage container until such time as the board and heat sink have cooled down to room temperature.
Caution!
If your board type is not specifically qualified as being hot swap capable, switch off the CompactPCI system power before installing the board in a free CompactPCI slot. Failure to do so could endanger your life or health and may damage your board or system.
Note ...
Certain CompactPCI boards require bus master and/or rear I/O capability. If you are in doubt whether such features are required for the board you intend to install, please check your specific board and/or system documentation to make sure that your system is provided with an appropriate free slot in which to insert the board.
ESD Equipment!
This CompactPCI board contains electrostatically sensitive devices. Please observe the necessary precautions to avoid damage to your board:
• Discharge your clothing before touching the assembly. Tools must be dis­charged before use.
• Do not touch components, connector-pins or traces.
• If working at an anti-static workbench with professional discharging equipment, please do not omit to use it.
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Installation CP306
3.2 CP306 Initial Installation Procedures
The following procedures are applicable only for the initial installation of the CP306 in a system. Procedures for standard removal and hot swap operations are found in their respective chap­ters.
To perform an initial installation of the CP306 in a system proceed as follows:
1. Ensure that the safety requirements indicated Chapter 3.1 are observed.
Warning!
Failure to comply with the instruction below may cause damage to the board or result in improper system operation.
2. Ensure that the board is properly configured for operation in accordance with application requirements before installing. For information regarding the configuration of the CP306 refer to Chapter 4. For the installation of CP306 specific peripheral devices and rear I/O devices refer to the appropriate chapters in Chapter 3.
Warning!
Care must be taken when applying the procedures below to ensure that neither the CP306 nor other system boards are physically damaged by the application of these procedures.
3. To install the CP306 perform the following:
1. Ensure that no power is applied to the system before proceeding.
Warning!
When performing the next step, DO NOT push the board into the back­plane connectors. Use the ejector handles to seat the board into the back­plane connectors.
P R E L I M I N A R Y
2. Carefully insert the board into the slot designated by the application requirements for
the board until it makes contact with the backplane connectors.
3. Using the ejector handle, engage the board with the backplane. When the ejector han-
dle is locked, the board is engaged.
4. Fasten the front panel retaining screws (two on the 4HP version and four on the 8HP).
5. Connect all external interfacing cables to the board as required.
6. Ensure that the board and all required interfacing cables are properly secured.
1. The CP306 is now ready for operation. For operation of the CP306, refer to appropriate CP306 specific software, application, and system documentation.
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CP306 Installation
3.3 Standard Removal Procedures
To remove the board proceed as follows:
1. Ensure that the safety requirements indicated in Chapter 3.1 are observed. Particular at­tention must be paid to the warning regarding the heat sink!
Warning!
Care must be taken when applying the procedures below to ensure that neither the CP306 nor system boards are physically damaged by the application of these procedures.
2. Ensure that no power is applied to the system before proceeding.
3. Disconnect any interfacing cables that may be connected to the board.
4. Unscrew the front panel retaining screws (two on the 4HP version and four on the 8HP).
5. Disengage the board from the backplane by first unlocking the board ejection handles and then by pressing the handles as required until the board is disengaged.
6. After disengaging the board from the backplane, pull the board out of the slot.
Warning!
Due care should be exercised when handling the board due to the fact that the heat sink can get very hot. Do not touch the heat sink when changing the board.
7. Dispose of the board as required.
3.4 Hot Swap Procedures
The CP306 is designed for hot swap operation. When installed in the system slot, it is capable of supporting peripheral board hot swapping. In any event, hot swap is also a function of the application running on the CP306.
3.5 Installation of CP306 Peripheral Devices
The CP306 is designed to accommodate a variety of peripheral devices whose installation var­ies considerably. The following chapters provide information regarding installation aspects and not detailed procedures.
3.5.1 CompactFlash Installation
The CompactFlash socket supports all available CompactFlash ATA cards type I and type II..
P R E L I M I N A R Y
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Note ...
The CP306 does not support removal and reinsertion of the CompactFlash storage card while the board is in a powered-up state. Connecting the Com­pactFlash cards while the power is on, which is known as "hot plugging", may damage your system.
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Installation CP306
3.5.2 USB Device Installation
The CP306 supports all USB plug and play computer peripherals (e.g. keyboard, mouse, printer, etc.).
Note ...
All USB devices may be connected or removed while the host or other peripherals are powered up.
3.5.3 Rear I/O Device Installation
To ensure proper functioning of the rear I/O VGA interface, EIDE port and the Ethernet port, the solder jumpers on the CP306 must be configured for the rear I/O. See Chapter 4 for con­figuration details.
For physical installation of rear I/O devices, refer to the documentation provided with the device itself.
3.5.4 Battery Replacement
The lithium battery must be replaced with an identical battery or a battery type recommended by the manufacturer. Suitable batteries include the VARTA CR2025 and PANASONIC BR2020
Note ...
Care must be taken to ensure that the battery is correctly replaced.
The battery should be replaced only with an identical or equivalent type recommended by the manufacturer.
Dispose of used batteries according to the manufacturer’s instructions.
The typical life expectancy of a 170 mAh battery (VARTA CR2025) is 5 - 6 years with an average on-time of 8 hours per working day at an operating temperature of 30°C. However, this typical value varies considerably because the life expectancy is dependent on the operating temperature and the standby time (shutdown time) of the system in which it operates. To ensure that the lifetime of the battery has not been exceeded it is
P R E L I M I N A R Y
recommended to exchange the battery after 4 - 5 years.
3.5.5 Hard Disk Installation
The following information pertains to hard disks which may be connected to the CP306 via nor­mal cabling. To install a hard disk, it is necessary to perform the following operations in the giv­en order:
1. Install the hardware.
Warning!
The incorrect connection of power or data cables may damage your hard disk unit and/or CP306 board.
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CP306 Installation
Note ...
ATA-66 and ATA-100 are faster timings and require a specialized cable which has additional grounding wires to reduce reflections, noise, and inductive coupling. This cable will also support all legacy IDE drives.
The blue end of the ATA-100 cable must connect to the motherboard, the gray connector to the UltraDMA/100 slave device, and the black connector to the UltraDMA/100 master device.
Some symptoms of incorrectly installed HDDs are:
• Hard disk drives are not auto-detected: may be a Master / Slave problem or a bad IDE cable. Contact your vendor.
• Hard Disk Drive Fail message at bootup: may be a bad cable or lack of power going to the drive.
• No video on bootup: usually means the cable is installed backwards.
• Hard drive lights are constantly on: usually means bad IDE cable or defective drives / motherboard. Try another HDD.
• Hard drives do not power up: check power cables and cabling. May also result from a bad power supply or IDE drive.
2. Initialize the software necessary to run the chosen operating system.
3.6 Software Installation
The installation of the Ethernet and all other onboard peripheral drivers is described in detail in the relevant Driver Kit files.
Installation of an operating system is a function of the OS software and is not addressed in this manual. Refer to appropriate OS software documentation for installation.
Note ...
Users working with pre-configured operating system installation images for Plug and Play compliant operating systems, for example Windows® 95/98/ME, Windows® 2000, Windows® XP, Windows® XP Embedded, must take into consideration that the stepping and revision ID of the chipset and/or other on­board PCI devices may change. Thus, a re-configuration of the operating sys­tem installation image deployed for a previous chipset stepping or revision ID is in most cases required. The corresponding operating system will detect new devices according to the Plug and Play configuration rules.
Note ...
Due to the lead-free Ethernet controller used on the CP306, the installation of new software is required. Updated network drivers must be installed or included in preconfigured operating system images.
P R E L I M I N A R Y
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Installation CP306
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CP306 Configuration
Chapter
4
Configuration
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Configuration CP306
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CP306 Configuration
4. Configuration
4.1 Jumper Description
4.1.1 CompactFlash Configuration
Table 4-1: CompactFlash Configuration
R294 DESCRIPTION
Open Configured for slave
Closed Configured for master
The default setting is indicated by using italic bold
4.1.2 Clearing BIOS CMOS Setup
If the system does not boot (due to, for example, the wrong BIOS configuration, or wrong pass­word setting) the CMOS setting may be cleared using jumper JP2.
Procedure for clearing CMOS setting:
The system is booted with the jumper in the new, closed position, then powered down again. The jumper is reset back to the normal position, then the system is rebooted again
Table 4-2: Clearing BIOS CMOS Setup
JP2 DESCRIPTION
Open Normal boot using the CMOS settings
Closed Clear the CMOS settings and use the default values
The default setting is indicated by using italic bold.
4.1.3 Shorting Chassis GND (Shield) to Logic GND
The front panel and front panel connectors are isolated to the logic ground.
To enable the connection between the chassis GND and logic GND the capacitors must be exchanged with zero ohm resistors.
Table 4-3: Shorting Chassis GND (Shield) to Logic GND
CAPACITOR SETTING DESCRIPTION
Closed 470pF 2KV capacitors Connectors are isolated to logic GND with three
C191, C393, C466
Closed zero ohm resistors
470pF 2KV capacitors
Connectors are connected to logic GND and chassis GND
P R E L I M I N A R Y
The default setting is indicated by using italic bold.
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Configuration CP306
4.2 Interrupts
The CP306 board uses the standard AT IRQ routing (8259 controller).
This interrupt routing is the default, but can be modified via the BIOS.
Table 4-4: Interrupt Setting
IRQ PRIORITY STANDARD FUNCTION
IRQ0 1 System Timer
IRQ1 2 Keyboard Controller
IRQ2 -- Input of the second IRQ controller (IRQ8-IRQ15)
IRQ3 11 Free reserved for COM2
IRQ4 12 Free reserved for COM1
IRQ5 13 Watchdog
IRQ6 14 Floppy Disk Controller
IRQ7 15 Free reserved for COM3 or COM4
IRQ8 3 System Real Time Clock
IRQ9 4 PCI or ACPI
IRQ10 5 PCI
IRQ11 6 PCI
IRQ12 7 PCI or PS/2 mouse
IRQ13 8 Coprocessor error
IRQ14 9 Primary hard disk
IRQ15 10 Secondary hard disk
NMI Watchdog
P R E L I M I N A R Y
Note ...
Selecting USB keyboard support in the BIOS will initiate an emulation of a PS/2 keyboard. This emulation uses a cyclic SMI interrupt whereby the latency of the interrupt handler may by up to 250 µsec. The BIOS and the CPU speed are the primary influences concerning the increased latency. The latency is not consis­tent with regards to occurrence or duration.
Since the SMI is the highest IRQ, other IRQ routines may experience erratic la­tency. Should this interfere with the application requirements, turn off this option in the BIOS or disable the SMIs in the start-up boot code.
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CP306 Configuration
4.3 Onboard PCI Interrupt Routing
The ICH4 provides up to 8 PCI interrupt inputs. The table below describes the connection of these IRQ signals:
For more information please see the INTEL ICH4 datasheet.
Table 4-5: PCI Interrupt Routing
ICH4 IRQ INPUT PCI DEVICE FUNCTION INTERNAL ICH4
PIRQA PCI to PCI Bridge IRQA USB A controller
PIRQB PCI to PCI Bridge IRQB AC97 + MODEM + SMBUS
PIRQC PCI to PCI Bridge IRQC USB C controller
PIRQD PCI to PCI Bridge IRQD USB B controller
PIRQE Free ICH 4 LAN controller IRQA
PIRQF External Gigabit Free
PIRQG Free Free
PIRQH Free USB 2.0 controller
4.4 Memory Map
The CP306 board uses the standard AT ISA memory map.
4.4.1 Memory Map for the 1st Megabyte
The following table sets out the memory map for the first megabyte:
Table 4-6: Memory Map for the 1st Megabyte
MEMORY RANGE SIZE FUNCTION
0xE0000 – 0xFFFFF 128 k BIOS implemented in FWH
Reset vector 0xFFFF0
0xD0000 – 0xDFFFF 64 k Free
0xCC000 – 0xCFFFF 16 k Free
0xC0000 – 0xCBFFF 48 k BIOS of the VGA card.
0xA0000 – 0xBFFFF 128 k Normally used as video RAM as follows:
CGA video: 0xB8000-0xBFFFF
Monochrome video: 0xB0000-0xB7FFF
EGA/VGA video: 0xA0000-0xAFFFF
P R E L I M I N A R Y
0x000000 – 0x9FFFF 640 k DOS reserved memory space
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Note ...
The 1 MB FLASH extension is mapped in the extended memory area e.g. 0xFFF00000–0xFFFFFFFF. The Flash address range can be configured by the ICH4 chip.
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Configuration CP306
4.4.2 I/O Address Map
The following table sets out the memory map for the I/O memory: The shaded table cells indicate CP306 specific registers.
Table 4-7: I/O Address Map
ADDRESS DEVICE
000,00F DMA controller #1
020,021 Interrupt controller #1
022,02F Reserved
040,043 Timer
060,063 Keyboard interface
070,071 RTC port
080,08F DMA page register
0A0,0A Interrupt controller #2
0C0,0DF DMA controller #2
0E0,0EF Reserved
0F0,0FF Math coprocessor
170,17F Hard disk secondary
1F0,1FF Hard disk primary
278,27F Parallel port LPT2
280 Watchdog trigger
282 Watchdog timer
284 Watchdog, CPCI IRQ routing
286 I/O status
287 I/O configuration
288 Board version
P R E L I M I N A R Y
289 Hardware index
28B Logic index
28D LED control
2E8,2EF Serial port COM4
2F8,2FF Serial port COM2
378,37F Parallel printer port LPT1
3BC,3BF Parallel printer port LPT3
3E8,3EF Serial port COM3
3F0,3F7 Floppy Disk + Super-I/O #1 Com.
3F8,3FF Serial port COM1
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CP306 Configuration
4.5 Special Registers Description
The following registers are special registers which the CP306 uses to watch the onboard hardware special features and the CompactPCI control signals.
Normally, only the system BIOS uses these registers, but they are documented here for application use as required.
Note ...
Take care when modifying the contents of these registers as the system BIOS may be relying on the state of the bits under its control.
4.5.1 Watchdog
The CP306 has one watchdog timer. This timer is provided with a programmable timeout ranging from 125 msec to 256 sec. Failure to strobe the watchdog timer within a set time period results in a system reset, NMI or an interrupt. This can be configured via the register 0x284.
To enable the watchdog bit ”4” of the register 0x282 must be set. If the watchdog is enabled via bit ”4” this bit cannot later be cleared.
With a write access to the register 0x280 the watchdog is retriggered. Once the watchdog is enabled, it must be continuously strobed within the terminal count period to avoid resetting the system hardware.
The watchdog can be configured in several modes, one of which is the dual stage configuration. If the NMI and the reset configuration bit are set (0x284 = 0x84) the watchdog has two stages. The first stage timeout generates an NMI interrupt. If the NMI handler does not reconfigure the watchdog, the watchdog switches to the second stage and generates a master reset after the configured timeout elapses.
4.5.2 Watchdog Trigger
A write access triggers the watchdog.
The I/O location for the watchdog trigger is 0x280.
P R E L I M I N A R Y
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Configuration CP306
4.5.3 Watchdog Timer
Table 4-8: Watchdog Timer
REGISTER NAME Watchdog Timer ACCESS
ADDRESS 0x282 R W
BIT POSITION
CONTENT Res. Res. Res. WDEN WDT3 WDT2 WDT1 WDT0
DEFAULT 00000000
BIT NAME VAL DESCRIPTION
0 WDT[3:0] Timeout Period:
1
2
3
7 6 5 4 3 2 1 0
MSB
Bits: 3 2 1 0
Setting: 0 0 0 0 = 0 = 000.125 sec
0 0 0 1 = 1 = 000.250 sec
0 0 1 0 = 2 = 000.500 sec
0 0 1 1 = 3 = 001 sec
0 1 0 0 = 4 = 002 sec
0 1 0 1 = 5 = 004 sec
0 1 1 0 = 6 = 008 sec
0 1 1 1 = 7 = 016 sec
1 0 0 0 = 8 = 032 sec
1 0 0 1 = 9 = 064 sec
1 0 1 0 = 10 = 128 sec
1 0 1 1 = 11 = 256 sec
1 1 0 0 = 12 = res.
1 1 0 1 = 13 = res.
1 1 1 0 = 14 = res.
1 1 1 1 = 15 = res.
LSB
4 WDEN 0 Watchdog timer disabled
P R E L I M I N A R Y
1 Watchdog timer enabled
Note ...
Once the watchdog timer is enabled it cannot be disabled except by resetting the system.
50Reserved
60Reserved
70Reserved
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CP306 Configuration
4.5.4 Watchdog, CompactPCI Interrupt Configuration Register
The interrupt configuration register holds a series of bits defining the interrupt routing for the watchdog, the power control derate signal and the CompactPCI enumeration signal. If the watchdog timer fails, it can generate three independent hardware events: reset, NMI and IRQ5 interrupt.
The enumeration signal is generated by a hot swap compatible board after insertion and prior to removal. The system uses this interrupt signal to force software to configure the new board. The derate signal indicates that the power supply is beginning to derate its power output.
Note ...
To enable the dual stage watchdog the NMI and the reset bit must be set. At the first stage the watchdog generates an NMI and at the second stage the system will be reset.
Table 4-9: Watchdog, CompactPCI Interrupt Configuration Register
REGISTER NAME Interrupt Configuration Register ACCESS
ADDRESS 0x284 R W
BIT POSITION
CONTENT WNMI CFNMI CFIRQ CEIRQ CDIRQ WRST WIRQ Res.
DEFAULT 00000000
BIT NAME VA L DESCRIPTION
00
1WIRQ0
2WRST0
3 CDIRQ 0
4CEIRQ0
5 CFIRQ 0 Disable CPCI fail signal to IRQ5 routing
6 CFNMI 0 Disable CPCI fail signal to NMI routing
7 6 5 4 3 2 1 0
MSB
Reserved
Disable Watchdog IRQ5 routing
1
1
1
1 Enable CPCI enum signal to IRQ5 routing
1 Enable CPCI fail signal to IRQ5 routing
Enable Watchdog IRQ5 routing
Disable Watchdog hardware reset
Enable Watchdog hardware reset
Disable CPCI derate signal to IRQ5 routing
Enable CPCI derate signal to IRQ5 routing
Disable CPCI enum signal to IRQ5 routing
LSB
P R E L I M I N A R Y
7 WNMI 0 Disable Watchdog NMI routing
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1 Enable CPCI fail signal to NMI routing
1 Enable Watchdog NMI routing
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Configuration CP306
4.5.5 I/O Status
This register describes the local and CompactPCI control signals. The watchdog status bit indicates the status of the watchdog timer. If the timer is not retriggered within the previously set time period, the bit is set to ”0” and the watchdog LED lights. The fail signal is an output of the power supply and indicates a power supply failure. For the description of the derate and enumeration signals please see the interrupt routing register.
Table 4-10: I/O Status Register
REGISTER NAME I/O Status Register ACCESS
ADDRESS 0x286 R
BIT POSITION
CONTENT WST Res. Res. Res. CSLOT CENUM CFAIL CDER
DEFAULT 10000000
BIT NAME VAL DESCRIPTION
0CDER0
1CFAIL0
2 CENUM 0
3CSLOT0
40
50Reserved
60Reserved
7 WST 0 Indicates that a Watchdog timeout has occurred
7 6 5 4 3 2 1 0
MSB
Indicates power derating (CPCI DEG signal)
1
1
1
1
1 Indicates that no Watchdog timeout has occurred
Power normal
Indicates a power supply failure (CPCI FAIL signal)
Power normal
Indicates the insertion or removal of a hot swap system board (CPCI ENUM)
No hot swap event
Indicates that the board is installed in a system slot
Indicates that the board is installed in a peripheral slot
Reserved
P R E L I M I N A R Y
LSB
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CP306 Configuration
4.5.6 I/O Configuration Register
The I/O configuration register holds a series of bits defining the onboard configuration for the two COM ports and the general purpose LEDs.
Table 4-11: I/O Configuration Register
REGISTER NAME I/O Configuration Register ACCESS
ADDRESS 0x287 R W
BIT POSITION
CONTENT Res. DBIOS ELED1 ELED0 ESIOR Res. ECOM2 ECOM1
DEFAULT 00000000
BIT NAME VA L DESCRIPTION
0ECOM10
1ECOM20
2 ESIOE 0
3 ESIOR 0
4ELED0
(WD/GP)
5ELED1
(TH/GP)
6 DBIOS 0 Default boot from onboard FWH
7 6 5 4 3 2 1 0
MSB
Disable COM1 interface on 4 HP version
1
1
1
1
0
1 Enable LED0 for GP
0 Enable LED1 for over temperature
1 Enable LED1 for GP
Enable COM1 interface on 4 HP version
Disable COM2 interface on 4 HP version
Enable COM2 interface on 4 HP version
Reserved
Disable keyboard controller emulation
Enable keyboard controller emulation
Enable LED0 for watchdog
LSB
70Reserved
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1 Boot from IDE module FWH
P R E L I M I N A R Y
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Configuration CP306
4.5.7 Board Version
This register describes the hardware and the board version. The content of this register is unique for each Kontron CompactPCI board.
Table 4-12: Board ID Register
REGISTER NAME Board Version ACCESS
ADDRESS 0x288 R
BIT POSITION
CONTENT BID7 BID6 BID5 BID4 BID3 BID2 BID1 BID0
DEFAULT 01100011
7 6 5 4 3 2 1 0
MSB
4.5.8 Hardware Index
The hardware index will signal to the software when differences in the hardware require different handling by the software. It starts with the value 0 and will be incremented with each change in hardware as development continues.
Table 4-13: Hardware Index Register
REGISTER NAME Hardware Index ACCESS
ADDRESS 0x289 R
BIT POSITION
CONTENT HWI7 HWI6 HWI5 HWI4 HWI3 HWI2 HWI1 HWI0
DEFAULT 00000000
7 6 5 4 3 2 1 0
MSB
4.5.9 Logic Version
The logic version register may be used to identify the logic status of the board by software. It starts with the value 0 and will be incremented with each logic update.
Table 4-14: Logic Version Register
LSB
LSB
REGISTER NAME Logic Version ACCESS
P R E L I M I N A R Y
ADDRESS 0x28B R
BIT POSITION
CONTENT LR7 LR6 LR5 LR4 LR3 LR2 LR1 LR0
DEFAULT 00000000
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7 6 5 4 3 2 1 0
MSB
LSB
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4.5.10 LED Control
With the LED Control register the LED on the front panel can be switched on and off.
Table 4-15: LED Control Register
REGISTER NAME LED Control Register ACCESS
ADDRESS 0x28D R W
BIT POSITION
CONTENT Res. Res. Res. Res. Res. Res. LED1 LED0
DEFAULT 00000000
BIT NAME VA L DESCRIPTION
0LED0
(WD/GP)
1LED1
(TH/GP)
20
30
40
50Reserved
60Reserved
70Reserved
7 6 5 4 3 2 1 0
MSB
0
1
0
1
LED off
LED on
LED off
LED on
Reserved
Reserved
Reserved
LSB
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P R E L I M I N A R Y
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CP306 Phoenix BIOS
Chapter
Chapter
5
5
Phoenix BIOS
Phoenix BIOS
P R E L I M I N A R Y
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P R E L I M I N A R Y
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CP306 Phoenix BIOS
5. Phoenix BIOS
5.1 The Setup Guide
With the PhoenixBIOS Setup program, you can modify BIOS settings and control the special features of your computer. The Setup program uses a number of menus for making changes and turning the special features on or off.
Note ...
The menus shown here are from a typical system. The actual menus displayed on your screen may be quite different and depend on the hardware and fea­tures installed in your computer. For more accurate information about your BIOS Setup program, consult your system manual or contact the manufac­turer.
5.1.1 Introduction to Setup
This manual describes the Phoenix BIOS Setup program. The Setup program lets you modify basic system configuration settings. The settings are then stored in a dedicated battery-backed memory, called CMOS RAM, that retains the information when the power is turned off. A special feature of Kontron’s CompactPCI boards is that all setup information is additionally saved in a non-volatile serial EEPROM. This feature provides the user with enhanced data security in comparison with a standard PC board, because setup data will not be lost should the battery fail.
The Phoenix BIOS in your computer is a customized version of an industry-standard BIOS for IBM PC AT–compatible personal computers. It supports the Intelx86 and compatible proces­sors. The BIOS provides critical low-level support for the system central processing, memory, and I/O sub-systems.
The rest of this manual is intended to guide you through the process of configuring your system using Setup.
Note ...
There are two different versions of the BIOS, one for the 4HP CP306 and one for the 8HP. Care should be taken when downloading BIOS upgrades to download the correct version for the board in use.
If the board is modified from the 4HP version to the 8HP, or vice-versa, the functionality will change, therefore the BIOS defaults must be reloaded and the operating system in use must be re-installed.
P R E L I M I N A R Y
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5.1.2 The Main Menu
To start the PhoenixBIOS Setup utility:
Turn on or reboot your system. PhoenixBIOS displays this message:
Press <F2> to enter SETUP
Pressing <F2> displays the Main Menu, which looks like this:
Figure 5-1: Main Menu - Screen Display
PhoenixBIOS Setup Utility
Main Advanced Security Power Boot OEMFeatures Exit
Item Specific Help
System Time [16:19:20] System Date: [03/02/1994]
Legacy Diskette A: [1.44/1.25 MB 3½”] Legacy Diskette B: [Disabled]
Primary Master 6449 MB Secondary Slave None Secondary Master CD-ROM Secondary Slave None
SMART Device Monitoring [Enabled]
<Tab>, <Shift-Tab>, or <Enter> selects field
System Memory 640 kB Extended Memory 31744 kB
F1 Help  Select Item -/+ Change Values F9 Setup Defaults ESC Exit Select Menu Enter Select
Sub-Menu F10 Save and Exit
5.1.3 The Menu Bar
P R E L I M I N A R Y
The Menu Bar at the top of the window lists these selections:
Table 5-1: The Menu Bar
MENU PURPOSE
Main Basic system configuration
Advanced Use to set the Advanced Features available on your system's chipset
Security Use this menu to set the User and Supervisor Passwords and the Backup and
Virus Check Reminders.
Power Configuration of Power Management features
Boot Boot sequence configuration
OEMFeatures Configuration of special board features
Exit Exits the current menu
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Use the left and right (->, <-) arrow keys to make a selection.
See the section below, "Exiting Setup" for a description on exiting the Main Menu.
5.1.4 The Legend Bar
Use the keys listed in the legend bar on the bottom to make your selections or exit the current menu. The chart on the following page describes the legend keys and their alternates
Table 5-2: The Legend Bar
KEY FUNCTION
<F1> or <Alt-H> General Help window (See below).
<Esc> Exit this menu.
arrow keys Select a different menu.
 arrow keys Move cursor up and down.
<Tab> or <Shift-Tab> Cycle cursor in the Time and Date field.
<Home> or <End> Move cursor to top or bottom of window.
<PgUp> or <PgDn> Move cursor to top or bottom of window.
<F6> or <+> or <Space> Select the Next Value for the field.
<F5> or <-> Select the Next Lower Value for the field.
<F9> Load the Default Configuration values for the complete BIOS.
<F10> Save and exit.
<Enter> Execute Command or Select P sub-menu.
<Alt-R> Refresh screen.
To select an item, use the arrow keys to move the cursor to the field you want. Then use the plus-and-minus value keys to select a value for that field. The Save Values commands in the Exit Menu save the values currently displayed in all the menus.
To display a sub-menu, use the arrow keys to move the cursor to the sub-menu you want. Then press <Enter>. A pointer
marks all sub-menus.
P R E L I M I N A R Y
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5.1.5 The Field Help Window
The help window on the right side of each menu displays the help text for the currently selected field. It updates as you move the cursor to each field.
5.1.6 The General Help Window
Pressing <F1> or <Alt-H> on any menu brings up the General Help window that describes the legend keys and their alternates:
General Help
Setup changes system behavior by modifying the BIOS Configuration parameters. Selecting incorrect values may cause system boot failure; load Setup Default values to recover.
<Up/Down> arrows select fields in current menu. <PgUp/PgDn> moves to previous/next page on scrollable menus. <Home/End> moves to top/bottom item of current menu.
Within a field, <F5> or <-> selects next lower value and <F6>, <+>, or <Space> selects next higher value.
<Left/Right> arrows select menus on menu bar. <Enter> displays more options for items marked with a <Enter> also displays an option list on some fields.
<F9> loads factory-installed Setup Default values. <F10> saves and exits.
<ESC> or <Alt-X> exits Setup: in sub-menus, pressing these keys returns to the previous menu.
<F1> or <Alt-H> displays General Help (this screen).
,
P R E L I M I N A R Y
[Continue]
The scroll bar on the right of any window indicates that there is more than one page of informa­tion in the window. Use <PgUp> and <PgDn> to display all the pages. Pressing <Home> and <End> displays the first and last page. Pressing <Enter> displays each page and then exits the window.
Press <Esc> to exit the current window.
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5.1.7 Main Menu Selections
You can make the following selections on the Main Menu itself. Use the sub-menus for other selections.
Table 5-3: Main Menu Selections
FEATURE OPTIONS DESCRIPTION
System Time HH:MM:SS Set the system time.
System Date MM/DD/YYYY Set the system date.
Diskette A (8 HP version only)
Diskette B (8 HP version only)
SMART Device Monitoring Disabled
360 kB, 5 ¼"
1.2 MB, 5 ¼" 720 kB, 3 ½"
1.44/1.25 MB, 3 ½"
2.88 MB, 3 ½" Disabled
360 kB, 5 ¼"
1.2 MB, 5 ¼" 720 kB, 3 ½"
1.44/1.25 MB, 3 ½"
2.88 MB, 3 ½" Disabled
Enabled
Select the type of floppy-disk drive installed in your sys­tem.
1.25 MB is a Japanese media format that requires a 3½" 3-Mode Diskette drive.
Select the type of floppy-disk drive installed in your sys­tem.
1.25 MB is a Japanese media format that requires a 3½" 3-Mode Diskette drive.
Turns on Self-Monitoring Analysis Reporting Technol­ogy, which monitors the condition of the hard drive and reports when a catastrophic IDE failure is about to hap­pen.
5.1.8 Master and Slave Sub-Menus
The Master and Slave sub-menus accessed from the Main Menu control these types of devices:
• Hard-disk drives
• Removable-disk drives such as Zip drives
• CD-ROM drives
PhoenixBIOS 4.0 supports up to two IDE disk adapters, called primary and secondary adapters. Each adapter supports one master drive and one optional slave drive in these pos­sible combinations:
•1 Master
• 1 Master, 1 Slave
•2 Masters
• 2 Masters, 1 Slave
• 2 Masters, 2 Slaves
There is one IDE connector for each adapter on your machine, usually labeled "Primary IDE" and "Secondary IDE." There are usually two connectors on each ribbon cable attached to each IDE connector. In a two drive configuration, the order of placement of Device 0 and Device 1 on the ATA interface cable is not significant to the operation of the interface. If only a single de­vice is attached via the ATA interface to a host, it is recommended that the host and the device be placed at the two ends of the cable.
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If you need to change your drive settings, selecting one of the Master or Slave drives on the Main Menu displays a sub-menu, as follows:-
Figure 5-2: Master/Slave Sub-Menu - Screen Display
PhoenixBIOS Setup Utility
Main
Primary Master Item Specific Help
Type: [User]
CHS Format Cylinders: [ 13328] Heads: [ 15] Sectors [ 63] Maximum Capacity: 6449 MB
LBA Format Total Sectors 40031712 Maximum Capacity 20496MB
Multi Sector Transfer; [16 Sectors] LBA Mode Control: [Enabled] 32-bit I/O: [Enabled] Transfer Mode: [Fast PIO 4] Ultra DMA Mode [Enabled]
User = you enter param­eters of hard-disk installed at this con­nection Auto = auto types hard-disk drive installed here 1-39 = you select pre­determined type of hard-disk drive installed here CD-ROM = a CD-ROM drive is installed here ATAPI Removable = removable disk drive is installed here.
F1 Help  Select Item -/+ Change Values F9 Setup Defaults ESC Exit Select Menu Enter Select
Sub-Menu F10 Save and Exit
Use the legend keys listed on the bottom to make your selections and exit to the Main Menu. Use the following chart to configure the hard disk.
P R E L I M I N A R Y
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Table 5-4: Master/Slave Sub-Menu Options
FEATURE OPTIONS DESCRIPTION
Type None
User Auto IDE Removable CD-ROM ATAPI Removable
other ATAPI
Cylinders 0 to 65,535 Number of cylinders
Heads 1 to 16 Number of read/write heads
Sectors 0 to 63 Number of sectors per track
Multi-Sector Transfers Disabled
2 sectors 4 sectors 8 sectors 16 sectors
LBA Mode Control Enabled
Disabled
None = Autotyping is not able to supply the drive type or end user has selected None, disabling any drive that may be installed. User = You supply the hard-disk drive information in the following fields.
Auto = Autotyping, the drive itself supplies the correct drive information.
IDE Removable = Removable read-and-write media (e.g., IDE Zip drive).
CD-ROM = Readable CD-ROM drive.
ATAPI Removable = Read-and-write media (e.g., LS120)
Any selection except Disabled determines the number of sectors transferred per block.
Enabling LBA causes Logical Block Addressing to be used in place of Cylinders, Heads, & Sectors.
32-Bit I/O Enabled
Disabled
Transfer Mode Standard
Fast PIO 1 Fast PIO 2 Fast PIO 3
Fast PIO 4
FPIO3/DMA1
FPIO4/DMA2
Ultra DMA Mode Disabled
Mode 0 up to
Mode 5
Enables 32-bit communication between CPU and IDE card. Requires PCI or local bus.
Selects the method for transferring the data between the hard disk and system memory.
The Setup menu only lists those options supported by the drive and platform.
Selects the Ultra DMA mode used for moving data
to/from the drive.
When you enter Setup, the Main Menu usually displays the results of Autotyping information each drive provides about its own parameters (e.g., cylinders, heads, and sectors)–and how the drives are arranged as Masters or Slaves on your machine.
Some older drives, however, do not use Autotyping and require selecting type User and enter­ing a pre-defined fixed-disk type value (e.g., 1 to 39) or specifying the drive parameters sepa­rately with the User type selected. You can find the correct parameters for hard-disk drives in the drive manual or written on the casing of the drive itself.
P R E L I M I N A R Y
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Note ...
Exiting this menu keeps your selections but loses internal autotyping in-
formation, which may not be selected. If you exit this menu and re-enter it, press <Enter> on Autotype again to restore the Autotype information.
Do not attempt to change these settings unless you have an older drive
that does not support autotyping.
Before changing the contents of this menu, write them down. Once you
have established correct parameters for your drive, write them down and store them in a safe place (e.g., tape them to the disk drive) for use in case these values are lost in CMOS or if autotyping fails. If these hard-disk parameters are not correctly entered in CMOS, you cannot ac­cess the data on your drive.
Warning!
Incorrect settings can cause your system to malfunction. To correct mistakes, return to Setup and restore the Setup Defaults with <F9> and re-enter the cor­rect drive parameters.
5.2 The Advanced Menu
Selecting "Advanced" from the menu bar on the Main Menu displays a menu like this:
Figure 5-3: Advanced Menu - Screen Display
PhoenixBIOS Setup Utility
Main Advanced Security Power Boot OEM Features Exit
Item Specific Help
Setup Warning Setting items on this menu to incorrect values may cause your system to malfunction.
Advanced Chipset Control PCI/PNP Configuration
P R E L I M I N A R Y
Memory Cache I/O Device Configuration Keyboard Features Miscellaneous
F1 Help  Select Item -/+ Change Values F9 Setup Defaults ESC Exit Select Menu Enter Select
Sub-Menu F10 Save and Exit
Use the legend keys to make your selections and exit to the Main Menu.
Warning ...
Incorrect settings can cause your system to malfunction. To correct mistakes, return to Setup and restore the Setup Defaults with <F9>.
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5.2.1 Advanced Chipset Control
Figure 5-4: Advanced Chipset Control - Screen Display
PhoenixBIOS Setup Utility
Advanced
Advanced Chipset Control Item Specific Help
Enable Memory Gap: [Disabled] IGD - Device 2: [Enabled] IGD - Memory Size: [UMA = 8 MB]
F1 Help  Select Item -/+ Change Values F9 Setup Defaults ESC Exit Select Menu Enter Select
Sub-Menu F10 Save and Exit
Table 5-5: Advanced Chipset Control Options
FEATURE OPTIONS DESCRIPTION
Enable Memory Gap Disabled
Enabled
IGD - Device 2 Disabled
Enabled
IGD - Memory Size UMA = 1 MB
UMA = 8 MB UMA = 16 MB UMA = 32 MB
Allows enabling a 1 MB memory gap for add-on cards at 15 MB.
Enable/Disable the Internal Graphics Device.
Select the amount of main memory that the Internal Graphics Device will use.
P R E L I M I N A R Y
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