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This manual describes some sample application programs and setup files, which will be
helpful for creating your own applications using Agilent 4155C/4156C.
All programs and setup files described in this manual are stored on the Sample Application
Program Disk (DOS formatted, 3.5-inch diskette) that is furnished with your
4155C/4156C. All programs are written in the Instrument BASIC, and ready to run in the
4155C/4156C’s built-in Instrument BASIC environment.
This manual covers the following applications:
•V- RA M P
•J-RAMP
•SWEAT
•GO/NO-GO Test
•HCI Degradation Test
•Charge Pumping
•Flash EEPROM Test
•TDDB
•Electromigration
CAUTIONThese programs are only examples, so you may need to modify these programs and setup
files for your own application before executing. If these example programs damage your
devices, Agilent Technologies is NOT LIABLE for the damage.
NOTEYou should copy all files in the Sample Application Program Disk to a diskette that you
will use as your working diskette, and keep the original diskette as backup.
Voltage-Ramped (V-Ramp) test is one of the Wafer Level Reliability (WLR) tests, which is
used to evaluate device reliability on a wafer. This test can provide quick evaluation data
for estimating the overall reliability of thin oxides, and this data can be used to improve the
thin oxide manufacturing process.
With the thickness of oxide shrinking along with device geometries, creating a reliable thin
oxide has become an important issue. The integrity of the thin oxide in a MOS device is a
dominant factor in determining the overall reliability of a micro-circuit. The V-Ramp test
can promptly give useful feedback to the manufacturing process about oxide reliability.
This operation manual covers a sample V-Ramp program running on Agilent 4155/4156,
and how to use and customize the program. The program is written in the Instrument
BASIC (IBASIC), and is ready to run on the built-in IBASIC controller of the 4155/4156.
“Theory of V-Ramp Test Procedure” describes basic theory, procedure, and terminology of
the V-Ramp test.
“Basic Operation” describes the V-Ramp sample program. Included are V-Ramp
methodology using the 4155/4156, how to execute the sample program, and program
overview.
“Customization” describes how to customize the sample program. This is very helpful
because you probably need to modify the sample program to suit your test device.
“Measurement Setups” shows the 4155/4156 page settings that are stored in the setup files.
This section describes the Voltage-Ramped (V-Ramp) Test procedure. Included are basic
theory, procedure, and terminology of V-Ramp test. The V-Ramp test procedure is based on
JEDEC standard No.35.
V-Ramp Test Overview
V-Ramp test measures the breakdown voltage (Vbd) and breakdown charge (Qbd) of thin
oxide capacitors, which you designed as test structures on the wafer. These results are used
to evaluate the oxide integrity. The higher the Vbd and Qbd measured by this test, the better
the integrity of the oxide on wafer.
You extract these two parameters from a large amount of test structures and extracted
parameters are used for standard process control to quickly evaluate oxide integrity.
In the V-Ramp test, an increasing voltage is forced to the oxide capacitor until the oxide
layer is broken. Breakdown voltage (Vbd) is defined as the voltage at which breakdown
occurs. And breakdown charge (Qbd) is the total charge forced through the oxide until the
breakdown occurs.
Figure 1-1 shows a simplified flowchart of V-Ramp test.
The V-Ramp test consists of three tests: initial test, ramp stress test, and post stress test.
In the initial test, normal operating voltage is applied to the oxide capacitor, then leakage
current through the capacitor is measured to check for initial failure.
In the ramp stress test, linear ramped voltage is applied to the capacitor, and the current is
measured.
The post stress test is for confirming that failure occurred during the ramp stress test. The
normal operating voltage is applied to the oxide capacitor again, and leakage current is
measured under the same conditions as the initial test.
After the tests, the test results must be analyzed and saved (data recording).
Before performing the V-Ramp test, test conditions must satisfy the following:
•Gate bias polarity is in accumulated direction. That is, negative (minus) voltage is
applied to gate conductor for P-type bulk, and positive (plus) voltage is applied for
N-type bulk.
•Diffusions and wells (if any) must be connected to substrate.
•Temperature is in 25 ± 5 °C range.
Initial Test
Initial test is to confirm that the oxide capacitor is initially good. If leakage current of that
capacitor exceeds 1 mA, it is categorized as initial failure.
For example, when you test a TTL-level oxide capacitor, constant voltage of -5 V is
applied to that capacitor, and leakage current is measured. If the leakage current is more
than 1 mA, that capacitor is an initial failure.
Post Stress Test
The post stress test checks the oxide status after the ramp stress test. If the oxide is broken,
proper ramp stress was applied to the oxide capacitor. If not, maybe the ramp stress was not
applied correctly.
To check the oxide status, the normal operating voltage is applied to the oxide capacitor
(same as initial test), then leakage current is measured. The leakage current (I
indicates the following:
•If I
•If I
> 1 mA:
leak
The oxide was broken by the applied ramped voltage.
< 1 mA:
leak
The oxide was not broken by the applied ramped voltage.
If the applied ramped voltage reached the maximum electric field, the testing was
probably faulty: for example, the ramped voltage was not applied to the oxide due to an
open circuit.
leak
) value
For example, if you test a TTL level oxide capacitor, constant voltage of -5 V is applied to
that capacitor, then leakage current is measured. If the leakage current is more than 1 mA,
the capacitor was properly broken.
A linear ramped voltage or a linear stepped voltage, which is approximately ramped
voltage, is applied to the oxide capacitor. While the ramped voltage is forced, the current
through the oxide is measured.
The ramped voltage is stopped when one of the following conditions occurs:
•Current through the oxide exceeds ten times the expected current. The expected current
is calculated from the applied voltage and structure of oxide capacitor. For example, the
expected current density J for a 200 angstrom oxide capacitor is calculated from the
equation for Fowler-Nordheim current as follows:
2B
æö
JAE
Where, A and B are constants in terms of effective mass and barrier height.E is electric
field.
exp×=
---
–
èø
E
•Current through the oxide exceeds the current compliance determined by the current
density compliance limit of 20 A/cm
2
.
•Electric field generated by the applied voltage exceeds 15 MV/cm. This typically
indicates faulty testing.
Figure 1-2 shows the concept of Vbd and Qbd. In the graph, left vertical axis shows current
through the oxide, right vertical axis shows voltage applied to the oxide capacitor, and
horizontal axis shows time.
When the current through the oxide reaches 10 times the expected current, the ramped
voltage is stopped, and the applied voltage at this point is the breakdown voltage (Vbd).
Breakdown charge (Qbd) is calculated by integrating the current through the oxide:
According to the measurement results, the oxide status is categorized as follows and
recorded:
Initial Failure: Failed the initial test. Indicates initially defective oxide
Catastrophic Failure: Failed ramped and post stress tests. Indicates that oxide
Masked Catastrophic Failure: Did not fail ramped stress test, but failed post stress test.
Non-catastrophic Failure: Failed ramped stress test, but not post stress test.
Other Did not fail ramped stress test or post stress test.
The failure category is recorded for each test device. If the catastrophic failure is observed,
breakdown voltage (Vbd) and breakdown charge density (q
recorded.
Table 1-1 shows the oxide failure categories.
Table 1-1Oxide Failure Categories
V-RAMP
Theory of V-Ramp Test Procedure
capacitor. Other tests should not be performed.
capacitor was properly broken by the ramped stress test.
This section covers the following for using an 4155/4156 to perform V-Ramp Test:
required equipment, required files, methodology, how to execute the sample program, and
sample program overview.
Methodology
The entire V-Ramp Test procedure can be performed by executing the VRAMP sample
program on the built-in IBASIC controller of the 4155/4156.
As explained in “Theory of V-Ramp Test Procedure”, the V-Ramp test consists of three
measurement parts and an analysis part. Each measurement part executes three steps as
follows:
1. Loads the measurement setup file into the 4155/4156 execution environment.
2. Changes some of the measurement or analysis parameters on the setup pages.
3. Executes the measurement.
The VRAMP program executes the above three steps for each test: initial test, ramp stress
test, and post stress test. Using the measurement setups (step 1 above) loaded from a file
reduces the length and complexity of the program. For details, see Programmer's Guide.
Measurement setups, which are loaded into the 4155/4156 execution environment, were
previously developed and saved to measurement setup files on the diskette. You can easily
modify the measurement setup information in fill-in-the-blank manner in the 4155/4156
execution environment. The VRAMP sample program is also saved to the diskette. You
can easily modify the sample program by using the editor in the built-in IBASIC
environment.
The VRAMP sample program assumes that the built-in IBASIC controller of the
4155/4156 is used, but you can also use another controller, such as HP BASIC running on
an external computer. To do so, you must modify the sample program for your
environment. See “Customization” on how to modify the program to run on an external
controller.
Initial Test
The initial test makes sure the oxide capacitor is initially good by applying the normal
operating voltage (Vuse), then measuring the leakage current (I
I
exceeds 1 mA, the oxide capacitor is categorized as "initial failure".
leak
The sample program assumes that SMU1 and SMU4 are connected to the oxide capacitor
as shown in Figure 1-4.
For the initial test, the sample program does as follows:
1. Sets up the 4155/4156 according to the VRSPOT.MES setup file, which the sample
program previously loaded from the diskette into internal memory MEM1.
2. Sets up SMU1 to constant voltage Vuse for PMOS device, or -Vuse for NMOS
device. Vuse value is specified previously in the sample program, and reset on the
MEASURE: SAMPLING SETUP page by OUTPUT statement (line 2550 of the
sample program).
3. Forces voltage from SMU1, then measures current after the HOLD TIME, which was
setup by VRSPOT.MES setup file described next.
4. Checks if current through the oxide Ig exceeds 1 mA. If so, the sample program aborts
further testing.
The following are main points about the setup by the VRSPOT.MES setup file:
•On CHANNELS: CHANNEL DEFINITION page (see Figure 1-13)
•MEASUREMENT MODE is set to SAMPLING.
•SMU1 and SMU4 are set to be constant voltage sources.
•Ig is defined as name of current measured by SMU1.
•On MEASURE: SAMPLING SETUP page (see Figure 1-5)
•NO. OF SAMPLES is set to 1 to execute the measurement once.
•HOLD TIME is set to 2.00 s to allow the output voltage to stabilize.
•SMU4 is set to force a constant 0 V.
•STOP CONDITION is enabled, NAME is set to Ig, THRESHOLD is set to 1 mA,
and EVENT is set to Val > Th.
So, the measurement will stop if the current through the oxide (Ig) exceeds 1 mA.
If so, the sample program will abort further testing.
Figure 1-4Simplified Measurement Circuit and Output Voltage of Initial Test
Figure 1-5MEASURE: SAMPLING SETUP Page for Initial Test
Ramp Stress Test
After the initial test, the sample program executes the ramp stress test. Linear stepped
voltage is applied to the oxide.
The measurement setup for the ramp stress test is stored in the VRSWEP.MES setup file on
the diskette. At the beginning of the sample program, this setup is loaded into internal
memory (MEM2). Then, at the beginning of the ramp stress test, the sample program loads
this setup into the 4155/4156.
To force proper stepped voltage, the sample program and VRSWEP.MES set the following:
•SMU channel definition (see Figure 1-6):
SMU4 is set to force a constant 0 V, and SMU1 is set to voltage sweep mode.
•Constant step interval time (see Figure 1-8):
Step interval time of output sweep voltage must be constant.
•Measurement stop mode:
If the current through the oxide reaches the specified compliance, the voltage sweep
and measurement stops.
•Auto-analysis and user functions:
After the measurement, the 4155/4156 executes analysis automatically to search for
Vbd, and to calculate Qbd.
The sample program assumes the connection between the SMUs and the oxide capacitor as
shown in Figure 1-6. SMU4 is set to force a constant 0 V, and SMU1 is set to voltage
sweep mode by the VRSWEP.MES setup as shown in Figure 1-7.
Figure 1-6Simplified Measurement Circuit of Ramp Stress Test
V-RAMP
Basic Operation
Figure 1-7CHANNELS: CHANNEL DEFINITION Page for Ramp Stress Test
To keep a constant step interval time for the voltage sweep and measurement, triggering
and measurement ranging techniques are used. VRSWEP.MES sets the measurement
ranging mode to FIXED, so the time between measurements does not vary due to range
changing.
VRSWEP.MES enables the TRIG OUT function, and the sample program calculates and
sets values so that the step interval time becomes constant as shown in Figure 1-8. The step interval time (Step_time) is the delay time (Step_delay_t) plus step delay time
(Step_keep_t). Strictly speaking, the sample program calculates these as follows:
•1.2 ms is overhead time associated with the delay time for voltage sweep measurement,
when the WAIT TIME field is set to 0 (zero). So, do not set another value in this field.
•0.1 ms is overhead time associated with the TRIG OUT function.
•Ramp rate (Ramp_rate), oxide thickness (Tox), and step voltage (Vstep) are
specified in lines 1800 to 1840 of the sample program.
The start voltage (Vstart), stop voltage (Vstop), and step voltage (Vstep) are
specified in sample program in lines 1830 to 1850. For NMOS devices, the ramp stress test
subprogram actually sets the opposite polarity for these values by using the Tp variable.
Measurement stop mode.
NOTEThe JEDEC standard says that the ramp stress test should abort when the current through
the oxide reaches 10 times the expected current (Iexpect). But this sample program
aborts when the current reaches current compliance (Igcomp). The Iexpect and Igcomp values are specified in lines 1860 and 1870 of the sample program, and must
meet the following condition: Igcomp ³ Iexpect ´ 10.
VRSWEP.MES file sets the sweep stop condition to SWEEP STOP AT COMPLIANCE as
shown in the Figure 1-10.
Figure 1-8Output Sweep Voltage for Ramp Stress Test
1. Sets up the maximum and minimum values for graph axes: X, Y1, and Y2. Lines 2940
to 2980.
2. Performs the measurement. Line 3020.
3. Moves marker to maximum Ig, and saves value to Igmax. Lines 3100 to 3170.
4. Moves marker to position where Ig = Iexpect*10. Line 3200.
5. If compliance was reached or if Igmax ³ Iexpect*10, the sample program reads
the value of Vbd and Qbd at present marker position. Lines 3250 to 3320. Where Vdb
and Qbd are specified as described below.
The VRSWEP.MES setup file defines user functions on the CHANNELS: USER
FUNCTION DEFINITION page (see Figure 1-20) as follows:
Table 1-2User Functions for Ramp Stress Test
Name Units Definition
Time(sec)
@INDEX * 1
a
Vbd(V)@MY2
Qbd(Q)INTEG(Ig,Time)
a. This is a temporary value. Value of Time is redefined by line 2810 of the
sample program.
The above user function calculates Qbd as follows:
Tbd
QbdImeas t() td
==
ò
Tstart
N
1
-- -Imeas
å
2
i 2=
Imeas
+()TiT
i
i 1–
–()´
i 1–
Where, N is step number when the breakdown occurs.
Post stress test checks the oxide status after the ramp stress test.
The methodology of the post stress test is the same as for initial test. The normal operating
voltage (Vuse) is applied to the oxide, then the leakage current (I
For the measurement circuit, connections, and measurement setups, see “Initial Test”.
Failure Categorization
Table 1-3 shows the oxide failure categories that are determined by the sample program.
The failure category is displayed for each device, and Vbd, Qbd, and qbd are also
displayed.
The measured data and measurement settings are saved in a file.
The following provides a brief description for each subprogram.
Test_setting Specifies and checks the parameter values. These are values that the
program will set directly instead of some of the setup file values.
Get_fileLoads measurement setup files from the diskette into internal memory:
spot measurement setup into MEM1, and sweep measurement setup
into MEM2. Having the measurement setups in internal memory
reduces the measurement time.
Init_fin_test Executes the spot measurement for initial test or for post stress test.
First parameter specifies the test: Init is for initial test, and Fin is
for post stress test. The measurement results are returned to the second
parameter.
JudgeCategorizes failure according to measurement results of initial, ramped
stress, and post stress tests. If the failure is initial failure, this
subprogram aborts the program.
Sweep_testExecutes sweep measurement for ramped stress test, then returns the
result flag, Vbd, and Qbd to the three parameters. The measurement
result data is temporarily stored in internal memory (MEM3).
Save_dataSaves measurement result data (that is in MEM3) to a file on the
This section describes how to customize the sample program to suit your test device.
Using an External Computer
This sample program (VRAMP) is assumed to run on the Instrument BASIC that is built
into the 4155/4156. The 4155/4156 is used as both the measurement instrument and the
controller running IBASIC, so VRAMP sets device selector 800. On the following three
lines, the 4155/4156 is assigned and interrupt from it is enabled as follows:
If you use an external controller (that can run HP BASIC environment) to control the
4155/4156, you need to modify a few lines of the sample program. For example, if you use
HP BASIC/WS on an HP 9000 Series 300 computer, you only need to modify lines the
above three lines as follows:
In this case, the 4155/4156 has GPIB address 17 and is not used as the system controller,
and is connected to the built-in GPIB of the HP 9000 series 300 controller with an GPIB
cable. Use the following procedure to set the GPIB address and system mode:
1. Turn on your 4155/4156.
2. Press
3. Select MISCELLANEOUS softkey.
4. Move the field pointer to the "415x is " field, then select the NOT CONTROLLER
5. Move the field pointer to the "415x" field in the GPIB ADDRESS area, then enter: 17.