SCHEMATIC DIAGRAMS
DIGITAL VIDEO CAMERA
YF09820055
GR-X5US
CD-ROM No.SML200506
GR-X5US[M5D727]
For disassembling and assembling of MECHANISM ASSEMBLY, refer to the SERVICE MANUAL No.86700(MECHANISM ASSEMBLY).
Lead free solder used in the board (material : Sn-Ag-Cu, melting point : 219 Centigrade)
COPYRIGHT © 2005 Victor Company of Japan, Limited
No.YF098SCH
2005/6
CHARTS AND DIAGRAMS
NOTES OF SCHEMATIC DIAGRAM
Safety precautions
The Components indentified by the symbol are
critical for safety. For continued safety, replace safety
critical components only with manufacturer's recommended parts.
1. Units of components on the schematic diagram
Unless otherwise specified.
1) All resistance values are in ohm. 1/6 W, 1/8 W (refer to
parts list).
Chip resistors are 1/16 W.
K: KΩ(1000Ω), M: MΩ (1000KΩ)
2) All capacitance values are in µF, (P: PF).
3) All inductance values are in µH, (m: mH).
4) All diodes are 1SS133, MA165 or 1N4148M (refer to parts
list).
Note: The Parts Number, value and rated voltage etc. in
the Schematic Diagram are for references only.
When replacing the parts, refer to the Parts List.
2. Indications of control voltage
AUX : Active at high.
AUX or AUX(L) : Active at low.
!
4. Voltage measurement
1) Regulator (DC/DC CONV) circuits
REC : Colour bar signal.
PB : Alignment tape (Colour bar).
— : Unmeasurable or unnecessary to measure.
2) Indication on schematic diagram
Voltage indications for REC and PB mode on the schematic diagram are as shown below.
REC mode
12 3
2.5
(5.0)
PB mode
1.8
PB and REC modes
(Voltage of PB and REC modes
are the same)
Note: If the voltages are not indicated on the schematic
diagram, refer to the voltage charts.
5. Signal path Symbols
The arrows indicate the signal path as follows.
NOTE : The arrow is DVC unique object.
Playback signal path
Playback and recording signal path
3. Interpreting Connector indications
1
2
Removable connector
3
1
2
Wire soldered directly on board
3
1
Non-removable Board connector
2
3
1
2
4
Board to Board
3
Connected pattern on board
The arrows indicate signal path
Note: For the destination of each signal and further line
connections that are cut off from the diagram,
refer to "BOARD INTERCONNECTIONS"
Recording signal path
(including E-E signal path)
Capstan servo path
Drum servo path
(Example)
R-Y
Playback R-Y signal path
Y
Recording Y signal path
6. Indication of the parts for adjustments
The parts for the adjustments are surrounded with the circle
as shown below.
7. Indication of the parts not mounted on the circuit board
“OPEN” is indicated by the parts not mounted on the circuit
board.
R216
2-1(No.YF098)
OPEN
CIRCUIT BOARD NOTES
1. Foil and Component sides
1) Foil side (B side) :
Parts on the foil side seen from foil face (pattern face)
are indicated.
2) Component side (A side) :
Parts on the component side seen from component face
(parts face) indicated.
rts location are indicated by guide scale on the circuit board.
2. Parts location guides
Parts location are indicated by guide scale on the circuit board.
LOCATION
IC
Category : IC
Horizontal “A” zone
Vertical “6” zone
(A : Component side)
D : Discrete component)
B : Foil side
C : Chip component
REF No.
IC101 B C 6 A
Note: For general information in service manual, please
refer to the Service Manual of GENERAL INFORMATION Edition 4 No. 82054D (January 1994).
(No.YF098)2-2
BOARD INTERCONNECTION
20
OP BLOCK
INT MIC
C_FG[+]
GND
C_FG[-]
MDA_2.9V
C_COIL_W
C_COIL_W
C_COIL_U
C_COIL_U
C_COIL_V
C_COIL_V
HG_U[+]
HG_V[+]
CAPSTAN MOTOR
DRUM MOTOR
ROTARY
ENCODER SW
MECHA
LOADING MOTOR
HEAD
SENSOR
FOCUS UNIT
(Page2-46)
HG_W[+]
HG_BS[+]
HG_BS[-]
HG_W[-]
HG_V[-]
HG_U[-]
YTU94074-18
YTU94077-18
D_PG[-]
COIL_COM
D_COIL_W
D_COIL_W
D_COIL_V
D_COIL_V
D_COIL_U
D_COIL_U
D_FG[-]
D_PFG[+]
YTU94074-11
YTU94077-11
CAM_SW_C
CAM_SW_B
CAM_SW_A
YTU94074-6
YTU94077-6
LOAD_REV
LOAD_REV
LOAD_FWD
LOAD_FWD
DEW_SENS
YTU94074-6
YTU94077-6
YTU94074-8
YTU94077-8
REEL_VCC
S_RL[+]
TAPE_LED
CAS_SW
E_SENS
REC_SAFE
MDA_2.9V
S_SENS
YTU94074-16
YTU94077-16
GND
GND
GND
GND
GND
GND
GND
T_RL[+]
GND
T_RL[-]
S_RL[-]
MIC1
MIC2
MIC3
GND
CN405
CN404
NC
NC
CN407
2S
2F
1S
1F
CN402 CN403
CN406
STROBE UNIT
(Page2-46)
TALLY
SENSER
FLASH
NOTE: The number of patch cords ( ) are indicated by interconnected.
CCD
(Page2-29)
REEL_VCC
T_REEL
CN408CN401
S_REEL
CAS_SW
TAPE_LED
E_SENS
S_SENS
REC_SAFE
MIC1
(Page2-37)
MIC2
MIC3
DRUM_PG
DRUM_FG
DRUM_REF
L_FRB
LD_ON
MDA_PS
PRE/REC
C_FRB
CAP_FG
CAP_REF
GND
GND
CAP_ERR
CAP_PWR
CAP_PWR
CAP_PWR
DRUM_PWR
DRUM_PWR
DRUM_PWR
DRUM_ERR
GND
GND
(Page2-35)
GND
GND
REG_3.1V
REG_3.1V
MDA
M_UNREG
M_REG4.8
M_REG4.8
M_REG4.8
GND
DUMP_CTL
HID3
HID1
PBH
RECH
(Page2-33)
REC_CTL
ENV_OUT
VREF_1.1
GND
AGC_OUT
GND
VRB_AGC
ATF_GAIN
VRB_ATF
GND
PRE/MDA IF
ATFI
GND
NOSIG_LV
REG_2.5V
REF_CLK
RECCADJ
REC_DATA
GND
REC_CLK
REG_4.8V
REG_4.8V
REG_4.8V
REG_4.8V
REG_3.1V
REG_3.1V
REG_3.1V
PRE/MDA
MONI_CHG
GND
GND
40
GND
CAM_SW_C
CAM_SW_B
CAM_SW_A
DEW_SENS
YTU94105-40
YTU94077-40
YTU94074-8
YTU94077-8
FCUS_PB
FCUS_PA
KEYC_1
KEYC_2
KEYC_3
KEYC_4
GND
GND
M_REG4.8
M_REG4.8
ISO100
STRB_CHG
STRB_AD
REG_4.8V
STRB_SNS
GATE_PLS
STRB_ENV
ISO200
GND
GND
GND
TALLY
YTU94074-14
YTU94077-14
CN107
YTU94105-40
YTU94077-40
CN106
CN302 CN303
YTU94128A-4
INT/R
INT_GND
INT_GND
CN109 CN102
W/B
IR
J101
EXT MIC
J102
H. PHONE
MULTI CONN.
CAP_PWR
CAP_PWR
CAP_PWR
CAP_PWR
DRUM_PWR
DRUM_PWR
30
YTU94109-33
YTU94129A-33
NC
ZOOM4
INT/L
REG_8.5V
REG_8.5V
CAP_PWR
DRUM_PWR
DRUM_PWR
DRUM_PWR
REG
(Page2-31)
ZOOM3
REG_-7.5
REG_8.5V
ZOOM2
ZOOM1
REG_-7.5
REG_2.5V
F_LED
F_VCC
GUARD
DRIVE-ND
DRIVE+ND
REG_15V
REG_2.5V
F_PTR_AD
REG_15V
HGOUT-IS
HGVCC+IS
HGVSS-ND
HGOUT-ND
HGOUT+ND
HGVCC+ND
MAIN
10
MAIN IF
(Page2-5)
V I/O
(Page2-13)
P.PRCS OP DRV
(Page2-21)
AL_3.1V
AL_3.1V
LCD_3.1V
REG_3.1V
REG_3.1V
REG_2.5V
CAM_3.1V
CAM_3.1V
J301
BATT_+
ADP_DC
ADP_L
GND
DC JACK
HGOUT+IS
LCD_3.1V
REG_3.1V
DRIVE-IS
HGVSS-IS
GND
DRIVE+IS
GND
REG_3.1V
GUARD
REG_3.1V
GND
OP_THRMO
GND
REG_3.1V
GUARD
GND
FOCUS1
REG_3.1V
FOCUS2
GND
FOCUS3
REG_3.1V
FOCUS4
GND
Z_VCC
REG_1.8V
Z_LED
NC
Z_PTR_AD
SYSCON
GND
GND
REG_1.8V
V1_B
RG_B
SIG_B
RCsub
A_GND
CN101
(Page2-7)
NUCORE
(Page2-15)
(Page2-23)
GND
GND
GND
REG_1.8V
REG_1.8V
REG_1.8V
V3_B
GND
REG_1.8V
15V_B
REG_1.8V
15V_B
V4_G
GND
V3_G
V2_G
V1_G
GND
REG_1.8V
REG_1.8V
(Page2-31
A_GND
GND
SIG_G
A_GND
GND
REG_1.8V
REG
A_GND
GND
REG_1.8V
15V_RG
REG_1.8V
15V_RG
GND
GND
A
2-3(No.YF098)
MAIN(MAIN IF) SCHEMATIC DIAGRAM
CN103
TALLY
STRB_ENV
GATE_PLS
STRB_SNS
STRB_AD
STRB_CHG
KEY_C
FCUS_PA
FCUS_PB
ADP_L
T_BATT
CHRG_EVR
I_MTR
V_BATT
RESET
AREG_SO
AREG_CLK
REG_CS
DRUM_ERR
D_GAIN
CAP_ERR
LIT_3V
D_BATT
ISO100
GND
ISO200
M_UNREG
TO SYSCON
TO NUCORE
TO OP DRV
TO P.PRCS
TO SYSCON
TO CN107
TO SYSCON
TO CN107
TO SYSCON
TO SYSCON
TO CN107
IC1201
RS751-X
C1202
TO EJECT/TRIG
GND
GND
GND
GND
EJT_SW
DIAL_PB
P_MEDIA
TRIG_SW
DIAL_OFF
DIAL_AUTO
DIAL_MANU
R1201
47
REG_4.8V
IR_RMC
TO SYSCON
C1201
10/6.3
T
TO SYSCON
PWR_LED
TO SYSCON
CN1CN108
TO REG
REG_4.8V
M_REG4.8
REG_1.8V
REG_3.1V
LCD_3.1V
CAM_3.1V
AL_3.1V
REG_2.5V
REG_15V
REG_-7.5
REG_8.5V
DRUM_PWR
CAP_PWR
TO CN107
TO CN104
TO CDS,TG
TO SYSCON
TO TG
TO TG
TO CN104
TO CN107
TO CN107
1.5k
R1191
Q1191
RPM-22PB
MULTI CONN
TL2001 TL2002
R2006 R2007
00
GND
L1191
0
C1192
C1191
T
L2001
J103
D2001
0
L2002
0
C2001
4700p
0
L2003
0
L2004
0
L2005
0
L2006
0
L2007
D2002
C2002
4700p
GND
REG_4.8V
IR_OUT
GND
REM_OUT
V_OUT
GND
AU_SIG/R
Y_OUT
C_OUT
P_DET
AU_SIG/L
B2006
B2005
B2004
B2003
B2002
B2001
TO OP DRV
0
0
0
TO SYSCON
TO V I/O
TO AUDIO
TO V I/O
TO SYSCON
TO AUDIO
GND
TO SYSCON
TO SYSCON
CAM_SW_A
CAM_SW_B
DEW_SENS
CN106
QGF0528F1-40X
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked ( ) is not used.
2-5(No.YF098)
CAM_SW_C
GND
MONI_CHG
GND
GND
CN105
SDDAT2
REG_3.1V
SDCD
SDDAT3
SDDAT1
SDDAT0
TO NUCORE
TO SYSCON,NUCORE
GND
SDWP
SDCMD
TO NUCORE
TO SD
GND
SDCLK
TO NUCORE
MAIN(MAIN IF)
10
GND
GND
GND
GND
GND
GND
PHOTO_H
ZOOM_SW
TO SYSCON
PHOTO_F
SPK+
SPK-
TO AUDIO
TO DVMAIN
TO V I/O
TO V I/O
TO P.PRCS
MONI_SW1
MONI_SW2
M_RVS
CVF_R
CVF_G
CVF_B
VCOM_M
LCD_G
LCD_R
LCD_B
LCD_3.1V
LCD_3.1V
REG_8.5V
REG_8.5V
HDCVF
VDCVF
AULCD_DO
AULCD_CK
LCD_CTL
REG_4.8V
REG_3.1V
P_GYAMP
G_RST
KEY_A
SET_SW
BATT/BL
MENU
KEY_B
HD_M
M_CS
GND
GND
TO REAR
CN104
TO SYSCON
TO SYSCON
MOD0
TO SYSCON,AUDIO
TO SYSCON
TO CN110
TO CN103
TO SYSCON
TO SYSCON
TO SYSCON
TO JIG CONN
0
R2002
REG_3.1V
ARMTCK
ARMTDO
TO NUCORE
FL_MD0
ARMTMS
TO SYSCON
IF_TX
RESET
0
R2001
AL_3VSYS
TO CN103
TO SYSCON
RA2001
NRZ0040-0R0X
TPA+
TPA-
TPB+
TPB-
GND
J104
0Ω
NNZ0028-001
TPA+
TPA-
TO DV JACK
TPB+
TPB-
J105
QNZ0497-001
TO USB
F_GND
DEV_D-
DEV_D+
F_GND
L2008
0
VBUS
L2009
ID
0
GND
JLIP_TX
PB_CLK
JLIP_RX
TO DVMAIN
TO SYSCON
R2003
0
NQR0563-001X
ENV_OUT
MAIN_VCO
TO CN106
DTC144EM-X
L2010
R2005
0
ATFI
HID1
FS_PLL
TO DVMAIN
R2004
47k
Q2001
GND
GND
NU_TX
V_OUT
NU_RX
TO NUCORE
TO MULTI CONN(J103), V I/O
USBDN
USBDP
GND
VCOM_M
CVF_B
CVF_R
CVF_G
TO CN104
TO NUCORE
HD_M
ARMTDI
CN110
nJRESET
nARMTRST
TO NUCORE
REG_3.1V
TO SYSCON,
NUCORE
nUSB_DET
TO OP DRV
TO OP DRV
TO OP DRV
TO DVMAIN
TO DVMAIN
TO DVMAIN
TO DVMAIN
TO DVMAIN
REF_CLK
RECCADJ
NOSIG_LV
REG_2.5V
TO DVMAIN
ATFI
GND
GND
TO SYSCON
TO SYSCON
_
CAM_SW_A
N106
GF0528F1-40X
ONS".
CAM_SW_B
CAM_SW_C
MONI_CHG
REG_4.8V
GND
GND
GND
REG_3.1V
REG_3.1V
REG_3.1V
REG_4.8V
REG_4.8V
REG_4.8V
REC_CLK
GND
REC_DATA
TO PRE/MDA(PRE)
TO DVMAIN
ATF_GAIN
VRB_ATF
VRB_AGC
GND
GND
AGC_OUT
TO DVMAIN
TO DVMAIN
TO CN110
VREF_1.1
REC_CTL
ENV_OUT
RECH
PBH
TO OP DRV
TO SYSCON
HID3
HID1
DUMP_CTL
TO CN103,OP DRV
REG_3.1V
GND
GND
M_UNREG
M_REG4.8
M_REG4.8
M_REG4.8
CN107
QGF0528F1-40X
REG_3.1V
GND
TO CN103
GND
GND
DRUM_PWR
DRUM_PWR
DRUM_ERR
CAP_PWR
DRUM_PWR
CAP_PWR
CAP_PWR
GND
CAP_ERR
GND
CAP_REF
CAP_FG
C_FRB
MDA_PS
TO PRE/MDA(MDA)
TO SYSCON
MIC2
DRUM_FG
DRUM_PG
DRUM_REF
L_FRB
LD_ON
MIC3
y10540001a_rev0.1
MIC1
S_SENS
REC_SAFE
E_SENS
TAPE_LED
CAS_SW
S_REEL
T_REEL
REEL_VCC
(No.YF098)2-6
MAIN(SYSCON) SCHEMATIC DIAGRAM
DV MAIN
LIT_3V
REM_OUT
AL_3VSYS
AL_3.1V
REG_3.1V
JLIP_RX
JLIP_TX
IR_RMC
V_BATT
SRV_TRK
PWR_LED
L1001
10µ
GND
IC1010
C1019
22/6.3V
IF_TX
TSR
FRP
SPA
HID1
R1037
560
BH25FB1WG-W
C1020
0.1
C1017
22/6.3V
Q1004
UMC3N-W
L1002
10µ
R1139
R1140
0R0
S-80823CNNB-G-W
TL1023TL1022TL1021
C1042
0.1
IC1007
C1018
0.1
R1054
100K
MRESET
0.1
C1043
V_BATT
SRV_TRK
CHRG_LED
TSR
FRP
SPA
HID1
TO MAIN IF(CN103)
TO MULTI CONN(J103)
TO JIG CONN(CN110)
TO MAIN IF(CN103)
TO JIG CONN(CN110)
TO MAIN IF
TO MAIN IF(CN103)
TO DV MAIN
TO MAIN IF(CN106,110)
TO MAIN IF(CN108)
Q1012
DTC143XE-X
R1003
S
D
Q1009
2SJ347-X
Q1005
DTC143XE-X
R1004
IC1006
R1053
2.2K
R1062
RS5C314-X
X1002
VDD
NAX0564-001X
CLKCSXin
SIO
Xout
VSS
INTR
C1040
8p
100K
R1052
220K
R1067
REMOTE
330K
RTC_CS
AVREFOFF
G
R1002
D1002
1SS376-X
R1028
R1085
R1026
1K
4.7K
IC1009
SN74AHC1G08K-X
R1060
R1084
AREG_CLK
AREG_SO
RTC_IN
TRG_OUT
RTC_INTR
IF/TX
IF_RX
1K
TO MAIN IF(CN103)
STROBE UNIT(CN302)
TO MEMORY,TG
TO MAIN IF(CN103,110)
TO P.PRCS
TO NUCORE
TO P.PRCS
TO JIG CONN(CN110)
TO MAIN IF(CN104)
TO MAIN IF(CN104),AUDIO
TO AUDIO
TO MAIN IF(CN103)
FOCUS UNIT(CN303)
TO MAIN IF(CN104)
TO MAIN IF(CN108)
POWER UNIT(CN902)
TO MAIN IF(CN108)
TO MAIN IF(CN107)
TO MAIN IF(CN104)
TO MAIN IF(CN108)
TO MAIN IF(CN105)
TO MAIN IF(CN105)
ZOOM FPC(CN703)
TO MAIN IF(CN104)
TO MAIN IF(CN103)
TO MAIN IF(CN103)
TO MAIN IF(CN104)
TO MAIN IF(CN107)
TO MAIN IF(CN103)
TO MAIN IF(CN107)
TALLY
FLSH_RST
RESET
SCPU_CS
SCPU_INT
DSP_RSV
J209_OUT
J209_IN
J209_CK
FL_MD0
M_RVS
LCD_CTL
AULCD_CK
AULCD_DO
TL1001
TL1002
TL1003
TL1004
TL1005
TL1006
TL1007
TL1008
BUZZER
FCUS_PA
FCUS_PB
BATT/BL
DIAL_MANU
DIAL_AUTO
DIAL_OFF
DIAL_PB
EJT_SW
CAS_SW
MONI_SW1
P_MEDIA
TRIG_SW
PHOTO_F
PHOTO_H
ZOOM_SW
KEY_A
KEY_B
KEY_C
SET_SW
MENU
MONI_SW2
LD_ON
MDA_PS
C_FRB
L_FRB
D_GAIN
CAP_FG
DRUM_PG
DRUM_FG
DRUM_REF
CAP_REF
Q1011
R1089
R1097
3.3K
100k
10k
10K
R1080
Q1007
2SC4617/QR/-X
R1073
10K
R1074
4.7K
10K
10K
100K
R1022
R1167
R1181
R1088
3.3K
R1070
10K
R1182
R1091
UMC3N-W
150K
Q1008
DTC124EE-X
PDTC124EE-X
100K
100K
R1016
R1015
10K
R1092
R1087
C1053C1052C1051
100K
R1017
3.3K
100K
R1018
R1093
10K
R1056
560
R1008
0R0
M_CS
R1195 R1194
10k
10K
10K
10K
R1014
R1019
R1020
100k
R1011
TALY_LED
CDWE
DV_CS
CDRE
P_MEDIA
TRIG_SW
1K
1K
R1137
R1136
P_MEDIA
TRIG_SW
AULCD_CK
MIC2
AULCD_CK
MIC2
REC_SAFE
CAM_SW_C
REC_SAFE
CAM_SW_C
MIC3
IF_TX
MIC3
IF/TX
CAM_SW_A
CAM_SW_B
CAM_SW_A
CAM_SW_B
IF_RX
EEPRM_DO
EEPRM_DO
IF_RX
CDALE
TL1018
KENTO1
EEPRM_DI
EEPRM_DI
EEPRM_CK
TL1012
TL1011
TL1014
CDALE
KENTO2
EEPRM_CK
AREG_SO
AREG_SO
RTC_IN
TL1013
100K
100K
R1178
R1177
RSV
CDRE
STRB_CHG
UPD703166-M57-A
RTC_IN
AREG_CLK
J209_IN
0
R1163
AREG_CLK
J209_IN
DRWSEL
DRWSEL
IC1001
J209_OUT
R1161
R1162
J209_CK
J209_OUT
CDWE
DV_CS
J209_CK
DSC_DOUT
0
R1184
DSC_DOUT
SHUT_ATT
100K
R1176
SHUT_ATT
DSC_DIN
0
000
R1185
R1186
DSC_DIN
DSC_CLK
DV_RST
ZMIC_ATT
DSC_CLK
RTC_CS
ADDT00
ADDT01
ADDT02
ADDT03
ADDT04
ADDT05
ADDT06
ADDT07
ADDT08
ADDT09
ADDT10
ADDT11
R1138
ADDT12
ADDT05
ADDT06
ADDT07
ADDT08
ADDT09
ADDT10
ADDT11
ADDT12
MODE0
FL_MD0
MODEJ
PLLSEL
X1
X2
TD0
TCK
TRST
TMS
TDI
Vdd
Vdd
Vdd
Vdd
Vdd
Vdd
PVDD
CVDD
AVREF
22K
ADDT13
ADDT14
ADDT15
RESET
CKSEL1
EJT_SW
MONI_SW
DSC_CS
CHG_WKUP
JLIP_INT
NMI
VF_SW
CAS_SW
1K1K1K1K1K1K1K
R1117
R1118
R1119
R1120
R1121
VF_SW
CAS_SW
EJT_SW
MONI_SW
CHG_WKUP
IF_RX
DIAL_PB
FLSH_RST
MRESET
SCPU_CS
SCPU_INT
DSP_RSV
J209_OUT
J209_IN
J209_CK
M_CS
M_RVS
LCD_CTL
AULCD_CK
AULCD_DO
R1069
100K
AULCD_DI
R1071
2.7K
BZ_ENV
R1072
D1001
18K
DA221-X
BZ_FREQ
47K
C1046
1
R1075
FCUS_PA
FCUS_PB
100K
100k
100k
100k
100K
VF_SW
R1021
R1038
R1040
R1099
R1082
DIAL_MANU
DIAL_AUTO
DIAL_OFF
DIAL_PB
EJT_SW
CAS_SW
MONI_SW
P_MEDIA
TRIG_SW
PHOTO_F
PHOTO_H
ZOOM_SW
KEY_A
KEY_B
KEY_C
SET_SW
MENU
RSV_SW2
10K
R1094
R1086
C1054
0.0220.0220.0220.022
LD_ON
MDA_PS
C_FRB1
C_FRB2
L_FRB1
L_FRB2
D_GAIN
10K
CAP_FG
DRUM_PG
DRUM_FG
3.3K
D_REF
C_REF
22K
R1109
22K
R1113
22K
R1110
R1114
22K
22K
R1111
R1112
100
NAX0692-001X
C1001
R1005
0R0
R1006
47K
R1007
0R0
1M
R1001
X1001
C1002
10p
8p
C1003
C1004
C1005
C1006
C1007
C1008
C1009
C1010
C1011
C1012
C1013
C1014
C1015
C1016
ADDT13
ADDT14
ADDT15
MRESET
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
ADDT04
DIAL_PB
R1122
DIAL_OFF
ADDT02
ADDT03
DIAL_OFF
DIAL_AUTO
R1123
DIAL_AUTO
ADDT00
ADDT01
DIAL_MANU
VIF_OUT
1K
R1124
DIAL_MANU
VIF_OUT
ISO_200
PWDA2
VIF_IN
VIF_IN
ISO_100
PWAD2
VIF_CLK
VIF_CLK
L_MUTE
A_MUTE
L_MUTE
A_MUTE
AULCD_DO
AULCD_DI
AULCD_DO
AULCD_DI
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked ( ) is not used.
2-7(No.YF098)
1002
AX0564-001X
EMOTE
CDRE
TL1014
100K
R1178
CDRE
KENTO2
AREG_SO
RTC_IN
_
RTC_IN
AREG_CLK
C1040
8p
CDWE
DRWSEL
100K
R1177
RSV
CDWE
DRWSEL
STRB_CHG
IC1001
UPD703166-M57-A
AREG_CLK
J209_IN
J209_OUT
J209_CK
0
R1161
R1162
R1163
J209_CK
J209_OUT
J209_IN
DV_CS
SHUT_ATT
DV_CS
SHUT_ATT
DSC_DOUT
DSC_DIN
0
0
R1184
R1185
DSC_DOUT
DSC_DIN
DV_RST
100K
R1176
ZMIC_ATT
DSC_CLK
000
R1186
DSC_CLK
RTC_CS
PBH
DV_RST
RTC_CS
0
R1160
DSP_RSV
RECH
PBH
RECH
DSP_RSV
DRUM_FG
DRUM_FG
HID3
HID3
CAP_FG
CAP_FG
TL1025
MONI_CHG
NET_LED1
T_REEL
S_REEL
T_REEL
PSCTL
CLK27SEL
CLK27SEL
MONI_CHG
S_REEL
RSV
100K
R1079
RTC_INTR
S_IN_L
PSCTL
S_IN_L
RTC_INTR
FLDCPU
FLDCPU
TL1024
DV_WAIT
DV_WAIT
NET_LED2
DRUM_PG
SPA
DRUM_PG
SPA
TL1015
22K
R1083
P_DET
1K
R1134
S_DET
SRV_TRK
SRV_TRK
TSR
22K
R1090
ADP_H
P_DET
TSR
FRP
R1179
BATT_H
ADP_H
FRP
0
R1159
47K
HP_DET
100K
1K
R1175
R1009
BATT_H
HP_DET
DSC_RSV1
REMOTE
100K
R1024
REMOTE
100K
R1174
RSV RSV
1K
R1125
FCUS_PA
C_REF
CHRG_EVR
CHRG_EVR
SHOE_PWM
MENU_P_A
MENU_P_B
1K
1K
R1023
R1126
PHOTO_F
FCUS_PB
R1010
D_REF
CAP_REF
DRUM_REF
ASPECT1
ZOOM_SW
FOCS_KEY
PHOTO_F
SCPU_INT
0
R1078
R1155
SCPU_CS
SCPU_INT
R1050
R1049
47K
EM_DET_H
SYTG_RST
1K
R1095
EXTM_H
EM_DET_H
M_CS
LCD_CTL
VF_CTL
M_RVS
S2_DET
I_MTR
T_BATT
SCPU_CS
RSV
100K
R1025
R1157
47K
47K 0
82k
62k
T_BATT
ASPECT2
AVREFOFF
ASPECT2
S_SENS
S_SENS
E_SENS
0.0068
R1156
C1022
10k
R1048
DSP_RST
DSP_RST
AVREFOFF
E_SENS
DEW_SENS
DEW_SENS
0.0068
C1023
0.01
C1038
100k
R1047
100k
R1046
TRG_OUT
FLSH_RST
TRG_OUT
FLSH_RST
MIC3
MIC2
MIC3
MIC2
0.01
C1024
VDD
[-]
ANA_IN_H
CHRG_LED
ANA_IN_H
CHRG_LED
SHOEGATE
TAPE_LED
GATEPULS
IR_CLK
OSD_RST
BZ_ENV
BZ_FREQ
MMC_L
UDBDOWN
DSC_STS
DSC_RSV2
DFL_RST
DSC_WKUP
DSC_RST
DSC_RDY
UREG_SEL
SHOE_VON
D_GAIN
VDCPU
REEL_ON
LD_REV
LD_FWD
MDA_PS
CAP_BRK
CAP_RVS
VENC_CS
AUDIO_CS
MIC_CTL
OSD_CS
AUDSP_48
DAC_CS
EEPRM_CS
REG_CS
AUDSP_32
RSV_SW2
SET_SW
PHOTO_H
FOCS_SET
V_BATT
MIC1
MIC1
V_BATT
TALLY
LD_ON
MENU
KEY_D
KEY_C
KEY_B
KEY_A
IC1002
10
VIF_CLK
OSD_CS
VIF_OUT
OSD_RST
0.1
C1036
EEPRM_CS
EEPRM_CK
EEPRM_DI
EEPRM_DO
DSC_DOUT
DSC_DIN
DSC_CLK
D_BATT
USBDOWN
ISO_100
ISO_200
SDCD
EM_DET_H
SHUT_ATT
A_MUTE
L_MUTE
PD_L
AUDIO_CS
HP_DET
S_IN_L
VENC_CS
VIF_CLK
VIF_OUT
VIF_IN
S2_DET
PSCTL
ANA_IN_H
ASPECT1
ASPECT2
T_REEL
S_REEL
T_BATT
I_MTR
CHRG_EVR
REG_CS
AREG_CLK
AREG_SO
P_DET
RECH
PBH
HID3
MONI_CHG
DV_RST
CLK27SEL
DV_WAIT
CDWE
CDALE
DRWSEL
CDRE
ADDT00
ADDT01
ADDT02
ADDT03
ADDT04
ADDT05
ADDT06
ADDT07
ADDT08
ADDT09
ADDT10
ADDT11
ADDT12
ADDT13
ADDT14
ADDT15
DV_CS
J216_RST
SYTG_RST
DSP_RST
MVD
FLDCPU
VDCPU
MAIN
MB90099PFV134EX
SCLK
HD
CS
VD
DATA
VC0
RST
VC1
VDD
VC2
SDR
BLKA
XD
VC3
EXD
BLKB
TEST
TST0
VSS BLKC
R1187
3.3k
R1188
R1189
OSD_HD
OSD_VD
VC0
VC1
VC2
BLKA
VC3
BLKB
BLKC
DOT_CLK
OSD_RST
EEPRM_CS
EEPRM_CK
EEPRM_DI
EEPRM_DO
DSC_DOUT
DSC_DIN
DSC_CLK
D_BATT
nUSB_DET
0
ISO100
0
ISO200
SDCD
EM_DET_H
SHUT_ATT
A_MUTE
L_MUTE
PD_L
AUDIO_CS
HP_DET
S_IN_L
VENC_CS
VIF_CLK
VIF_OUT
VIF_IN
S2_DET
PSCTL
ANA_IN_H
ASPECT1
ASPECT2
T_REEL
S_REEL
ADP_L
T_BATT
I_MTR
CHRG_EVR
REG_CS
AREG_CLK
AREG_SO
P_DET
TO MAIN IF(CN106)
RECH
PBH
HID3
MONI_CHG
DV_RST
CLK27SEL
XINT
DV_WAIT
CDWE
CDALE
DRWSEL
CDRE
ADDT00
ADDT01
ADDT02
ADDT03
ADDT04
ADDT05
ADDT06
ADDT07
ADDT08
ADDT09
ADDT10
ADDT11
ADDT12
ADDT13
ADDT14
ADDT15
DV_CS
AFE_RST
SYTG_RST
DSP_RST
MVD
FLDCPU
VDCPU
REC_SAFE
CAM_SW_C
CAM_SW_B
CAM_SW_A
TAPE_LED
REEL_VCC
S_SENS
E_SENS
DEW_SENS
MIC3
MIC2
MIC1
TO V I/O
TO P.PRCS
TO MAIN IF(CN103)
TO USB(J105)
NUCORE
TO MAIN IF(CN103)
TO MAIN IF(CN105)
NUCORE
TO AUDIO
TO AUDIO
TO V I/O
TO MAIN IF(CN107)
TO MAIN IF(CN103)
TO MULTI CONN
(J103)
TO DVMAIN
TO NUCORE,P.PRCS
TO TG
TO NUCORE
TO NUCORE,P.PRCS
TO MAIN IF(CN107)
TO MAIN IF(CN106)
TO MAIN IF(CN107)
TO MAIN IF(CN106)
TO MAIN IF(CN107)
IC1003
SN74AHC1G00K-X
100k
R1044
OUT
R1043
1k
[+]
VSS
IC1004
NJU7108F3-X
C1037
0.01
R1045
1M
BATT_H
ADP_H
CHG_WKUP
M_CS
ASPECT1
LCD_CTL
J216_RST
1K
100K
100K
100K
1k
1K
100K
100K
100K
VDCPU
REEL_ON
100K
100K
100K
100K
100K
100K
1K
1K
1K
1K
1K
1K
1K
1K
M_RVS
PD_L
HID1
TLED_ON
OSD_RST
D_BATT
BZ_ENV
BZ_FREQ
SDCD
USBDOWN
D_GAIN
TALY_LED
MVD
TL1019
TL1017
L_FRB2
L_FRB1
MDA_PS
C_FRB2
TLED_ON
C_FRB1
LD_ON
REC_SAFE
VENC_CS
CAM_SW_C
AUDIO_CS
CAM_SW_B
MIC_CTL
CAM_SW_A
OSD_CS
REEL_ON
EEPRM_CS
REG_CS
RSV_SW2
MENU
SET_SW
PHOTO_H
KEY_C
KEY_B
KEY_A
ZOOM_SW
S2_DET
I_MTR
T_BATT
S_SENS
E_SENS
DEW_SENS
MIC3
MIC2
MIC1
MIC_CTL
C1058
C1057
C1039
C1021
C1033
C1032
C1031
C1044
C1028
C1027
C1041
R1133
PD_L
HID1
R1096
R1180
R1051
R1135
RSV
R1172
R1171
R1170
XINT
R1165
RSV
MVD
R1166
R1169
R1076
R1132
RSV
R1131
RSV
R1130
RSV
R1151
R1077
R1029
R1154
R1128
R1127
R1153
R1068
0.1
C1025
100K
R1061
Q1010
DTC144EE-X
R1152
47k
R1055
1.5K
R1039
Q1003
UMC3N-W
Q1002
UMC3N-W
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
330k
3.3k
R1030
3.3k
R1031
R1032
R1033
75k
0.1
3.3k
R1034
Q1001
DTA114EE-X
RN2102-X
PDTA114EE-X
47K
R1035
47K
R1036
47K
R1041
47K
R1042
(SYSCON)
ONS".
y10542001a_rev0.1
(No.YF098)2-8
MAIN(AUDIO) SCHEMATIC DIAGRAM
MAIN(AUDIO)
10
Q2401
2SC4617/RS/-X
C2401
10/6.3
T
R2401
4.7k
R2408
OPEN
TO EXT MIC
J101
QNS0233-001
TO OP BLOCK
CN109
QGA1001F1-04X
INT_GND
INT_GND
TO MAIN IF(CN105)
SPK+
SPK-
INT/R
INT/L
D2651
UDZS6.8B-X
NQR0269-013X
NQR0269-013X
NQR0269-013X
D2652
EMZ6.8N-X
L2603
L2602
L2601
C2651
0.001
C2602
OPEN
C2601
OPEN
NQR0269-013X
L2652
L2651
NQR0269-013X
0.001
C2652
L2653
OPEN
L2654
NQR0269-013X
R2602
2.2k
R2601
2.2k
C2653
OPEN
R2619
4.7k
R2618
4.7k
C2654
OPEN
C2612
1.0
C2609
0.0033
C2611
1.0
C2605
0.0047
C2610
0.0033
C2606
0.0047
R2608
2.2k
R2607
2.2k
DTC144EE-X
C2613
1.0
C2624
R2610
C2656
0.047
C2604
0.022
C2603
0.022
C2655
0.047
C2623
Q2201
R2231
C2201
10p
22k
R2609
22k
10p
R2202
560k
1k
R2201
220k
R2203
C2223
39k
BEEP1
PREOR
PRENR
EXTR
INTR
MGND
MVDD
MPWR
MRF
INTL
EXTL
PRENL
PREOL
SPK+
0.1
C2224
0.1
R2204
BEEP2
MUTE
150k
0.1
C2203
1.0
MIN
SPK-
MOUT
PDN
1.0
C2202
VCOM
SVDD
AVDD
IC
AK
SGND
TO MULTI CONN(J103)
AU_SIG/L
AU_SIG/R
TO H.PHONE
J102
QNS0233-001
L2701
NQR0251-004X
L2702
NQR0251-004X
L2704
NQR0251-004X
L2703
NQR0251-004X
C2701 C2702
0.01 0.01
R2703
C2703
C2704
0.1
0.1
R2708
560k
560k
R2704
10k
R2709
10k
R2701
R2702
Q2701
UMX1N-W
R2706
R2707
Q2702
UMX1N-W
820
220
R2705
3.3k
R2710
3.3k
820
100k
R2711
220
R2212
C2217
2.7
2.7
R2213
0.1
0.1
C2218
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked ( ) is not used.
2-9(No.YF098)
10/6.3
C2403
Q2403
2SC4617/RS/-X
TO REG
L2401
R2402
4.7k
R2403C2404
18k10
/6.3
T
1.0
1.0
C2204
03
.0
1.0
C2202
C2405
C2205
0.1
47/4
C2206
TT
47/4
C2207
10Ω
C2402
10
/6.3
T
REG_4.8V
REG_3.1V
GND
TO P.PRCS
S_SHUT
HPL
AVDD
IC2201
AK4660VQ
SGND
10/6.3
C2403
OPEN
C2235
L2402
10Ω
AGND
BCLK1
C2234
OPEN
HVCM
MCLK1
MOUT
VCOM
PDN
SVDD
2.7
0.1
MUTET
LRCK1
C2233
HVDD
CDTI
OPEN
HPR
ROUT1
LOUT1
DVDD
LRCK2
MCLK2
BCLK2
STDI2
SDTO1/SDTO2
SDTI1
CSN
CCLK
RIN1
LIN1
DVSS
C2214
0.1
C2210
1.0
C2213
0.1
C2209
1.0
T
C2406
10/6.3
C2225
OPEN
C2226
OPEN
C2227
OPEN
C2228
OPEN
R2217
10
C2229
OPEN
R2207
R2206
R2407
R2209
22k
33k
R2208
22k
33k
10
TO DVMAIN
AIDAT
AODAT
AILRCK
AIMCK
AIBCK
TO MAIN IF(CN104),SYSCON
AULCD_CK
AUDIO_CS
AULCD_DO
SHUT_ATT
BUZZER
PD_L
A_MUTE
EM_DET_H
L_MUTE
HP_DET
TO SYSCON
TO MAIN IF(CN104)
SYSCON
TO SYSCON
y20375001a_rev0.1
ONS".
(No.YF098)2-10
MAIN(DVMAIN) SCHEMATIC DIAGRAM
MAIN
10
(DVMAIN)
R3051
L3002
L3005
L3004
L3006
L3001
C3003
C3007
C3005
10/6.3
C3008
10/6.3
C3001
10/6.3
100
1
C3072
C3074
OPEN
47/4
10
T
T
T
T
Q3001
2SC5658/QRS/-X
R3023
OPEN
OPEN
C3002
OPEN
R3005
OPEN
L3013
NQR0129-002X
OPEN
C3006
OPEN
TO REG
REG_2.5V
REG_1.8V
REG_3.1V
TL3002
TL3003
TL3004
TL3005
TL3006
GND
NQR0129-002X
NQL402M-100X
NCB10JK-106X
NQR0006-001X
NQR0006-001X
RB551V-30-X
D3004
NQR0129-002X
RA3004
10k
C3042
0.01
C3043
0.01
C3044
C3045
C3046
C3047
0.1
TDI
TCK
VSS
TMS
TDO
TRST
ADVIN0
ADAVD0
ADAVS0
ADVRH0
ADVRL0
DCTEST1
EXDATAI7
EXDATAI6
N.C
N.C
MON0
MON1
VDDE
VDDI
MON2
MON3
MON4
MON5
VSS
MON6
MON7
MON8
MON9
MON10
MON11
MON12
VDDE
VDDI
MON13
MON14
MON15
MON16
MON17
MON18
MON19
VSS
MON20
MON21
MON22
MON23
VDDE
MON24
MON25
MON26
MON27
0.1
0.1
0.01
VDDE
N.C
VDDP
VSSP
VDDA
VSS
N.C
N.C
VDDE
VSS
VSS
VDDE
VDDI
VSS
VDDE
VDDE
VDDI
VSS
VSS
MTEST
PHYAVD2
BUSRST
PHYAVS2
PMODE
PWR3
PWR1
PWR2
VDDI
PHYAVS1
PHYAVD3
PHYAVD1
VSS
VDDE
VDDI
VSS
N.C
DCTEST0
EXDATAI5
EXDATAI4
VPD
TBST
EXDATAI3
EXDATAI2
PBI
TTST
EXDATAI1
EXDATAI0
N.C
N.C
PBCLKO
PBCLKI
N.C
VSSP
N.C
VCI4185
N.C
VDDP
N.C
N.C
DAAOUT0
DAVRO0
EXTDATA6
EXTDATA7
DAVREF0
DAAVS0
VSS
DAAVD0
EXTDATA5
EXTDATA4
DAAOUT1
DAVRO1
EXTDATA2
EXTDATA3
DAVREF1
DAAVS1
VSS
VDDE
DAAVD1
SBE
EXTDATA0
EXTDATA1
HID
HSP
EXTFRP
EXTACCESS
RECDATA
RECCLK
VSS
EXTREQ
IC3001
JCY0152-2
RECCTL
SPA
ADRS10
VSS
ADRS8
ADRS9
OSC4185I
OSC4185O
ADRS7
DISCRI
ADRS6
REFCLK
ADRS5
ADVIN1
VSS
ADAVD1
BUSCLK
ADAVS1
VSS
VDDI
VSS
VDDE
R3070
TO MAIN IF(CN106)
TO MAIN IF
(CN106,110)
TO MAIN IF(CN106)
AGC_OUT
VRB_AGC
VREF_1.1
REC_DATA
REC_CLK
REC_CTL
REF_CLK
VRB_ATF
0Ω
C3011
0.1
ATFI
L3012
NQR0006-001X
C3055
OPEN
2SC5658/QRS/-X
Q3002
OPEN
R3056
R3034
R3063
OPEN
R3035
R3036
C3073
1.2k
OPEN
R3064
82k
12k
0Ω
R3037
C3058
0.047
R3066
OPEN
R3067
OPEN
R3041
OPEN
0Ω
C3065
OPEN
T
IC3002
JCY0177-W
1.5k
C3056
R3040
2.2k
1
560
0.001
C3059
R3038
C3061
R3039
0.01
560
0.1
C3012
R3029
1M
IC3003
SN74AHC1G04DC-X
R3059
C3062
0.01
10k
0.01
0.01
C3013
10
R3024
OPEN
R3002
C3015
10k
R3004
0.1
C3016
TL3009
TL3007
150
R3049
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked ( ) is not used.
2-11(No.YF098)
R3007
5.6k
TL3008
R3008
0.1
C3020
2.2k
MAIN(V I/O) SCHEMATIC DIAGRAM
MAIN(V I/O)
10
TO NUCORE
OUT_C0
OUT_C1
OUT_C2
OUT_C3
OUT_Y0
OUT_Y1
OUT_Y2
OUT_Y3
TO DVMAIN,NUCORE
DV2CKOUT
TO DVMAIN
DCO0
DCO1
DCO2
DCO3
DYO0
DYO1
DYO2
DYO3
ANA_INH
ANA_INV
TO P.PRCS
OUTV2
TO SYSCON
S2_DET
S_IN_L
VIF_IN
VIF_OUT
VIF_CLK
VENC_CS
OSD_RST
BLKA
BLKB
BLKC
OSD_HD
OSD_VD
DOT_CLK
PSCTL
ANA_IN_H
TO REG
REG_2.5V
REG_4.8V
REG_3.1V
REG_1.8V
VC0
VC1
VC2
VC3
GND
R3207
0Ω
IC3202
R3213
R3214
R3251
R3252
OPEN
RA3201
RA3202
0Ω
0Ω
OPEN
OPEN
0Ω
0Ω
C3238
OPEN
R3209
OPEN
NQR0129-002X
L3201
C3201
10
L3204
CSI6
WCSI2
R3338
OPEN
10µ
VSSQ
WCSI3
C3230
OPEN
CSI5
WINV
C3229
0.01
VSS
CSI4
VDD(CORE)
WINH
SDR_ONH
VDD(I/O)
OPEN
C3213
R3339
0Ω
T
C3228
OPEN
VDD(I/O)
VDD(CORE)
VSS
0.01
C3214
R3211
OPEN
C3205
47/4
CSI3
VCCQ
VDD(CORE)
RESVD
CSI2
RESHD
VSSQ
AMUTE
CSI0
CSI1
VDD(8AD)
VDD(8AD)
VSS(10DA)
VDD(10DA)
VDD(8DA)
VDD(8DA)
SCANI1
SCANI2
C3227
OPEN
VSS(8AD)
VSS(8AD)
VYIN
CLPY
IREF1
YCOUT
ABAR1
COMP1
YSOUT
VREF1
VSS(8DA)
IREF2
CROUT
ABAR2
COMP2
CBOUT
VREF2
COUT
VSS(8DA)
SCANI3
VSS VCCQ
VSS
CIN
VRH
VRL
VRM
NC
NC
NC
NC
R3216
C3232
OPEN
C3236
OPEN
C3237
OPEN
VCCQ
VSS
RST
CSO0
CSO1
CSO2
CSO3
YSO0
YSO1
YSO2
C3203
1
YSO3
VDD(I/O)
OUTH
OUTV
OUTH2
OUTV2
ZCNT
SDOUT
VDD(CORE)
VSS
CLK
SDIN
SCLK
CS
VC0
VC1
VC2
VC3
BLK1
BLK2
BLK3
HDOUT
VDOUT
CLKOSD
HDCVF
VDCVF
VSS
OPEN
C3208
VDD(I/O)
TL3211
C3206
0.01
R3254
0Ω
R3253
OPEN
C3207
0.01
R3201
100
R3206
OPEN
L3202
NQR0129-002X
C3202
/6.3
1
T
YSI7
VDD(I/O)
CSYNC
SCANMODE
YSI6
VSSQ
SCANEN
ADDATEST
0.01
C3209
C3235
OPEN
YSI4
YSI5
VCC
IPTEST
OPEN
C3210
VCCQ
VDD(I/O)
YSI3
HRP1
YSI2
VSSQ
HRP2
VDD(CORE)
0.01
C3211
C3234
YSI1
VDD(CORE)
WYSI0
WYSI1
0.01
R3210
OPEN
C3233
0.01
VSS
YSI0
WYSI2
WYSI3
NQR0006-001X
VCC
VDD(I/O)
IC3201
JCP8075
MONI1
MONI2
OPEN
C3212
L3203
C3204
10/6.3
0Ω
C3231
OPEN
VSS
VDD(CORE)
VDD(CORE)
VSS
R3215
INV
WCLK
T
0Ω
INH
CSI7
WCSI0
WCSI1
TO SYSCON
ASPECT1
ASPECT2
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked ( ) is not used.
2-13(No.YF098)
N
(
C3227
OPEN
VSS(8AD)
VDD(8AD)
VDD(8AD)
VSS(8AD)
CLPY
IREF1
YCOUT
ABAR1
COMP1
YSOUT
VREF1
VSS(10DA)
DD(10DA)
VSS(8DA)
VDD(8DA)
IREF2
CROUT
ABAR2
COMP2
CBOUT
VREF2
COUT
VDD(8DA)
VSS(8DA)
SCANI3
VSS VCCQ
L3701
10µ
#
Q3733
1k
C3708
0.01
#
R3738
680
#
R3736
18k
CH
#
C3737
R3737
820
R3740
820
#
R3746
2.2k
#
#
R3745
Q3735
EMZ1-W
1.5k
C3706
18k
#
C3744
5p
CH
#
L3732
6.8µ
#
CH
CH
R3720
0Ω
1
R3710
10k
#
R3739
#
0.1
#
R3735
1.8k
#
C3736
0.001
#
R3744
560
#
C3743C3745
3p33p
IC3701
BH7612FV-X
Q3702
EMZ1-W
R3711
10k
R3712
R3713
100k
#
#
C3734
R3734
5p
8.2k
CH
#
C3732
0.001
#
#
R3733
L3731
560
6.8µ
#
#
CH
CH
C3733C3735
3p33p
#
C3742
0.1
IN1[L]
SW
GND
OUT
IN2[H]
VCC
#
IC3731
MM1504XN-X
C3713
100/4
C3711
22/4
C3710
22/4
C3712
100/4
1M
CH
C3714
OPEN
R3714
82k
TT
TT
C3709
#
Q3731
2SC5658/QRS/-X
#
R3732
100
#
R3731
4.7k
#
R3730
C3731
4.7k
0.01
#
C3740
1
#
R3742
OPEN
#
C3741
1
#
R3743
OPEN
R3709
68
R3708
68
R3707
0.01
68
D3701
OPEN
R3715
10k
Q3706
EMH11-W
EMH11-W
Q3706
TO MULTI CONN(J103)
Y_OUT
TO MULTI CONN(J103)
JIG CONN(CN110)
V_OUT
TO MULTI CONN(J103)
C_OUT
TO MAIN IF(CN104)
LCD_G
LCD_B
LCD_R
VDCVF
HDCVF
C3701
10
#
R3726
C3739
#
C3747
R3727
4.7k
4.7k
IC3201
JCP8075
VSS
CIN
VRH
VRL
VRM
VYIN
NC
NC
NC
NC
R3212
R3202
OPEN
C3226
C3225
0.1
C3224
0.1
C3223
0.1
C3222
0.1
0Ω
R3205
C3221
C3220
18k
C3219
C3215
OPEN
R3203
OPEN
C3240
820
1.0
0.1
0.1
C3218
OPEN
R3204
820
C3217
1.0
C3216
0.1
12k
R3718
0Ω
L3702
OPEN
C3716
OPEN
T
R3717
OPEN
R3722
C3715
0.01
R3701
270
R3704
300
150
Q3705
EMT1-W
150
0.01
0.01
R3703
3.3k
Q3701
EMT1-W
R3706
3.3k
Q3701
R3724
4.7k
Q3704
2SA2029/QRS/-X
R3728R3725
150
#
C3738
0.01
#
R3748
470k
#
EMZ1-W
2SC5658/QRS/-X
Q3734
#
R3741
1k
#
C3746
4.7
#
R3747
C3707
ONS".
y10544001a_rev0.1
(No.YF098)2-14
MAIN(NUCORE) SCHEMATIC DIAGRAM
TO
0Ω
R4026
V2CLK
AFECLK
PPRO11
AFED11
PPRO10
AFED10
PPRO9
AFED9
PPRO8
AFED8
P.PRCS
PPRO6
PPRO7
AFED6
AFED7
PPRO5
AFED5
PPRO4
AFED4
PPRO3
AFED3
TO SYSCON
TO P.PRCS
TO OP DRV
TO MAIN IF(CN103)
DSP_RSV
SSGFLD
NDPWM
STRB_ENV
R4076
RA4005
RA4006
TO JIG CONN
(CN110)
TO SYSCON
P.PRCS
MOD0
VDCPU
PMINT
V1CLK
VLD_PIX
SOF
ID_LAT
TO P.PRCS
GPIO4
47k
R4058
GPIO3
GPIO2
TL4018
GPIO6
TL4016
TL4015
AFESOF
0Ω
R4023
AFEVPIX
3CCDCLK
R4081
47k
R4061
47k
R4048
0Ω
47k
47k
47k
GPIO7
GPIO26
GPIO28
GPIO25
GPIO27
CFWP
nCFWE
nCFWAIT
CFRESET
nCFREG
CFRDY
nCFOE
nCFIOWR
nCFIORD
CFCSEL
CFD0
CFD1
CFD2
CFD3
CFD4
CFD5
CFD6
CFD7
CFD8
CFD9
CFD10
CFD11
CFD12
CFD13
CFD14
CFD15
nCFCE0
nCFCE1
nCFCD1
nCFCD2
CFBVD1
CFBVD2
CFA0
CFA1
CFA2
CFA3
CFA4
CFA5
CFA6
CFA7
CFA8
CFA9
CFA10
PWM0
PWM1
PWM2
PWM3
GPIO5
PPRO2
AFED2
PPRO1
AFED1
TL4014
PPRO0
SDR_CKE
AFED0
SDR_DQ31
MCKE
SDR_DQ31
TO MEMORY
SDR_DQ31
SDR_DQ29
SDR_DQ30
SDRAM_D29
SDRAM_D30
SDRAM_D31
SDR_DQ29
SDR_DQ30
SDR_DQ30
SDR_DQ29
SDR_DQ27
SDR_DQ28
SDRAM_D27
SDRAM_D28
SDR_DQ28
SDR_DQ28
SDR_DQ27
SDR_DQ25
SDR_DQ26
SDRAM_D26
SDR_DQ26
SDR_DQ27
SDR_DQ26
SDR_DQ25
SDR_DQ23
SDR_DQ24
SDRAM_D24
SDRAM_D25
SDR_DQ24
SDR_DQ25
SDR_DQ24
SDR_DQ23
SDR_DQ21
SDR_DQ22
SDRAM_D22
SDRAM_D23
SDR_DQ22
SDR_DQ23
SDR_DQ22
SDR_DQ21
SDR_DQ19
SDR_DQ20
SDRAM_D20
SDRAM_D21
SDR_DQ20
SDR_DQ21
SDR_DQ20
SDR_DQ19
SDR_DQ17
SDR_DQ18
SDRAM_D18
SDRAM_D19
SDR_DQ18
SDR_DQ19
SDR_DQ18
SDR_DQ17
SDR_DQ15
SDR_DQ16
SDRAM_D16
SDRAM_D17
SDR_DQ16
SDR_DQ17
SDR_DQ16
SDR_DQ15
SDR_DQ13
SDR_DQ14
SDRAM_D14
SDRAM_D15
SDR_DQ14
SDR_DQ15
SDR_DQ14
SDR_DQ13
SDR_DQ11
SDR_DQ12
SDRAM_D12
SDRAM_D13
SDR_DQ12
SDR_DQ13
SDR_DQ12
SDR_DQ11
SDR_DQ9
SDR_DQ10
SDRAM_D10
SDRAM_D11
SDR_DQ10
SDR_DQ11
SDR_DQ10
SDR_DQ9
SDR_DQ7
SDR_DQ8
SDRAM_D8
SDRAM_D9
SDR_DQ8
SDR_DQ9
SDR_DQ8
SDR_DQ7
SDR_DQ5
SDR_DQ6
SDRAM_D6
SDRAM_D7
SDR_DQ6
SDR_DQ7
SDR_DQ6
SDR_DQ5
SDR_DQ3
SDR_DQ4
SDRAM_D4
SDRAM_D5
SDR_DQ4
SDR_DQ5
SDR_DQ4
SDR_DQ2
SDRAM_D2
SDRAM_D3
SDR_DQ3
SDR_DQ3
SDR_DQ2
SDR_DQ0
SDR_DQ1
SDRAM_D1
SDR_DQ1
SDR_DQ2
SDR_DQ1
SDR_DQ0
SDR_DQM2
SDR_DQM3
DQM3
SDRAM_D0
SDR_DQM3
SDR_DQ0
SDR_DQM3
SDR_DQM1
DQM1
DQM2
SDR_DQM1
SDR_DQM2
SDR_DQM2
SDR_DQM1
SDR_WE
SDR_DQM0
DQM0
nMWE
SDR_WE
SDR_DQM0
SDR_DQM0
SDR_WE
SDR_RAS
SDR_CAS
nRAS
nCAS
SDR_CAS
SDR_CAS
SDR_RAS
SDR_CS0
SDR_BA1
nMCS0
SDR_CS0
SDR_RAS
SDR_CS0
SDR_BA1
SDR_BA0
R4056
SDRAMBS0
SDRAMBS1
SDR_CKE
SDR_BA0
SDR_BA1
SDR_BA0
SDR_CKE
SDR_A12
SDR_CLK
180
R4055
100
SDRAMCLK
SDRAM_A12
SDRAMCLKR
SDR_CLK
SDR_CLK
SDR_A10
SDR_A11
SDRAM_A11
SDR_A10
SDR_A10
SDR_A9
SDR_A8
SDR_A9
SDRAM_A9
SDRAM_A10
SDR_A9
SDR_A8
SDR_A8
SDR_A7
SDRAM_A8
SDR_A7
SDR_A6
SDR_A6
SDR_A5
SDR_A5
SDR_A4
SDR_A4
SDR_A3
SIP1280I
SDR_A3
IC4
SDR_A2
SDR_A2
SDR_A1
SDR_A6
SDR_A7
SDRAM_A7
R4068
GPIO31
47k
NC3
NC4
GPIO39
MCLKINNCAMBACLKIN
nRESET
SCANE
TESTSCAN
TRACESYNC
TRACECLK
DBGRQ
DBQACK
R4001
PMA0
PMA1
PMA2
PMA3
PMA4
PMA5
PMA6
PMA7
PMA8
PMA9
PMA10
PMA11
PMA12
PMA13
PMA14
PMA15
PMA16
PMA17
PMA18
PMA19
PMA20
PMA21
PMD0
PMD1
PMD2
PMD3
PMD4
PMD5
PMD6
PMD7
PMD8
PMD4
PMD5
PMD7
PMD6
TO MEMORY
PMD8
P.PRCS
PMD9
PMD9
nRESETPERH
100
R4009
TL4001
0.1
C4044
3.3k
R4005
R4002
AFE_RST
DSP_RST
TO SYSCON
P.PRCS
TO SYSCON
47k
R4010
0Ω
0Ω
R4006
R4008
nJRESET
(CN110)
TO JIG CONN
47k
TL4002
PMA3
PMA4
PMA5
PMA6
PMA7
PMA8
PMA2
PMA1
PMA0
PMA9
PMA10
PMA11
PMA12
PMA13
PMA14
PMA15
PMA16
PMA17
PMA18
PMA19
PMA20
TL4003
PMA21
PMD0
PMD1
PMD2
PMD3
TO P.PRCS
P.PRCS
TO MEMORY
TO MEMORY
PMD10
PMD10
PMD11
PMD11
PMD12
PMD12
PMD13
PMD13
PMD14
PMD14
nPMCS7
nPMCS1
PMD15
0Ω
R4011
PMD15
nPMCS7
nPMCS1
TO P.PRCS
TO MEMORY
nPMCS0
R4012
NC(TL4098)
0Ω
R4013
nPMWE
nPMOE
nPMBLS0
0Ω0Ω0Ω
0Ω
R4015
R4014
R4016
nPMOE
nPMWE
nPMBLS0
P.PRCS
TO MEMORY
nPMBLS1
nPMWAIT
nARMTRST
0Ω
0Ω
R4018
R4017
nPMBLS1
nPMWAIT
nARMTRST
TO P.PRCS
TCK
TMS
0Ω
R4019
ARMTCK
ARMTMS
TO
JIG CONN
TDI
ARMTDI
(CN110)
AMBATDO
SIO0
TL4026
47k
R4020
R4069
1k
R4007
ARMTDO
SIO1
R4021
10k
TL4027
47k
DMASREQ
GPIO24
47k
R4022
DMASREQ
TO P.PRCS
DMACLR
DMABREQ
0Ω
R4024
DMACLR
DMABREQ
47k
R4025
L4007
NQR0006-001X
TO MAIN IF(CN101)
CCD_CTL
TO P.PRCS
CLK27A
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked ( ) is not used.
2-15(No.YF098)
R4027
R4029
0Ω
NAX0392-
C4043
C4022
X4001
0.1
MAIN(CDS) SCHEMATIC DIAGRAM
MAIN(CDS)
10
TO REG
CAM_3.1V
GND
TO TG
ADCLK
PBLK
TO P.PRCS,TG
OBCPI
TO TG
TO CCD(CN201)
SHP
SHD
CN101
QGB0507L1-40X
A_GND
H2_B
H1_B
SUB_B
V2_B
V4_B
RG_G
H2_G
H1_G
SUB_G
-7.5V
-7.5V
V1_R
V2_R
V3_R
V4_R
H2_R
H1_R
SUB_R
RG_R
SIG_R
A_GND
15V_RG
15V_RG
A_GND
A_GND
SIG_G
A_GND
V1_G
V2_G
V3_G
V4_G
15V_B
15V_B
V3_B
V1_B
RG_B
RCsub
A_GND
SIG_B
C4208
0.012
C4210
C4211
C4205
C4204
C4207
47/6.3
C4209
1
R4201
C4214
0.1
10
T
0.1
1
33k
0.1
L4201
NQR0006-001X
0Ω
R4206
AVDD
BLKSH
BLKFB
CDSIN
BLKC
BIAS
AVDD
AVSS
ADCIN
C4201
C4202
C4215
0.1
C4206
0.1
R4202
51
C4248
0.012
C4250
C4251
C4249
1
R4241
C4254
0.1
1
33k
0.1
AVDD
BLKSH
BLKFB
CDSIN
BLKC
BIAS
AVDD
AVSS
ADCIN
C4241
C4242
C4255
0.1
AVSS
SPSIG
SPBLK
VRB
VRT
VRM
1
1
OBP
SPSIG
SPBLK
IC4201
HD49340HNP-X
DVDD
VRB
VRT
1
C4203
0.1
C4212
PBLK
DVSS
DVDD
CS
ADCLK
SDATA
DVSS
SCK
DRVVDD
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
GIN9
GIN8
GIN7
GIN6
GIN5
GIN4
GIN3
GIN2
GIN1
GIN0
AVSS
VRM
1
1
TO P.PRCS
OP DRV,TG
TO P.PRCS
CDS-G_CS
CDS-R_CS
CDS-B_CS
CAM_OUT
CAM_CLK
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked ( ) is not used.
2-17(No.YF098)