Datasheet HA-4741 Datasheet (intersil)

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®
HA-4741
Data Sheet July 2004 FN2922.5
Quad, 3.5MHz, Operational Amplifier
HA-4741, which contains four amplifiers on a monolithic chip, provides a new measure of performance for general purpose operational amplifiers. Each amplifier in the HA-4741 has operating specifications that equal or exceed those of the 741-type amplifier in all categories of performance.
HA-4741 is well suited to applications requiring accurate sign
al processing by virtue of its low values of input offset voltage (0.5mV), input bias current (60nA) and input voltage noise (9nV/
Hz at 1kHz). 3.5MHz bandwidth, coupled with high open-loop gain, allow the HA-4741 to be used in designs requiring amplification of wide band signals, such as audio amplifiers. Audio application is further enhanced by the HA-4741’s negligible output crossover distortion.
These excellent dynamic characteristics also make the HA-474
1 ideal for a wide range of active filter designs. Performance integrity of multi-channel designs is assured by a high level of amplifier-to-amplifier isolation (69dB at 10kHz).
A wide range of supply voltages (±2V to
±20V) can be used to power the HA-4741, making it compatible with almost any system including battery-powered equipment.
HA-4741/883 product and data shee
ts available upon
request.
Ordering Information
PART
MBER
NU
HA1-4741-2 -55 to 125 14 Ld CERDIP F14.3 HA3-4741-5 0 to 75 14 Ld PDIP E14.3
TEMP.
RANGE (°C) PACKAGE PKG. DWG. #
Features
• Slew Rate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6V/µs
• Bandwidth . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.5MHz
• Input Voltage Noise . . . . . . . . . . . . . . . . . . . . . . 9nV/√Hz
• Input Offset Voltage . . . . . . . . . . . . . . . . . . . . . . . . 0.5mV
• Input Bias Current . . . . . . . . . . . . . . . . . . . . . . . . . . 60nA
• Supply Range. . . . . . . . . . . . . . . . . . . . . . . . ±2V to ±20V
• No Crossover Distortion
• Standard Quad Pinout
Applications
• Universal Active Filters
• D3 Communications Filters
• Audio Amplifiers
• Battery-Powered Equipment
Pinout
HA-4741 (PDIP, CERDIP)
TOP VIEW
OUT1
-IN1
+IN1
V+
+IN2
-IN2
OUT2
1
1 4
2
-
+
3 4 5
+
-
6
2 3
7
14
OUT4
13
-IN4
-
+
12
+IN4
11
V-
10
+IN3
+
-
9
-IN3
8
OUT3
1
Copyright Harris Corporation 1990, 1993, 1996, 1998. Copyright Intersil Americas Inc. 2003, 2004. All Rights Reserved.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
All other trademarks mentioned are the property of their respective owners.
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HA-4741
Absolute Maximum Ratings Thermal Information
TA = 25°C Unless Otherwise Stated
Supply Voltage Between V+ and V- Terminals . . . . . . . . . . . . . 40V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
Output Short Circuit Duration (Note 3). . . . . . . . . . . . . . . . Indefinite
SUPPLY
Operating Conditions
Temperature Range:
HA-4741-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55°C to 125°C
HA-4741-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 75°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied .
NOTES:
1. Maximum power dissipation, including output load, must be designed to and below 150°C for the plastic packages.
is measured with the component mounted on an evaluation PC board in free air.
2. θ
JA
3. One amplifier may be shorted to ground indefinitely.
Thermal Resistance (Typical, Note 2) θ
CERDIP Package. . . . . . . . . . . . . . . . . 90 35
PDIP Package . . . . . . . . . . . . . . . . . . . 107 N/A
Maximum Junction Temperature (Ceramic Package, Note 1) . . . . 175°C
Maximum Junction Temperature (Plastic Packages, Note 1) . . . . .150°C
Maximum Storage Temperature Range . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . 300°C
(Lead Tips Only)
maintain junction temperature below 175°C for the ceramic package,
(°C/W) θJC (°C/W)
JA
Electrical Specifications V
PARAMETER
INPUT CHARACTERISTICS
Offset Voltage 25 - 0.5 3 - 1 5 mV
Average Offset Voltage Drift Full - 5 - - 5 - µV/°C Bias Current 25 - 60 200 - 60 300 nA
Offset Current 25 - 15 30 - 30 50 nA
Common Mode Range Full ±12 - - ±12 - - V Differential Input Resistance 25 - 0.5 - - 0.5 - M Input Voltage Noise f = 1kHz 25 - 9 - - 9 - nV/
TRANSFER CHARACTERISTICS
Large Signal Voltage Gain V
Common Mode Rejection Ratio 25 80 95 - 80 95 - dB
Channel Separation (Note 4) 25 66 69 - 66 69 - dB Small Signal Bandwidth 25 2.5 3.5 - 2.5 3.5 - MHz
OUTPUT CHARACTERISTICS
Output Voltage Swing R Output Voltage Swing R Full Power Bandwidth (Notes 5, 6) 25 - 25 - - 25 - kHz Output Current V Output Resistance 25 - 300 - - 300 -
= ±15V, Unless Otherwise Specified
SUPPLY
TEST
C
ONDITIONS
= ±10V,
OUT
R
= 2k
L
= 10k Full ±12 ±13.7 - ±12 ±13.7 - V
L
= 2k Full ±10 ±12.5 - ±10 ±12.5 - V
L
= ±10V Full ±5 ±15 - ±5 ±15 - mA
OUT
TEMP.
(°C)
Full - 4 5 - 4 6.5 mV
Full - - 325 - - 400 nA
Full - - 75 - - 100 nA
25 50 100 - 25 50 - kV/V
Full 25 - - 15 - - kV/V
Full 74 - - 74 - - dB
HA-4741-2 HA-4741-5
UNITSMIN TYP MAX MIN TYP MAX
Hz
2
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HA-4741
Electrical Specifications V
PARAMETER
TRANSIENT RESPONSE RL = 2k, CL = 50pF
Rise / Fall Time V Overshoot 25 - 25 40 - 25 40 % Slew Rate V
POWER SUPPLY CHARACTERISTICS
Supply Current 25 - 4.5 5 - 5 7 mA Power Supply Rejection Ratio ∆V
NOTES:
4. Referred to input; f = 10kHz, R
5. V
6. Full power bandwidth guaranteed based upon slew rate measurement: FPBW = S.R./2π V
= ±10V, RL = 2kΩ.
OUT
= 1kΩ, VIN = 100mV
S
= ±15V, Unless Otherwise Specified (Continued)
SUPPLY
TEST
CONDITIONS
= 0 to ±200mV 25 - 75 140 - 75 140 ns
OUT
= ±5V 25 - ±1.6 - - ±1.6 - V/µs
OUT
= ±5V Full 80 95 - 80 95 - dB
S
PEAK
TEMP.
(°C)
.
HA-4741-2 HA-4741-5
.
PEAK
UNITSMIN TYP MAX MIN TYP MAX
Test Circuit and Waveforms
-
+
V
IN
50pF
2k
V
OUT
+5V
INPUT
-5V
+5V
OUTPUT
-5V
FIGURE 1. SMALL AND LARGE SIGNAL TEST CIRCUIT
Volts = 5V/Div., Time = 5µs/Div.
FIGURE 2. LARGE SIGNAL RESPONSE
200mV
0
Volts = 40mV/Div., Time = 100ns/Div.
FIGURE 3. SMALL SIGNAL RESPONSE
3
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Schematic Diagram
+V
-V
HA-4741
V+
R
1
3K
Q
Q
1
IN
IN
T
1
D
1
Q
6
R
2
12.6K
Q
Q
8
2
Q
4
5
C
1
Q
7
Q
9
R
3
18K
Q10
R 20K
Q
3
Q
Q
R 80
R 30K
11
15
6
R
8
V
OUT
150
R
7
80
5
Q
14
V-
Q
13
Q
12
4
Typical Performance Curves V
110 100
90 80
70 60 50 40
30 20
10
OPEN-LOOP VOLTAGE GAIN (dB)
0
-10 1 10 100 1K 10K 100K 1M 10M
GAIN
PHASE
FREQUENCY (Hz)
SUPPLY
RL = 2K C
= 50pF
L
= ±15V, T
0
45
90
135
180
= 25°C, Unless Otherwise Specified
A
)
PHASE (DEGREES)
OUTPUT VOLTAGE SWING (V
VO = 28V
P-P
30
VO = 18V
10
VO = 8V
VO = 2V
1.0
(VOLTAGE FOLLOWER) R
=
0.1
L
CL = 50pF
100 1K 10K 100K 1M
VS = ±15V
VS = ±10V VS = ±5V
VS = ±2V
FREQUENCY (Hz)
FIGURE 4. OPEN LOOP FREQUENCY RESPONSE FIGURE 5. OUTPUT VOLTAGE SWING vs FREQUENCY
1.1
1.0
0.9
SLEW RATE
BANDWIDTH
BANDWIDTH
1.2
1.1
1.0
0.8
REFERRED TO VALUE AT ±15V
NORMALIZED AC PARAMETERS
0.7 0
±5 ±10 ±15 ±20
SUPPLY VOLTAGE (V)
FIGURE 6. NORMALIZED AC PARAMETERS vs SUPPLY
.9
.8
NORMALIZED VALUE REFERRED TO 25°C
-55 -25 0 25 50 75 100 125
FIGURE 7. NORMALIZED AC PARAMETERS vs
VOLTAGE
4
SLEW RATE
TEMPERATURE (°C)
TEMPERATURE
BANDWIDTH
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HA-4741
Typical Performance Curves V
35
30
25
20
15
10
INPUT NOISE VOLTAGE (nV/√Hz)
5
0
30
25
)
P-P
20
15
10
OUTPUT VOLTAGE (V
VOLTAGE NOISE
CURRENT NOISE
10 100 1K 10K 100K
FREQUENCY (Hz)
FIGURE 8. INPUT NOISE vs FREQUENCY FIGURE 9. SMALL SIGNAL BANDWIDTH AND PHASE
5
SUPPLY
= ±15V, T
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
= 25°C, Unless Otherwise Specified (Continued)
A
70
)
INPUT NOISE CURRENT (pA/Hz
60
50
40
30
20
PHASE MARGIN (DEGREES)
10
0
10 100 1000 10,000 100,000
LOAD CAPACITANCE (pF)
MARGIN vs LOAD CAPACITANCE
100
80
60
40
CURRENT (nA)
20
OFFSET CURRENT
BIAS CURRENT
RL = 2K
7
6
5
4
3
2
1
0
UNITY GAIN BANDWIDTH (MHz)
0
100 1K 10K 100K
LOAD RESISTANCE (Ω)
FIGURE 10. MAXIMUM OUTPUT VOLTAGE SWING vs LOAD
RESISTANCE
200
160
120
80
40
POWER CONSUMPTION (mW)
0
-50 -25 0 25 50 75 100 125
FIGURE 12. POWER CONSUMPTION vs TEMPERATURE
FIGURE 11. INPUT BIAS AND OFFSET CURRENT vs
VS = ±15
VS = ±10
VS = ±5
TEMPERATURE (°C)
0
-50 -25 0 25 50 75 100 125 TEMPERATURE (°C)
TEMPERATURE
5
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HA-4741
Die Characteristics
DIE DIMENSIONS:
87 mils x 75 mils x 19 mils 2210µm x 1910µm x 483µm
METALLIZATION:
Type: Al, 1% Cu Thickness: 16kÅ ±2kÅ
Metallization Mask Layout
PASSIVATION:
Type: Nitride (Si Silox Thickness: 12k Nitride Thickness: 3.5kÅ ±1.5kÅ
SUBSTRATE POTENTIAL (POWERED UP):
V-
TRANSISTOR COUNT:
72
PROCESS:
Junction Isolated Bipolar/JFET
HA-4741
-IN4 +IN4 V- +IN3 -IN3
) over Silox (SiO2, 5% Phos.)
3N4
Å ±2kÅ
OUT4
OUT1
OUT3
OUT2
-IN2+IN2V++IN1-IN1
6
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HA-4741
Ceramic Dual-In-Line Frit Seal Packages (CERDIP)
LEAD FINISH
c1
-A-
-B-
bbb C A - B
S
BASE
PLANE
SEATING
PLANE
S1 b2
b
ccc C A - BMD
D
A
A
e
S
S
NOTES:
1. Index area: A notch or a pin one identification mark shall be locat­ed adjacent to pin one and shall be located within the shaded area shown. The manufacturer’s identification shall not be used as a pin one identification mark.
2. The maximum limits of lead dimensions b and c or M shall be measured at the centroid of the finished lead surfaces, when solder dip or tin plate lead finish is applied.
3. Dimensions b1 and c1 apply to lead base metal only. Dimension M applies to lead plating and finish thickness.
4. Corner leads (1, N, N/2, and N/2+1) may be configured with a partial lead paddle. For this configuration dimension b3 replaces dimension b2.
5. This dimension allows for off-center lid, meniscus, and glass overrun.
6. Dimension Q shall be measured from the seating plane to the base plane.
7. Measure dimension S1 at all four corners.
8. N is the maximum number of terminal positions.
9. Dimensioning and tolerancing per ANSI Y14.5M - 1982.
10. Controlling dimension: INCH.
-D­BASE
E
D
S
S
Q
A
-C­L
METAL
b1
M
(b)
SECTION A-A
α
(c)
M
eA
eA/2
aaa CA - B
M
c
D
S
S
F14.3 MIL-STD-1835 GDIP1-T14 (D-1, CONFIGURATION A)
14 LEAD CERAMIC DUAL-IN-LINE FRIT SEAL PACKAGE
INCHES MILLIMETERS
SYMBOL
A - 0.200 - 5.08 -
b 0.014 0.026 0.36 0.66 2 b1 0.014 0.023 0.36 0.58 3 b2 0.045 0.065 1.14 1.65 ­b3 0.023 0.045 0.58 1.14 4
c 0.008 0.018 0.20 0.46 2 c1 0.008 0.015 0.20 0.38 3
D - 0.785 - 19.94 5 E 0.220 0.310 5.59 7.87 5
e 0.100 BSC 2.54 BSC ­eA 0.300 BSC 7.62 BSC -
eA/2 0.150 BSC 3.81 BSC -
L 0.125 0.200 3.18 5.08 -
Q 0.015 0.060 0.38 1.52 6
S1 0.005 - 0.13 - 7
o
α
90
105
o
90
o
105 aaa - 0.015 - 0.38 ­bbb - 0.030 - 0.76 ­ccc - 0.010 - 0.25 -
M - 0.0015 - 0.038 2, 3 N14 148
NOTESMIN MAX MIN MAX
o
Rev. 0 4/94
-
7
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Dual-In-Line Plastic Packages (PDIP)
HA-4741
N
D1
-C-
E1
-B-
A1
A2
E
A
L
e
C
C
L
e
A
C
e
B
INDEX
AREA
BASE
PLANE
SEATING
PLANE
NOTES:
1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication No. 95.
4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3.
5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm).
6. E and are measured with the leads constrained to be perpen­dicular to datum .
7. e strained. e
8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 -
1.14mm).
12 3 N/2
-A-
D1
B1
B
e
A
and eC are measured at the lead tips with the leads uncon-
B
C
D
e
0.010 (0.25) C AM BS
-C-
must be zero or greater.
E14.3 (JEDEC MS-001-AA ISSUE D)
14 LEAD DUAL-IN-LINE PLASTIC PACKAGE
INCHES MILLIMETERS
SYMBOL
A - 0.210 - 5.33 4 A1 0.015 - 0.39 - 4 A2 0.115 0.195 2.93 4.95 -
B 0.014 0.022 0.356 0.558 ­B1 0.045 0.070 1.15 1.77 8
C 0.008 0.014 0.204 0.355 -
D 0.735 0.775 18.66 19.68 5 D1 0.005 - 0.13 - 5
E 0.300 0.325 7.62 8.25 6 E1 0.240 0.280 6.10 7.11 5
e 0.100 BSC 2.54 BSC -
e
A
e
B
L 0.115 0.150 2.93 3.81 4
N14 149
0.300 BSC 7.62 BSC 6
- 0.430 - 10.92 7
NOTESMIN MAX MIN MAX
Rev. 0 12/93
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Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is ca utioned to verify that data she ets are current before pl acing orders. Information fur nished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or othe rwise under any patent or patent rights of Intersil or its subsidiaries.
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