International Rrectifier IRU1030 User Manual

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Data Sheet No. PD94124

IRU1030

3A LOW DROPOUT POSITIVE

ADJUSTABLE REGULATOR

FEATURES

Guaranteed < 1.3V Dropout at Full Load Current
Fast Transient Response
1% Voltage Reference Initial Accuracy
Output Current Limiting
Built-In Thermal Shutdown

APPLICATIONS

Low Voltage Processor Applications such as:
P54C, P55C, Cyrix M2,
POWER PC, AMD
GTL+ Termination
PENTIUM PRO, KLAMATH
Low Voltage Memory Termination Applications
Standard 3.3V Chip Set and Logic Applications

TYPICAL APPLICATION

5V

DESCRIPTION

The IRU1030 is a low dropout three-terminal adjustable
regulator with minimum of 3A output current capability.
This product is specifically designed to provide well regu­lated supply for low voltage IC applications such as
Pentium P54C, P55C as well as GTL+ termina­tion for Pentium Pro and Klamath processor appli-
cations. The IRU1030 is also well suited for other pro­cessors such as Cyrix, AMD and Power PC appli-
cations. The IRU1030 is guaranteed to have <1.3V drop­out at full load current making it ideal to provide well
regulated outputs of 2.5V to 3.3V with 4.75V to 7V input
supply.

C1

1500uF

V

IN

3

V

OUT

Adj

2

R1
121

1

R2
200

IRU1030

Figure 1 - Typical Application of IRU1030 in a 5V to 3.3V regulator.

Notes: Pentium P54C, P55C, Klamath, Pentium Pro, VRE are trademarks of Intel Corp.Cyrix M2 is trademark of Cyrix Corp.
Power PC is trademark of IBM Corp.

3.3V / 3A

C2
1500uF

PACKAGE ORDER INFORMATION

TJ (°C) 2-PIN PLASTIC 3-PIN PLASTIC 3-PIN PLASTIC
TO-252 (D-Pak) TO-263 (M) TO-220 (T)

0 To 150 IRU1030CD IRU1030CM IRU1030CT

Rev. 1.3
08/20/02

www.irf.com

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IRU1030

ABSOLUTE MAXIMUM RATINGS

Input Voltage (V IN) .................................................... 7V

Power Dissipation ..................................................... Internally Limited

Storage Temperature Range ...................................... -65°C To 150°C

Operating Junction Temperature Range ..................... 0°C To 150°C

PACKAGE INFORMATION

2-PIN PLASTIC TO-252 (D-Pak ) 3-PIN PLASTIC TO-263 (M) 3-PIN PLASTIC TO-220 (T)

Tab is

V

OUT

1.238

1.225

3.1

60

FRONT VIEW

1.250

1.250

1.1

5

0.01

70

55

0.2

0.5

0.3

0.003

3

2

1

1.262

1.275

0.2

0.4

1.3

10

0.02

120

5

1

V

IN

V

OUT

Adj

V

%
%

V
A

mA

%/W

dB

mA
mA

%
%

%VO

Tab is

V

OUT

FRONT VIEW

3

V

IN

1

Adj

Tab is

V

OUT

FRONT VIEW

3

V

IN

2

V

OUT

1

Adj

θJA=70°C/W for 0.5" Square pad θJA=35°C/W for 1" Square pad θJT=2.7°C/W θJA=60°C/W

ELECTRICAL SPECIFICATIONS

Unless otherwise specified, these specifications apply over CIN=1mF, COUT=10mF, and TJ=0 to 1508C.
Typical values refer to TJ=258C.

PARAMETER SYM TEST CONDITION MIN TYP MAX UNITS

Reference Voltage

Line Regulation
Load Regulation (Note 1)
Dropout Voltage (Note 2)
Current Limit
Minimum Load Current (Note 3)
Thermal Regulation
Ripple Rejection

Adjust Pin Current

Adjust Pin Current Change
Temperature Stability
Long Term Stability
RMS Output Noise

VREF

DVO

Io=10mA, TJ=258C, (V IN-Vo)=1.5V
Io=10mA, (V IN-Vo)=1.5V
Io=10mA, 1.3V<(V IN-Vo)<7V
VIN=3.3V, VADJ=0, 10mA<Io<3A
Note 2, Io=3A
VIN=3.3V, DVo=100mV
VIN=3.3V, VADJ=0V
30ms Pulse, VIN-Vo=3V, Io=3A
f=120Hz, Co=25mF Tantalum,
Io=1.5A, VIN-Vo=3V
Io=10mA, VIN-Vo=1.5V, TJ=258C,

IADJ

Io=10mA, VIN-Vo=1.5V
Io=10mA, VIN-Vo=1.5V, TJ=258C
VIN=3.3V, VADJ=0V, Io=10mA
TJ=1258C, 1000Hrs
TJ=258C, 10Hz<f<10KHz

Note 1: Low duty cycle pulse testing with Kelvin con­nections is required in order to maintain accurate data.

Note 2: Dropout voltage is defined as the minimum dif­ferential voltage between VIN and VOUT required to main­tain regulation at VOUT. It is measured when the output
voltage drops 1% below its nominal value.

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Note 3: Minimum load current is defined as the mini­mum current required at the output in order for the out­put voltage to maintain regulation. Typically the resistor
dividers are selected such that this current is automati­cally maintained.

Rev. 1.3

08/20/02

PIN DESCRIPTIONS

PIN # PIN SYMBOL PIN DESCRIPTION

1

Adj

A resistor divider from VOUT to Adj pin to ground sets the output voltage.

IRU1030

2

3

VOUT

VIN

The output of the regulator. A minimum of 10µF capacitor must be connected from this pin
to ground to insure stability.

The input pin of the regulator. Typically a large storage capacitor is connected from this
pin to ground to insure that the input voltage does not sag below the minimum drop out
voltage during the load transient response. This pin must always be 1.3V higher than VOUT
in order for the device to regulate properly.

BLOCK DIAGRAM

VIN 3

CURRENT

LIMIT

2 VOUT

+

+

1.25V

THERMAL

SHUTDOWN

Figure 2 - Simplified block diagram of the IRU1030.

APPLICATION INFORMATION

Introduction

The IRU1030 adjustable Low Dropout (LDO) regulator is
a three-terminal device which can easily be programmed
with the addition of two external resistors to any volt­ages within the range of 1.25 to 5.5V. This regulator un­like the first generation of the three-terminal regulators
such as LM117 that required 3V differential between the
input and the regulated output, only needs 1.3V differen­tial to maintain output regulation. This is a key require­ment for today’s microprocessors that need typically

3.3V supply and are often generated from the 5V sup­ply. Another major requirement of these microproces­sors such as the Intel P54C is the need to switch the
load current from zero to several amps in tens of nano-

1 Adj

seconds at the processor pins, which translates to an
approximately 300 to 500ns current step at the regula­tor. In addition, the output voltage tolerances are also
extremely tight and they include the transient response
as part of the specification. For example Intel VRE
specification calls for a total of ±100mV including initial
tolerance, load regulation and 0 to 4.6A load step.

The IRU1030 is specifically designed to meet the fast
current transient needs as well as providing an accurate
initial voltage, reducing the overall system cost with the
need for fewer output capacitors.

Rev. 1.3
08/20/02

www.irf.com

3

IRU1030

Output Voltage Setting

The IRU1030 can be programmed to any voltages in the
range of 1.25V to 5.5V with the addition of R1 and R2
external resistors according to the following formula:

VOUT = VREF3 1+ +IADJ3R2

R2

( )

R1

Where:
VREF = 1.25V Typically
IADJ = 50mA Typically
R1 and R2 as shown in Figure 3:

VIN

VIN

IRU1030

Adj

VOUT

IADJ = 50uA

VREF

R1

R2

VOUT

Figure 3 - Typical application of the IRU1030

for programming the output voltage.

The IRU1030 keeps a constant 1.25V between the out­put pin and the adjust pin. By placing a resistor R1 across
these two pins a constant current flows through R1, add­ing to the IADJ current and into the R2 resistor producing
a voltage equal to the (1.25/R1)3R2 + IADJ3R2 which
will be added to the 1.25V to set the output voltage.
This is summarized in the above equation. Since the
minimum load current requirement of the IRU1030 is
10mA, R1 is typically selected to be 121V resistor so
that it automatically satisfies the minimum current re­quirement. Notice that since IADJ is typically in the range
of 50mA it only adds a small error to the output voltage
and should only be considered when a very precise out­put voltage setting is required. For example, in a typical

3.3V application where R1=121V and R2=200V the er­ror due to IADJ is only 0.3% of the nominal set point.

Load Regulation

Since the IRU1030 is only a three-terminal device, it is
not possible to provide true remote sensing of the output
voltage at the load. Figure 4 shows that the best load
regulation is achieved when the bottom side of R2 is
connected to the load and the top side of R1 resistor is
connected directly to the case or the VOUT pin of the
regulator and not to the load. In fact, if R1 is connected

to the load side, the effective resistance between the
regulator and the load is gained up by the factor of (1+R2/
R1), or the effective resistance will be RP(eff)=RP3(1+R2/
R1). It is important to note that for high current applica­tions, this can represent a significant percentage of the
overall load regulation and one must keep the path from
the regulator to the load as short as possible to mini­mize this effect.

PARASITIC LINE

RESISTANCE

R

V

V

V

IN

IN

IRU1030

Adj

OUT

P

R

R1

R2

L

Figure 4 - Schematic showing connection

for best load regulation.

Stability

The IRU1030 requires the use of an output capacitor as
part of the frequency compensation in order to make the
regulator stable. Typical designs for microprocessor ap­plications use standard electrolytic capacitors with a
typical ESR in the range of 50 to 100mV and an output
capacitance of 500 to 1000mF. Fortunately as the ca­pacitance increases, the ESR decreases resulting in a
fixed RC time constant. The IRU1030 takes advantage
of this phenomena in making the overall regulator loop
stable. For most applications a minimum of 100mF alu­minum electrolytic capacitor such as Sanyo MVGX se­ries, Panasonic FA series as well as the Nichicon PL
series insures both stability and good transient response.

Thermal Design

The IRU1030 incorporates an internal thermal shutdown
that protects the device when the junction temperature
exceeds the maximum allowable junction temperature.
Although this device can operate with junction tempera­tures in the range of 1508C, it is recommended that the
selected heat sink be chosen such that during maxi­mum continuous load operation the junction tempera­ture is kept below this number. The example below
shows the steps in selecting the proper regulator heat
sink for the GTL+ terminator using a separate regulator
for each end.

4

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Rev. 1.3

08/20/02