The SR440BX motherboard may contain design defects or errors known as errata that may cause the product to deviate from published specifications. Current characterized errata
are documented in the SR440BX Motherboard Specification Update.
Revision History
RevisionRevision HistoryDate
-001First release of the SR440BX Motherboard Technical Product SpecificationFebruary 1999
This product specification applies only to standard SR440BX motherboards with BIOS identifier
4S4RB0XA.86A.
Changes to this specification will be published in the SR440BX Motherboard Specification Update
before being incorporated into a revision of this document.
Information in this doc um ent is provided in connection wi t h Intel products. No license, express or implied, by estoppel or
otherwise, to any intell ectual property rights is granted by this document. E x cept as provided in Intel’s Terms and
Conditions of Sale for such products, Intel assumes no liability whatsoever, and I nt el dis claims any express or implied
warranty, relating to sale and/or use of I ntel products including liability or warranties relat i ng t o f i t ness for a particular
purpose, merchantability, or infringement of any patent, copyright or other int ellec t ual propert y right. Intel products are not
intended for use in medical, l i f e saving, or life sustai ni ng appl i cations.
Intel retains the right to make changes to specif i cations and product descript i ons at any time, without noti ce.
The SR440BX motherboard may contai n design defects or errors known as errata which may cause the product to deviate
from published specifi c ations. Current characteriz ed errata are available on request.
Contact your local Int el sales office or your distributor to obtain the latest specifications before pl acing your product order.
Copies of documents whic h hav e an orderi ng number and are referenced in this document, or other Intel literature, may be
obtained from:
Intel Corporation
P.O. Box 5937
Denver, CO 80217-9808
or call in North America 1-800-548-4725, Europe 44-0-1793-431-155, France 44-0-1793-421-777,
Germany 44-0-1793-421-333, other Countries 708-296-9333.
†
Third-party brands and names are the property of their respective owners.
Copyright 1999, Intel Corporation. All rights reserved.
Preface
This Technical Product Specification (TPS) specifies the board layout, components, connectors,
power and environmental requirements, and the BIOS for the SR440BX motherboard. It describes
the standard motherboard product and available manufacturing options.
Intended Audience
The TPS is intended to provide detailed, technical information about the motherboard and its
components to the vendors, system integrators, and other engineers and technicians who need this
level of information. It is specifically not intended for general audiences.
What This Document Contains
ChapterDescription
1A description of the hardware used on this board
2A map of the resources of the board
3The features supported by the BIOS Setup program
4The contents of the BIOS Setup program’s menus and submenus
5A description of the BIOS error messages, beep codes, and POST codes
6A list of where to find information about specifications supported by the
motherboard
Typographical Conventions
This section contains information about the conventions used in this specification. Not all of these
symbols and abbreviations appear in all specifications of this type.
Notes, Cautions, and Warnings
NOTE
✏
Notes call attention to important information.
CAUTION
Cautions are included to help you avoid damaging hardware or losing data.
WARNING
Warnings indicate conditions which, if not observed, can cause personal injury.
#Used after a signal name to identify an active-low signal (such as USBP0#).
(NxnX)When used in the description of a component, N indicates component type, xn are the relative
coordinates of its location on the motherboard, and X is the instance of the particular part at that
general location. For example, J5J1 is a connector, located at 5J. It is the first connector in the
5J area.
KBKilobyte (1024 bytes)
KbitKilobit (1024 bits)
MBMegabyte (1,048,576 bytes)
MbitMegabit (1,048,576 bits)
GBGigabyte (1,073,741,824 bytes)
xxhAn address or data value ending with a lowercase h indicates a hexadecimal value.
x.x VVolts. Voltages are DC unless otherwise specified.
†
This symbol is used to indicate third-party brands and names that are the property of their
The SR440BX motherboard is available with the following features:
Feature
Form Factor
Expansion Slots
Microprocessor
Main Memory
Chipset
I/O Control
Peripheral
Interfaces
Video
Audio
BIOS
Other Features
microATX: 9.6 x 9.6 inches
Three dedicated PCI slots
One shared ISA/PCI slot
Support for the following processors:
®
• Intel
• Intel
• Intel
Pentium® III processor with 100-MHz host bus speed
®
Pentium II processor with 66-MHz or 100-MHz host bus speed
®
Celeron™ processor with 66-MHz host bus speed
Two 168-pin dual inline memory module (DIMM) sockets
Supports up to 512 MB of 66 MHz or 100 MHz synchronous DRAM (SDRAM)
Supports Error Checking and Correcting (ECC) and non-ECC memory
Intel® 82440BX, consisting of:
®
• Intel
• Intel
82443BX PCI/AGP controller (PAC)
®
82371EB PCI ISA IDE Xcelerator (PIIX4E)
SMSC FDC37M807 Super I/O controller
• Two serial ports
• Two Universal Serial Bus (USB) ports
• One parallel port
• Two IDE interfaces with Ultra DMA support
• Single diskette drive
• NVIDIA
†
RIVA TNT† Enhanced 128-Bit 3D Processor
• 16 MB SDRAM video memory
• VIP video side port (optional)
AC ’97 Crystal CS4297 audio codec
Sound Blaster
†
AudioPCI 64V digital audio controller
• Intel/AMI BIOS
• Intel® E28F004B5 4 Mbit boot block flash memory
• Support for SMBIOS, Advanced Power Management (APM), Advanced
Configuration and Power Management Interface (ACPI), and Plug and Play (see
Section 6.2 for specification compliance levels)
• Speaker
• Hardware monitor (optional)
• Wake on Ring
• Wake on LAN
†
technology (optional)
• SCSI LED connector (optional)
12
1.2 Motherboard Layout
Figure 1 shows the location of the major components on the motherboard.
Motherboard Description
CFD E
WU
X
VT
P
OM07649
G
H
I
J
K
L
M
N
O
EE
CC
AB
II
HH
GG
FF
DD
BB
AAZYS R Q
ACS4297 audio codecSFront panel connector
BAuxiliary line in connectorTSCSI LED connector (optional)
CTelephony connectorUConfiguration jumper block
DLegacy-style CD-ROM connectorVDiskette drive connector
EATAPI-style CD-ROM connectorWPrimary IDE connector
FBack panel connectorsXSecondary IDE connector
GProcessor connectorYFan 2 (system) connector
HChassis intrusion connector (optional)ZWake on Ring connector
IFan 3 (processor) connectorAASerial port B connector (optional)
JIntel 82443BX PACBBSMSC I/O controller
KDIMM socketsCC Intel 82371EB PIIX4E
LPower supply connectorDD Graphics controller
MVIP video connector (optional)EEBattery
NSpeakerFFFlash memory
OSDRAM video memoryGG Sound Blaster Audio PCI 64V audio controller
PFront panel LED connectorHH PCI connectors
QWake on LAN technology connector (optional)IIISA connector
RFan 1 (power supply) connector (optional)
Figure 2 is a block diagram of the SR440BX motherboard.
SDRAM
DIMMs
Primary IDE
Secondary IDE
USB Port 1
USB Port 0
Back Panel
Clock
Generator
82371EB
Processor
82443BX
PIIX4E
PAC
AGP Bus
SM Bus
PCI Bus
Sound Blaster
AudioPCI 64V
Digital Audio
Controller
RIVA TNT
Graphics
Controller
Hardware
Monitor
Modem
Audio
AC ’97
Bus
VIP
Video
Port
nVIDIA
Aux
Audio
CS4297
Audio
Codec
PCI Slots
CD-ROM
Audio
SDRAM
Video
Memory
Line In
Line Out
Mic
Game Port
Back Panel
Back Panel
ISA Bus
Diskette
Parallel Port
Serial Port A
Serial Port B
IrDA
FDC37M807
I/O Controller
MouseKeyboard
Back Panel
Figure 2. Motherboard Block Diagram
ISA Slot
Boot Block
Flash Memory
OM07650
14
Motherboard Description
1.3 Processor
The motherboard supports a single Pentium III, Pentium II, or Celeron processor. The host bus
speed (66 MHz or 100 MHz) is automatically selected. The processor connects to the motherboard
through the 242-contact slot connector. The processor must be secured by a retention mechanism
attached to the motherboard.
CAUTION
The motherboard supports Pentium
III
processors with a 100-MHz host bus, Pentium II processors
with a 100- or 66-MHz host bus, and Celeron processors with a 66-MHz host bus. Processors with
a 100-MHz host bus should be used only with 100-MHz SDRAM; the motherboard may not operate
reliably if a processor with a 100-MHz host bus is paired with 66-MHz SDRAM. However,
processors with a 66-MHz host bus can be used with either 66-MHz or 100-MHz SDRAM.
The motherboard supports the processors listed in Table 1.
The motherboard has two DIMM sockets. The minimum memory size is 16 MB and the
maximum memory size is 512 MB. The BIOS automatically detects memory type, size, and
speed. Memory can be installed in one or both sockets. Memory size can vary between sockets.
NOTE
✏
Processors with 100 MHz host bus should be paired only with 100 MHz SDRAM. Processors with
66 MHz host bus can be paired with either 66 MHz or 100 MHz SDRAM.
The motherboard supports the following memory features:
• 168-pin DIMMs with gold-plated contacts
• 66 and 100 MHz (matching host bus speed) unbuffered SDRAM only
• Non-ECC (64-bit) and ECC (72-bit) memory
• 100 MHz memory shall be Serial Presence Detect (SPD) memory; 66 MHz may be either SPD
or non-SPD
• 3.3 V memory only
• Single- or double-sided DIMMs in the following sizes:
DIMM SizeNon-ECC ConfigurationECC Configuration
16 MB2 Mbit x 642 Mbit x 72
32 MB4 Mbit x 644 Mbit x 72
64 MB8 Mbit x 648 Mbit x 72
128 MB16 Mbit x 6416 Mbit x 72
256 MB32 Mbit x 6432 Mbit x 72
When ECC memory is installed, the BIOS supports both ECC and non-ECC mode. ECC mode is
enabled in the Setup program. The BIOS automatically detects if ECC memory is installed and
provides the Setup option for selecting ECC mode. If any non-ECC memory is installed, the Setup
option for ECC mode does not appear and ECC operation is not available.
The following table describes the effect of using Setup to put each memory type in each supported
mode:
Memory Error Detection Mode Established in Setup Program
ECC DisabledECC Enabled
Whenever ECC mode is selected in Setup, some performance loss occurs.
16
Motherboard Description
NOTE
✏
All memory components and DIMMs used with the SR440BX motherboard should comply with the
PC SDRAM Specifications. These include: the PC SDRAM Specification (memory component
specific), the PC Unbuffered SDRAM Specifications, and the PC Serial Presence DetectSpecification. See Section 6.2 for information about these specifications.
1.5 Chipset
The Intel 82440BX AGPset consists of the Intel 82443BX PAC and the Intel 82371EB PIIX4E
bridge chip. The PAC provides an optimized DRAM controller and an Accelerated Graphics Port
(AGP) interface. The I/O subsystem of the 82440BX is based on the PIIX4E, which is a highly
integrated PCI ISA IDE Xcelerator Bridge.
1.5.1 Intel® 82443BX PAC
The Intel 82443BX PAC provides bus-control signals, address paths, and data paths for transfers
between the processor’s host bus, PCI bus, the AGP, and main memory. The PAC features:
• Processor interface control
Support for processor host bus frequencies of 100 MHz and 66 MHz
32-bit addressing
Desktop optimized GTL+ compliant host bus interface
• Integrated DRAM controller, with support for
+3.3 V only DIMM DRAM configurations
Up to two double-sided DIMMs
100-MHz or 66-MHz SDRAM
DIMM serial presence detect via SMBus interface
16- and 64-Mbit devices with 2 KB, 4 KB, and 8 KB page sizes
x 4, x 8, x 16, and x 32 DRAM widths
SDRAM 64-bit data interface with ECC support
Symmetrical and asymmetrical DRAM addressing
• AGP interface
Complies with the AGP specification (see Section 6.2 for specification information)
Support for AGP 2X device
Synchronous coupling to the host bus frequency
• PCI bus interface
Complies with the PCI specification +5 V 33-MHz interface (see Section 6.2 for
specification information)
Asynchronous coupling to the host-bus frequency
PCI parity generation support
Data streaming support from PCI-to-DRAM
Support for five PCI bus masters in addition to the host and PCI-to-ISA I/O bridge
Support for concurrent host, AGP, and PCI transactions to main memory
• Data buffering
DRAM write buffer with read-around-write capability
Dedicated host-to-DRAM, PCI0-to-DRAM, and PCI1/AGP-to-DRAM read buffers
AGP dedicated inbound/outbound FIFOs, used for temporary data storage
• Power management functions
Support for system suspend/resume (DRAM and power-on suspend)
Compliant with ACPI power management
• SMBus support for desktop management functions
• Support for system management mode (SMM)
1.5.2 Intel® 82371EB (PIIX4E)
The PIIX4E is a multifunctional PCI device implementing the PCI-to-ISA bridge,
PCI IDE functionality, USB host/hub functionality, and enhanced power management. The
PIIX4E features:
• Multifunctional PCI-to-ISA bridge
Support for the PCI bus at 33 MHz
PCI specification-compliant (see Section 6.2 for specification information)
Full ISA bus support
• USB controller
Two USB ports (see Section 6.2 for specification information)
Support for legacy keyboard and mouse
Support for Universal Host Controller Interface (UHCI) Design Guide (see Section 6.2 for
specification information)
• Integrated dual-channel enhanced IDE interface
Support for up to four IDE devices
PIO Mode 4 transfers at up to 16 MB/sec
Support for Ultra DMA/33 synchronous DMA mode transfers at up to 33 MB/sec
Bus master mode with an 8 x 32-bit buffer for bus master PCI IDE burst transfers
• Enhanced DMA controller
Two 8237-based DMA controllers
Support for PCI DMA with three PC/PCI channels and distributed DMA protocols
Fast type-F DMA for reduced PCI bus usage
• Interrupt controller based on 82C59
Support for 15 interrupts
Programmable for edge/level sensitivity
18
Motherboard Description
• Power management logic
Sleep/resume logic
Support for Wake on Ring and Wake on LAN technology
Support for APM and ACPI (see Section 6.2 for specification information)
• Real-Time Clock
256-byte battery-backed CMOS SRAM
Date alarm
• 16-bit counters/timers based on 82C54
1.5.3 USB
The motherboard has two USB ports; one USB peripheral can be connected to each port. For more
than two USB devices, an external hub can be connected to either port. The two USB ports are
implemented with stacked back panel I/O connectors. The motherboard fully supports UHCI and
uses UHCI-compatible software drivers. See Section 6.2 for information about the USB and UHCI
specifications.
• Self-identifying peripherals that can be plugged in while the computer is running
• Automatic mapping of function to driver and configuration
• Support for isochronous and asynchronous transfer types over the same set of wires
• Support for up to 127 physical devices
• Guaranteed bandwidth and low latencies appropriate for telephony, audio, and other
applications
• Error-handling and fault-recovery mechanisms built into the protocol
NOTE
✏
Computer systems that have an unshielded cable attached to a USB port may not meet FCC
Class B requirements, even if no device or a low-speed USB device is attached to the cable. Use
shielded cable that meets the requirements for full-speed devices.
1.5.4 IDE Support
The motherboard has two independent bus-mastering IDE interfaces. These interfaces support:
• ATAPI devices (such as CD-ROM drives)
• ATA devices using the transfer modes listed in Table 62 on page 80.
The BIOS supports logical block addressing (LBA) and extended cylinder head sector (ECHS)
translation modes. The drive reports the transfer rate and translation mode to the BIOS.
The motherboard supports laser servo (LS-120) diskette technology through its IDE interfaces.
LS-120 diskette technology enables users to store 120 MB of data on a single, 3.5-inch removable
diskette. LS-120 technology is backward-compatible (both read and write) with 1.44 MB and
†
720 KB DOS-formatted diskettes and is supported by the Windows
†
Windows NT
in the BIOS Setup program.
operating systems. The LS-120 drive can be configured as a boot device, if selected
The real-time clock is compatible with DS1287 and MC146818 components. The clock provides a
time-of-day clock and a multicentury calendar with alarm features and century rollover. The realtime clock supports 256 bytes of battery-backed CMOS SRAM in two banks that are reserved for
BIOS use.
A coin-cell battery powers the real-time clock and CMOS memory. When the computer is not
plugged into a wall socket, the battery has an estimated life of three years. When the computer is
plugged in, the 3.3 V standby current from the power supply extends the life of the battery. The
clock is accurate to ± 13 minutes/year at 25 ºC with 3.3 VSB applied.
The time, date, and CMOS values can be specified in the Setup program. The CMOS values can
be returned to their defaults by using the Setup program.
NOTE
✏
The recommended method of accessing the date in systems with Intel® motherboards is indirectly
from the Real Time Clock (RTC) via the BIOS. The BIOS on Intel motherboards and baseboards
contains a century checking and maintenance feature. This feature checks the two least significant
digits of the year stored in the RTC during each BIOS request (INT 1Ah) to read the date and, if
less than 80 (i.e., 1980 is the first year supported by the PC), updates the century byte to 20. This
feature enables operating systems and applications using the BIOS date/time services to reliably
manipulate the year as a four-digit value.
For more information on proper date access in systems with Intel motherboards, please see:
http://support.intel.com/support/year2000/
1.6 I/O Controller
The FDC37M807 I/O controller from SMSC is an ISA Plug and Play-compatible, multifunctional
I/O device that provides the following features (see Section 6.2 for Plug and Play information):
• Two serial ports
• Interface for one 1.2 MB, 1.44 MB, or 2.88 MB diskette drive
• Three-mode diskette drive support (driver required)
• FIFO support on both serial and diskette drive interfaces
• One parallel port with Extended Capabilities Port (ECP) and Enhanced Parallel Port (EPP)
support
†
• PS/2
• Support for serial IRQ packet protocol
• Intelligent autopower management, including:
The BIOS Setup program provides configuration options for the I/O controller.
-style mouse and keyboard interfaces
Shadowed write-only registers for ACPI compliance
Programmable wake up event interface
20
Motherboard Description
1.6.1 Serial Ports
The motherboard has one 9-pin D-Sub serial port connector located on the back panel and an
optional connector on the board for a second serial port. The serial ports’ NS16C550-compatible
UARTs support data transfers at speeds up to 115.2 Kbits/sec with BIOS support. The serial ports
can be assigned as COM1 (3F8h), COM2 (2F8h), COM3 (3E8h), or COM4 (2E8h)
1.6.2 Parallel Port
The connector for the multimode bidirectional parallel port is a 25-pin D-Sub connector located on
the back panel. In the Setup program, the parallel port can be configured for the following:
• Output only
• Bidirectional (PS/2 compatible)
• EPP
• ECP
1.6.3 Diskette Drive Controll er
The I/O controller supports a single diskette drive that is compatible with the 82077 diskette drive
†
controller and supports both PC-AT
interface can be configured for the following diskette drive capacities and sizes:
• 360 KB, 5.25-inch
• 1.2 MB, 5.25-inch
• 720 KB, 3.5-inch
• 1.2 MB, 3.5-inch (driver required)
• 1.25/1.44 MB, 3.5-inch
• 2.88 MB, 3.5-inch
and PS/2 modes. In the Setup program, the diskette drive
NOTE
✏
The I/O controller supports 1.2 MB, 3.5-inch diskette drives, but a special driver is required for
this type of drive (three-mode).
1.6.4 Keyboard and Mouse Interface
PS/2 keyboard and mouse connectors are located on the back panel. The +5 V lines to these
†
connectors are protected with a PolySwitch
connection after an overcurrent condition is removed.
NOTE
✏
The mouse and keyboard can be plugged into either of the PS/2 connectors. Power to the
computer should be turned off before a keyboard or mouse is connected or disconnected.
The keyboard controller contains the AMI keyboard and mouse controller code, provides the
keyboard and mouse control functions, and supports password protection for power on/reset. A
power on/reset password can be specified in Setup.
circuit that, like a self-healing fuse, reestablishes the
The keyboard controller also supports the hot-key sequence <Ctrl><Alt><Del> for a software
reset. This key sequence resets the computer’s software by jumping to the beginning of the BIOS
code and running the Power-On Self Test (POST).
1.7 AGP Graphics Subsystem
The onboard AGP graphics subsystem supports graphics-intensive applications, such as 3D
applications. AGP, while based on the PCI bus, is independent of the PCI bus and is intended for
exclusive use with graphical display devices. AGP overcomes certain limitations of the PCI bus
related to handling large amount of graphics data with the following features:
• Pipelined memory read and write operations that hide memory access latency
• Demultiplexing of address and data on the bus for nearly 100 percent bus efficiency
For more information on the AGP, please refer to the Accelerated Graphics Port Interface
Specification listed in Section 6.2.
The graphics subsystem features the NVIDIA RIVA TNT Enhanced 128-Bit 3D Processor, 8 or
16 MB of SDRAM, and an optional video interface port (VIP).
Visit Intel’s World Wide Web (see Section 6.1) site for information about graphics drivers.
1.7.1 NVIDIA RIVA TNT Graphi cs Controller
The NVIDIA RIVA TNT graphics controller is paired with 16 MB of SDRAM video memory and
features:
• 2x AGP graphics support
• Single pass multitexture rendering achieved by processing two pixels per clock cycle
†
• Optimization for Direct3D
• High-performance, 128-bit 2D/GUI/DirectDraw
• Video acceleration for DirectShow
• Support for Media Port Controller (MPC) polling protocol
acceleration with complete DirectX† 5.0 and 6.0 support
†
acceleration
†
, MPEG-1, MPEG-2, and Indeo® video technology
22
Table 2 lists the refresh rates supported by the SR440BX motherboard.
*All lower refresh rates are also supported.
**A l l l ower refresh rates except 60 Hz are als o supported.
(Hz) at 32 bpp *
Motherboard Description
1.7.2 Video Interface Port (Optional)
The Video Interface Port (VIP) is an optional interface between video-enabled graphics controllers
and one or more video devices, such as video decoders. VIP features:
†
• Backward compatibility with the VESA
Feature Connector
• Simplified ITU-CCIR-656 Video Format which supports horizontal (HSYNC) and vertical
(VSYNC), odd and even video field
• Plug-and-play support through the graphics controller’s AGP interface
• Variable resolutions and scan rates and interlaced and non-interlaced video
• Support for Media Port Controller (MPC) polling protocol
1.8 Audio Subsystem
The Audio Codec ’97 (AC ’97) compatible audio subsystem includes these features:
• Two chip split digital/analog architecture for improved S/N (signal-to-noise) ratio (≥ 85 dB)
measured at line out, from any analog input, including line in, CD-ROM, and auxiliary line in
• 3-D stereo enhancement
Power management support for APM 1.2 and ACPI 1.0 The audio subsystem consists of these
1.8.1 Sound Blaster AudioPCI 64V Audi o Controller
• Interfaces to PCI bus as a Plug and Play device
• DOS legacy compatible
• Access to main memory (through the PCI bus) for wavetable synthesis support – does not
require a separate wavetable ROM device
• PC 98 compliant
1.8.2 Crystal Semiconductor CS4297 Ster eo Audio Codec
• High performance 18-bit stereo full-duplex audio codec with up to 48 kHz sampling rate
• Connects to the Sound Blaster AudioPCI 64V using a five-wire digital interface
1.8.3 Audio Connectors
The audio connectors include the following:
• CD-ROM (ATAPI-style and legacy-style 2 mm connectors)
• ATAPI-style connectors
CD-ROM audio
Auxiliary line in
Telephony
• Back panel connectors
Line out
Line in
Mic in
MIDI/Game Port
NOTE
✏
The Line out connector, located on the back panel, is designed to power headphones or amplified
speakers only. Poor audio quality may occur if passive (non-amplified) speakers are connected to
this output.
1.8.3.1 CD-ROM Audio Connectors
The motherboard contains two CD-ROM audio connectors to connect an internal CD-ROM drive
to the audio mixer:
• A 1 x 4 legacy-style 2 mm connector
• A 1 x 4-pin ATAPI connector
NOTE
✏
Since both CD-ROM connectors connect to the same motherboard circuitry, they should not be
used simultaneously.
24
Motherboard Description
1.8.3.2 Auxiliary Line In
A 1 x 4-pin ATAPI-style connector connects the left and right channel signals of an internal audio
device to the audio subsystem.
1.8.3.3 Telephony
A 1 x 4-pin ATAPI-style connector connects the monoaural audio signals of an internal telephony
device to the audio subsystem. A monaural audio-in and audio-out signal interface is necessary for
telephony applications such as speakerphones, fax/modems, and answering machines.
1.8.4 Audio Drivers and Utilities
Audio software and utilities are available from Intel’s World Wide Web site (see Section 6.1)
1.9 Hardware Monitor (Optional)
The optional hardware monitor subsystem provides low-cost instrumentation capabilities. The
features of the hardware monitor subsystem include:
• Support for an optional chassis intrusion connector
• An integrated ambient temperature sensor
• Fan speed sensors (see Section 1.15.2 for the location of these connectors on the motherboard)
• Power supply voltage monitoring to detect levels above or below acceptable values
When suggested ratings for temperature, fan speed, or voltage are exceeded, an interrupt is
activated. The hardware monitor component connects to the SMBus.
1.10 SCSI Hard Drive LED Connector (Optional)
The optional SCSI hard drive LED connector is a 1 x 2-pin connector that allows an add-in SCSI
controller to use the same LED as the IDE controller. This connector can be connected to the LED
output of the add-in controller card. The LED will indicate when data is being read or written
using the add-in controller. See Section 1.15.2 for the location and pinouts of the SCSI hard drive
LED connector.
Wake on LAN technology enables remote wakeup of the computer through a network. Wake on
LAN technology requires a PCI add-in network interface card (NIC) with remote wakeup
capabilities. The remote wakeup connector on the NIC must be connected to the motherboard
Wake on LAN technology connector. The NIC monitors network traffic at the MII interface; upon
†
detecting a Magic Packet
access this feature, use the optional Wake on LAN technology connector on the motherboard. See
Section 1.15.2 for the location and pinouts of the Wake on LAN technology connector.
, the NIC asserts a wakeup signal that powers up the computer. To
CAUTION
For Wake on LAN technology, the 5-V standby line for the power supply must be capable of
±
delivering +5 V
Wake on LAN technology, can damage the power supply.
5 % at 720 mA. Failure to provide adequate standby current when implementing
1.12 Wake on Ring
Wake on Ring enables the computer to wake from sleep or soft-off mode when a call is received
on a telephony device, such as a faxmodem, configured for operation on either serial port. The
first incoming call powers up the computer. A second call must be made to access the computer.
To access this feature use the Wake on Ring connector See Section 1.15.2 for the location and
pinouts of the Wake on Ring connector.
1.13 Power Connector
When used with an ATX-compliant power supply that supports remote power on/off, the
motherboard can turn off the system power through software control. See Section 6.2 for
information about the microATX specification.
To enable soft-off control in software, advanced power management must be enabled in the Setup
program and in the operating system. When the system BIOS receives the correct APM command
from the operating system, the BIOS turns off power to the computer.
With Last State enabled in the BIOS (see Table 69), if power to the computer is interrupted by a
power outage or a disconnected power cord, when power resumes, the computer returns to the
power state it was in before power was interrupted (on or off).
1.14 Speaker
A 47 Ω inductive speaker is mounted on the motherboard. The speaker provides audible error
code (beep code) information during the power-on self test (POST).
26
Motherboard Description
1.15 Connectors
This section describes the motherboard’s connectors. The connectors can be divided into three
groups, as shown in Figure 3.
Back panel I/O connectors
A
A
(see Section 1.15.1)
B
C
OM07651
Figure 3. Connector Groups
Midboard connectors (see
B
Section 1.15.2)
Front panel connectors
C
(see Section 1.15.3)
CAUTION
Only the back panel connectors of this motherboard have overcurrent protection. The internal
motherboard connectors are not overcurrent protected, and should connect only to devices inside
the computer chassis, such as fans and internal peripherals. Do not use these connectors for
powering devices external to the computer chassis. A fault in the load presented by the external
devices could cause damage to the computer, the interconnecting cable, and the external devices
themselves.
Figure 4 shows the location of the back panel I/O connectors.
A
C
BE
D
F
G
H
IK
J
APS/2 keyboard or mouseGVGA
BPS/2 keyboard or mouseHMIDI/Game port
CUSB port 0IAudio line out
DUSB port 1JAudio line in
ESerial port AKMic in
FParallel port
Figure 4. Back Panel I/O Connectors
OM07652
28
Motherboard Description
Table 3.PS/2 Keyboard/Mouse Connectors
PinSignal
1Data
2Not connected
3Ground
4Fused +5 V
5Clock
6Not connected
Table 4.USB Stacked Connector
PinSignalPinSignal
1Fused +5 V5Fused +5 V
23.3 V differential USB signal USB_D–63.3 V differential USB signal USB_D–
33.3 V differential USB signal USB_D+73.3 V differential USB signal USB_D+
4Ground8Ground
Table 5.Serial Port A Connector
PinSignal
1DCD (Data Carrier Detect)
2SIN# (Serial Data In)
3SOUT# (Serial Data Out)
4DTR (Data Terminal Ready)
5Ground
6DSR (Data Set Ready)
7RTS (Request to Send)
8CTS (Clear to Send)
9RI (Ring Indicator)
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