Intel IQ80960RM, Evaluation Platform Board Manual IQ80960RM User Manual

IQ80960RM/RN Evaluation

Platform

Board Manual

February 1999

Order Number: 273160-004

Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel’s Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Intel products are not intended for use in medical, life saving, or life sustaining applications.

Intel may make changes to specifications and product descriptions at any time, without notice.

Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.

The IQ80960RM/RN may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request.

Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.

Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800- 548-4725 or by visiting Intel’s website at http://www.intel.com.

Copyright © Intel Corporation, 1999

*Third-party brands and names are the property of their respective owners.

IQ80960RM/RN Evaluation Platform Board Manual

Contents

1	Introduction	......................................................................................................................................		1-1
1.1	i960® RM/RN I/O Processor and IQ80960RM/RN Features .....................................................			1-3
1.2	Software Development Tools.....................................................................................................			1-3
1.3	IxWorks Software Development Toolset....................................................................................			1-4
	1.3.1	IxWorks Real-Time Operating System .........................................................................		1-4
	1.3.2	TORNADO Build Tools .................................................................................................		1-4
	1.3.3	TORNADO Test and Debug Tools ...............................................................................		1-4
1.4	CTOOLS Software Development Toolset..................................................................................			1-5
	1.4.1	CTOOLS and the MON960 Debug Monitor ..................................................................		1-5
		1.4.1.1	MON960 Host Communications...................................................................	1-5
		1.4.1.2	Terminal Emulation Method .........................................................................	1-5
		1.4.1.3 Host Debugger Interface (HDI) Method .......................................................		1-5
1.5	About This Manual.....................................................................................................................			1-6
1.6	Notational-Conventions .............................................................................................................			1-7
1.7	Technical Support......................................................................................................................			1-8
	1.7.1	Intel Customer Electronic Mail Support ........................................................................		1-8
	1.7.2	Intel Customer Support Contacts..................................................................................		1-8
	1.7.3	Related Information ......................................................................................................		1-9
2	Getting Started.................................................................................................................................			2-1
2.1	Pre-Installation Considerations..................................................................................................			2-1
2.2	Software Installation ..................................................................................................................			2-1
	2.2.1	Installing Software Development Tools ........................................................................		2-1
2.3	Hardware Installation .................................................................................................................			2-2
	2.3.1	Battery Backup .............................................................................................................		2-2
	2.3.2	Installing the IQ80960RM/RN Platforms in the Host System........................................		2-2
	2.3.3	Verify IQ80960RM/RN Platform is Functional ..............................................................		2-2
2.4	Creating and Downloading Executable Files .............................................................................			2-3
	2.4.1	Sample Download and Execution Using GDB960........................................................		2-3
3	Hardware Reference........................................................................................................................			3-1
3.1	Power Requirements .................................................................................................................			3-1
3.2	SDRAM......................................................................................................................................			3-1
	3.2.1	SDRAM Performance ...................................................................................................		3-2
	3.2.2	Upgrading SDRAM .......................................................................................................		3-3
3.3	Flash ROM.................................................................................................................................			3-3
	3.3.1	Flash ROM Programming .............................................................................................		3-3
3.4	Console Serial Port....................................................................................................................			3-4
3.5	Secondary PCI Bus Expansion Connectors ..............................................................................			3-4
	3.5.1	PCI Slots Power Availability..........................................................................................		3-4
	3.5.2	Interrupt and IDSEL Routing.........................................................................................		3-5
3.6	Battery Backup ..........................................................................................................................			3-5
3.7	Loss of Fan Detect.....................................................................................................................			3-5
3.8	Logic Analyzer Headers.............................................................................................................			3-6
3.9	JTAG Header.............................................................................................................................			3-7
3.10 User LEDs .................................................................................................................................				3-8
	3.10.1	User LEDs During Initialization .....................................................................................		3-8

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iii

4	i960®RM/RN I/O Processor Overview ............................................................................................			4-1
4.1	CPU Memory Map		.....................................................................................................................	4-2
4.2	Local Interrupts ..........................................................................................................................			4-3
4.3	CPU Counter/Timers .................................................................................................................			4-5
4.4	Primary PCI Interface ................................................................................................................			4-5
4.5	Secondary PCI Interface ...........................................................................................................			4-5
4.6	DMA Channels ..........................................................................................................................			4-6
4.7	Application Accelerator Unit ......................................................................................................			4-6
4.8	Performance Monitor Unit..........................................................................................................			4-7
5 MON960 Support for IQ80960RM/RN .............................................................................................				5-1
5.1	Secondary PCI Bus Expansion Connectors ..............................................................................			5-1
5.2	MON960 Components ...............................................................................................................			5-1
	5.2.1	MON960 Initialization ...................................................................................................		5-1
	5.2.2	80960JT Core Initialization ...........................................................................................		5-2
	5.2.3	Memory Controller Initialization ....................................................................................		5-2
	5.2.4	SDRAM Initialization .....................................................................................................		5-2
	5.2.5	Primary PCI Interface Initialization................................................................................		5-3
	5.2.6	Primary ATU Initialization .............................................................................................		5-3
	5.2.7	PCI-to-PCI Bridge Initialization .....................................................................................		5-4
	5.2.8	Secondary ATU Initialization ........................................................................................		5-4
5.3	MON960 Kernel.........................................................................................................................			5-5
5.4	MON960 Extensions..................................................................................................................			5-5
	5.4.1	Secondary PCI Initialization..........................................................................................		5-5
	5.4.2	PCI BIOS Routines .......................................................................................................		5-6
		5.4.2.1	sysPCIBIOSPresent.....................................................................................	5-6
		5.4.2.2	sysFindPCIDevice........................................................................................	5-7
		5.4.2.3	sysFindPCIClassCode .................................................................................	5-7
		5.4.2.4	sysGenerateSpecialCycle............................................................................	5-8
		5.4.2.5	sysReadConfigByte......................................................................................	5-8
		5.4.2.6	sysReadConfigWord ....................................................................................	5-9
		5.4.2.7	sysReadConfigDword ..................................................................................	5-9
		5.4.2.8	sysWriteConfigByte....................................................................................	5-10
		5.4.2.9	sysWriteConfigWord ..................................................................................	5-10
		5.4.2.10	sysWriteConfigDword.................................................................................	5-11
		5.4.2.11	sysGetIrqRoutingOptions ...........................................................................	5-11
		5.4.2.12	sysSetPCIIrq ..............................................................................................	5-12
	5.4.3	Additional MON960 Commands .................................................................................		5-12
		5.4.3.1	print_pci Utility............................................................................................	5-12
5.5	Diagnostics / Example Code ...................................................................................................			5-12
	5.5.1	Board Level Diagnostics .............................................................................................		5-12
	5.5.2	Secondary PCI Diagnostics ........................................................................................		5-12
A		Bill of Materials ...............................................................................................................		A-1
B		Schematics.....................................................................................................................		B-1
C		PLD Code.......................................................................................................................		C-1
D		Recycling the Battery .....................................................................................................		D-1

iv	IQ80960RM/RN Evaluation Platform Board Manual

Figures

1-1	IQ80960RM/IQ80960RN Platform Functional Block Diagram ...................................................	1-1
1-2	IQ80960RN Platform Physical Diagram ....................................................................................	1-2
3-1	LED Register Bitmap .................................................................................................................	3-8
4-1	i960® RM/RN I/O Processor Block Diagram..............................................................................	4-1
4-2	IQ80960RM/RN Platform Memory Map.....................................................................................	4-2
4-3	i960® RM/RN I/O Processor Interrupt Controller Connections ..................................................	4-4
4-4	i960® RM/RN I/O Processor DMA Controller ............................................................................	4-6
4-5	Application Accelerator Unit.......................................................................................................	4-7
Tables
1-1	Document Information ...............................................................................................................	1-9
1-2	Cyclone Contacts.......................................................................................................................	1-9
3-1	IQ80960RN Platform Power Requirements...............................................................................	3-1
3-2	IQ80960RM Platform Power Requirements ..............................................................................	3-1
3-3	SDRAM Performance ................................................................................................................	3-2
3-4	SDRAM Configurations..............................................................................................................	3-3
3-5	UART Register Addresses.........................................................................................................	3-4
3-6	Secondary PCI Bus Interrupt and IDSEL Routing .....................................................................	3-5
3-7	Logic Analyzer Header Definitions.............................................................................................	3-6
3-8	JTAG Header Pinout..................................................................................................................	3-7
3-9	Switch S1 Settings .....................................................................................................................	3-7
3-10	Start-up LEDs MON960.............................................................................................................	3-8
3-11	IQ80960RM/RN Connectors and LEDs .....................................................................................	3-9
5-1	Initialization Modes ....................................................................................................................	5-3
A-1	IQ80960RN Bill of Materials .....................................................................................................	A-1
A-2	IQ80960RM Bill of Materials .....................................................................................................	A-5
B-1	IQ80960RN Schematics List.....................................................................................................	B-1
B-2	IQ80960RM Schematics List ....................................................................................................	B-2

IQ80960RM/RN Evaluation Platform Board Manual

v

Introduction

1

This manual describes the IQ80960RM and IQ80960RN evaluation platforms for Intel’s i960 ® RM/RN I/O processor. The i960 RM/RN I/O processors combine an 80960JT core with two PCI bus interfaces, as well as a memory controller, DMA channels, an interrupt controller interface, and an I2C serial bus. The difference between the two processors is that the 80960RN utilizes 64-bit primary PCI and secondary PCI buses while the 80960RM utilizes both a 32-bit primary and secondary PCI bus. The IQ80960RM and IQ80960RN platforms are full-length PCI adapter boards and are 8.9” in height to accommodate four standard PCI connectors on the secondary PCI bus. The boards can be installed in any PCI host system that complies with the PCI Local Bus Specification Revision 2.1. PCI devices can be connected to the secondary bus to build powerful intelligent I/O subsystems.

Figure 1-1. IQ80960RM/IQ80960RN Platform Functional Block Diagram

	Secondary PCI Slot 4
	Secondary PCI Slot 3
	Secondary PCI Slot 2
	Secondary PCI Slot 1
				Console
	SDRAM (x72)			Port
					User
Battery				RS-232	LED
				Serial Port
Backup	Logic Analyzer Interface
Support
		Flash	Logic		LED
			Analyzer	UART
		ROM			Register
			Interface
	i960®RM/RN
		Secondary PCI
	I/O Processor	Bus 32/64-bits
		ROM Bus
	Primary PCI Bus 32/64-bits
IQ80960RM/RN Evaluation Board Manual					1-1

Introduction

Figure 1-2. IQ80960RN Platform Physical Diagram

64-Bit Secondary PCI Slots

J4	168-Pin SDRAM DIMM Socket
J3
J2	RS-232 Serial Port
J1

J5

					SW1
J8	J9	J10	J11	J12	OFF	3 2 1
						4

Flash Memory

CR1 CR2 CR3 CR4 CR5

J6

J7

U9	U11	JTAG Port
	i960®
	U15

Logic Analyzer Connectors	64-Bit PCI	NiCd Batteries

1-2	IQ80960RM/RN Evaluation Board Manual

Introduction

1.1i960® RM/RN I/O Processor and IQ80960RM/RN Features

The i960 RM/RN I/O processor serves as the main component of a high performance, PCI-based intelligent I/O subsystem. The IQ80960RM and IQ80960RN platforms allow the developer to connect PCI devices to the i960 RM/RN I/O processors using the four secondary PCI expansion connectors. The features of the IQ80960RM and IQ80960RN platforms are enumerated below and shown in Figure 1-1 and Figure 1-2.

•i960 RM/RN I/O processor

•Modified PCI long-card form factor

•64-bit or 32-bit primary PCI bus interface (80960RM 32-bit only)

•64-bit or 32-bit secondary PCI bus connected to the primary PCI interface with a PCI-to-PCI bridge (80960RM 32-bit only)

•DMA channels on both PCI buses

•I2C Serial Bus

•168-pin, 3.3V DIMM socket supporting 16 to 128 Mbytes of Synchronous DRAM organized x72 to support Error Correction Code (ECC) and clocked at 66 MHz (ships with 16 M/ECC installed)

•Serial console port based on 16C550 UART

•Eight user-programmable LEDs

•3 Indicator LEDs: processor has passed self-test, 3.3 V is supplied to SDRAM, and 3.3 V is supplied to secondary PCI slots

•Flash ROM, 2 Mbytes

•Logic analyzer connectors for SDRAM bus, ROM bus and secondary PCI arbitration signals

•Fan heatsink monitor circuit

•Battery backup for SDRAM

•JTAG header

1.2Software Development Tools

A number of software development tools are available for the i960® processor family1. This manual provides information on two software development toolsets: Wind River System’s Tornado* for I20* and Intel’s CTOOLS. If you are using other software development tools, read through the information in this chapter and in Chapter 2 to gain a general understanding of how to use your tools with this board.

1.To view the electronic tools catalog, access http://developer.intel.com/design/develop.htm/ from the web.

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Introduction

1.3Tornado* for I20* Software Development Toolset

Tornado for I20 is a complete toolset featuring an integrated development environment including a compiler, assembler, linker, and debugger. It also features a real-time operating system.

1.3.1IxWorks* Real-Time Operating System

The IQ80960RM/RN platforms are equipped with Wind River Systems, Inc.’s IxWorks*. IxWorks provides for the elements of the I2O standard: an event-driven driver framework, host message protocols, and executive modules for configuration and control. IxWorks also allows for the writing of basic device drivers and provides NOS-to-driver independence. TORNADO for I2O provides a visual environment for building, testing and debugging of I2O drivers.

1.3.2TORNADO Build Tools

TORNADO for I2O includes a collection of supporting tools that provide a complete development tool chain. These include the compiler, assembler, linker and binary utilities. Also provided is an I2O module builder, which creates I2O-loadable modules.

1.3.3TORNADO Test and Debug Tools

TORNADO for I2O test and debug tools include the dynamic loader, the CrossWind debugger, the WindSh* interactive shell, and a system browser.

The dynamic loader allows for interactive loading, testing, and replacement of individual object modules that comprise a driver.

CrossWind is an extended version of GDB960. Using it you can debug I2O drivers by setting breakpoints on desired I2O components. A variety of windows display source code, registers, locals, stack frame, memory and so on.

WindSh allows you to communicate to the IQ80960RM/RN platform via an RS-232 serial port. The IQ80960RM/RN platform supports port speeds from 300 to 115,200 bps. The shell can be used to:

•control and monitor I2O drivers

•format, send and receive driver messages

•examine hardware registers

•run automated I2O test suites

The shell also provides essential debugging capabilities; including breakpoints, single stepping, stack checking, and disassembly.

1-4	IQ80960RM/RN Evaluation Board Manual

Introduction

1.4CTOOLS Software Development Toolset

Intel’s i960 processor software development toolset, CTOOLS, features advanced

C/C++ - language compilers for the i960 processor family. CTOOLS development toolset is available for Windows* 95/NT-based systems and a variety of UNIX workstation hosts. These products provide execution profiling and instruction scheduling optimizations and include an assembler, a linker, and utilities designed for embedded processor software development.

1.4.1CTOOLS and the MON960 Debug Monitor

In place of IxWorks, the IQ80960RM/RN platform can be equipped with Intel’s MON960, an on-board software monitor that allows you to execute and debug programs written for i960 processors in a non-I2O environment. The monitor provides program download, breakpoint, single step, memory display, and other useful functions for running and debugging a program.

The IQ80960RM/RN platform works with the source-level debuggers provided with CTOOLS, including GDB960 (command line version) and GDB960V (GUI version).

1.4.1.1MON960 Host Communications

MON960 allows you to communicate and download programs developed for the IQ80960RM/RN platform across a host system’s serial port or PCI interface. The IQ80960RM/RN platform supports two methods of communication: terminal emulation and Host Debugger Interface (HDI).

1.4.1.2Terminal Emulation Method

Terminal emulation software on your host system can communicate to MON960 on the IQ80960RM/RN platform via an RS-232 serial port. The IQ80960RM/RN platform supports port speeds from 300 to 115,200 bps. Serial downloads to MON960 require that the terminal emulation software support the XMODEM protocol.

Configure the serial port on the host system for 300-115,200 baud, 8 bits, one stop bit, no parity with XON/XOFF flow control.

1.4.1.3Host Debugger Interface (HDI) Method

You may use a source-level debugger, such as Intel’s GDB960 and GDB960V to establish serial or PCI communications with the IQ80960RM/RN platform. The MON960 Host Debugger Interface (HDI) provides a defined messaging layer between MON960 and the debugger. For more information on this interface, see the MON960 Debug Monitor User’s Manual (484290).

HDI connection requests cannot be detected by MON960 if the user has already initiated a connection using a terminal emulator. In this case, the IQ80960RM/RN platform must be reset before the debugger can connect to MON960.

1.5SPI610 JTAG Emulation System

The SPI610 JTAG Emulation System from Spectrum Digital, Inc. is included in the IQ80960RM/RN development kit. It furnishes the default host development environment-to- evaluation board communication link based on the i960 RM/RN I/O processor JTAG interface.

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Introduction

Refer to the SPI610 Reference Manual for JTAG emulation system installation and operation for both the Tornado and CTOOLS environment. Optionally, evaluation board serial port communications can be used for this communication link (see Section 1.3.3, “TORNADO Test and Debug Tools” on page 1-4 ).

1.6About This Manual

A brief description of the contents of this manual follows.

		Introduces the IQ80960RM and IQ80960RN Evaluation Board features. This
	Chapter 1, “Introduction”	chapter also describes Intel’s CTOOLS* and WindRiver Systems IxWorks*
		software development tools, and defines notational-conventions and related
		documentation.
		Provides step-by-step instructions for installing the IQ80960RM or IQ80960RN
		platform in a host system and downloading and executing an application
	Chapter 2, “Getting Started”	program. This chapter also describes Intel’s software development tools, the
		MON960 Debug Monitor, IxWORKS, software installation, and hardware
		configuration.
	Chapter 3, “Hardware	Describes the locations of connectors, switches and LEDs on the IQ80960RM
		and IQ80960RN platforms. Header pinouts and register descriptions are also
	Reference”
		provided in this chapter.
	Chapter 4, “i960® RM/RN	Presents an overview of the capabilities of the i960 RM/RN I/O processor and
	I/O Processor Overview”	includes the CPU memory map.
	Chapter 5, “MON960	Describes a number of features added to MON960 to support application
	Support for IQ80960RM/RN”	development on the i960 RM/RN I/O processor.
	Appendix A, “Bill of	Shows complete parts list IQ80960RM and IQ80960RN Evaluation Platforms.
	Materials”
	Appendix B, “Schematics”	Complete set of schematics for the IQ80960RM and IQ80960RN Evaluation
		Platforms.
	Appendix C, “PLD Code”	Example PLD code used on IQ80960RM and IQ80960RN evaluation boards
		for SDRAM battery backup.
	Appendix D, “Recycling the	Information on the RBRC program and the locations of participating recycling
	Battery”	centers.

1-6	IQ80960RM/RN Evaluation Board Manual

Introduction

1.7Notational-Conventions

The following notation conventions are consistent with other i960 RM/RN I/O processor documentation and general industry standards.

# or overbar	In code examples the pound symbol (#) is appended to a signal name to
	indicate that the signal is active. Normally inverted clock signals are
	indicated with an overbar above the signal name (e.g., RAS).
Bold	Indicates user entry and/or commands.
	PLD signal names are in bold lowercase letters (e.g., h_off, h_on).
Italics	Indicates a reference to related documents; also used to show emphasis.
Courier font	Indicates code examples and file directories and names.
Asterisks (*)	On non-Intel company and product names, a trailing asterisk indicates
	the item is a trademark or registered trademark. Such brands and names
	are the property of their respective owners.
UPPERCASE	In text, signal names are shown in uppercase. When several signals share
	a common name, each signal is represented by the signal name followed
	by a number; the group is represented by the signal name followed by a
	variable (n). In code examples, signal names are shown in the case
	required by the software development tool in use.
Designations for	In text, instead of using subscripted “base” designators (e.g., FF 16) or
hexadecimal and	leading “0x” (e.g., 0xFF) hexadecimal numbers are represented by a
binary numbers	string of hex digits followed by the letter H. A zero prefix is added to
	numbers that begin with A through F. (e.g., FF is shown as 0FFH.) In
	examples of actual code, “0x” is used. Decimal and binary numbers are
	represented by their customary notations. (e.g., 255 is a decimal number
	and 1111 1111 is a binary number. In some cases, the letter B is added to
	binary numbers for clarity.)

1.8Technical Support

Up-to-date product and technical information is available electronically from:

•Intel’s World-Wide Web (WWW) Location: http://www.intel.com

•IQ80960RM and IQ80960RN Product Information: http://developer.intel.com/design/i960

For technical assistance, electronic mail (e-mail) provides the fastest route to reach engineers specializing in IQ80960RM and IQ80960RN issues. Posting messages on the Embedded Microprocessor Forum at http://support.intle.com/newsgroups/ is also a direct route for IQ80960RM and IQ80960RN technical assistance. See Section 1.8.2.

Within the United States and Canada you may contact the Intel Technical Support Hotline. See Section 1.8.1 for a list of customer support sources for the US and other geographical areas.

IQ80960RM/RN Evaluation Board Manual

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Introduction

1.8.1Intel Customer Electronic Mail Support

For direct support from engineers specialing in i960® Microprocessor issues send e-mail in english to [e-mail].

Questions and other messages may be posted to the Embedded Microprocessor Forum at http://support.intel.com/newsgroups/.

1.8.2Intel Customer Support Contacts

Contact Intel Corporation for technical assistance for the IQ80960RM/RN evaluation platform.

Country	Literature	Customer Support Number
United States	800-548-4725	800-628-8686
Canada	800-468-8118 or 303-297-7763	800-628-8686
Europe	Contact local distributor	Contact local distributor
Australia	Contact local distributor	Contact local distributor
Israel	Contact local distributor	Contact local distributor
Japan	Contact local distributor	Contact local distributor

1-8	IQ80960RM/RN Evaluation Board Manual

Introduction

1.8.3Related Information

To order printed manuals from Intel, contact your local sales representative or Intel Literature Sales (1-800-548-4725).

Table 1-1.	Document Information
	Product	Document Name	Company/ Order #
	All	Developers’ Insight CD-ROM	Intel # 273000
		i960® RM/RN I/O Processor Developer’s Manual	Intel # 273158
	80960RM/RN	80960RM I/O Processor Data Sheet	Intel # 273156
		80960RN I/O Processor Data Sheet	Intel # 273157
		i960® RM/RN I/O Processor Design Guide	Intel # 273139
		MON960 Debug Monitor User’s Guide	Intel #484290
		PCI Local Bus Specification Revision 2.1	PCI Special Interest Group
			1-800-433-5177
		Writing I2O Device Drivers in IxWorks	Wind River Systems, Inc.
			#DOC-1173-8D-02
		IxWorks Reference Manual	Wind River Systems, Inc.
			#DOC-1173-8D-03
		VxWorks Programmer’s Guide	Wind River Systems, Inc.
			#DOC-11045-ZD-01
		Tornado User’s Guide	Wind River Systems, Inc.
			#DOC-1116-8D-01
		Tornado for I2O	Wind River Systems, Inc.
			#DOC-12381-8D-00
		Tornado for I2O Compact Disk Rev. 1.0	#TDK-12380-ZC-00
		SP610 Emulation System Reference Manual	Spectrum Digital Inc.
			# 503715

Contact Cyclone Microsystems for additional information about their products and literature:

Table 1-2.	Cyclone Contacts
		Phone: [phone]
	Cyclone Microsystems
		FAX: [phone]
	25 Science Park
	New Haven CT 06511	e-mail: [e-mail]
		WWW: http://www.cyclone.com

IQ80960RM/RN Evaluation Board Manual

1-9

Getting Started

2

This chapter contains instructions for installing the IQ80960RM/RN platform in a host system and, how to download and execute an application program using Wind River System’s IxWorks or Intel’s CTOOLS software development toolsets.

2.1Pre-Installation Considerations

This section provides a general overview of the components required to develop and execute a program on the IQ80960RM/RN platform. IQ80960RM/RN evaluation boards support two software development toolsets, Wind River System’s IxWorks and Intel’s CTOOLS.

IxWorks is a complete toolset featuring an integrated development environment including a compiler, assembler, linker, and debugger. It also features a real-time operating system. If you are using the IxWorks operating system with the TORNADO* development environment, refer to the Wind River Systems, Inc. documentation referenced in Section 1.8.3.

CTOOLS is a complete C/C++-language software-development toolset for developing embedded applications to run on i960 processors. It contains a C/C++ compiler, the gcc960 and ic960 compiler driver programs, an assembler, runtime libraries, a collection of software-development tools and utilities, and printed and on-line documentation. The MON960 Debug Monitor User’s Guide fully describes the components of MON960, including MON960 commands, the Host Debugger Interface Library (HDIL), and the MONDB.EXE utility. If you are using MON960 and the CTOOLS toolset, refer to section Section 2.2.1, “Installing Software Development Tools” on page 2-1 .

See Chapter 1 for more information on the IxWorks and CTOOLS features.

The IQ80960RM/RN evaluation boards are supplied with IxWorks intelligent real-time operating system pre-loaded into the on-board Flash. You also have the option of installing the MON960 debug monitor, which is required if you are using the CTOOLS debugging tools, GDB960, GDB960V, or MONDB. Section 3.3.1 describes the Flash ROM programming utility, which allows you to load MON960 onto the platform or re-load IxWorks.

2.2Software Installation

2.2.1Installing Software Development Tools

If you haven’t done so already, install your development software as described in its manuals. All references in this manual to CTOOLS or CrossWind assume that the default directories were selected during installation. If this is not the case, substitute the appropriate path for the default path wherever file locations are referenced in this manual.

IQ80960RM/RN Evaluation Board Manual

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Getting Started

2.3Hardware Installation

Follow these instructions to get your new IQ80960RM/RN platform running. Be sure all items on the checklist were provided with your IQ80960RM/RN.

Warning: Static charges can severely damage the IQ80960RM/RN platforms. Be sure you are properly grounded before removing the IQ80960RM/RN platform from the anti-static bag.

2.3.1Battery Backup

Battery backup is provided to save any information in SDRAM during a power failure. The IQ80960RM/RN platform contains four AA NiCd batteries, a charging circuit and a regulator circuit. The batteries installed in the IQ80960RM/RN platform are rated at 600 mA/Hr.

SDRAM technology provides a simple way of enabling data preservation through the self-refresh command. When the processor receives an active Primary PCI reset it issues the self-refresh command and drives the SCKE signals low. Upon seeing this condition, a PAL on the IQ80960RM/RN platform holds SCKE low before the processor loses power. The batteries maintain power to the SDRAM and the PAL to ensure self-refresh mode. When the PAL detects PRST# returning to inactive state, the PAL releases the hold on SCKE.

The battery circuit can be disabled by removing the batteries. LED CR4 indicates when the SDRAMs have sufficient power. If the batteries remain in the evaluation platform when it is depowered and/or removed from the chassis, the batteries will maintain the SDRAM for approximately 30 hours. Once power is again applied, the batteries will be fully charged in about 4 hours.

2.3.2Installing the IQ80960RM/RN Platforms in the Host System

If you are installing the IQ80960RM/RN platform for the first time, visually inspect the board for any damage that may have occurred during shipment. If there are visible defects, return the board for replacement. Follow the host system manufacturer’s instructions for installing a PCI adapter.

The IQ80960RM/RN platform is a full-length PCI adapter and requires a PCI slot that is free from obstructions. The IQ80960RM/RN platform is taller than specified in the PCI Local Bus Specification Revision 2.1. The extended height of the board will require you to keep the cover off of your PC. Refer to Chapter 3 for physical dimensions of the board.

2.3.3Verify IQ80960RM/RN Platform is Functional

These instructions assume that you have already installed the IQ80960RM/RN platform in the host system as described in Section 2.3.2.

1.To connect the serial port for communicating with and downloading to the IQ80960RM/RN platform, connect the RS-232 cable (provided with the IQ80960RM/RN) from a free serial port on the host system to the phone jack-style connector on the IQ80960RM/RN platform.

2.Upon power-up, the red FAIL LED turns off, indicating that the processor has passed its self-test.

3.If you have IxWorks installed in the flash ROM, the user LEDs display the binary pattern 99H. In the IxWorks development environment, raw serial input/output is not used. Instead, the Wind DeBug (WDB) protocol is run over the serial port, to allow communication with Tornado development tools. If the terminal emulation package is running at 115,200 baud, the letters “WDB_READY” display prior to launching in the WDB serial protocol.

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4.If you have MON960 installed in the flash ROM, press <ENTER> on a terminal connected to the IQ80960RM/RN platform to bring up the MON960 prompt. MON960 automatically adjusts its baud rate to match that of the terminal at start-up. At baud rates other than 9600, it may be necessary to press <ENTER> several times.

2.4Creating and Downloading Executable Files

To download code to the IQ80960RM/RN platform running IxWorks, consult Wind River documentation on the supplied TORNADO for I2O CD-ROM. To download code to the IQ80960RM/RN platform, your compiler produces an ELF-format object file.

To download code to the IQ80960RM/RN platform running CTOOLS, consult the CTOOLS documentation for information regarding compiling, linking, and downloading applications. During a download, MON960 checks the link address stored in the ELF file, and stores the file at that location on the IQ80960RM/RN platform. If the executable file is linked to an invalid address on the IQ80960RM/RN platform, MON960 aborts the download.

2.4.1Sample Download and Execution Using GDB960

This example shows you how to use GBD960 to download and execute a file named myapp via the serial port.

•Invoke GDB960. From a Windows 95/NT command prompt, issue the command: gdb960 -r com2 myapp

This command establishes communication and downloads the file myapp.

•To execute the program, enter the command from the GDB960 command prompt:

(gdb960) run

More information on the GDB960 commands mentioned in this section can be found in the

GDB960 User’s Manual .

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3.1Power Requirements

The IQ80960RM/RN platform draws power from the PCI bus. The power requirements of the IQ80960RM/RN platforms are shown in Table 3-1 and Table 3-2. The numbers do not include the power required by a PCI card(s) mounted on one or more of the IQ80960RM/RN platforms’ four expansion slots.

Table 3-1.	IQ80960RN Platform Power Requirements
	Voltage	Typical Current	Maximum Current
	+3.3 V	0 V*	0 V*
	+5 V	1.45 A	1.96 A
	+12 V	286 mA	485 mA
	-12 V	1 mA	1 mA
	NOTE: Does not include the power required by a PCI card(s) mounted on the IQ80960RN platform.
	* +3.3V for 80960RN Processor created on board from +5V.

Table 3-2.	IQ80960RM Platform Power Requirements
	Voltage	Typical Current	Maximum Current
	+3.3 V	0 V*	0 V*
	+5 V	1.32 A	1.86 A
	+12 V	284 mA	485 mA
	-12 V	1 mA	1 mA

NOTE: Does not include the power required by a PCI card(s) mounted on the IQ80960RM platform.

*+3.3V for 80960RM Processor created on board from +5V.

3.2SDRAM

The IQ80960RM/RN platform is equipped with a 168-pin DIMM socket formatted to accept +3.3V synchronous DRAM with or without Error Correction Code (ECC). The socket will accept SDRAM from 8 Mbytes to 128 Mbytes. 128 Mbyte SDRAMs are available in both x64 and x72 configurations. Note that 8 Mbyte SDRAMs are only for x64 or non-ECC memory. The SDRAM is accessible from either of the PCI buses, via the ATUs, and the local bus on the IQ80960RM/RN platform.

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Hardware Reference

3.2.1SDRAM Performance

The IQ80960RM/RN platform uses 72-bit SDRAM with ECC or 64-bit SDRAM without ECC. SDRAM allows zero data-to-data wait state operation at 66 MHz. The memory controller unit (MCU) of the i960® RM/RN I/O processor supports SDRAM burst lengths of four. A burst length of four enables seamless read/write bursting of long data streams, as long as the MCU does not cross the page boundary. Page boundaries are naturally aligned 2 Kbyte blocks. 72-bit SDRAM with ECC allows a maximum throughput of 528 Mbytes per second.

Both 16 Mbit and 64 Mbit SDRAM devices are supported. The MCU keeps two pages per bank open simultaneously for 16 Mbit devices and 4 pages per bank for 64 Mbit devices. Simultaneously open pages allow for greater performance for sequential access, distributed across multiple internal bus transactions. Table 3-3 shows read and write examples of a single 8 byte access and for a multiple 40 byte access.

Table 3-3.	SDRAM Performance
	Cycle Type	Table Clocks	Performance Bandwidth
	Read Page Hit (8 bytes)	7	76 Mbytes/sec
	Read Page Miss (8 bytes)	12	44 Mbytes/sec
	Read Page Hit (40 bytes)	11	240 Mbytes/sec
	Read Page Miss (40 bytes)	16	165 Mbytes/sec
	Write Page Hit (8 bytes)	4	132 Mbytes/sec
	Write Page Miss (8 bytes)	8	66 Mbytes/sec
	Write Page Hit (40 bytes)	8	330 Mbytes/sec
	Write Page Miss (40 bytes)	12	220 Mbytes/sec

Note that if ECC is enabled and you attempt a partial write — less than 64 bits — you will incur a penalty. Because ECC is enabled, the MCU will translate the write into a read-modify-write transaction. Therefore, for a single byte write the clock count will be 11.

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3.2.2Upgrading SDRAM

The IQ80960RM/RN is equipped with 16 Mbytes of SDRAM with ECC inserted in the 168-pin DIMM socket. The memory may be expanded by inserting up to a 128 Mbyte module into the DIMM socket. The various memory combinations are shown in Table 3-4. Only 168-pin +3.3V SDRAM modules with or without ECC rated at 10 ns should be used on the IQ80960RM/RN platform. The column labeled ECC determines if that particular memory configuration can be used with ECC.

Table 3-4.	SDRAM Configurations
	SDRAM	SDRAM	# Banks	Row	Column	ECC	Total Memory
	Technology	Arrangement					SIze
		2M x 8	1	11	9	Yes	16 Mbytes
	16 Mbit		2			Yes	32 Mbytes
		1M x 16	1	11	8	No	8 Mbytes
			2			No	16 Mbytes
		8M x 8	1	12	9	Yes	64 Mbytes
	64 Mbit		2			Yes	128 Mbytes
		4M x 16	1	12	8	No	32 Mbytes
			2			No	64 Mbytes

3.3Flash ROM

An E28F016S5 (2 Mbytes) Flash ROM is included on the IQ80960RM/RN platform. This Flash ROM contains IxWorks* and may be used to store user applications.

3.3.1Flash ROM Programming

Two types of Flash ROM programming exist on the IQ80960RM/RN platform. The first is normal application development programming. This occurs using IxWorks to download new software and the 80960JT core to write the new code to the Flash ROM. During this time the boot sectors (containing IxWorks) are write protected.

The second type of Flash ROM programming is loading the boot sectors. You will not be required to load the boot sectors except:

•To load MON960

•To load a new release of IxWorks

•To change between the check build and the free build of IxWorks

The following steps are required to program the Flash ROM boot sectors:

1.Set switch S1 #’s 1 and 2 to the on position.

2.Reset the board by cycling power on the workstation.

3.Run the Intel DOS-based flash utility to program the Flash ROM boot sectors.

4.Set switch S1 #’s 1 and 2 to the off position.

5.Reset the board by cycling power on the workstation.

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Hardware Reference

3.4Console Serial Port

The console serial port on the IQ80960RM/RN platform, based on a 16C550 UART, is capable of operation from 300 to 115,200 bps. The port is connected to a phone jack-style plug on the IQ80960RM/RN platform. The DB25 to RJ-45 cable included with the IQ80960RM/RN can be used to connect the console port to any standard RS-232 port on the host system.

The UART on the IQ80960RM/RN platform is clocked with a 1.843 MHz clock, and may be programmed to use this clock with its internal baud rate counters. The UART register addresses are shown in Table 3-5; refer to the 16C550 device data book for a detailed description of the registers and device operation. Note that some UART addresses refer to different registers depending on whether a read or a write is being performed.

Table 3-5.	UART Register Addresses
	Address	Read Register	Write Register
	E000 0000H	Receive Holding Register	Transmit Holding Register
	E000 0001H	Unused	Interrupt Enable Register
	E000 0002H	Interrupt Status Register	FIFO Control Register
	E000 0003H	Unused	Line Control Register
	E000 0014H	Unused	Modem Control Register
	E000 0015H	Line Status Register	Unused
	E000 0016H	Modem Status Register	Unused
	E000 0017H	Scratchpad Register	Scratchpad Register

3.5Secondary PCI Bus Expansion Connectors

Four PCI Expansion Slots are available on the IQ80960RM/RN platform. The IQ80960RM supports 32-bit PCI expansion and the IQ80960RN supports 64-bit PCI expansion. The slots are designed for +5V PCI signalling and accommodate PCI cards with +5V or universal signalling capabilities.

3.5.1PCI Slots Power Availability

Power from the Primary PCI bus, +3.3V, +5V, +12V, and –12V, is routed to the Secondary PCI bus expansion slots. +3.3V is only available at the secondary PCI slots if the host system makes +3.3V available on the Primary PCI slots. LED CR5 indicates if this power is available.

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Hardware Reference

3.5.2Interrupt and IDSEL Routing

Table 3-6.	Secondary PCI Bus Interrupt and IDSEL Routing
	Connector	IDSEL	INTA#	INTB#	INTC#	INTD#
	J11	SAD16	SINTA#	SINTB#	SINTC#	SINTD#
	J12	SAD17	SINTB#	SINTC#	SINTD#	SINTA#
	J13	SAD18	SINTC#	SINTD#	SINTA#	SINTB#
	J14	SAD19	SINTD#	SINTA#	SINTB#	SINTC#

3.6Battery Backup

Battery backup is provided to save any information in SDRAM during a power failure. The IQ80960RM/RN platform contains four AA NiCd batteries, a charging circuit and a regulator circuit. The batteries installed in the IQ80960RM/RN platform are rated at 600 mA/Hr.

SDRAM technology provides a simple way of enabling data preservation though the self-refresh command. When the processor receives an active Primary PCI reset it will issue the self-refresh command and drive the SCKE signals low. Upon seeing this condition a PAL on the IQ80960RM/RN platform will hold SCKE low before the processor loses power. The batteries will maintain power to the SDRAM and the PAL to ensure self-refresh mode. When the PAL sees PRST# returning to inactive state the PAL will release the hold on SCKE.

The battery circuit can be disabled by removing the batteries. LED CR4 indicates when the SDRAMs have sufficient power. If the batteries remain in the evaluation platform when it is depowered and/or removed from the chassis, the batteries will maintain the SDRAM for approximately 30 hours. Once power is again applied, the batteries will be fully charged in about four hours.

3.7Loss of Fan Detect

The i960 RM/RN I/O processor can be cooled by an active heat sink mounted on top. The fan provides a square wave output that is monitored by a comparator circuit on the IQ80960RM/RN platform. The frequency of the fan output is approximately 9K RPM. If the frequency falls below approximately 8K RPM the circuit will provide an interrupt to the processor. This is an evaluation board feature intended as an example of system hardware monitoring, since the IQ80960RM/RN platform does not ship with a heatsink.

Note: When using a passive heat sink, the processor never sees an interrupt from not having a fan.

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3.8Logic Analyzer Headers

There are five logic analyzer connectors on the IQ80960RM/RN platform. The connectors are Mictor type, AMP part # 767054-1. Hewlett-Packard and Tektronix manufacture and sell interfaces to these connectors. The logic analyzer connectors allow for interfacing to the SDRAM and ROM buses along with secondary PCI arbitration signals. Table 3-7 shows the connectors and the pin assignments for each.

Table 3-7.	Logic Analyzer Header Definitions
	PIN	J9	J11	J12	J10	J8
	3		SDRAMCLK
	4	DQ15	SDQM7	DQ31		RAD15
	5	DQ14	SDQM6	DQ30		RAD14
	6	DQ13	SDQM5	DQ29		RAD13
	7	DQ12	SDQM4	DQ28		RAD12
	8	DQ11	SDQM3	DQ27		RAD11
	9	DQ10	SDQM2	DQ26		RAD10
	10	DQ9	SDQM1	DQ25		RAD9
	11	DQ8	SDQM0	DQ24		RAD8
	12	DQ7	SCB7	DQ23		RAD7
	13	DQ6	SCB6	DQ22		RAD6
	14	DQ5	SCB5	DQ21		RAD5
	15	DQ4	SCB4	DQ20		RAD4
	16	DQ3	SCB3	DQ19	SCE0#	RAD3
	17	DQ2	SCB2	DQ18	SCE1#	RAD2
	18	DQ1	SCB1	DQ17	SBA1	RAD1
	19	DQ0	SCB0	DQ16	SBA0	RAD0
	20	DQ32	SA0	DQ48	SREQ0#	RAD16
	21	DQ33	SA1	DQ49	SREQ1#
	22	DQ34	SA2	DQ50	SREQ2#
	23	DQ35	SA3	DQ51	SREQ3#	RALE
	24	DQ36	SA4	DQ52	SREQ4#	RCE0#
	25	DQ37	SA5	DQ53	SREQ5#	RCE1#
	26	DQ38	SA6	DQ54	SGNT0#	ROE#
	27	DQ39	SA7	DQ55	SGNT1#	RWE#
	28	DQ40	SA8	DQ56	SGNT2#
	29	DQ41	SA9	DQ57	SGNT3#	I_RST#
	30	DQ42	SA10	DQ58	SGNT4#
	31	DQ43	SA11	DQ59	SGNT5#
	32	DQ44		DQ60
	33	DQ45	SWE#	DQ61
	34	DQ46	SCAS#	DQ62
	35	DQ47	SRAS#	DQ63
	36				P_PCICLK	RALE

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3.9JTAG Header

The JTAG header allows debugging hardware to be quickly and easily connected to some of the IQ80960RM/RN processor’s logic signals.

The JTAG header is a 16-pin header. A 3M connector (part number 2516-6002UG) is required to connect to this header. The pinout for the JTAG header is shown in Table 3-8. The header and connector are keyed using a tab on the connector and a slot on the header to ensure proper installation.

Each signal in the JTAG header is paired with its own ground connection to avoid the noise problems associated with long ribbon cables. Signal descriptions are found in the i960® RM/RN I/O Processor Developer’s Manual, 80960RM I/O Processor Data Sheet and the 80960RN I/O Processor Data Sheet.

Table 3-8.	JTAG Header Pinout
	Pin	Signal	Input/Output to 80960RM/RN	Pin	Signal
	1	TRST#	IN	2	GND
	3	TDI	IN	4	GND
	5	TDO	OUT	6	GND
	7	TMS	IN	8	GND
	9	TCK	IN	10	GND
	11	LCDINIT#	IN	12	GND
	13	I_RST#	OUT	14	GND
	15	PWRVLD	OUT	16	GND

Table 3-9 describes switch setting options and defaults. These switch settings are sampled at Primary PCI Reset. See Table 5-1 “Initialization Modes” on page 5-3 for processor initialization configurations.

Table 3-9.	Switch S1 Settings
	Position	Name	Description	Default
			Determines if the processor is to be held in reset.
	S1-1	RST_MODE#	ON = hold in rest	OFF
			OFF = allows processor initialization
			Determines if the Primary PCI interface will be disabled.
	S1-2	RETRY	ON = allows Primary PCI configuration cycles to occur	OFF
			OFF = retries all Primary PCI configuration cycles
			Notifies Memory Controller of the SDRAM width.
	S1-3	32BITMEM_EN#	ON = Memory Controller utilizes 32-bit SDRAM access protocol	OFF
			OFF = Memory Contoller utilizes 64-bit SDRAM access protocol
	S1-4a		Determines whether Secondary PCI bus is a 32or 64-bit bus.
		32BITPCI_EN#	ON = indicates Secondary PCI bus is a 32-bit bus	OFF
			OFF = indicates Secondary PCI bus is a 64-bit bus

a.This switch is active for IQ80960RN ONLY.

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