Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual
property rights is granted by this document. Except as provided in Intel’s Terms and Conditions of Sale for such products, Intel assumes no liability
whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to
fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Intel products are not
intended for use in medical, life saving, or life sustaining applications.
Intel may make changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for
future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
The IQ80960RM/RN may contain design defects or errors known as errata which may cause the product to deviate from published specifications.
Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800-
548-4725 or by visiting Intel’s website at http://www.intel.com.
This manual describes the IQ80960RM and IQ80960RN eva luation platforms for Intel’s i960®
RM/RN I/O processor. The i960 RM/RN I/O processors combine an 80960JT core with two PCI
bus interfaces, as well as a memory controller, DMA channels, an interrupt controller interface, and
2
C serial bus. The difference between the two processors is that the 80960RN utilizes 64-bit
an I
primary PCI and secondary P CI bus es while the 80960RM utilizes both a 32-bit primary and
secondary PCI bus . The IQ8096 0RM a nd IQ80960RN pl at forms are full-l ength PCI adapte r boards
and are 8.9” in height to ac commodate four standard PCI connectors on the secondary PCI bus.
The boards can be installed in any PCI host system that complies with the PCI Local Bus Specificati on Revision 2.1. PCI devices can be connected to the secondary bus to build powerful
intelligent I/O subsystems.
1.1i960® RM/RN I/O Processor and IQ80960RM/RN
Features
The i960 RM/RN I/O processor serves as the mai n component of a high performance , PCI-based
intelligent I/O subsystem. The IQ80960RM and IQ80960RN pla tforms allow the developer to
connect PCI devices to the i960 RM/RN I/O processors using the four secondary PCI expansion
connectors. The features of the IQ80960RM and IQ80960RN platforms are enumerated below and
shown in Figure 1-1 and Figu re 1-2.
• i960 RM/RN I/O processor
• Modified PCI long-card form factor
• 64-bit or 32-bit primary PCI bus interface (80960RM 32-bit only)
• 64-bit or 32-bit secondary PCI bus connected to the pri mary P CI interface with a PCI-to-PCI
bridge (80960RM 32-bit only)
• DMA channels on both PCI buses
2
• I
C Serial Bus
• 168-pin, 3.3V DIMM socket supporting 16 to 128 Mbytes of Synchronous DRAM organized
x72 to support Error Correction Code (ECC) and clocked at 66 MHz (ships with 16 M/ECC
installed)
• Serial console port based on 16C550 UART
• Eight user-programmable LEDs
• 3 Indicator LEDs: processor has passed self-test, 3.3 V is supplied to SDRAM, and 3.3 V is
supplied to sec ondary PCI slots
• Flash ROM, 2 Mbytes
• Logic analyzer connectors for SDRAM bus, ROM bus and secondary PCI arbitration signals
• Fan heatsink monitor circuit
• Battery bac kup for SDRAM
• JTAG header
1.2Software Development Tools
A number of software development tools are availab le for the i960® processor family1. This
man ua l provi d es in f orma ti o n on two so f t w a re developme n t toolsets: Wind Ri ver Sys tem’s
Tornado* for I
through the inf ormation in this chapter and in Chapter 2 to gain a general understanding of how to
use your tools with thi s boa rd.
0* and Intel’s CTOOLS. If you are using other software development tools, read
2
1. To view the electronic tools catalog, access http://developer.intel.com/design/develop.htm/ from the web.
IQ80960RM/RN Evaluation Board Ma nual1-3
Introduction
1.3Tornado* for I20* Software Development Toolset
T orna do for I
compiler, assembler, linker, and debugger. It also features a real-time operating system.
0 is a complete toolset featuring an integrated development environment including a
2
1.3.1IxWorks* Real-Time Operating System
The IQ80960RM/RN platforms are equipped with Wind River Systems, Inc.’s IxWorks*. IxWorks
provides for the elements of the I
protocols, and executive modules for configuration and control. IxWorks also allows for the
writing of basic devi ce drivers and provides NOS-to-driver independence. TORNADO for I
provides a visual environment for building, testing and debugging of I
O standard: an event-driven driver framework, host message
2
1.3.2TORNADO Build Tools
TORNADO for I2O includes a coll ection of supporting tools tha t provide a complete development
tool chain. These include the compiler, assembler, linker and bina ry utilities. Als o provided is a n
O module builder, which crea tes I2O-loadable modules .
I
2
1.3.3TORNADO Test and Debug Tools
TORNADO for I2O test and deb ug t ools i nclude th e dynamic l oader, the CrossWi nd∗ debugger , the
WindSh* interactive shell, and a system browser.
The dynamic loader allows for interactive loading, testing, and replacement of individu al object
modules that comprise a driver.
O drivers.
2
O
2
CrossWind is an extended version of GDB960. Using it you can debug I
breakpoints on desired I
locals, stack frame, memory and so on.
WindSh allows you to commun icate to the IQ80960RM/RN platform via an RS-232 serial port.
The IQ80960RM/RN pla tform supports port speeds from 300 to 115,200 bps. The shell can be
used to:
• control and monitor I
O components. A variety of windows display source code, registers,
2
O drivers
2
O drivers by setting
2
• format, send and receiv e d river messages
• examine hardware registe rs
• run automated I
The shell also provides essential debugging capabilities; including brea kpoints, single stepping,
stack checking, and disassembly.
O test suites
2
1-4I Q80960RM/RN Evaluation Board Manu al
1.4CTOOLS Software Development Too ls et
Intel’s i960 processor software development toolset, CTOOLS, features advanced
C/C++ - language compilers for the i960 processor family. CTOOLS development toolset is
available for Windows* 95/NT-based systems and a variety of UNIX workstation hosts. These
products provide execution pr ofiling and instruction scheduling optimizat ions and include an
assembler, a linker, and utilities designed for embedded proc essor software developm ent.
1.4.1CTOOLS and the MON960 Debug Monitor
In place of IxWorks, the IQ80960RM/RN platform can be equippe d with Intel’s MON960, an
on-board softwa re monitor that allows you to execute and debug programs written for i960
processors in a non-I
step, memory display, and other useful functions for runnin g and de bugging a program.
The IQ80960RM/RN platform works with the source-level debuggers provided with CTOOLS,
including GDB960 (command line version) and GDB960V (GUI version).
1.4.1.1MON960 Host Communications
MON960 allows you to communicate and download programs developed for the IQ80960RM/RN
platform across a host system’s s erial port or PCI interface. The IQ80960RM/RN platform supports
two methods of communication: terminal emulation and Host Debugger Interface (HDI).
2
O environment. The monitor provides program download, bre akpoint, single
Introduction
1.4.1.2Terminal Emulation Method
Terminal emulation software on your host system can communicate to MON960 on the
IQ80960RM/RN platform via an RS-232 serial port. The IQ80960RM/RN platform s upports port
speeds from 300 to 115,200 bps. Serial downl oads to MON960 require that the terminal emulation
software support th e XMODEM proto col.
Configure the serial port on the host system for 300-115,200 baud, 8 bits, one stop bit, no parity
with XON/XOFF flow control.
1.4.1.3Host Debugger Interface (HDI) Method
You may use a source-l evel debugger, such as Intel’s GDB960 a nd GDB960V to establish seria l or
PCI communications with the IQ80960RM/RN platform. The MON960 Host Debugger Interface
(HDI) provides a defined mess aging layer between MON960 and the debugger. For more
information on this interface, see the MON960 Debug Monitor User’s Manual (484290).
HDI connection requests cannot be detected by MON960 if the user has already initiated a
connection using a terminal emula tor. In this case, the IQ80960RM/RN platform must be reset
before the debugger can connect to MON960.
1.5SPI610 JTAG Emulation System
The SPI610 JTAG Emulation System from Spectrum Digital, Inc. is included in the
IQ80960RM/RN development kit. It fur nishes the default host development environment-toevaluation board communication link based on the i960 RM/R N I/O processor JTAG interface.
IQ80960RM/RN Evaluation Board Ma nual1-5
Introduction
Refer to the SPI610 Referen ce Manual for JTAG emulation system installation and operation for
both the Tornado and CTOOLS environment. Op tionally, evaluation board serial port
communications can be used for thi s com municati on link (s ee Secti on 1.3.3, “TORNADO Test and
Debug Tools” on page 1-4).
1.6About Thi s M a nu a l
A brief description of the contents of this manual follows.
Chapter 1, “Introduction”
Chapter 2, “Getting Started”
Chapter3, “Hardware
Refere nce”
Chapter 4, “i960® RM/RN
I/O Processor Overview”
Chapter 5, “MON960
Support for IQ80960RM/RN”
AppendixA, “Bill of
Materials”
AppendixB, “Schematics”
AppendixC, “PLD Code”
AppendixD, “Recycling the
Battery”
Introduces the IQ80 960RM
chapter also describes Intel’s CTOOLS* and WindRiver Systems Ix Works*
software development tools, and defines notational-conventions and related
documentation.
Provid es st ep-b y-s te p i ns tru ct ions fo r in st al li ng t he IQ8 09 60R M or I Q80 96 0RN
platform in a host system and downloading and executing an application
program. This chapter also describes Intel’s software development tools, the
MON960 Debug Monitor, IxWORKS, software installation, and hardware
configuration.
Descri bes the locations of connector s, switches and LEDs on the IQ80960RM
and IQ80960RN platforms. Header pinouts and register descriptions are also
provided in this chapter.
Presents an overview of the capabilities of the i960 RM/RN I/O proc essor and
includes the CPU memory map.
Describes a number of features added to MON960 to support application
development on the i960 RM/RN I/O processor.
Shows complete parts list IQ80960RM and IQ80960RN Evaluation Platforms.
Complete set of schematics for the IQ80960RM and IQ80960RN Evaluation
Platforms.
Example PLD code used on IQ80960RM and IQ80960RN evaluation boards
for SDRAM battery backup.
Information on the RBRC program and the locations of participating recycling
centers.
and IQ80960RN Evaluation Board feat ures. This
1-6I Q80960RM/RN Evaluation Board Manu al
1.7Notational-Conventions
The following notation conventions are consistent with other i960 RM/RN I/O processor
documentation and general indust ry standards.
Introduction
# or overbar
BoldIndicates user entry and/or c ommands.
ItalicsIndicates a reference to related docum ents; also used to show emphasis.
Courier fontI ndicates code examples and file di rectories and names.
Asterisks (*)On non-Intel company and product names, a tra iling asterisk indicates
UPPERCASEIn text, signal na mes are shown in uppe rcase. When several sig nals shar e
Designations for
hexadecimal and
binary numbers
In code examples the pound sym bol (#) is appended to a signal name to
indicate that the signal is active. Normal ly inverted clock signals are
indicate d with an overbar above the signal name (e.g., RAS).
PLD signal names are in bold lowercase letters (e.g., h_off, h_on).
the item is a tra d emark or register ed trademark. Such brand s and names
are the property of their respective owners.
a common name, each signal is represented by the signal name followed
by a numbe r; the group is represented by the signal name followed by a
variable (n). In code example s, signal names are shown in the case
required by the software development tool in us e.
In text, instead of using subscripted “base” designators (e.g., FF
leading “0x” (e.g., 0xFF) hexadecimal numbers are represented by a
string of hex digi ts followed by th e letter H. A zero prefix is added to
numbers that begin with A through F. (e.g . , FF is shown as 0FFH.) In
examples of actual code, “0x” is used. Decimal and binary numbers are
represented by their customary notations. (e.g. , 255 is a decimal number
and 1111 1111 is a binary number. In some cases, the letter B is added to
binary numbers for clari ty.)
16
) or
1.8Technical Support
Up-to-date product and technical information is available electronically from:
• Intel’s World-Wide Web (WWW) Locatio n: http://www.intel.com
• IQ80960RM and IQ80960RN Produc t Information: http://developer.intel.com/d es ign/i960
For technical assistance, electronic m ail (e-mail) pro v id es the fastest route to reach engineers
specializing in IQ80960RM and IQ80960RN issues. Posting messages on the Embedded
Microprocessor Forum at http://support.intle.com/newsgroups / is also a direct rout e for
IQ80960RM and IQ80960RN technical assistance. See Section 1.8.2.
Within the United States and Canada you may contact the Intel Technical Support Hotline. See
Section 1.8.1 for a list of customer support sources for the US and other geographical area s.
IQ80960RM/RN Evaluation Board Ma nual1-7
Introduction
1.8.1Intel Customer Electronic Mail Supp ort
For direct support from engineer s specia li ng in i960® Microprocessor issues send e-mail in english
to 960tools@intel.com.
Questions and other messages may be posted to the Embedded Microprocessor Forum at
http://support.intel.com/newsgroups/.
1.8.2Intel Cus to mer Su pp or t Con ta ct s
Contact Intel Corporation for technical assistance for the IQ80960RM/RN evaluation platform.
CountryLiteratureCustomer Suppo rt Number
United States800-548-4725800-628-8686
Canada800-468-8118 or 303-297-7763800-628-8686
EuropeContact local distributor Contact local distri butor
AustraliaContact local distributor Contac t local distribu tor
IsraelContact local distributor Contact local distributor
JapanContact local distributor Contact local distributor
1-8I Q80960RM/RN Evaluation Board Manu al
1.8.3Related Information
T o orde r printe d manua ls fro m Intel, c ontac t your loc al sales re prese ntati ve or Intel L iteratur e Sal es
(1-800-548-4725 ).
MON960 Debug Monitor User’s Guide
PCI Local Bus Specification
Writing I2O Device Drivers in IxWorks
IxWorks Reference Manual
VxWorks Programmer’s Guide
Tornado User’s Guide
Tornado for I2O
Tornado for I2O Compact Disk
SP610 Em ulation System Reference Manual
Data SheetIntel # 273156
Data SheetIntel # 273157
Revision2.1
Rev. 1.0#TDK-12380-ZC-00
Intel # 273000
Intel # 273158
Intel # 273139
Intel #484290
PCI Special Interest Group
1-800-433-5177
Wind River Systems, Inc.
#DOC-1173-8D-02
Wind River Systems, Inc.
#DOC-1173-8D-03
Wind River Systems, Inc.
#DOC-11045-ZD-01
Wind River Systems, Inc.
#DOC-1116-8D-01
Wind River Systems, Inc.
#DOC-12381-8D-00
Spectrum Dig ita l Inc.
# 503715
Contact Cyclo ne Microsystems for additional information about their products and literature:
Table 1-2. Cyclone Contacts
Phone: 203-786-5536
Cyclone Microsystems
25 Science Park
New Haven CT 06511
IQ80960RM/RN Evaluation Board Ma nual1-9
F AX: 203-786-5025
e-mail: info@cyclone.com
WWW: http://www.cyclone.com
Getting Started
This chapter conta ins in struc tio ns for ins tall ing the IQ80 960RM/ RN platfor m in a host s yste m and,
how to download and execute an application program using Wind River System’s IxWorks∗ or
Intel’s CTOOLS software development toolsets.
2.1Pre-Installation Considerations
This section pr ovides a general overview of the components required to develop and exec ute a
program on the IQ80960RM/RN platform. IQ80960RM/RN evaluation boards support two
software development toolsets, Wind River System’s IxWorks and Intel’s CTOOLS.
IxWorks is a complete toolset featuri ng an integrated developmen t environment including a
compiler, assembler, linker, and debugger . It al so features a real-time operati ng system. If you are
using the IxWorks operating system with th e T O RNADO* development environment, refer to the
Wind River Systems, Inc. doc umentation referenced in Sectio n 1.8.3.
CTOOLS is a complete C/C++-language software-development toolset for developing embedded
applications to run on i960 processors. It contains a C/C++ compiler, the gcc960 and ic960 compiler
driver programs, an assembler, runtime libraries, a collection of software-development tools and
utilities, and printed and on-line documentation. The MON960 Debug Monitor User’s Guide fully
describes the components of MON960, including MON960 commands, the Host Debugger Interface
Library (HDIL), and the MONDB.EXE utility. If you are using MON960 and the CTOOLS toolset,
refer to section Section 2.2.1, “Installing Software Development Tools” on page 2-1.
2
See Chapter 1 for more information on the IxWorks and CTOOLS features.
The IQ80960RM/RN evaluation boards are supplied with IxWorks intelligent real-time operating
system pre-loaded into the on-board Flash. You also have the option of installing the MON960
debug monitor, which is required if you are using the CTOOLS debugging tools, GDB960,
GDB960V, or MONDB. Sec ti o n 3.3.1 descr ibes the Fla sh ROM pro gramming util it y, which allows
you to load MON960 onto the platform or re-load IxWorks.
2.2Software Installation
2.2.1Installing Software Development Tools
If you haven’t done so already, install your development software as described in its manuals. All
references in this manual to CTOOL S or CrossWind assume that the default directories were
selected dur ing installation. If this is not the case, substitute the appropriate path for the defa ult
path wherever fil e loc ations are referenced in this manual.
IQ80960RM/RN Evaluation Board Ma nual2-1
Getting Started
2.3Hardware Installation
Follow these in st ructions to get your new IQ80960RM/RN platform running. Be sure all items on
the checklist were provided with your IQ80960RM/RN.
Warning:Static charges can severely damage th e IQ80960RM/RN platforms. Be sure you are properly
grounded before re moving the IQ80960RM/RN platform from the anti-sta tic bag.
2.3.1Battery Bac ku p
Battery backup is provided to save any information in SDRAM during a power failure . Th e
IQ80960RM/RN platform contains four AA NiCd bat teries, a charging circuit and a regul ator
circuit. The batte ries installed in the IQ80960RM/RN platform are rated at 600 mA/Hr.
SDRAM technology provides a simple way of enabling data preservation through the self-refresh
command. When the processor receives an active Primary PCI reset it issues the self-refresh
command and drives the SCKE signals low. Upon seeing this condition, a PAL on the
IQ80960RM/RN platform holds SCKE low before the processor loses power. The batteries
maintain power to the SDRAM and the PAL to ensure self-refresh mode. When the PAL detects
PRST# returning to ina ctive state, the PAL releases the hold on SCKE.
The battery circuit can be disabled by removing the batteries. LED CR4 indicates when the SDRAMs
have sufficient power. If the batteries remain in the evaluation platform when it is depowered and/or
removed from the chassis, the batteries will maintain the SDRAM for approximately 30 hours. Once
power is again applied, the batteries will be fully charged in about 4 hours.
2.3.2Installing the IQ80960RM/RN Platforms in the Host System
If you are installing the IQ80960RM/RN platform for the first time, visually inspect the board for
any damage that may have oc curred during shipment. If there are visible defects, return the board
for repl acement. Follow the host system manufacturer’s instructions for in stalling a PCI adapter.
The IQ80960RM/RN pl atform is a full-length PCI adapter and requires a PCI slot th at i s free from
obstructions. The IQ80960RM/RN platform is ta ller than specifie d in the PCI Local Bus Specification Revision 2.1. The extended height of the board will require you to kee p the cover off
of your PC. Refer to Chapt er 3 for physical dimensions of the board.
2.3.3Verify IQ80960RM/RN Platform is Functional
These instruct ions ass ume that you have alrea dy install ed the I Q80960RM/RN pla tfor m in the host
system as described in Section 2.3.2.
1. To connect the serial port for communicati ng with and downloading to the IQ80960RM/RN
platform, conne ct the RS-232 cable (provided with the IQ80960RM/RN) from a free serial
port on the host syst em to the phone jack-s tyle connector on the IQ80960RM/RN platform.
2. Upon power-up, the red FAIL LED turns off, indicating that the processor has passed its self-test.
3. If you have IxWorks installed in the flash R OM, the user LEDs dis play the bi na ry pattern 99H.
In the IxWorks development environment, raw serial input/output is not used. Instead , the
Wind DeBug (WDB) protocol is run over the serial port, to a llow communication with
Tornado development tools. If t he terminal emu lation package is running at 115,200 baud, the
letters “W DB_READY” display prior to launching in the WDB serial protocol.
2-2I Q80960RM/RN Evaluation Board Manu al
4. If you have MON960 installed in the fl as h ROM, press <ENTER> on a termin al con nec te d to
the IQ80960RM/RN platform to bring up the MON960 prompt. MON960 automatically
adjusts its baud rat e to match that of the te rmi nal at start-u p. At ba ud rates other than 9600, it
may be necessary to press <ENTER> several times.
2.4Creating and Downloading Executable Files
To download code to the IQ80960RM/RN pla tform running IxWorks, consult Wind River
documentation on the s upplied TORNADO for I
IQ80960RM/RN platform, your compiler produces an ELF-format object file.
To download code to the IQ80960RM/RN platform running CTOOLS, consult the CTOOL S
documentation for information regarding compiling, linking, and downloading applications.
During a download, MON960 check s the link address stored in the ELF file, and stores the file at
that locati on on the IQ80960RM/RN platform. If the executa ble file is linked to an invalid address
on the IQ80960RM/RN platform, MON960 aborts the download.
2.4.1Sample Download and Executio n Using GDB960
This example shows you how to us e GBD960 to download and exec ute a file named myapp via
the serial port.
O CD-ROM. T o download code to the
2
Getting Started
• Invoke GDB960. From a Windows 95/NT command prompt, issue the command:
gdb960 -r com2 myapp
This command establ ishes communication and downloads the fil e myapp.
• To execute the program, enter the command from the GDB960 comm and prompt:
(gdb960) run
More information on the GDB960 commands mentioned in this section can be found in the
GDB960 User’s Manu al.
IQ80960RM/RN Evaluation Board Ma nual2-3
Hardware Reference
3.1Power Requirements
The IQ80960RM/RN platform draws power from the PCI bus. The power requirements of the
IQ80960RM/RN platforms are shown in Table 3-1 and Table 3-2. The number s do not include the
power required by a PCI card(s) mounted on one or more of the IQ80960RM/RN platforms’ f ou r
expansion slot s.
Table 3-1. IQ80960RN Platform Power Requirements
VoltageTypical CurrentMaximum Current
+3.3 V0 V*0 V*
+5 V1.45 A1.96 A
+12 V286 mA485 mA
-12 V1 mA1 mA
NOTE: Does not include the pow er required by a PCI card(s) mounted on the IQ80960RN platform.
* +3.3V for 80960RN Processor created on board from +5V.
Table 3-2. IQ80960RM Platform Power Requirements
3
NOTE: Does not include the pow er required by a PCI card(s) mounted on the IQ80960RM pla tform.
* +3.3V for 80960RM Processor created on board from +5V.
3.2SDRAM
The IQ80960RM/RN platform is equipped with a 168-pin DIMM socket formatted to accept +3.3V
synchronous DRAM with or without Error Correction Code (ECC). T he socket will acc ept SDRAM
from 8 Mbytes to 128 Mbytes. 128 Mbyte SDRAMs are available in both x64 and x72 configurations.
Note that 8 Mbyte SDRAMs are only for x64 or non-ECC memory. The SDRAM is accessible from
either of the PCI buses, via the ATUs, and the local bus on the IQ80960RM/RN platform.
VoltageTypical CurrentMaximum Current
+3.3 V0 V*0 V*
+5 V1.32 A1.86 A
+12 V284 mA485 mA
-12 V1 mA1 mA
IQ80960RM/RN Evaluation Board Ma nual3-1
Hardware Reference
3.2.1SDRAM Performance
The IQ80960RM/RN pla tform uses 72-bit SDRAM with ECC or 64-bit SDRAM without ECC.
SDRAM allows zero data-to-data wait state operation at 66 MHz. The memory controller unit
(MCU ) of the i 96 0
of four enables sea mless read/write bursting of long data streams, as long as the MCU does not
cross the page boundary. Page boundaries are naturally aligned 2 Kbyte blocks. 72-bit SDRAM
with ECC allows a maximum throughput of 528 Mbytes per second.
Both 16 Mbit and 64 Mbit SDRAM devices are supporte d. The MCU keeps two pages per ba nk
open simulta neous ly for 16 Mbit de vices a nd 4 pages pe r ba nk for 64 Mb it device s. Si multa neous ly
open pages allo w for greate r performanc e for seq uentia l access , dist ribute d acros s multipl e in ternal
bus transactions. Table 3-3 shows read and write examples of a single 8 byte access and for a
multiple 40 byte access.
Table 3-3. SDRAM Performance
Read Pag e Hit (8 by te s)776 Mby tes /s ec
Read Page Miss (8 bytes)1244 Mbytes/sec
Read Pa ge Hit (40 bytes)11240 Mbytes/sec
Read Page Miss (40 bytes)16165 Mbytes/sec
Write Page Hit (8 bytes)4132 Mbytes/sec
Write Page Miss (8 bytes)866 Mbytes/sec
Write Page Hit (40 bytes)8330 Mbytes/sec
Write Page Miss (40 bytes)12220 Mbytes/sec
®
RM/RN I/O processor supports SDRAM burst lengt hs of four. A burst length
Cycle TypeT able ClocksPerformance Bandwidth
Note that if ECC is enabled and you attempt a partial write — less than 64 bits — you will incur a
penalty. Because ECC is enabled, the MCU will translate the write into a read-modify-write
transaction. Therefore, for a single byte write the clock count will be 1 1.
3-2I Q80960RM/RN Evaluation Board Manu al
3.2.2Upgrading SDRAM
The IQ80960RM/RN is equipped with 16 Mbytes of SDRAM with ECC inserted in the 168-pin
DIMM socket. The memory may be expanded by inserting up to a 128 Mbyte module into the
DIMM socket. The various memory c ombinations are shown in Table 3-4. Only 168-pin +3.3V
SDRAM modules with or witho ut ECC rated at 10 ns should be used on the IQ80960R M/RN
platform. The column labeled ECC dete rmines if that parti cular memory configuration c an be used
with ECC.
Table 3-4. SDRAM Configurations
Hardware Reference
SDRAM
Technology
16 Mbit
64 Mbit
SDRAM
Arrangement
2M x 8
1M x 16
8M x 8
4M x 16
# BanksRowColumnECC
1
2Yes32 Mb yt es
1
2No16 Mbyt es
1
2Yes128 Mbytes
1
2No64 Mbyt es
3.3Flash ROM
An E28F016S5 (2 Mbytes) Flash ROM is included on the IQ80960RM/RN platform. This Fl ash
ROM contains IxWorks* and may be used to store user ap plications.
3.3.1Flash ROM Programming
Two types of Fl ash ROM programming exist on the IQ80960RM/RN platform. The first is normal
application development programming. T his occurs using IxWorks to download new software and
the 80960JT core to writ e the new code to the Flash ROM. During this time the boot sec tors
(containing IxWorks) are write protected.
119
11 8
129
128
Total Memory
SIze
Yes1 6 Mb yt es
No8 Mbytes
Yes6 4 Mb yt es
No3 2 Mbytes
The second type of Flash ROM progra m mi ng is loading the boot sectors. You will not be required
to load the boot sectors except:
• To load MON960
• To load a new rele ase of IxWorks
• To change between the check build and the fre e build of IxWorks
The following steps are required to program the Flash ROM boot sectors:
1. Set switch S1 #’s 1 and 2 to the on position.
2. Reset the board by cycling power on the workstation.
3. Run the Intel DOS-based flash utility to program the Flash ROM boot sectors.
4. Set switch S1 #’s 1 and 2 to the off position.
5. Reset the board by cycling power on the workstation.
IQ80960RM/RN Evaluation Board Ma nual3-3
Hardware Reference
3.4Console Serial Port
The console seria l port on the IQ80960RM/ RN platform, based on a 16C550 UART, is capable of
operation from 300 to 115,200 bps. The port is connected to a phone jack-style plug on the
IQ80960RM/RN platform. The DB25 to RJ-45 cable included w ith the IQ80960RM/RN can be
used to connect the console port to any standard RS-232 port on the host system.
The UART on the IQ80960RM/RN platform is clock ed with a 1.843 MHz clock, and may be
programmed to use thi s clo ck with its in te rnal baud rate coun ters. Th e UAR T regi ste r address es are
shown in Table 3-5; refer to the 16C550 device data book for a detailed description of the registers
and device operat ion. Note that some UART addresses refer to different registers depending on
whether a read or a write is being per f orm ed.
Tab le 3-5. UART Register Addresses
AddressRead RegisterWrite Register
E000 0000HReceive Holding RegisterTransmit Holding Register
E000 0001HUnusedInterrupt Enable Register
E000 0002HInterrupt Status RegisterFIFO Control Register
E000 0003HUnusedLine Control Register
E000 0014HUnusedModem Control Register
E000 0015HLine Status RegisterUnused
E000 0016HModem Status RegisterUnused
E000 0017HScratchpad RegisterScratchpad Register
3.5Secondary PCI Bus Expansion Connectors
Four PCI Expansion Slots are available on the IQ80960RM/RN platform. The IQ80960 RM
supports 32-b it P CI expansion and the IQ80960RN supports 64-bit PCI expans ion. The slots ar e
designed for +5V PCI signall ing and accommodate PCI cards with +5V or univers al s ignalling
capabilities.
3.5. 1PCI Slots Power A vailabili ty
Power from the Primary PCI bus, +3.3V, +5V, +12V, and –12V, is routed to the Secondary P CI bus
expansion sl ots. +3.3V is only available at the secondary PCI slots if the host system makes +3.3V
available on the Primary PCI slots. LED CR5 indicates if this power is available.
3-4I Q80960RM/RN Evaluation Board Manu al
3.5.2Interrupt and IDSEL Routing
Table 3-6. Secondary PCI Bus Interrupt and IDSEL Routing
Battery backu p is provided to save any information in SDRAM during a power failure. The
IQ80960RM/RN platform contains four AA NiCd batteries, a charging circuit and a regulator
circuit. The batteries installed in the IQ80960RM/RN pla tform are rated at 600 mA/H r.
SDRAM technology pro vides a simple way of enabling data preservation though the self-refresh
command. When the processor receives an active Primary PCI reset it will issue the sel f-refresh
command and drive the SCKE signals low. Upon seeing this condition a PAL on the
IQ80960RM/RN platfor m will hol d SCKE low before the proce ssor los es power. The batteries will
maintain power to the SDRAM and the PAL to ensure self-refresh mode. When the PAL sees
PRST# r et ur n i n g to in active st at e th e PAL wi ll re lease the h ol d on SC K E .
Hardware Reference
The battery circuit can be disabled by removing the batteries. LED CR4 indicates when the
SDRAMs have suff icient power . If the batteries remain in the evaluation platf orm when it is
depowered and/or removed from the chassis, the batteries will maintain the SDRAM for
approximately 30 hours. Once power is again applied, the batteries will be fully charged in about
four hours.
3.7Loss of Fan Detect
The i960 RM/RN I/O processor can be cooled by an active he at sink mounted on top. T he fan
provides a square wave output that is monitored by a comparator circuit on the IQ80960RM/RN
platform. The frequency of the fan output is appr oxim ately 9K RPM. If the frequency fall s below
approximately 8K RPM the circuit will provide an interrupt to the processor. This is an evaluation
board feature intended as an example of system hardware monitoring, sin ce the IQ80960RM/RN
platf o r m does no t ship with a heatsin k .
Note: When using a passive heat sink, the proces so r never sees an interrupt from not having a fan.
IQ80960RM/RN Evaluation Board Ma nual3-5
Hardware Reference
3.8Logic Analyzer Headers
There are five logic analyzer connectors on the IQ80960RM/RN platform. The connectors are
Mictor type, AMP part # 76705 4-1. Hewl ett-Pa ckard a nd Tektronix manufac ture an d sell i nte rfaces
to these connectors. The logic analyzer connectors al low for interfacing to the SDRAM and ROM
buses along with secondary PCI arbitration signals. Table 3-7 shows the connectors and the pin
assignm e nt s fo r each.
The JTAG header allows debugging hardware to be quic kly and easily connected to some of the
IQ80960RM/RN proc essor’s logic signals.
The JTAG header is a 16-pin header. A 3M connector (part number 2516-6002UG) is required to
connect to this header. The pinout for the JTAG header is shown in Table 3-8. The header and
connector are keyed using a tab on the connector and a slot on the header to ensure proper installation.
Hardware Reference
Each signal in the JTAG header is pa ired with its own ground connection to avoid the noise problems
associated with long ribbon cables. Signal descriptions are found in the i960
Developer’s Manual, 80960RM I/O Processor Data Sheet and the 80960RN I/O Process or Data Sheet.
Table 3-9 describes switch setti ng options and defaults. These switch settings are sampled at
Primary PCI Reset. See Table 5-1 “Initialization Modes” on page 5-3 for processor initialization
configurations .
Table 3-9. Switch S1 Settings
PositionNameDescriptionDefault
S1-1RST_MODE#
S1-2RETRY
S1-332BITMEM_EN#
a
S1-4
a.This switch is active for IQ80960RN ONLY.
32BITPCI_EN#
®
RM/RN I/O Pr oces sor
Determines if the processor is to be held in reset.
ON = hold in rest
OFF = allows processor initializati on
Deter m ines if the Primary PCI interface will be disabled.
ON = allows Primary PCI configuration cycles to occur
OFF = retries all Primary PCI configuration cycles
Notifies Memory Controller of the SDRAM width.
ON = Memory Controller utilizes 32-bit SDRAM access protocol
OFF = Memory Contoller utilizes 64-bit SDRAM access protocol
Determines whether Secondary PCI bus is a 32- or 64-bit bus.
ON = indicates Secondary PCI bus is a 32-bit bus
OFF = indicates Secondary P CI bus is a 64-bit bus
OFF
OFF
OFF
OFF
IQ80960RM/RN Evaluation Board Ma nual3-7
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