Intel BP4S33AT, BP4D266AT, BP4D33AT Technical Product Summary
INTEL OEM PRODUCTS AND SERVICES DIVISION PRELIMINARY - REV 0.1
®
Technical Product Summary
TM
Classic/PCI i486
Baby-AT Motherboard
Models:
BP4S33AT
BP4D33AT
BP4D266AT
Preliminary Version 0.1
April, 1993
Order Number PRELIMINARY
INTEL OEM PRODUCTS AND SERVICES DIVISION PRELIMINARY - REV 0.1
Intel Corporation makes no warranty for the use of its products and assumes no responsibility for any errors which may appear in this document nor
does it make a commitment to update the information contained herein.
Intel Corporation retains the right to make changes to these specifications at any time, without notice.
Contact your local sales office to obtain the latest specifications before placing your order.
The following are trademarks of Intel Corporation and may only be used to identify Intel products:
376 i750 MAPNET
Above i860 Matched
ActionMedia i960 MCS
BITBUS Intel287 Media Mail
Code Builder Intel386 NetPort
DeskWare Intel387 NetSentry
Digital Studio Intel486 OpenNET
DVI Intel487 OverDrive
EtherExpress Intel Paragon
ETOX intel inside. Pentium
ExCA Intellec ProSolver
Exchange and Go iPSC READY-LAN
FaxBACK iRMX Reference Point
FlashFile iSBC RMX/80
Grand Challenge iSBX RxServer
i iWARP SatisFAXtion
ICE LANDesk SnapIn 386
iLBX LANPrint Storage Broker
Inboard LANProtect SuperTuned
i287 LANSelect The Computer Inside.
i386 LANShell TokenExpress
i387 LANSight Visual Edge
i486 LANSpace WYPIWYF
i487 LANSpool IntelTechDirect
MDS is an ordering code only and is not used as a product name or trademark. MDS is a registered trademark of Mohawk Data Sciences
Corporation.
CHMOS and HMOS are patented processes of Intel Corp.
Intel Corporation and Intel's FASTPATH are not affiliated with Kinetics, a division of Excelan, Inc. or its FASTPATH trademark or products.
TRADEMARK ACKNOWLEDGMENTS
ATI is a trademark of ATI Technologies Inc.
AutoCAD is a trademark of Autodesk Inc.
BAPCo and Sysmark92 are trademarks of the Business Applications Performance Corporation.
Cadvance is a trademark of ISICAD Inc.
Centronics is a trademark of Centronics Data Computer Corp.
IBM, MDA, MCGA, EGA, VGA, Personal System/2, PS/2, PC/XT and PC/AT are trademarks of International Business Machines.
Microsoft, MS-DOS, OS/2, Xenix and Windows are trademarks of Microsoft Corporation.
Novell is the trademark of Novell, Inc.
PolySwitch is a registered trademark of Raychem Corporation.
SCO is a trademark of Santa Cruz Operations, Inc.
SPEC, SPECratio, SPECint92 and SPECfp92 are trademarks of the Standard Performance Evaluation Corporation.
UNIX is a trademark of AT&T Bell Laboratories.
Western Digital is a trademark of Western Digital Corp.
All other trademarks are the property of their respective owners.
INTEL OEM PRODUCTS AND SERVICES DIVISION PRELIMINARY - REV 0.1
Classic/PCI i486 Baby-AT Motherboard
Preliminary Technical Product Summary
Revision 0.1
Table of Contents
Introduction.........................................................................................................................................4
Baby-AT Form Factor...................................................................................................................4
Board Level Features..........................................................................................................................5
CPU.............................................................................................................................................. 5
Performance Upgrade ...................................................................................................................5
Second Level Cache......................................................................................................................5
System BIOS ................................................................................................................................5
PCI Auto-configuration Capability........................................................................................................ 5
Setup Utility.........................................................................................................................................6
FLASH Implementation........................................................................................................................6
Upgrade Utility.....................................................................................................................................6
Flash User Area.................................................................................................................................... 7
Keyboard (and Mouse) Interface ................................................................................................... 7
System Memory............................................................................................................................ 7
Core Chip Set ...............................................................................................................................7
82424TX Cache/DRAM/Controller (CDC) ...........................................................................................8
82423TX Data Path Unit (DPU)........................................................................................................... 8
82378IB System I/O (SIO)....................................................................................................................8
Expansion Slots............................................................................................................................8
SMC 37C663 Super I/O Controller............................................................................................... 8
Dallas DS12887 Real Time Clock, CMOS RAM and Battery........................................................8
Front Panel Connectors................................................................................................................. 8
Security ........................................................................................................................................9
BIOS Password.....................................................................................................................................9
Setup Enable Jumper............................................................................................................................9
System Integration Features................................................................................................................10
Back panel Connections................................................................................................................10
Power Supply................................................................................................................................10
Appendices ..........................................................................................................................................11
Appendix A − User-Installable Upgrades......................................................................................11
System Memory.................................................................................................................................... 11
Performance Upgrade ...........................................................................................................................12
Qualified DRAM SIMMs ..................................................................................................................... 12
Appendix B − Jumpers..................................................................................................................13
Appendix C − BIOS Setup Options...............................................................................................14
Appendix D − BIOS Recovery ......................................................................................................15
Using the Upgrade Utility.....................................................................................................................15
Recovery Mode.....................................................................................................................................15
Appendix E − Memory Map..........................................................................................................16
Appendix F − I/O Map..................................................................................................................17
Appendix G − Board Interrupts & DMA.......................................................................................18
Appendix H − Connectors.............................................................................................................19
AT Style Keyboard Port (J8L1 = Keyboard)..........................................................................................19
Optional PS/2 Style Keyboard, Mouse Ports (J8L2 = Keyboard, J9L1 = Mouse).................................... 19
Turbo LED Connector (J1A1)...............................................................................................................19
Hard Drive LED Connector (J1A2).......................................................................................................19
Key lock/Power LED Connector (J1B1)................................................................................................19
Speaker Connector (J1C1).................................................................................................................... 19
Turbo Switch Connector (J1C1B) .........................................................................................................19
Primary Power Connector (J9K1)..........................................................................................................20
Auxiliary (3.3V) Power Connector (J4H1)............................................................................................ 20
Parallel Port (J7J1)...............................................................................................................................20
Serial Ports (J7L2 = COM1, J7L1 = COM2).........................................................................................20
Reset Connector (J1B2)........................................................................................................................20
INTEL OEM PRODUCTS AND SERVICES DIVISION PRELIMINARY - REV 0.1
Floppy Connector (J9F2) ...................................................................................................................... 21
IDE Connector (J9F3)........................................................................................................................... 21
ISA Connector (J6G2, J6G1, J5G1, J4G1, J1G1) .................................................................................. 22
PCI Connector (J3H1,J2H1,J1H1).........................................................................................................23
Appendix I − Baby-AT Chassis Suppliers .....................................................................................25
Appendix J − Environmental Standards........................................................................................ 26
Appendix K − Reliability Data......................................................................................................27
Appendix L − Software Driver Support.........................................................................................28
Appendix M − Qualified Peripherals............................................................................................. 29
Appendix N − Customer Support..................................................................................................30
iPAN (Intel Product Assistance Network) ............................................................................................. 30
iPUB (Intel Product Update Bulletin) ................................................................................................... 30
iPALS (Intel Phone Action Line Support) ............................................................................................. 30
FaxBack™ ........................................................................................................................................... 30
Appendix O − Physical Dimensions..............................................................................................31
Board ...................................................................................................................................................31
Appendix P − Product Codes.........................................................................................................32
Boards.................................................................................................................................................. 32
Accessories...........................................................................................................................................32
Documentation .....................................................................................................................................32
INTEL OEM PRODUCTS AND SERVICES DIVISION PRELIMINARY - REV 0.1
Introduction
The Classic/PCI i486 Baby-AT Motherboard delivers excellent, cost effective performance in a very affordable i486
platform. A wide range of CPU offerings provides immediate performance flexibility, and a single 238-pin blue
OverDrive Ready ZIF (Zero Insertion Force) processor socket allows upgrades to higher performance in the future.
Additionally, by incorporating a second level, high performance cache and four SIMM sites for memory expansion to 128
MB, five ISA expansion connectors and three PCI connectors, the Classic/PCI i486 Baby-AT Motherboard is ideally
featured for expandable, performance sensitive desktop applications. The Classic/PCI i486 Baby-AT Motherboard will
excel in high end i486 Processor desktop PCs running existing compatible applications.
An easy upgrade path to higher CPU performance is built into the Classic/PCI i486 Baby-AT Motherboard. The processor
socket accepts either an i487SX to enhance performance with numeric intensive applications, or an OverDrive
Processor, Intel's upgrade component that doubles the speed of all i486 internal processes. Support for the next generation
OverDrive Processor, based on the Pentium CPU, protects today's investment in the Classic/PCI i486 Baby-AT
Motherboard.
The mini-Baby-AT board − with i486 CPU, cache, and integrated I/O − is the smallest PCI-based motherboard solution
on the market today that is upgrade able to an OverDrive processor based on Pentium CPU technology.
BABY-AT FORM FACTOR
The Classic/PCI i486 Baby-AT motherboard matches the Baby-AT standards well established in the PC industry, while
reducing the size from the full length (13") form factor. This Baby-AT industry standard specifies the maximum board
size, board mounting locations, and location for the keyboard connector, as well as expansion slot placement. The
Classic/PCI i486 Baby-AT meets all of these requirements while adding PCI expansion possibilities. Figure 1 illustrates
the Baby-AT form factor. A list of several chassis suppliers supporting the Baby-AT standard is included in Appendix
I.
10.5"
9.1"
Figure 1. Classic/PCI i486 Baby-AT Motherboard dimensions.
INTEL OEM PRODUCTS AND SERVICES DIVISION PRELIMINARY - REV 0.1
Board Level Features
CPU
The Classic/PCI i486 Baby-AT motherboard has a wide price/performance range to meet a variety of customer needs.
Four base CPU options are available:
• an i486 SX running at 33 MHz;
• an i486 DX at 33 MHz;
• an i486 DX2 at 66 MHz; or
• a next generation i486 processor operating at 3.3V internally, and 33 MHz bus speed
The Classic/PCI i486 Baby-AT motherboard supports all of the functionality of the i486. Common features of the CPU
include backward compatibility with the 8086, 80286, and i386 CPUs, burst mode bus cycles, and an on-chip 8 KB
cache. The cache is 4-way set associative, uses a write-through policy, and can be disabled via software.
The i486 DX CPU contains an on-chip numeric coprocessor to increase the speed of floating point operations. This
coprocessor is backward code-compatible with i387 DX and i387 SX math coprocessors and complies with
ANSI/IEEE standard 754-1985. The i486 SX does not include the numeric coprocessor. The i486 DX2 incorporates
clock-doubling technology developed by Intel to offer the highest CPU performance available today.
PERFORMANCE UPGRADE
The Classic/PCI i486 Baby-AT motherboard incorporates a single 238-pin processor socket allowing easy upgrades to
CPU performance. All Classic/PCI i486 Baby-AT motherboards can be upgraded with an OverDrive Processor −
including future OverDrive Processors based on the Pentium CPU architecture. These upgrades will provide
significantly higher CPU performance and numeric capability. In addition, systems with a i486 SX/33 CPU can
improve floating point performance by installing an i487 SX/33 in place of the CPU. When replacing an i486 SX/33
CPU with an OverDrive Processor no jumper change are required; just power up and go!
SECOND LEVEL CACHE
In addition to the i486 CPU's internal cache, the Classic/PCI i486 Baby-AT motherboard was designed with a second
level cache using industry-standard SRAM. The 82424TX CDC includes a direct-mapped, write-back cache controller.
The motherboard includes four 32K x 8 20ns cache SRAM devices for a total of 128 KB cache memory.
SYSTEM BIOS
The Classic/PCI i486 Baby-AT Motherboard uses American Megatrends Incorporated (AMI) i486 CPU ROM BIOS,
which provides ISA compatibility. The system BIOS is stored in FLASH EEPROM, providing easy upgradability of
program code space from a floppy disk or a file downloaded from a BBS; BIOS upgrades will be available for download
from iPAN, the electronic bulletin board service of IntelTechDirect™. In addition to the AMI BIOS, the FLASH
memory also contains the PCI Auto-configuration utility, SETUP utility, Power-On Self-Tests (POST), and update
recovery code. For improved system performance, the Classic/PCI i486 Baby-AT Motherboard supports system BIOS
shadowing, allowing the BIOS to execute from 32-bit on-board write-protected DRAM instead of the slower 8-bit
FLASH devices. The Classic/PCI i486 Baby-AT BIOS sign-on during POST is along the bottom of the screen, and
contains information which identifies revision and type of BIOS. On the lower left is a four digit code which denotes
revision; first production units will display 0101, and as updates occur will roll the "minor revision number", i.e. 0102.
BIOS level and board identifier code is contained on the lower right side, and will be P00.AQ0 for the Classic/PCI i486
Baby-AT motherboard. As a note, A01 denotes Alpha revision 01, and B01 denotes Beta revision 01.
Further information on BIOS functions can be found in the IBM PS/2 and Personal Computer BIOS Technical
Reference published by IBM, and the ISA and EISA Hi-Flex AMIBIOS Technical Reference published by AMI and
available at most technical bookstores.
PCI AUTO-CONFIGURATION CAPABILITY
The PCI Auto-configuration feature provides a new level of user satisfaction. Simply plug a PCI add-in card into an
empty connector and turn the system on. The BIOS automatically configures interrupts, DMA channels, I/O space,
etc. This eliminates the requirement for adapter card jumper changes due to resource conflicts, and provides
unrivaled ease of use in a PC.
INTEL OEM PRODUCTS AND SERVICES DIVISION PRELIMINARY - REV 0.1
System Address
FLASH Memory Area
F0000H
FFFFFH
64 KB Main BIOS
The auto-configuration routine operates in conjunction with an ISA configuration utility. This utility enables the user
to specify the ISA options used, and ties into the PCI configuration software transparently to provide seamless add-in
card installation.
SETUP UTILITY
Classic/PCI i486 Baby-AT incorporates many commonly used system setup features into the FLASH EEPROM. The
BIOS SETUP Program has been enhanced and provides several new options to take advantage of the Classic/PCI
i486 Baby-AT Motherboard's new features. New options include:
• Auto configuration of IDE hard disks.
• Support for four IDE disk drives (primary and secondary)
• Serial Port 1 -- Enable/Disable
• Serial Port 2 -- Enable/Disable
• Parallel Port -- Enable/Disable, Bi-directional/Output only
• Cache/Shadow Memory Option -- Provides the user the option to assign a block of addresses below the 1 MB
boundary as non-shadowed, non-cached. Primarily used for expansion card ROM which causes timing issues
when shadowed and cached.
• ISA interrupts - Allows ISA interrupts IRQ9, IRQ10, IRQ15 to be assigned to add-in ISA adapters, thereby
informing the PCI configuration utility which interrupts not to use.
The setup utility is accessible only during the Power-On Self Test by pressing the <F1> key anytime after the POST
memory test has begun and before boot begins. For security purposes, access to SETUP can be disabled via a jumper
on the motherboard. The ROM-based setup allows the system configuration to be modified without opening the
system for most basic changes. Setup options are detailed in the Appendices.
FLASH IMPLEMENTATION
The Intel 28F001BXT 1 Mb FLASH component is organized as 128K x 8 (128 KB). The Flash device is divided into
five areas, as described in Table 2.
EE000H EFFFFH 8 KB Boot Block (Not FLASH erasable)
ED000H EDFFFH 4 KB Parameter Block (used for PCI)
EC000H ECFFFH 4 KB Flash User Area
E0000H EBFFFH System BIOS
Table 1. Flash Memory Organization
The FLASH device resides in system memory in two 64 KB segments starting at E0000H, and is distributed in two
different organizations, depending on the mode of operation. In Normal Mode address line A16 is inverted,
switching the E000H and F000H segments so that the BIOS is organized as shown in the system address column
above. Recovery mode removes the inversion on address line A16, swapping the E000H and F000H segments so that
the 8 KB boot block resides at FE000H where the i486 expects the bootstrap loader to exist. This mode is only
necessary in the unlikely event that a BIOS upgrade procedure is interrupted, causing the BIOS area to be left in an
unusable state. For information on recovering the BIOS in the event of a catastrophic failure, refer to the Appendices.
UPGRADE UTILITY
FLASH memory brings new opportunities for distributing BIOS upgrades. Installing a new version of BIOS will no
longer require removal of the system cover and the replacement of EPROM's. Instead, the upgrade can be done
completely from a floppy diskette. Easy access to BIOS upgrades will be available through download able files on
the iPAN bulletin board.
Security is provided in two ways. First, the FLASH upgrade utility insures the upgrade BIOS matches the target
system to prevent accidentally installing a BIOS for a different type of system. Second, security to prevent
unauthorized changes to the BIOS is provided via a write protect jumper on the motherboard. The default setting is
to allow BIOS upgrades. A recovery jumper is provided to recover from the unlikely event of an unsuccessful BIOS
upgrade. It forces the ROM decode to access a 32 KB block of write protected code in the FLASH device that
facilitates recovery. The default value for this jumper (RV) is for "normal" mode (note: this jumper is not changed
during normal BIOS updates, it is used only if a problem is encountered).
The disk-based FLASH upgrade utility (FMUP.EXE; download able from iPAN) has three options for BIOS
upgrades:
INTEL OEM PRODUCTS AND SERVICES DIVISION PRELIMINARY - REV 0.1
• The FLASH BIOS can be updated from a file on a disk;
• The current BIOS code can be copied from the FLASH EEPROM to a disk file as a backup in the event that an
upgrade cannot be successfully completed; and
• The BIOS in the FLASH device can be compared with a disk file to ensure the system has the correct BIOS
version.
FLASH USER AREA
Classic/PCI i486 Baby-AT supports a 4 KB programmable Flash User area located at ED000H-EDFFFH. A
programmer may use this area to display a customized message or to execute a small program. The Classic/PCI i486
Baby-AT BIOS accesses the user area just after completing the POST (Power-On Self-Test) if the setup option is
enabled. The flash user area may be updated by running the FMUP.EXE utility, which expects the update files to
have a .USR extension. Sample programs and instructions are in the file CLSUSER.ZIP on the iPAN bulletin board.
KEYBOARD (AND MOUSE) INTERFACE
An Intel 8742 surface mount micro controller contains the Phoenix Technologies' compatible keyboard/mouse
controller code. An AT style keyboard connector is located on the back panel side of the motherboard. The 5V line on
this connector is protected with a PolySwitch circuit which acts much like a fuse except that it re-establishes the
connection after an over-current condition is removed. While the PolySwitch eliminates the possibility of having to
replace a fuse, care should be taken to turn the system power off before installing or removing a keyboard. As a
manufacturing option, customers whose chassis will allow two PS/2 style connectors, one for mouse and one for
keyboard, can be supported by offering PS/2 configuration instead of AT. The 8742 micro controller code supports
Power-On/Reset (POR), network, and keyboard password protection. Network and keyboard passwords require
programs contained on the utility disk that ships with the system, the POR password is set via the SETUP program. In
addition, the keyboard controller provides for the following "HOT" key sequences:
• CTRL-ALT-DEL: System software reset. This sequence performs a software reset of the system by jumping to
the beginning of the BIOS code and running the POST operation, excluding memory tests.
• <TBD 1> and <TBD 2>: Turbo mode selection. <TBD 1> sets the system for de-turbo mode (emulation of an 8
MHz 80286 CPU using wait states) and <TBD 2> sets the system for turbo mode (its normal operation at 33
MHz). Changing the Turbo mode may be prohibited by an operating system or application software.
SYSTEM MEMORY
The Classic/PCI i486 Baby-AT Motherboard provides four 36-bit wide SIMM sites for memory expansion with
single/dual sided SIMM modules. The memory array is controlled by the Intel 82424TX CDC, and data buffering is
provided by an Intel 82423TX DPU. The four SIMM sites support 256K x 36, 512K x 36, 1M x 36, 2M x 36, 4M x 36
and 8M x 36 SIMM modules. Minimum memory size is 2 MB, and maximum memory size, using four 8M x 36
SIMM modules, is 128 MB.
Memory is always interleaved in two banks; therefore the SIMM sites must be stuffed in pairs. Memory timing is
designed for 70ns fast page devices, faster DRAMs will operate in the board but will provide no performance
improvement. Parity generation/checking is provided for each 8-bit byte.
SIMMs may be installed in combinations of two or four modules; each two SIMMs within an interleaved bank must be
of the same memory size and type (see the Appendix for a complete list of combinations). There are no jumper settings
required for the memory size configuration, the System BIOS automatically sizes memory and initializes the 82424TX
DRAM controller for appropriate DRAM configuration.
CORE CHIP SET
The core chip set is the Intel Saturn chip set, consisting of one 82424TX Cache/DRAM Controller (CDC), one
82423TX Data Path Unit (DPU) device, and one 82378IB System I/O (SIO) bridge chip. This document will outline the
general functionality, for more detailed information refer to the data sheet for the 82420 PCISet from Intel. The Saturn
chip set provides the following functions:
• CPU reset control
• CPU L1 cache control
• CPU burst mode control
• CPU interface control
• Integrated L2 write-back cache controller with tag comparator
• Page-mode DRAM controller
INTEL OEM PRODUCTS AND SERVICES DIVISION PRELIMINARY - REV 0.1
• Burst memory read/write control logic
• Data bus conversion to PCI
• Parity generation/detection to memory
• AT-BUS direction control
• Chip select for keyboard controller and RTC
• Speaker control
• NMI logic
• Floating-point coprocessor interface
• Keyboard reset and gate A20 emulation logic
• DMA controller
• Interrupt controller
• Counters/Timers
82424TX CACHE/DRAM/CONTROLLER (CDC)
The 82424TX provides all control signals necessary to drive the DRAM array, including multiplexed address signals.
It also controls system access to memory and generates snoop controls to maintain cache coherency.
82423TX DATA PATH UNIT (DPU)
The 82423TX provides data bus buffering and dual port buffering to the memory array. Controlled by the 82424TX,
the 82423TX device adds one load to the PCI bus and performs all the necessary byte and word swapping required.
Memory and I/O write buffers are included in these devices.
82378IB SYSTEM I/O (SIO)
The 82378IB integrates seven 32-bit DMA channels, five 16-bit timer/counters, two eight-channel interrupt
controllers, NMI logic, refresh address generation, and PCI/ISA bus arbitration circuitry together onto the same
device.
EXPANSION SLOTS
The Classic/PCI i486 Baby-AT Motherboard contains support for up to seven populated expansion slots, offering ISA
and PCI connectors. These connectors include four ISA bus expansion slots, and two PCI expansion slots; the seventh
slot uses both an ISA connector and a PCI connector side by side, and can accept either an ISA or PCI adapter board
but not both together. The expansion cards are oriented perpendicular to the motherboard. All three PCI expansion
slots accept PCI master cards, fully supporting the PCI specification.
SMC 37C663 SUPER I/O CONTROLLER
Control for the integrated serial ports, parallel port, floppy drive and IDE hard drive interface is incorporated into a
single component, the SMC FDC37C663. This component provides:
• Two NS16C552 compatible UARTs (with FIFO support)
• IBM and Centronics compatible bi-directional parallel port controller
• Industry standard floppy controller (with 2.88 MB floppy support)
• IDE hard disk decode and chip select
Header connectors are available near the back of the board for cabling these options. The serial ports can be enabled as
COM1 and COM2 or disabled. The parallel port can be enabled via the SETUP program as LPT1 or disabled, and can
be set as bi-directional or output only when enabled.
DALLAS DS12887 REAL TIME CLOCK, CMOS RAM AND BATTERY
The Real Time Clock (RTC) is implemented using a Dallas DS12887 device. The DS12887 is accurate to within 13
minutes/year and requires no external support (the battery and oscillator are integrated into the device). The
component is soldered into the board (the internal battery has an estimated lifetime of ten years).
The RTC can be set via the BIOS SETUP Program. CMOS memory supports the standard 128-byte battery-backed
RAM, fourteen bytes for clock and control registers, and 114 bytes of general purpose non-volatile CMOS RAM. All
CMOS RAM is reserved for BIOS use. The CMOS RAM can be set to specific values or cleared to the system default
values using the BIOS SETUP program. Also, the CMOS RAM values can be cleared to the system defaults by using a
hardware jumper. The appendices contain a list of jumper configurations.
INTEL OEM PRODUCTS AND SERVICES DIVISION PRELIMINARY - REV 0.1
FRONT PANEL CONNECTORS
A connector (J1C1) is provided for installing a speaker. The speaker provides error beep code information during the
Power-On Self Test if the system cannot use the video interface. The Classic/PCI i486 Baby-AT product guide contains
beep and error code information.
Connectors J1B2, J1B1, J1C1B, and J1A2, J1A1 supply front panel connections to Reset, Key lock, and Turbo
switches, and hard disk and turbo LEDs, respectively.
SECURITY
Security features are incorporated into the Classic/PCI i486 Baby-AT system BIOS.
BIOS PASSWORD
A BIOS password feature provides security during the boot process. A password can be entered using the Setup
utility and must be re-entered prior to disk boot each time the system is reset. The password can be changed at the
password prompt by entering <old password> / <new password> / <new password> <enter>. The password also can
be cleared by entering <old password> / <enter>. If the password is forgotten, it can be cleared by turning off the
system and setting jumper PW to the right. After the system has finished the Power-On Self Test, turn the system off
and reset jumper PW to the left. This allows the user access to the password feature, but with the forgotten password
cleared.
SETUP ENABLE JUMPER
A jumper on the baseboard controls access to the BIOS Setup utility. By setting jumper SE to the right, the user is
prevented from accessing the Setup utility during the Power-On Self Test or at any other time.
Loading...