Intel 955X User Manual

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Intel® 955X Express Chipset
Thermal/Mechanical Design Guide
– For the Intel® 82955X Memory Controller Hub (MCH)
April 2005
Document Number: 307012-001
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INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL’S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, or life sustaining applications.
Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for
future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
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The Intel from published specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
different processor families. See www.intel.com/products/processor_number
Intel, Pentium and the Intel logo are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries.
*Other names and brands may be claimed as the property of others. Copyright © 2005, Intel Corporation
82955X Memory Controller Hub (MCH) may contain design defects or errors known as errata which may cause the product to deviate
Intel processor numbers are not a measure of performance. Processor numbers differentiate features within each processor family, not across
for details.
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955X Express Chipset Thermal/Mechanical Design Guide
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Contents

Introduction .........................................................................................................................7
1
1.1 Definition of Terms .................................................................................................8
1.2 Reference Documents............................................................................................8
2 Packaging Technology........................................................................................................9
2.1 Package Mechanical Requirements.....................................................................10
3 Thermal Specifications......................................................................................................11
3.1 Thermal Design Power (TDP)..............................................................................11
3.2 Die Case Temperature Specifications..................................................................11
4 Thermal Simulation...........................................................................................................13
5 Thermal Metrology............................................................................................................15
5.1 Die Case Temperature Measurements................................................................15
5.1.1 Zero Degree Angle Attach Methodology ..............................................15
6 Reference Thermal Solution.............................................................................................17
6.1 Operating Environment ........................................................................................17
6.2 Heatsink Performance..........................................................................................17
6.3 Mechanical Design Envelope...............................................................................18
6.4 Board-Level Components Keep-out Dimensions.................................................20
6.5 Reference Heatsink Thermal Solution Assembly.................................................21
6.5.1 Heatsink Orientation .............................................................................22
6.5.2 Extruded Heatsink Profiles ...................................................................22
6.5.3 Mechanical Interface Material...............................................................23
6.5.4 Thermal Interface Material....................................................................23
6.5.4.1 Effect of Pressure on TIM Performance..............................24
6.5.5 Heatsink Clip.........................................................................................24
6.5.6 Clip Retention Anchors.........................................................................24
6.6 Reliability Guidelines............................................................................................25
7 Appendix A: Thermal Solution Component Suppliers.......................................................27
8 Appendix B: Mechanical Drawings ...................................................................................29
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955X Express Chipset Thermal/Mechanical Design Guide 3

Figures

Figure 2-1. MCH Package Dimensions (Top View)............................................................9
Figure 2-2. MCH Package Dimensions (Side View)...........................................................9
Figure 2-3. MCH Package Dimensions (Bottom View).....................................................10
Figure 5-1. Thermal Solution Decision Flowchart.............................................................16
Figure 5-2. Zero Degree Angle Attach Methodology........................................................16
Figure 5-3. Zero Degree Angle Attach Methodology (Top View)......................................16
Figure 6-1. Reference Heatsink Measured Thermal Performance versus Approach
Velocity ......................................................................................................................18
Figure 6-2. Heatsink Volumetric Envelope for the MCH...................................................19
Figure 6-3. MCH Heatsink Board Component Keep-out..................................................20
Figure 6-4. Retention Mechanism Component Keep-out Zones......................................21
Figure 6-5. Plastic Wave Soldering Heatsink Assembly...................................................22
Figure 6-6. Plastic Wave Soldering Heatsink Extrusion Profile........................................23
Figure 8-1. Plastic Wave Soldering Heatsink Assembly Drawing ....................................30
Figure 8-2. Plastic Wave Soldering Heatsink Drawing (1 of 2)........................................31
Figure 8-3. Plastic Wave Soldering Heatsink Drawing (2 of 2)........................................32
Figure 8-4. Plastic Wave Soldering Heatsink Ramp Clip Drawing (1 of 2).......................33
Figure 8-5. Plastic Wave Soldering Heatsink Ramp Clip Drawing (2 of 2).......................34
Figure 8-6. Plastic Wave Soldering Heatsink Wire Clip Drawing .....................................35
Figure 8-7. Plastic Wave Soldering Heatsink Solder-Down Anchor Drawing ..................36
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Tables

Table 3-1. MCH Thermal Specifications...........................................................................11
Table 6-1 Honeywell PCM 45F TIM Performance as a Function of Attach Pressure ......24
Table 6-2. Reliability Guidelines .......................................................................................25
Table 7-1. MCH Heatsink Thermal Solution.....................................................................27
Table 8-1. Mechanical Drawing List..................................................................................29
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Revision History

Revision
Number
-001 Initial Release. April 2005
Description Revision Date
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955X Express Chipset Thermal/Mechanical Design Guide 5
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6 Intel
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955X Express Chipset Thermal/Mechanical Design Guide

Introduction

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1 Introduction
As the complexity of computer systems increases, so do the power dissipation requirements. Care must be taken to ensure that the additional power is properly dissipated. Typical methods to improve heat dissipation include selective use of ducting, and/or passive heatsinks.
The goals of this document are to:
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Outline the thermal and mechanical operating limits and specifications for the Intel
Express Chipset Memory Controller Hub (MCH).
Describe a reference thermal solution that meets the specification of the 82955X MCH.
Properly designed thermal solutions provide adequate cooling to maintain the MCH die temperatures at or below thermal specifications. This is accomplished by providing a low local­ambient temperature, ensuring adequate local airflow, and minimizing the die to local-ambient thermal resistance. By maintaining the MCH die temperature at or below the specified limits, a system designer can ensure the proper functionality, performance, and reliability of the chipset. Operation outside the functional limits can degrade system performance and may cause permanent changes in the operating characteristics of the component.
82955X
The simplest and most cost effective method to improve the inherent system cooling characteristics is through careful design and placement of fans, vents, and ducts. When additional cooling is required, component thermal solutions may be implemented in conjunction with system thermal solutions. The size of the fan or heatsink can be varied to balance size and space constraints with acoustic noise.
This document addresses thermal design and specifications for the 82955X MCH component only. For thermal design information on other chipset components, refer to the respective component datasheet. For the ICH7, refer to the Intel
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I/O Controller Hub 7 (ICH7) Thermal
Design Guidelines.
Note: Unless otherwise specified, the term MCH refers to the Intel
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82955X Express chipset MCH.
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955X Express Chipset Thermal/Mechanical Design Guide 7
Introduction

1.1 Definition of Terms

Term Description
BGA Ball grid array. A package type, defined by a resin-fiber substrate, onto which a die is
mounted, bonded and encapsulated in molding compound. The primary electrical interface is an array of solder balls attached to the substrate opposite the die and molding compound.
BLT Bond line thickness. Final settled thickness of the thermal interface material after installation
of heatsink.
ICH7 I/O Controller Hub. Seventh generation I/O Controller Hub component that contains
additional functionality compared to previous ICH components. The I/O Controller Hub component that contains the primary PCI interface, LPC interface, USB2, ATA-100, and other I/O functions. It communicates with the MCH over a proprietary interconnect called DMI.
MCH Memory Controller Hub. The chipset component that contains the processor interface, the
memory interface, and the DMI.
T
case_max
T
case_min
TDP Thermal design power. Thermal solutions should be designed to dissipate this target power
Maximum die temperature allowed. This temperature is measured at the geometric center of the top of the package die.
Minimum die temperature allowed. This temperature is measured at the geometric center of
the top of the package die.
level. TDP is not the maximum power that the chipset can dissipate.
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1.2 Reference Documents
The reader of this specification should also be familiar with material and concepts presented in the following documents:
Document Title Document Number / Location
Intel® I/O Controller Hub 7 (ICH7) Thermal Design Guidelines http://developer.intel.com//desi
Intel® I/O Controller Hub 7 (ICH7) Datasheet http://developer.intel.com//design/c
Intel® 955X Express Chipset Datasheet http://developer.intel.com/design/c
BGA/OLGA Assembly Development Guide Contact your Intel Field Sales
Various system thermal design suggestions http://www.formfactors.org
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gn/chipsets/designex/307015.htm
hipsets/datashts/307013.htm
hipsets/datashts/306828.htm
Representative
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955X Express Chipset Thermal/Mechanical Design Guide

Packaging Technology

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2 Packaging Technology
The 955X Express chipset consists of two individual components: the MCH and the ICH7. The MCH component uses a 34 mm squared, 6-layer flip chip ball grid array (FC-BGA) package (see Figure 2-1 through Figure 2-3). For information on the ICH7 package, refer to the Intel Controller Hub 7 (ICH7) Thermal Design Guidelines.
Figure 2-1. MCH Package Dimensions (Top View)
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I/O
Capaci tor Area,
Handling Exclusion
Zone
3.1
15.34 9.14
3.1
Handling Area
Figure 2-2. MCH Package Dimensions (Side View)
2.355 ± 0.082 mm
Substrate
1.92 ± 0.078 mm
0.84 ± 0.05 mm
Decoup
Cap
19.38
10.67
MCH
Die
6.17
2.54
34.00
Die
0. 7 mm Max
2.30
2.0
3.0
Ø5.20mm
Die
Keepout
Area
34.00
955X_Pkg_TopView
0.20 See note 4.
0.435 ± 0.025 mm See note 3
Notes:
1. Primary datum -C- and seating plan are defined by the spherical crow ns of the solder balls (shown before motherboard attach)
2. All dimensions and tolerances conf orm to ANSI Y14.5M-1994
3. BGA has a pre-SMT height of 0.5mm and post-SMT height of 0.41-0.46mm
4. Shown before motherboard attach; FCBGA has a convex (dome shaped) orientation before reflow and is expected to have a slightly concave (bow l shaped) orientation after reflow
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955X Express Chipset Thermal/Mechanical Design Guide 9
Seating Plane
0.20 –C–
See note 1.
955X_Pkg_SideView
Packaging Technology
Figure 2-3. MCH Package Dimensions (Bottom View)
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NOTES:
1. All dimensions are in millimeters.
2. All dimensions and tolerances conform to ANSI Y14.5M-1994.

2.1 Package Mechanical Requirements

The MCH package has an exposed bare die that is capable of sustaining a maximum static normal load of 10-lbf. The package is NOT capable of sustaining a dynamic or static compressive load applied to any edge of the bare die. These mechanical load limits must not be exceeded during heatsink installation, mechanical stress testing, standard shipping conditions and/or any other use condition.
Note:
1. The heatsink attach solutions must not result in continuous stress onto the chipset package
with the exception of a uniform load to maintain the heatsink-to-package thermal interface.
2. These specifications apply to uniform compressive loading in a direction perpendicular to the
bare die top surface.
3. These specifications are based on limited testing for design characterization. Loading limits
are for the package only.
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955X Express Chipset Thermal/Mechanical Design Guide

Thermal Specifications

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3 Thermal Specifications

3.1 Thermal Design Power (TDP)

Analysis indicates that real applications are unlikely to cause the chipset MCH to consume maximum power dissipation for sustained time periods. Therefore, to arrive at a more realistic power level for thermal design purposes, Intel characterizes power consumption based on known platform benchmark applications. The resulting power consumption is referred to as the Thermal Design Power (TDP). TDP is the target power level that the thermal solutions should be designed to. TDP is not the maximum power that the chipset can dissipate.
For TDP specifications, see Table 3-1 for the 955X Express chipset MCH. FC-BGA packages have limited heat transfer capability into the board and have minimal thermal capability without a thermal solution. Intel recommends that system designers plan for one or more heatsinks when using the 955X Express chipset.

3.2 Die Case Temperature Specifications

To ensure proper operation and reliability of the MCH, the die temperatures must be at or between the maximum/minimum operating range as specified in Table 3-1 for the 82955X MCH. System and/or component level thermal solutions are required to maintain these temperature specifications. Refer to Chapter 5 for guidelines on accurately measuring package die temperatures.
Table 3-1. MCH Thermal Specifications
Parameter Value Notes
T
105 °C
case_max
T
5 °C
case_min
TDP
NOTE: These specifications are based on silicon characterization; however, they may be updated as further
data becomes available.
13.5 W DDR2-667
dual channel
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955X Express Chipset Thermal/Mechanical Design Guide 11
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