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Mobile Intel® 915GME Express Chipset
Development Kit User’s ManualApril 2007
2Order Number: 317230-001US
Contents—Mobile Intel
®
915GME Express Chipset
Contents
1.0About This Manual.....................................................................................................7
16 IDE Connector (J7J2)................................................................................................49
17 SATA Pinout (J7H1)..................................................................................................49
18 SATA Port 2 Power Connector Pinout (J6H3) ................................................................50
19 SATA Port 0 Mobile Drive Connector Pinout (J8J3) ........................................................50
20 Fan Connectors (J3F4 and J3B1)................................................................................50
®
915GME Express Chipset Power Management States ................... ............. 29
®
915GME Express Chipset Voltage Rails.................................. .. ................ 30
®
915GME Express Chipset LED Function Legend ........................................ 41
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Mobile Intel® 915GME Express Chipset
Mobile Intel® 915GME Express Chipset —Contents
Revision History
DateRevisionDescription
April 2007001Initial release of the document
®
Mobile Intel
Development Kit User’s ManualApril 2007
6Order Number: 317230-001US
915GME Express Chipset
About This Manual—Mobile Intel
®
915GME Express Chipset
1.0About This Manual
This user’s manual describes the use of the Mobile Intel® 915GME Express Chipset
Development Kit. This manual has been written for OEMs, system evaluators, and
embedded system developers. This document defines all jumpers, headers, LED
functions, and their locations on the board, along with subsystem features and POST
codes. This manual assumes basic familiarity in the fundamental concepts involved
with installing and configuring hardware for a personal computer system.
For the latest information about the Mobile Intel
Development Kit reference platform, visit:
For design documents related to this platform, such as schematics and bill of materials,
please contact your Intel Representative.
®
915GME Express Chipset
1.1Content Overview
Chapter 1.0, “About This Manual” — This chapter contains a description of conventions
used in this manual. The last few sections explain how to obtain literature and contact
customer support.
Chapter 2.0, “Getting Started”— Provides complete instructions on how to configure
the evaluation board and processor assembly by setting jumpers, connecting
peripherals, providing power, and configuring the BIOS.
Chapter 3.0, “Theory of Operation” — This chapter provides information on the system
design.
Chapter 4.0, “Hardware Reference”— This chapter provides a description of jumper
settings and functions, board debug capabilities, and pinout information for connectors.
Appendix A, “Heat Sink Installation Instructions” gives detailed installation instructions
for the Mobile Intel
®
915GME Express Chipset heat sink.
1.2Text Conventions
The following notations may be used throughout this manual.
# The pound symbol (#) appended to a signal name indicates that
the signal is active low.
Variables Variables are shown in italics. Variables must be replaced with
correct values.
Instructions Instruction mnemonics are shown in uppercase. When you are
programming, instructions are not case-sensitive. Y ou may use
either uppercase or lowercase.
Numbers Hexadecimal numbers are represented by a string of
hexadecimal digits followed by the character H. A zero prefix is
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Mobile Intel® 915GME Express Chipset —About This Manual
added to numbers that begin with A through F. (For example, FF
is shown as 0FFH.) Decimal and binary numbers are
represented by their customary notations. (That is, 255 is a
decimal number and 1111 1111 is a binary number. In some
cases, the letter B is added for clarity.)
Units of Measure The following abbreviations are used to represent units of
measure:
A amps, amperes
GByte gigabytes
KByte kilobytes
Kohms kilo-ohms
mA milliamps, milliamperes
MByte megabytes
MHz megahertz
ms milliseconds
mW milliwatts
ns nanoseconds
pFpicofarads
W watts
V volts
µA microamps, microamperes
µF microfarads
µs microseconds
µW microwatts
Signal Names Signal names are shown in uppercase. When several signals
share a common name, an individual signal is represented by
the signal name followed by a number, while the group is
represented by the signal name followed by a variable (n). For
example, the lower chip-select signals are named CS 0#, CS1#,
CS2#, and so on; they are collectively called CSn#. A pound
symbol (#) appended to a signal name identifies an active-low
signal. Port pins are represented by the port abbreviation, a
period, and the pin number (e.g., P1.0).
®
Mobile Intel
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8Order Number: 317230-001US
915GME Express Chipset
About This Manual—Mobile Intel
®
915GME Express Chipset
1.3Glossary of Terms and Acronyms
This section defines conventions and terminology used throughout this document.
ADD2ADD2 is an acronym for Advanced Digital Display, 2nd
Generation. ADD2 video interfaces come in two configurations:
Normal and Reversed. The normal is often referred to as ADD2
or ADD2-N and the reversed is referred to as ADD2-R. The
915GM platform can only support the ADD2-R video interface.
AggressorA network that transmits a coupled signal to another network.
AGTL+ The front-side bus uses a bus technology called AGTL+, or
Asynchronous GTL+ The processor does not utilize CMOS voltage levels on any
Bus AgentA component or group of components that, when combined,
CrosstalkThe reception on a victim network of a signal imposed by
Flight TimeFlight time is a term in the timing equation that includes the
Assisted Gunning Transceiver Logic. AGTL+ buffers are opendrain, and require pull-up resistors to provide the high logic level
and termination. AGTL+ output buffers differ from GTL+ buffers
with the addition of an active pMOS pull-up transistor to assist
the pull-up resistors during the first clock of a low-to-high
voltage transition.
signals that connect to the processor. As a result, legacy input
signals such as A20M#, IGNNE#, INIT#, LINT0/INTR, LINT1/
NMI, PWRGOOD, SMI#, SLP#, and STPCLK# utilize GTL+ input
buffers. Legacy output signals (FERR# and IERR#) and nonAGTL+ signals (THERMTRIP# and PROCHOT#) also utilize GTL+
output buffers. All of these signals follow the same DC
requirements as AGTL+ signals, however the outputs are not
actively driven high (during a logical 0 to 1 transition) by the
processor (the major difference between GTL+ and AGTL+).
These signals do not have setup or hold time specifications in
relation to BCLK[1:0], and are therefore referred to as
“Asynchronous GTL+ Signals”. However , all of the Asynchronous
GTL+ signals are required to be asserted for at least two BCLKs
in order for the processor to recognize them.
represent a single load on the AGTL+ bus.
aggressor network(s) through inductive and capacitive coupling
between the networks.
• Backward Crosstalk - Coupling that creates a signal in a
victim network that travels in the opposite direction as the
aggressor’s signal.
• Forward Crosstalk - Coupling that creates a signal in a
victim network that travels in the same direction as the
aggressor’s signal.
• Even Mode Crosstalk - Coupling from a signal or multiple
aggressors when all the aggressors switch in the same
direction that the victim is switching.
• Odd Mode Crosstalk - Coupling from a signal or multiple
aggressors when all the aggressors switch in the opposite
direction that the victim is switching.
signal propagation delay , any effects the system has on the T CO
of the driver, plus any adjustments to the signal at the receiver
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Mobile Intel® 915GME Express Chipset —About This Manual
needed to ensure the setup time of the receiver . More precisely,
flight time is defined as:
• The time difference between a signal at the input pin of a
receiving agent crossing the switching voltage (adjusted to
meet the receiver manufacturer’s conditions required for
AC timing specifications; i.e., ringback, etc.) and the output
pin of the driving agent crossing the switching voltage
when the driver is driving a test load used to specify the
driver’s AC timings.
• Maximum and Minimum Flight Time - Flight time variations
are caused by many different parameters. The more
obvious causes include variation of the board dielectric
constant, changes in load condition, crosstalk, power noise,
variation in termination resistance, and differences in I/O
buffer performance as a function of temperature, voltage,
and manufacturing process. Some less obvious causes
include effects of Simultaneous Switching Output (SSO)
and packaging effects.
• Maximum flight time is the largest acceptable flight time a
network will experience under all conditions.
• Minimum flight time is the smallest acceptable flight time a
network will experience under all conditions.
IrDAIrDA is an acronym for Infrared Data Association, and this
association has outlined a specification for serial communication
between two devices via a bi-directional infrared data port. The
915GM platform has such a port and it is located on the rear of
the platform between the two USB connectors.
ISIInter-symbol interference is the effect of a previous signal (or
transition) on the interconnect delay. For example, when a
signal is transmitted down a line and the reflections due to the
transition have not completely dissipated, the following data
transition launched onto the bus is affected. ISI is dependent
upon frequency, time delay of the line, and the reflection
coefficient at the driver and receiver . ISI may impact both timing
and signal integrity.
NetworkThe network is the trace of a Printed Circuit Board (PCB) that
completes an electrical connection between two or more
components.
OvershootThe maximum voltage observed for a signal at the device pad,
measured with respect to VCC.
PadThe electrical contact point of a semiconductor die to the
package substrate. A pad is only observable in simulations.
PinThe contact point of a component package to the traces on a
substrate, such as the motherboard. Signal quality and timings
may be measured at the pin.
Power-Good“Power-Good, ” “PWRGOOD , ” or “CPUPWRGOOD” (an active high
signal) indicates that all of the system power supplies and clocks
are stable. PWRGOOD should go active a predetermined time
after system voltages are stable and should go inactive as soon
as any of these voltages fail their specifications.
RingbackThe voltage to which a signal changes after reaching its
maximum absolute value. Ringback may be caused by
reflections, driver oscillations, or other transmission line
phenomena.
®
Mobile Intel
Development Kit User’s ManualApril 2007
10Order Number: 317230-001US
915GME Express Chipset
About This Manual—Mobile Intel
System BusThe System Bus is the microprocessor bus of the processor.
Setup WindowThe time between the beginning of Setup to Clock (TSU_MIN)
SSOSimultaneous Switching Output (SSO) effects are differences in
StubThe branch from the bus trunk terminating at the pad of an
TrunkThe main connection, excluding interconnect branches, from
UndershootThe minimum voltage extending below VSS observed for a
V
(CPU core)VCC (CPU core) is the core power for the processor. The system
CC
VictimA network that receives a coupled crosstalk signal from another
VRD 10.0The Voltage Regulator Module (a down on the board solution)
®
915GME Express Chipset
and the arrival of a valid clock edge. This window may be
different for each type of bus agent in the system.
electrical timing parameters and degradation in signal quality
caused by multiple signal outputs simultaneously switching
voltage levels in the opposite direction from a single signal or in
the same direction. These are called odd mode and even mode
switching, respectively . This simultaneous switching of multiple
outputs creates higher current swings that may cause additional
propagation delay (“push-out”) or a decrease in propagation
delay (“pull-in”). These SSO effects may impact the setup and/
or hold times and are not always taken into account by
simulations. System timing budgets should include margin for
SSO effects.
agent.
one end agent pad to the other end agent pad.
signal at the device pad.
bus is terminated to V
network is called the victim network.
specification for the Intel
Technology processor. It is a DC-DC converter module that
supplies the required voltage and current to a single processor.
(CPU core).
CC
®
Pentium® 4 Processor with HT
Table 1 defines the acronyms used throughout this document.
Table 1.Acronyms (Sheet 1 of 2)
AcronymDefinition
ACAudio Codec
ASFAlert Standard Format
AMCAudio/Modem Codec.
Anti-EtchAny plane-split, void or cutout in a VCC or GND plane is referred to as an anti-etch
CMCCommon Mode Choke
CNRCommunications and Networking Riser
EMIElectro Magnetic Interference
ESDElectrostatic Discharge
FSFull-speed. Refers to USB
HSHigh-speed. Refers to USB
ICHI/O Controller Hub
LOMLAN on Motherboard
LPCLow Pin Count
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Mobile Intel® 915GME Express Chipset
Table 1.Acronyms (Sheet 2 of 2)
AcronymDefinition
LSLow-speed. Refers to USB
MCModem Codec
PCMPulse Code Modulation
PLCPlatform LAN Connect
RTCReal Time Clock
SATASerial ATA
SMBus
SPDSerial Presence Detect
STRSuspend To RAM
TCOTotal Cost of Ownership
TDMTime Division Multiplexed
TDRTime Dom ain Reflectometry
µBGAMicro Ball Grid Array
USBUniversal Serial Bus
System Management Bus. A two-wire interface through which various system
components may communicate.
Mobile Intel® 915GME Express Chipset —About This Manual
1.4Support Options
1.4.1Electronic Support Systems
Intel’s web site (http://www.intel.com/) provides up-to-date technical information and
product support. This information is available 24 hours per day, 7 days per week,
providing technical information whenever you need it.
Product documentation is provided online in a variety of web-friendly formats at:
http://appzone.intel.com/literature/index.asp
1.4.2Additional Technical Support
If you require additional technical support, please contact your Intel Representative or
local distributor.
1.5Product Literature
You can order product literature from the following Intel literature centers:
Table 2.Intel Literature Centers
LocationTelephone Number
U.S. and Canada1-800-548-4725
U.S. (from overseas)708-296-9333
Europe (U.K.)44(0)1793-431155
Germany44(0)1793-421333
France44(0)1793-421777
Japan (fax only)81(0)120-47-88-32
®
Mobile Intel
Development Kit User’s ManualApril 2007
12Order Number: 317230-001US
915GME Express Chipset
About This Manual—Mobile Intel
®
915GME Express Chipset
1.6Related Documents
Table 3 provides a summary of publicly available documents related to this
development kit. As supplements to the documents listed below, technical white papers
detailing specific features of the Mobile Intel® 915GME Express Chipset can be found
at:
Architecture Software Developer’s Manual Volume 2A: Instruction Set
®
Architecture Software Developer’s Manual Volume 2B: Instruction Set
®
Architecture Software Developer’s Manual Volume 3: System
®
Architecture Optimization Reference Manual 248966
®
915PM/GM/GME/GMS and 910GML/GMLE Express Chipset Datasheet305264
Applications
®
I/O Controller Hub 6 (ICH6) Family Datasheet301473
Intel
®
Intel
I/O Controller Hub 6 (ICH6) Family Specification Update301474
®
Intel
I/O Controller Hub 6 (ICH6) Family Thermal Design Guide302362
Number
302231
273885
253665
253666
253667
253668
305992
LPC Slot and Sideband Header Specification14159
Order
†
April 2007Development Kit User’s Manual
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Mobile Intel® 915GME Express Chipset
Mobile Intel® 915GME Express Chipset —Getting Started
2.0Getting Started
This chapter identifies the evaluation kit’s key components, features and specifications.
It also details basic board setup and operation.
2.1Overview
The evaluation board consists of a baseboard populated with the Mobile Intel® 915GME
Express Chipset , other system board components, and peripheral connectors.
Note:The evaluation board is shipped as an open system allowing for maximum flexibility in
changing hardware configuration and peripherals. Since the board is not in a protective
chassis, take extra precaution when handling and operating the system.
2.1.1Mobile Intel® 915GME Express Chipset Features
Features of the development kit board are summarized below:
Processor
•Supports Intel® Pentium® M Processor with 2 MByte L2 Cache on 90 nm process in
the 478 pin Flip Chip Pin Grid Array (Micro-FCPGA) package
®
— Supported processors are the Intel
Pentium
•Supports Intel
®
M 738 Processor
®
Celeron® M Processor on 90 nm process in the 478 pin Flip Chip
Pentium® M 760 Processor and the Intel®
Pin Grid Array (Micro-FCPGA) package
— Supported processors are the Intel® Celeron® M 370 Processor and the Intel®
Celeron
®
M 373 Processor
Note:This reference platform does not support the Intel
• Two SODIMM slots (one per channel) support DDR2 SODIMMS (unbuffered, nonECC) modules
• Supports 128 MBytes to 2 GBytes using 256 Mbit, 512 Mbit, or 1 Gbit technology
• x16 PCI Express Graphics or Serial Digital Video Out (SDVO) port
• LVDS, VGA support
®
Pentium® M 745 Processor.
I/O Controller Hub 6 (ICH6-M)
• 609 pin plastic BGA package
• DMI (x4) interface with GMCH
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Mobile Intel
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915GME Express Chipset
Getting Started—Mobile Intel
®
915GME Express Chipset
• Two SATA and one IDE (40 pin) Hard Drive interface
• Two PCI 2.3 compliant desktop slots
• 82802AC8 Firmware Hub (FWH)
• 82562EZ 10/100 Mbps Platform LAN Connect (PLC)
• Two x1 PCI Express slots.
Note:There are actually three x1 PCI Express slots but slot 2 was used for validation
purposes. Only slots 0 and 1 are supported.
Clocking
• CK-410M and CK-SSCD
• Battery-backed real time clock
Connector Interface Summary
• One x16 PCI Express Video Interface, doubles as an ADD2-R connector to provide
access to dual SDVO ports if PCI Express is unused
•Two SATA ports
• One Ultra ATA (33/66/100/133) IDE connector supporting up to two IDE devices
• Eight Universal Serial Bus (USB) 2.0 ports (Five ports provided on rear-panel, two
provided via front-panel header (J6H2), and one at the PCI Express docking
connector.)
• Two PCI 2.3 compliant 33 MHz interface connectors
• PS/2-style keyboard and PS/2 mouse (6-pin mini-DIN) connectors
• Standard S-Video connector at back panel interface (not functional)
• LVDS connector on top of circuit board near GMCH
• One VGA connector provides access to integrated graphics
• One LAN connector providing 10/100 connectivity from Intel 82562EZ 10/100 Mbit
PLC
• One 9-pin serial port connector.
•One IrDA port
• Two PCI Express slots (x1)
• Two SODIMM connectors on rear side of circuit board
Debug Features
• Extended Debug Port (XDP) connector
• On-board Port 80h display
Miscellaneous Features
• Configurable for ATX 1.1 Power Supply in desktop mode or AC Mobile Brick/Battery
Pack for Mobile Mode
• ATX Form Factor eight layer PCB
• AMI* system BIOS
• Built-in Wake On LAN (WOL) header
• Three built-in fan power connectors: Rear Chassis Fan, CPU Fan, Front Chassis Fan
• Power/Reset buttons
• CMOS clear jumper
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Mobile Intel® 915GME Express Chipset
Mobile Intel® 915GME Express Chipset —Getting Started
• BIOS recovery jumper
• Boot Block protection jumper
• Support for Serial, IrDA, serial mouse, and keyboard
2.2Included Hardware and Documentation
The following hardware and documentation is included in the development kit:
®
•One Mobile Intel
®
•One Intel
Pentium M® Processor with 2 MB L2 Cache on 90 nm process in the 478
• One Type 2032, socketed 3 V lithium coin cell battery (Installed)
• One DDR2 SODIMM (200 Pin)
• One CPU thermal solution and CPU back plate (included in kit box – not populated
on board)
• One hard drive
•One cable kit
915GME Express Chipset board
2.3Software Key Features
The software in the kit was chosen to facilitate development of real-time applications
based on the components used in the evaluation board. The driver CD included in the
kit contains all of the software drivers necessary for basic system functionality under
the following operating systems: Windows* 2000/XP/XP Embedded, and Linux*.
Note:While every care was taken to ensure the latest versions of drivers were provided on
the enclosed CD at time of publication, newer revisions may be available. Updated
drivers for Intel components can be found at: http://www.intel.com.
For all third-party components, please contact the appropriate vendor for updated
drivers.
Note:Software in the kit is provided free by the vendor and is only licensed for evaluation
purposes. Refer to the documentation in your evaluation kit for further details on any
terms and conditions that may be applicable to the granted licenses. Customers using
the tools that work with Microsoft* products must license those products. Any targets
created by those tools should also have appropriate licenses. Software included in the
kit is subject to change.
Refer to http://developer.intel.com/design/intarch/devkits for details on additional
software from other third-party vendors.
2.3.1AMI* BIOS
This development kit ships pre-installed with AMI* BIOS pre-boot firmware from AMI*.
AMI* BIOS provides an industry-standard BIOS platform to run most standard
operating systems, including Windows* 2000/XP/XP Embedded, Linux*, and others.
The AMI* BIOS Application Kit (available through AMI*) includes complete source code,
a reference manual, and a Windows-based expert system, BIOStart*, to enable easy
and rapid configuration of customized firmware for your Mobile Intel
®
915GME Express
Chipset .
®
Mobile Intel
Development Kit User’s ManualApril 2007
16Order Number: 317230-001US
915GME Express Chipset
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