8xC251TA, 8xC251TB, 8xC251TP, 8xC251TQ, Hardware Description
Addendum to the 8xC251SA, 8xC251SB, 8xC251SP, 8xC251SQ, User’s Manual
Release Date: November, 1997
Order Number: 273138-001
The 8xC251Tx may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Such errata are not covered by Intel’s warranty. Current characterized errata are available on request.
Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel’s Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Intel products are not intended for use in medical, life saving, or life sustaining applications. Intel may make changes to specifications and product descriptions at any time, without notice. Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
The 8xC251Tx may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request.
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Copyright © Intel Corporation 1997.
*Third party brands and names are the property of their respective owners.
8xC251Tx Hardware Description
8xC251TA, 8xC251TB, 8xC251TP, 8xC251TQ, Hardware Description
Addendum to the 8xC251SA, 8xC251SB, 8xC251SP, 8xC251SQ, User’s Manual
1.0 |
INTRODUCTION TO THE 8xC251Tx |
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1.1 |
Comparing the 8xC251Tx and 8xC251Sx ..................................................................... |
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2.0 |
SIGNAL SUMMARY |
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3.0 |
THE SECOND SERIAL I/O PORT |
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3.1 |
Overview........................................................................................................................ |
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3.2 |
Special Function Register Definitions ............................................................................ |
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3.2.1 |
SCON1 .................................................................................................................... |
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3.2.2 |
SBUF1 ................................................................................................................... |
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3.2.3 |
SADDR1 ................................................................................................................ |
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3.2.4 |
SADEN1 ................................................................................................................ |
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3.2.5 |
BGCON .................................................................................................................. |
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3.2.6 |
IE1 ......................................................................................................................... |
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3.2.7 |
IPH1 ....................................................................................................................... |
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3.2.8 |
IPL1 ....................................................................................................................... |
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4.0 EXTENDED DATA FLOAT TIMING |
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4.1 |
Summary of the Extended Data Float Timing Changes .............................................. |
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FIGURES |
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Figure 1 |
8xC251Tx Block Diagram ..................................................................................... |
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TABLES |
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Table 1. |
8xC251Tx Signal Summary ................................................................................. |
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Table 2. |
8xC251Tx Signal Descriptions ............................................................................. |
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Table 3. |
Special Function Register (SFR) Map.................................................................. |
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Table 4. |
Second Serial I/O Port Signals ............................................................................ |
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Table 5. |
Second Serial I/O Port Special Function Registers.............................................. |
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Table 6. |
SCON1 Special Function Register Definitions ..................................................... |
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Table 7. |
BGCON Special Function Register Definitions .................................................. |
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Table 8. |
IE1 Special Function Register Definitions .......................................................... |
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Table 9. |
IPH1 Special Function Register Definitions ....................................................... |
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Table 10. |
IPL1 Special Function Register Definitions ........................................................ |
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Table 11. |
Interrupt Priority of Second Serial I/O Port......................................................... |
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Table 12. |
UCONFIG1 bit definitions for the 8xC251Tx ...................................................... |
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Table 13. |
Summary of the EDF# and WSB#[1:0] Configuration Options........................... |
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III
8xC251Tx Hardware Description
1.0 INTRODUCTION TO THE 8xC251Tx
This Hardware Description describes the 8xC251TA, 8xC251TB, 8xC251TP, 8xC251TQ (referred to collectively as the 8xC251Tx) embedded microcontroller, which is the newest member of the MCS® 251 microcontroller family. The 8xC251Tx is pin and code compatible with the 8xC251Sx but is enhanced with the addition of new features.
This document addresses the differences between the two members of the MCS 251 microcontroller family. For a detailed description of the MCS 251 microcontroller core and standard peripherals shared by both the 8xC251Sx and 8xC251Tx, please refer to the 8xC251SA, 8xC251SB, 8xC251SP, 8xC251SQ Embedded Microcontroller User’s Manual (272795).
1.1Comparing the 8xC251Tx and 8xC251Sx
The differences between the 8xC251Tx and the 8xC251Sx are briefly described here.
•The maximum operating frequency of the 8xC251Tx is 24 Mhz compared to 16 MHz for the 8xC251Sx.
•The 8xC251Tx has two serial I/O ports while the 8xC251Sx has one. The pins for the second serial I/O port are multiplexed with other functional pins.
•The 8xC251Tx has a new configuration option (Extended Data Float timing) to allow interfacing with slower memories. This feature is supported by a bit in the configuration byte, UCONFIG1. The corresponding bit in the 8xC251Sx has a different function.
•The 8xC251Tx is offered in with factory programmed ROM while the 8xC251Sx is also offered with OTPROM/EPROM.
P2 (A15-8)
P3
PSEN
P0 (A7- 0/D7-0)
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PORT |
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EPROM/ |
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RAM |
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0-3 |
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ROM |
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8 |
24 |
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16 |
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Memory Data |
AddressData |
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BusData |
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Memory Address |
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16 |
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BUS INTERFACE UNIT |
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16 |
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24 |
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INSTR |
PC |
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Instruction |
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CPU |
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Sequencer |
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Interface |
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SRC1, SRC2 |
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Memory |
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ALU |
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Program |
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File |
Counter |
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Data |
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DST |
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ALE |
VCC |
Peripheral Interface Unit
RESET
Clock and
Reset Unit
XTAL2
Interrupt
Handler Unit
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Peripherals |
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IB |
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8 |
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XTAL1 |
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3 Timers |
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Serial I/O
WDT
PCA |
P1 |
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2nd Serial I/O
VSS
Figure 1. 8xC251Tx Block Diagram
1
8xC251Tx Hardware Description
2.0 SIGNAL SUMMARY
Table 1. 8xC251Tx Signal Summary
Address & Data
Name |
PLCC |
DIP |
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AD0/P0.0 |
43 |
39 |
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AD1/P0.1 |
42 |
38 |
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AD2/P0.2 |
41 |
37 |
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AD3/P0.3 |
40 |
36 |
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AD4/P0.4 |
39 |
35 |
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AD5/P0.5 |
38 |
34 |
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AD6/P0.6 |
37 |
33 |
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AD7/P0.7 |
36 |
32 |
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A8/P2.0 |
24 |
21 |
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A9/P2.1 |
25 |
22 |
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A10/P2.2 |
26 |
23 |
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A11/P2.3 |
27 |
24 |
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A12/P2.4 |
28 |
25 |
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A13/P2.5 |
29 |
26 |
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A14/P2.6 |
30 |
27 |
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A15P2.7 |
31 |
28 |
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P3.7/RD#/A16 |
19 |
17 |
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P1.7/CEX4/A17/WCLK |
9 |
8 |
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Processor Control |
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Name |
PLCC |
DIP |
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P3.2/INT0# |
14 |
12 |
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P3.3/INT1# |
15 |
13 |
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EA# |
35 |
31 |
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RST |
10 |
9 |
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XTAL1 |
21 |
18 |
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XTAL2 |
20 |
19 |
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Input/Output
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Name |
PLCC |
DIP |
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P1.0/T2 |
2 |
1 |
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P1.1/T2EX |
3 |
2 |
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P1.2/EC/RXD1 |
4 |
3 |
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P1.3/CEX0/TXD1 |
5 |
4 |
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P1.4/CEX1 |
6 |
5 |
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P1.5/CEX2 |
7 |
6 |
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P1.6/CEX3/WAIT# |
8 |
7 |
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P1.7/CEX4/A17/WCLK |
9 |
8 |
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P3.0/RXD |
11 |
10 |
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P3.1/TXD |
13 |
11 |
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P3.4/T0 |
16 |
14 |
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P3.51/T1 |
17 |
15 |
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Power & Ground |
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Name |
PLCC |
DIP |
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VCC |
44 |
40 |
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VCC2 |
12 |
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VSS |
22 |
20 |
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VSS1 |
1 |
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VSS2 |
23,24 |
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Bus Control & Status |
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Name |
PLCC |
DIP |
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P3.6/WR# |
18 |
16 |
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P3.7/RD#/A16 |
19 |
17 |
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ALE |
33 |
30 |
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PSEN# |
32 |
29 |
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NOTE: Pins in this font indicate functions associated with the second serial I/O port.
2