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A license is hereby granted to download a copy of this document for personal use only. This document is subject to change or
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Readers should not design products based on this document. Technical updates should be obtained by calling Intel Literature or
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Copyright 1996, Intel Corporation
†
Third-party brands and trademarks are the property of their respective owners.
The Advanced/RH motherboard integrates the latest advances in processor, memory, and I/O technologies into a
standard LPX form factor that provides leading edge technology. This combination of high integration and high
performance makes the Advanced/RH motherboard the ideal platform for the increasing requirements of today's (and
tomorrow's) desktop applications in the corporate workspace.
The flexible LPX design will accept Pentium
MHz, 150 MHz and 166 MHz as well as future Pentium processors. The processor subsystem is complemented by a
Revision 2.1 Card Edge Low Profile (CELP 2.1) socket that accepts either a 256 KB or 512 KB second level writeback cache module using pipelined synchronous burst technology. There is also an option for having 256 KB of
Pipeline Burst SRAM soldered onto the motherboard. If cache memory is soldered on the motherboard, the CELP
socket will not be installed. Only one type of cache may be used on the Advanced/RH motherboard. The memory
subsystem is designed to support up to 512 MB of EDO DRAM (for improved performance) or standard Fast Page
DRAM in standard 72-pin SIMM
†
sockets. A Type 7 Pentium OverDrive® socket provides an upgrade to future
OverDrive processors.
The Advanced/RH motherboard utilizes Intel's 82430HX PCIset to provide increased integration and performance
over other motherboard designs. The Intel 82430HX PCIset contains an integrated PCI Bus Mastering IDE controller
with two high performance IDE interfaces for up to four IDE devices (such as hard drives, CD-ROM readers, and so
forth). The 82430HX PCIset coupled with the integration of the industry’s latest peripherals gives the user a robust
computing platform.
Complementing the 82439HX PCI controller is the 82371SB PIIX3 ISA bridge, offering new technology like USB
expandability. The PIIX3 performs as a host on the Universal Serial Bus, and in the middle of 1996 Advanced/RH
will provide connectors to accommodate USB peripherals.
†
ATI
264-VT video, with fast SGRAM video memory, provides excellent performance advantages over alternate
solutions using EDO memory. ATI Media Connector modules, supplied by ATI Technologies, can be used to
accelerate hardware MPEG and provide the tuner capabilities that previously required an entire add in card. Memory
expansion modules, also supplied by ATI, can upgrade the motherboard from 1MB to 2 or 4 MB of SGRAM.
The National PC87306B Super I/O controller integrates the standard PC I/O functions: floppy interface, two FIFO
serial ports, one EPP/ECP capable parallel port, a Real Time Clock, keyboard controller, and support for an IrDA
compatible infrared interface.
†
To provide for the increasing number of multimedia applications, a Creative
VIBRA16S audio CODEC is integrated
onto the motherboard. Either consumer audio or business audio is selected by the OEM. Consumer audio will not
have onboard jacks, like business audio, but will provide audio connections via an audio riser card. Either audio
solution is provided by the VIBRA16S audio controller, and it provides 16-bit stereo, Sound Blaster Pro
†
compatible
audio with full duplex capabilities to meet the demands of interactive multimedia applications. PCI and ISA
expansion slots are supported by a connector on the motherboard designed to accept a riser card.
In addition to superior hardware capabilities, a full set of software drivers and utilities are available to allow
advanced operating systems such as Microsoft
†
Windows† 95 to take full advantage of the hardware capabilities.
Features such as bus mastering IDE, Windows 95-ready Plug ‘N’ Play, Advanced Power Management (APM) with
application restart, software-controlled power supply shutdown, and full duplex audio are all provided by software
available for the Advanced/RH.
A − VGA
B − Parallel port connector
C − COM2 Header
D − COM2, or Dual in-line USB Connector
E − COM1 connector
F− Four Pin CD-ROM audio connector
G − PS/2
H − PS/2 Keyboard port
I − Two 3.5 mm Audio Jacks (mic in, line out)
J − Eight Pin Wave table upgrade connector
K − 3 Pin Modem Audio Connector
L − Creative Labs Vibra 16S audio, Yamaha
M − Midi Audio/Joystick connector
N − Floppy connector
O − Power Supply control connector
P − 3.3v Power connector
Q − Primary power connector
R − Six SIMM sockets (three banks)
(This figure identifies the location of motherboard manufacturing options. Not all locations will be populated on all motherboards.)
connector
†
Mouse port
synthesizer
†
OPL3 FM
S − PCI / ISA expansion connector
T − National PC87306B I/O controller
U − Flash BIOS
V − PCI ISA/IDE Xcelerator (PIIX3)
W − Battery for the Real-time clock
X − Two PCI IDE interfaces
Y − CPU 3.3v voltage regulator
Z − Front Panel I/O connector
AA − Socket 7 Pentium Processor socket
BB − Celp 2.1 connector cache module socket
CC − 82439HX controller (TXC)
DD − 256K L2 PBSRAM
EE − Riser Card 2/3 slot jumper
FF − ATI Media Channel Connector for H/W MPEG
GG − ATI graphics controller
HH − Configuration jumper blocks
II − Up to 2 MB graphics memory
JJ − SGRAM Graphics memory upgrade header
The Advanced/RH motherboard is designed to fit into a standard LPX form factor chassis. Figure 2 illustrates the
mechanical form factor for the Advanced/RH. The Advanced/RH LPX form factor does adhere to the standard
LPX guidelines in that the outer dimensions are 13” x 9”. Location of the I/O connectors, riser slot, and mounting
holes are in strict compliance with the LPX specification. However, if business audio is selected by an OEM, a
slight modification to the OEM’s chassis may be necessary to accept the audio jacks on the motherboard.
CPU
The Advanced/RH LPX motherboard is designed to operate with 3.3 volt Pentium processors. The 3.3 volt power
is provided by a patented on-board voltage regulator circuit. An on-board jumper enables use of VRE specified
processors. The voltage regulator provides the required voltage for the processor from the 5 volt output of a
standard power supply. Processors which run internally at 75, 90, 100, 120, 133, 150 and 166 MHz, and have
iCOMP
processors will also be supported.
The Pentium processor maintains full backward compatibility with the 8086, 80286, Intel386 and Intel486
processors. It supports both read and write burst mode bus cycles, and includes separate 8 KB on-chip code and
data write-back caches. Also integrated into the Pentium processor is an advanced numeric coprocessor which
significantly increases the speed of floating point operations, while maintaining backward compatibility with the
Intel486DX math coprocessor and complying to ANSI/IEEE standard 754-1985.
®
ratings of 615, 735, 815, 1000, 1110, 1176 and 1308respectively are supported. Future Pentium
The Advanced/RH motherboard is manufactured with the 321-pin (socket 7) ZIF processor socket. Socket 7
provides a processor upgrade path that includes higher performance Pentium OverDrive processors than can be
supported with socket 5. The motherboard is built to support uniplane CPUs. However, a manufacturing option
allows the socket 7 design to support split voltage planes that can supply different voltages for a processor’s CPU
core and for the I/O core. Installing a split plane CPU into a motherboard configured only for uniplane processor
may cause damage to the CPU.
SECOND LEVEL CACHE
The Intel 82430HX PCIset supports a second level cache that uses high performance Synchronous Pipeline Burst
SRAM. Asynchronous cache is not supported by the 82430HX controller. Pipeline Burst (PB) SRAM provides
performance similar to expensive Synchronous Burst SRAMs for only a slight cost premium over slower
performing asynchronous SRAMs.
As a manufacturing option, the Advanced/RH motherboard without onboard cache can be provided with a Card
Edge Low Profile (CELP) version 2.1 socket that provides flexibility for second level cache options. The CELP
socket can accommodate either a 256 KB or 512 KB cache module and is designed to work with modules that
adhere to the COAST (Cache On A Stick) specification, version 2.1. The cache size is automatically detected and
configured by the system BIOS for optimal performance. For a list of cache module suppliers or a copy of the
COAST specification, contact your local Intel sales office or Intel authorized distributor.
SYSTEM MEMORY
The Advanced/RH motherboard provides six 72-pin SIMM sites for memory expansion. The sockets support 512
KB x 32 (2MB double sided SIMMs only), 1M x 32 (4 MB), 2M x 32 (8 MB), 4M x 32 (16 MB), 8M x 32 (32
MB), 16M x 32 (64MB), and 32M x 32 (128MB) single-sided or double-sided SIMM modules. Minimum memory
size is 8 MB and maximum memory size, using four 32M x 32 SIMM modules, is 512 MB. Memory timing
requires 70 ns fast page devices or, for optimum performance 60 ns EDO DRAM. 36-bit SIMM modules may be
used for parity or ECC generation and checking.
The six sockets are arranged as Bank 0, Bank 1, and Bank 2. Each bank consists of two sockets and provides a
64/72-bit wide data path. Both SIMMs i n a bank must be of the same memory size and type, although each bank
may have different types of memory installed. It is even possible to have 70 ns Fast Page DRAM in one bank and
60 ns EDO DRAM in the other, in which case each bank is independently optimized for maximum performance.
Any combination of the banks may be populated. There are no jumper settings required for the memory size or
type, which is automatically detected by the system BIOS. The Advanced/RH motherboard supports only tin-lead
SIMMs.
When banks 1 and 2 are populated at the same time, memory timing is modified from x333 to x444. This is due to
loading on the address line shared by these two banks. In most applications the L2 cache will mask any
performance degradation that is incurred. In addition, when using EDO Parity memory i n an ECC configuration
memory timing is changed from x222 to x333 to allow the chipset to perform Read Modify Writes.
EDO DRAM
Extended Data Out, or Hyper Page, DRAM is designed to improve the DRAM read performance. EDO
DRAM holds the memory data valid until the next CAS# falling edge, unlike standard fast page mode
DRAM which tri-states the memory data when CAS# negates to precharge for the next cycle. With EDO,
the CAS# precharge overlaps the data valid time, allowing CAS# to negate earlier while still satisfying
the memory data valid window time.
An expansion slot riser connector of EISA form factor provides the capability to support either two or three PCI
slots by changing a motherboard jumper to route any extra IRQ and ID selects. A riser board can also support up
to five ISA expansion slots. The PCI bus is compliant with the PCI 2.1 specification.
To ensure that the lowest positioned slot on the riser card can support a full length add-in card the following
conditions must be met.
1) The minimum height requirement for the lowest positioned slot on the CPU side of the riser is 1.2”. Therefore
the CPU heat sink should be no more than 1.2” high once installed on the processor.
2) The minimum height requirement for the lowest positioned slot on the SIMM side of the riser is 1.3”.
Therefore, once SIMM memory is installed they should not be taller than 1.3”.
PERIPHERAL COMPONENT INTERCONNECT (PCI) PCISET
The Intel 82430HX PCIset is made up of two components: The 82439HX controller (TXC) and the 82371SB
PCI ISA IDE Xcellerator (PIIX3) ISA bridge. The PCIset provides the following functions:
• CPU interface control
• Integrated L2 write-back cache controller
– Pipeline Burst SRAM
– 256 KB or 512 KB Direct Mapped
• Integrated DRAM controller
– 64/72-bit path to Memory
– Support for EDO and Fast Page DRAM
– 8 MB to 512 MB main memory
– Parity and ECC support
• Fully synchronous PCI bus interface
– 25/30/33 MHz
– PCI to DRAM > 100 Mbytes/sec
• Interface between the PCI bus and ISA bus
• Universal Serial Bus Controller
(with B0 stepping of the PIIX 3)
– Host/Hub Controller
– Two USB ports
• Integrated fast IDE interface
– Support for up to 4 devices
– PIO Mode 4 transfers up to 16 MB/sec
– Integrated 8 x 32-bit buffer for Bus
Master PCI IDE burst transfers
– Bus Master mode
• PCI 2.1 Compliant
• Enhanced Fast DMA controller
• Interrupt controller and steering
• Counters/Timers
• SMI interrupt logic and timer with Fast On/Off mode
82439HX TXC
The 439HX controller provides all control signals necessary to drive a second level cache and the DRAM array,
including multiplexed address signals. It also controls system access to memory and generates snoop controls to
maintain cache coherency. The 439HX controller comes in a 324 pin Ball Grid Array package.
82371SB PCI ISA IDE XCELERATOR (PIIX3)
The PIIX3 provides the interface between the PCI and ISA buses and integrates a dual channel fast IDE interface
capable of supporting up to 4 devices. USB host/hub bus is provided by the PIIX 3. The PIIX3 integrates seven
32-bit DMA channels, five 16-bit timer/counters, two eight-channel interrupt controllers, PCI-to-AT interrupt
mapping circuitry, NMI logic, ISA refresh address generation, and PCI/ISA bus arbitration circuitry onto the same
device. The PIIX3 comes in a 208 pin QFP package.
The Advanced/RH motherboard provides two independent high performance bus-mastering PCI IDE interfaces
capable of supporting PIO Mode 3 and Mode 4 devices. The system BIOS supports Cylinder Sector Head (CHS),
Logical Block Addressing (LBA) and Extended Cylinder Sector Head (ECHS) translation modes as well as ATAPI
(e.g. CD-ROM) devices on both IDE interfaces. IDE device transfer rate and translation mode capability can be
automatically determined by the system BIOS.
Normally, programmed I/O operations require a substantial amount of CPU bandwidth. In multi-tasking operating
systems like Microsoft Windows 95, the CPU bandwidth freed up by using bus mastering IDE can be used to
complete other tasks while disk transfers are occurring. A driver is required for the IDE interface to operate as a
PCI bus master capable of supporting PIO Mode 4 devices with transfer rates up to 22 MB/sec while minimizing
the system demands upon the processor.
Detailed information on the PCIset is available in the Intel 82430HX PCIset data sheet.
NATIONAL SEMICONDUCTOR PC87306B SUPER I/O CONTROLLER
Control for the integrated serial ports, parallel port, floppy drive, RTC and keyboard controller is incorporated into a single
component, the National Semiconductor PC87306B. This component provides:
• Two NS16C550-compatible UARTs with send/receive 16 byte FIFO
— Support for an IrDA compliant Infra Red interface
• Multi-mode bi-directional parallel port
— Standard mode; IBM
— Enhanced Parallel Port (EPP) with BIOS/Driver support
— High Speed mode; Extended Capabilities Port (ECP) compatible
• Industry standard floppy controller with 16 byte data FIFO (2.88 MB floppy support)
• Integrated Real Time Clock accurate within +/- 13 minutes/yr at 25º C and 5 volts when the system is continuously
powered on
• Integrated 8042 compatible keyboard controller
†
and Centronics† compatible
The PC87306B is normally configured by the BIOS automatically. However configuration of these interfaces is possible via
the CMOS Setup program that can be invoked during boot-up. The serial ports can be enabled as COM1, COM2, IrDA, or
disabled. The parallel port can be configured as normal, extended, EPP/ECP, or disabled. The floppy interface can be
configured for 360 KB or 1.2 MB 5¼” media or for 720 KB, 1.2 MB, 1.44 MB, or 2.88 MB 3½” media. Header pins located
near the back of the board allow cabling to use these interfaces
FLOPPY CONTROLLER
The PC87306B is software compatible with the DP8473 and 82077 floppy disk controllers. The floppy interface
can be configured for 360 KB or 1.2 MB 5¼” media or for 720 KB, 1.2 MB, 1.44 MB, or 2.88 MB 3½” media in
the BIOS setup. By default, the Floppy A interface is configured for 1.44 MB and Floppy B is disabled. Another
setup option prevents the user from being able to write to floppy. Configuring the floppy interface for 1.2 MB 3
½” (3-mode floppy) requires the use of a driver to operate correctly.
KEYBOARD INTERFACE
PS/2 keyboard/mouse connectors are located on the back panel side of the motherboard. The 5V lines to these
connectors are protected with a PolySwitch
connection after an over-current condition is removed. While this device eliminates the possibility of having to
replace a fuse, care should be taken to turn off the system power before installing or removing a keyboard or
mouse. The system BIOS can detect and correct keyboards and mice plugged into the wrong PS/2
connector.
†
circuit which acts much like a self-healing fuse, re-establishing the
The integrated 8042 microcontroller contains the AMI Megakey keyboard/mouse controller code which, besides
providing traditional keyboard and mouse control functions, supports Power-On/Reset (POR) password protection.
The POR password can be defined by the user via the Setup program. The keyboard controller also provides for
the following "hot key" sequences:
• <CTRL><ALT><DEL>: System software reset. This sequence performs a software reset of the system by jumping to
the beginning of the BIOS code and running the POST operation.
• <CTRL><ALT><+> and <CTRL><ALT><->: Turbo mode selection. <CTRL><ALT><-> sets the system for de-
turbo mode, emulating an 25 MHz AT, and <CTRL><ALT><+> sets the system for turbo mode. Changing the
Turbo mode may be prohibited by an operating system, or when the CPU is in Protected mode or virtual x86 mode
under DOS.
• <CTRL><ALT><defined in setup>: Power down and coffee-break key sequences take advantage of the SMM
features of the Pentium Processor to greatly reduce the system’s power consumption while maintaining the
responsiveness necessary to service external interrupts.
REAL TIME CLOCK, CMOS RAM AND BATTERY
The integrated Real Time Clock (RTC) is DS1287 and MC146818 compatible and provides a time of day clock
and a 100-year calendar with alarm features. The RTC can be set via the BIOS SETUP program. The RTC also
supports a 242-byte battery-backed CMOS RAM area in two banks. This area is reserved for BIOS use. The
CMOS RAM can be set to specific values or cleared to the system default values using the BIOS SETUP program.
Also, the CMOS RAM values can be cleared to the system defaults by using a configuration jumper on the
motherboard. Table B-1, in Appendix B, lists the configuration jumper settings.
An external coin-cell style battery provides power to the RTC and CMOS memory. The battery has an estimated
lifetime of three years if the system is not plugged into the wall socket. When the system is plugged in, power is
supplied from the LPX power supply’s 5v standby current to extend the life of the battery. See Appendix A for
information regarding replacement batteries.
IRDA (INFRA-RED) SUPPORT
A 5-pin interface on the front panel I/O connector is provided to allow connection to a Hewlett Packard HSDSL1000 compatible Infra-red (IrDA) transmitter/receiver. Once the module is connected to the front panel I/O
header, serial port 2 can be re-directed to the IrDA module, allowing the user to transfer files to or from portable
devices such as laptops, PDA’s and printers using application software such as LapLink. The IrDA specification
provides for data transfers at 115 Kbps from a distance of 1 meter.
PARALLEL PORT
The Parallel port can be configured in the BIOS setup as output only compatible mode, bi-directional mode, ECP
or EPP modes. The highly flexible parallel port can also be assigned to I/O addresses 278H, 378H, or 3BCH and
IRQ’s 5 or 7. Furthermore, a routable DMA scheme allows Plug ‘N’ Play operating systems such as Windows 95
to route either DMA channel 1 or 3 to the parallel port for ECP mode. EPP BIOS support must be provided by a
device driver or TSR.
GRAPHICS SUBSYSTEM
The ATI-264VT controller is a highly integrated multimedia graphics & video controller for PCI bus systems. The VT
achieves enhanced performance with an all in one design that integrates a video scaler, a color space converter, a true color
palette DAC, and a triple clock synthesizer with ATI’s proven Mach64
register compatible with ATI’s Mach64 accelerator series, and therefore is immediately compatible with a wide range of
software applications and drivers.
As a manufacturing option, the Advanced/RH board is also available with an ATI-264CT video controller and 1 MB of
EDO video DRAM, upgradeable to a total of 2 MB by adding 1 MB of socketed video DRAM.
Graphics drivers and utilities for Windows† 3.11 or for Windows 95 are supplied with the Advanced/RH
motherboard.
AUDIO SUBSYSTEM
The Advanced/RH offers three audio options for the OEM. The consumer audio option uses an onboard header to route
audio to a riser card in the I/O panel. Consumer audio also includes a wave table upgrade header for future expansion.
The business audio option includes mike and line jacks on the motherboard next to the mouse and keyboard connectors. A
third option is to have the board with no on-board audio.
The Advanced/RH audio subsystem is based upon the Creative Labs Vibra 16S audio controller and
Yamaha OPL3 FM
synthesizer. The controller features a 16-bit stereo audio sub-system as a factory installed option along with the OPL3 FM
synthesizer. The Vibra 16S controller provides all the digital audio and analog mixing functions required for recording a nd
playing of audio on personal computers. These functions include stereo analog-to-digital and digital-to-analog converters,
analog mixing, anti-aliasing and reconstruction filters, line and microphone level inputs, and digital audio compression via
selectable A-law / µlaw, and full digital control of all mixer and volume control functions.
VIBRA 16S RESOURCE MAP
Base Address (software configured)
220H - 22FH(Default) or
240H - 24FH or
260H - 26FH or
280H - 28FH
Audio software and utilities are provided for the Advanced/RH motherboard. A Windows setup program
installs all of the software programs and utilities onto the system hard drive. Included in the Creative
audio software are DOS utilities that allow the user to play a CD-ROM, control sound volume and mixer
settings, run diagnostics, and switch between Sound Blaster Pro and Windows Sound System modes.
Windows drivers and utilities include the Windows sound driver, audio input control panel, audio mixer
control panel, and a business audio transport utility.
UNIVERSAL SERIAL BUS (USB)
When B0 steppings of PIIX 3 are used in manufacturing, USB connectors may be added as a manufacturing option
to support the new technology. The USB connector will occupy the serial 2 connector location, and there is a
header to reroute COM2 to a breakout in the chassis or IO panel if the customer so desires.
Connectors
MOTHERBOARD CONNECTORS
There are connectors on-board for Floppy, IDE, Graphics memory upgrade sockets, VESA† feature connector,
SIMMs, CELP cache modules, battery holder and front panel I/O connectors.
When used with a power supply that supports remote power on/off, the Advanced/RH motherboard can
turn off the system power via software control (“soft-off”). The Powerman utility supplied for Windows
3.1x allows for soft-off as does the shutdown icon in Windows 95 Start menu. The system BIOS will turn
the system power off when it receives the proper APM command from the OS. For example, Windows
95 will issue this APM command when the user selects the “Shutdown the computer” option. Note that
APM must be enabled in the system BIOS and OS in order for the soft-off feature to work correctly.
Power supplies that support “soft-off” connect to the motherboard via the 3-pin “PWS CNTRL”
connector, which is a Molex 2695 connector featuring a security latch for reliability. In order for the
system to recognize the presence of a “soft-off” power supply, the supply must tie pin 3 of the PWS
Control connector to ground.
FRONT PANEL CONNECTIONS (J3A1, J2A1)
The Advanced/RH motherboard provides header connectors to support functions typically located on the chassis
bezel. Refer to Appendix G for exact pinout definitions for all of the connectors. Front panel features supported
include:
The external speaker provides error beep code information during the Power-On Self Test if the system cannot
use the video interface. If no speakers are plugged into the audio output jack, the audio output is redirected to
the external PC speaker.
SLEEP / RESUME
When Advanced Power Management (APM) is activated i n the system BIOS and the operating system’s
APM driver is loaded, Sleep mode (Stand-By) can be entered in one of three ways: an optional front panel
“Sleep/Resume” button, a user defined keyboard hot key, or prolonged system inactivity. The
Sleep/Resume button is supported by a 2-pin header located on the front panel I/O connector. Closing the
“Sleep” switch will generate an SMI (System Management Interrupt) to the processor which immediately
goes into System Management Mode (SMM), the so called “Sleep” mode. The front panel “Sleep mode”
switch must be a momentary two pin SPST type that is normally open. The function of the Sleep/Resume
button can also be achieved via a keyboard hot-key sequence, or by a time-out of the system inactivity
timer. Both the keyboard hot-key and the inactivity timer are programmable in the BIOS setup (timer is
set to 10 minutes by default). To re-activate the system, or “Resume”, the user must simply press the
sleep/resume button again, or use the keyboard or mouse. Note that mouse activity will only “wake up”
the system if a mouse driver is loaded. While the system is in Stand-By or “sleep” mode it is fully
capable of responding to and servicing external interrupts (such as incoming fax) even though the monitor
will only turn on if a user interrupt (keyboard/mouse) occurs as mentioned above. This interface is also
supported by pins 1 and 2 of the PS SLEEP connector.
INFRA-RED (IRDA) CONNECTOR
Serial port 2 can be configured to support an IrDA module via a 5 pin header connector . Once
configured for IrDA, the user can transfer files to or from portable devices such as laptop computers,
PDA’s or printers using application software such as Traveling Software’s LapLink. The IrDA
specification provides for data transfers at 115 Kbps from a distance of 1 meter.
RESET
This 2-pin header can be connected to a momentary SPST type switch that is normally open. When the switch
is closed, the system will hard reset and run POST.
There are two methods of accessing the audio features on the Advanced/RH. The method installed depends on the
audio option that has been selected. For business audio, audio is accessed using audio jacks provided on the
motherboard. These two 1/8” jacks supply Line Out, and Mic In connections and are available through the back
I/O panel.
MIDI/AUDIO I/O CONNECTOR
Consumer audio is provided by using an audio riser card connected to the audio/midi connector of the
motherboard. The audio riser card contains all of the necessary audio jacks (Speaker Out, Line In, Mic
In) and the game port. It plugs into a 34-pin header connector on the motherboard. An example of the
consumer audio riser card is shown below. The audio connectors are 1/8” stereo jacks
.
Figure 5. Advanced/RH Consumer audio I/O module
CD-ROM AUDIO INPUT
A four pin connector is provided for interfacing the audio output stream from a CD-ROM reader into the
audio sub-system mixer. This connector is compatible with the typical cable that is supplied with CDROM readers for interfacing to audio add-in cards. This feature is available in both consumer and
business audio options.
An eight pin header is provided as part of the consumer audio option to connect to a wave table upgrade
card for richer sound quality in both DOS and Windows environments. The wave table upgrade module
is simply installed into a standard ISA slot with a cable routed to the connector.
Compatible wave table upgrade cards are available from several venders; the ICS WaveFront upgrade
module and the CrystaLake Series 2000 wave table product family add a complete General MIDI
compatible music solution to the Advanced/RH based system.
For more information on CrystaLake products Contact CrystaLake Mulitmedia at
http://www.teleport.com/~crystal, or (503) 222-2603 ext. 209
The back panel provides external access to PS/2 style keyboard and mouse connectors as well as two serial and one
parallel port, which are integrated on the Advanced/RH motherboard. If a USB connector is present, COM2 can be
routed to a back panel knockout from the COM2 header on the motherboard. Audio jacks for Speaker Out and
Microphone are provided for business audio on the back I/O panel. By adding an audio riser for consumer audio
solutions a Midi/Game port can be made available through an ISA panel. Figure 5 shows the general location of
the I/O connectors. Business audio jacks and the consumer audio/midi riser are mutually exclusive features.
Tables 3 and 4 list the measured current and voltage requirements for the Advanced/RH motherboard configured
with 16 MB of DRAM. Table 5 lists the typical power consumed by the same configuration.. This information is
preliminary and is provided only as a guide for calculating approximate total system power usage with additional
resources added.
Voltage
DC VoltageAcceptable tolerance
+3.3V+/- 5%
+5V+/- 5%
+5V SB (stand by)+/- 5%
-5V+/- 5%
+12V+/- 5%
-12V+/- 5%
Table 3. Advanced/RH Voltage tolerance
Current and Power
AC (watts)DC (amps)
No APM enabled
DOS prompt28
Windows95 @1024x76828
APM enabled
DOS prompt24.3
Windows95 @1024x76824.4
Suspended20.3
System Configuration
Table 4. Advanced/RH Power and Current Requirements
System Configuration
Advanced/RH motherboard, 166 MHz Pentium Processor, 24 MB EDO
512K x 32 (2 MB)4MB1
1M x 32 (4 MB)8MB
2M x 32 (8 MB)16MB
4M x 32 (16 MB)32MB
8M x 32 (32 MB)64MB2
16M x 32 (64MB)128MB2
32M x 32 (128MB)256MB2
Table A-1. Supported Memory SIMM Sizes and Configuration
Note 1: 512K x 32 SIMMs are supported, however, they must be double sided SIMMs
Note: 2 When using Single Sided High Density SIMMs such as 32 MB single sided, 64 MB double sided, or 128
MB SIMMs, SIMMs that have less than 32 MB per side will NOT be recognized in the system.
The Advanced/RH will support both Fast Page DRAM or EDO DRAM SIMMs, but they cannot be mixed within
the same memory bank. If Fast Page DRAM and EDO DRAM SIMMs are installed in separate banks, each bank
will be optimized for maximum performance. Parity or ECC generation and detection are supported when parity
SIMMs are the only SIMMs present on the motherboard. SIMM requirements are 70 ns Fast Page Mode o r 60 n s
EDO DRAM with tin-lead connectors.
8 MB is the minimum memory size supported by the Advanced/RH motherboard. 512 MB is the maximum
memory that can be supported in any combination of SIMMs from the table.
REAL TIME CLOCK BATTERY REPLACEMENT
The battery can be replaced with a Sanyo CR2032, or equivalent, coin cell lithium battery. This battery has a 220
mAh rating.
CPU UPGRADE
A Type 7 Zero Insertion Force (ZIF) socket provides users with a performance upgrade path to the P54CTB
OverDrive technology. LPX form factor makes it easier for the end user to replace the processor.
GRAPHICS MEMORY UPGRADE
The ATI-264VT graphics subsystem has either 1 or 2MB of SGRAM soldered down on the base board.
Video memory can be upgraded with a daughter card that is compatible with ATI PCI add in cards.
Information on the memory upgrade can be obtained by contacting ATI Technologies at the numbers listed
below in the HARDWARE MPEG MODULE section.
ATI provides a hardware MPEG module that will work with the Advanced/RH. This module mounts onto
connector J1H1, and uses mounting holes provided on the motherboard. This modul is also known as the
ATI Multimedia Controller, or AMC.
For more information contact ATI Technologies at http://www.atitech.ca, or
These allow the motherboard to be switched between different speeds of the Pentium processor. These jumpers
also affect the PCI and ISA clock speeds according to the following table:
The ISA clock is derived from the PCI bus clock. The BIOS automatically sets the ISA clock speed to one fourth of
the PCI frequency.
PCI FrequencyISA clock speed
25 MHz6.25 MHz
30 MHz7.5 MHz
33 MHz8.25 MHz
Table B-3. ISA clock settings set by the BIOS based on PCI Clk Speed
CMOS -J4L1 A PINS 4-6
Allows CMOS settings to be reset to default values by moving the jumper from pins 4-5 to pins 5-6 and turning the
system on. When the system reports “NVRAM cleared by jumper”, the system can be turned off and the jumper
should be returned to the 4-5 position to restore normal operation. This procedure should be done whenever the
system BIOS is updated. Default is for this jumper to be on pins 4-5.
PCI Freq.
(MHz)
33
30
33
30
33
30
25
-
PSWD -J4L1 A PINS 1-3
Allows system password to be cleared by moving the jumper from pins 1-2 to pins 2-3 and turning the system on.
The system should then be turned off and the jumper should be returned to the 1-2 position to restore normal
operation. This procedure should only be done if the user password has been forgotten. The password function is
effectively disabled if this jumper is in the 2-3 position. Default is for the password to be enabled (1-2 position).
SETUP - J4L1 B PINS 1-3
Allows access to CMOS Setup utility to be disabled by moving this jumper from the 1-2 position to the 2-3
position. Default is for access to setup to be enabled (1-2 position).
RISER - J4G1
The riser jumper block allows routing of an extra IRQ and ID select to the riser card for an additional PCI slot to
support a maximum of 3 PCI slots on a riser. Default is set for 2 PCI slots on the riser card (1-2 position and 4-5
position).
Sets the CPU voltage to either standard voltage (3.3v), or OverDrive (3.6v). The Default setting is for a jumper to
connect pin 5-6 for standard voltage. Move the jumper to connect pins 4-5 to select OverDrive voltage.
RECOVERY JUMPER - J6C2
This jumper should be set to normal mode, Pins 1-2, and should only be moved when a recovery is being
performed, i.e. jumper 2-3.
1024K-512M100000-20000000511MExtended Memory
960K-1023KF0000-FFFFF64KAMI System run time BIOS
944K-959KEC000-EFFFF16KMain BIOS Recovery Code
936K-943KEA000-EBFFF8KESCD (Plug ‘N’ Play configuration area)
928K-935KE8000-E9FFF8KOEM LOGO (available as UMB)
896K-927KE0000-E7FFF32KBIOS RESERVED (Currently available as UMB)
800-895KC8000-DFFFF96KAvailable HI DOS memory (open to ISA and PCI bus)
640K-799KA0000-C7FFF160KOff-board video memory and BIOS
639K9FC00-9FFFF1KExtended BIOS Data (moveable by QEMM, 386MAX)
512K-638K80000-9FBFF127KExtended conventional
0K-511K00000-7FFFF512KConventional
Table C-1. Advanced/RH Memory Map
The table above details the Advanced/RH memory map. The ESCD area from EA000-EBFFF is not available for use
as an Upper Memory Block (UMB) by memory managers. The area from E0000-E7FFF is currently not used by the
BIOS and is available for use as UMB by memory managers. Parts of this area may be used by future versions of the
BIOS to add increased functionality.
The 82430HX PCIset uses Configuration Mechanism 1 to access PCI configuration space. The PCI Configuration
Address register is a 32-bit register located at CF8h, the PCI Configuration Data register is a 32-bit register located
at CFCh. These registers are only accessible by full DWORD accesses. The table below lists the PCI bus and device
numbers used by the motherboard.
0Reserved, Interval Timer
1Reserved, Keyboard buffer full
2Reserved, Cascade interrupt from slave PIC
3Serial Port 2
4Serial Port 1
5Audio
6Floppy
7Parallel Port 1
8Real Time Clock
9User available
10User available
11Audio
12Onboard Mouse Port
13Reserved, Math coprocessor
14Primary IDE
15Secondary IDE if present, else user available
Table F-1. Advanced/RH Interrupts
DMAData WidthSystem Resource
08- or 16-bitsAudio
18- or 16-bitsAudio
28- or 16-bitsFloppy
38- or 16-bitsParallel Port (for ECP/EPP Config.)
4Reserved - Cascade channel
516-bitsOpen
616-bitsOpen
716-bitsOpen
1DCD
2Serial In - (SIN)
3Serial Out - (SOUT)
4DTR5GND
6DSR7RTS8CTS9RI
USB J5N2 REPLACES COM2
PinSignal Name
1VCC
2USBP03USBP0
4GND
5VCC
6USBP17USBP1
8GND
LINE OUT J9N2
PinSignal Name
1Line Out
MIC IN J8N2
PinSignal Name
1Line Out
PARALLEL PORT J3N1
Signal NamePinPinSignal Name
STROBE-114AUTO FEED-
Data Bit 0215ERRORData Bit 1316INITData Bit 2417SLCT INData Bit 3518Ground
Data Bit 4619Ground
Data Bit 5720Ground
Data Bit 6821Ground
Data Bit 7922Ground
Reset IDE12Ground
Host Data 734Host Data 8
Host Data 656Host Data 9
Host Data 578Host Data 10
Host Data 4910Host Data 11
Host Data 31112Host Data 12
Host Data 21314Host Data 13
Host Data 11516Host Data 14
Host Data 01718Host Data 15
The Advanced/RH motherboard uses an Intel BIOS, which is stored in Flash EEPROM and easily upgraded using
a floppy disk-based program. BIOS upgrades can be down loaded from the Intel Applications Support electronic
bulletin board service, or the Intel FTP site. In addition to the Intel BIOS, the Flash EEPROM also contains the
Setup utility, Power-On Self Tests (POST), APM 1.1, the PCI auto-configuration utility, and Windows 95 ready
Plug ‘N’ Play. This motherboard also supports system BIOS shadowing, allowing the BIOS to execute from 64-bit
on-board write-protected DRAM.
The BIOS displays a sign-on message during POST identifying the type of BIOS and a five-digit revision code.
The initial production BIOS in the Advanced/RH will be identified as 1.00.01.CV0.
Information on BIOS functions can be found in the IBM PS/2 and Personal Computer BIOS Technical Reference
published by IBM, and the ISA and EISA Hi-Flex AMIBIOS Technical Reference published by AMI. Both manuals
are available at most technical bookstores.
FLASH MEMORY IMPLEMENTATION
The Intel 2 Mb Flash component is organized as 32 x 8 (256 KB). The Flash device is divided into five
areas, as described in Table H-1.
System AddressFLASH Memory Area
F0000HFFFFFH64 KB Main BIOS
EC000HEFFFFH16 KB System BIOS RECOVERY
EA000HEBFFFH8 KB Plug ‘N’ Play ESCD Storage Area
E8000HE9FFFH8 KB OEM Logo Area
E0000HE7FFFH32 KB System BIOS Reserved during boot
Table H-1. Flash memory organization
BIOS UPGRADES
Flash memory makes distributing BIOS upgrades easy. A new version of the BIOS can be installed from
a diskette. BIOS upgrades are available to be down loaded from the secure section on the Intel bulletin
board, or Intel’s FTP site.
The disk-based Flash upgrade utility, FMUP.EXE, has three options for BIOS upgrades:
• The Flash BIOS can be updated from a file on a disk;
• The current BIOS code can be copied from the Flash EEPROM to a disk file as a backup in the event that a n
upgrade cannot be successfully completed; or
• The BIOS in the Flash device can be compared with a file to ensure the system has the correct version.
The upgrade utility ensures the upgrade BIOS extension matches the target system to prevent accidentally
APM is enabled in BIOS by default, however, the system must be configured with an APM driver (such
as Power.exe for DOS or vpowerd.386 for Windows 3.x) in order for the system power saving features to
take effect. Windows 95 will enable APM automatically upon detecting the presence of the APM BIOS.
LANGUAGE SUPPORT
The BIOS setup screen and help messages are supported in 32 languages. There are 5 languages
translated at this time for use; American English, German, Italian, French, and Spanish. Translations of
other languages will available at a later date.
With a 1 Mb Flash BIOS, only one language can be resident at a time. The default language is American
English, and will always be present unless another language is programmed into the BIOS using the Flash
Memory Update Program (FMUP) available on the Intel BBS.
PCI IDE
The two local bus IDE connectors with independent I/O channel support are setup up automatically by
the BIOS if the user selects “Autoconfiguration” in setup. The IDE interface supports PIO Mode 3 and
Mode 4 hard drives and recognition of ATAPI CD-ROMs, tape drives, and any other ATAPI devices. The
BIOS will determine the capabilities of each drive and configure them to optimize capacity and
performance. For the high capacity hard drives typically available today, the drive will be automatically
configured for Logical Block Addressing (LBA) for maximum capacity and to PIO Mode 3 or 4
depending on the capability of the drive. The user is able to override the auto-configuration options by
using the manual mode setting.
BOOT OPTIONS
Booting from CD-ROM is supported in adherence to the “El Torito” bootable CD-ROM format
specification developed by Phoenix Technologies and IBM. Under the Boot Options field in setup, CD-ROM is one of four possible boot devices defined in priority order. The default setting is for floppy to be
the primary boot device and hard drive to be the secondary boot device and CD-ROM to be the third
device. The forth device is set to disabled in the default configuration.. The user can also select network
as a boot device. The network option allows booting from a network add-in card with a remote boot
ROM installed.
NOTE: A copy of “El Torito” is available on Phoenix Web page.
FLASH LOGO AREA
Advanced/RH supports a 4 KB programmable flash user area located at EC000-ECFFF. An OEM may
use this area to display a custom logo. The Advanced/RH BIOS accesses the user area just after
completing POST. A utility called USRLUTIL is available on the Intel BBS to assist with installing a
logo into flash for display during POST.
SECURITY FEATURES
Administrative Password
If enabled, the administrative password protects all sensitive Setup options from being changed by a user
unless the password is entered. Without the proper password the user will be able to configure only the User
password and the power management hot key fields. The User password does not alter the protection
provided by the Administrative password.
User Password
The User Password feature provides security, preventing the system from booting or entering setup unless the
user selected password is entered during the boot process,. The user password can be set using the Setup
utility, and must be entered prior to peripheral boot or keyboard/mouse operation.
The following PCI messages are displayed as a group with bus, device and function information.
<'NVRAM Checksum Error, NVRAM Cleared'>, \ ; String
<'System Board Device Resource Conflict'>, \ ; String
<'Primary Output Device Not Found'>, \ ; String
<'Primary Input Device Not Found'>, \ ; String
<'Primary Boot Device Not Found'>, \ ; String
<'NVRAM Cleared By Jumper'>, \ ; String
<'NVRAM Data Invalid, NVRAM Cleared'>, \ ; String
<'Static Device Resource Conflict'>, \ ; String
The following messages chain together to give a message such as:
"PCI I/O Port Conflict: Bus: 00, Device 0D, Function: 01".
If and when more than 15 PCI conflict errors are detected the log full message is displayed.
<'PCI I/O Port Conflict:'>, \ ; String
<'PCI Memory Conflict: '>, \ ; String
<'PCI IRQ Conflict: '>, \ ; String
<' Bus '>, \ ; String
<', Device '>, \ ; String
<', Function '>, \ ; String
<‘,PCI Error Log is Full.'>, \ ; String
<'Floppy Disk Controller Resource Conflict '>, \ ; Text
<'Primary IDE Controller Resource Conflict '>, \ ; Text
<'Secondary IDE Controller Resource Conflict '>, \ ; Text
<'Parallel Port Resource Conflict '>, \ ; Text
<'Serial Port 1 Resource Conflict '>, \ ; Text
<'Serial Port 2 Resource Conflict '>, \ ; Text
Appendix J−− AMIBIOS Error messages and Beep Codes
Errors can occur during POST (Power On Self Test) which is performed every time the system is powered on. Fatal
errors, which prevent the system from continuing the boot process, are communicated through a series of audible
beeps. Other errors are displayed in the following format:
ERROR Message Line 1
ERROR Message Line 2
For most displayed error messages, there is only one message. If a second message appears, it is "RUN SETUP". If
this message occurs, press <F1> to run AMIBIOS Setup.
BEEP CODES
BeepsError MessageDescription
1Refresh FailureThe memory refresh circuitry on the motherboard is faulty.
2Parity ErrorParity is not supported on this product, will not occur.
3Base 64 KB Memory FailureMemory failure in the first 64 KB.
4Timer Not OperationalMemory failure in the first 64 KB of memory, or Timer 1 on the motherboard is not
functioning.
5Processor ErrorThe CPU on the motherboard generated an error.
68042 - Gate A20 FailureThe keyboard controller (8042) may be bad. The BIOS cannot switch to protected
mode.
7Processor Exception Interrupt ErrorThe CPU generated an exception interrupt.
8Display Memory Read/Write ErrorThe system video adapter is either missing or its memory is faulty. This is not a fatal
error.
9ROM Checksum ErrorROM checksum value does not match the value encoded in BIOS.
CMOS Time and Date Not SetRun Standard CMOS Setup to set the date and time in CMOS RAM.
Diskette Boot FailureThe boot disk in floppy drive A: is corrupt. It cannot be used to boot the system. Use another boot disk
and follow the screen instructions.
Display Switch Not ProperThe display jumper is not implemented on this product, this error will not occur.
DMA ErrorError in the DMA controller.
DMA #1 ErrorError in the first DMA channel.
DMA #2 ErrorError in the second DMA channel.
FDD Controller FailureThe BIOS cannot communicate with the floppy disk drive controller. Check all appropriate connections
after the system is powered down.
HDD Controller FailureThe BIOS cannot communicate with the hard disk drive controller. Check all appropriate connections
after the system is powered down.
INTR #1 ErrorInterrupt channel 1 failed POST.
INTR #2 ErrorInterrupt channel 2 failed POST.
Invalid Boot DisketteThe BIOS can read the disk in floppy drive A:, but cannot boot the system. Use another boot disk.
Keyboard Is Locked...Unlock ItThe keyboard lock on the system is engaged. The system must be unlocked to continue.
Keyboard ErrorThere is a timing problem with the keyboard. Set the Keyboard option in Standard CMOS Setup to Not
Installed to skip the keyboard POST routines.
KB/Interface ErrorThere is an error in the keyboard connector.
Off Board Parity ErrorParity error in memory installed in an expansion slot. The format is:
OFF BOARD PARITY ERROR ADDR (HEX) = (XXXX)
XXXX is the hex address where the error occurred.
On Board Parity ErrorParity is not supported on this product, this error will not occur.
Parity Error ????Parity error in system memory at an unknown address.
ISA NMI MESSAGES
ISA NMI MessageExplanation
Memory Parity Error at xxxxxMemory failed. If the memory location can be determined, it is displayed as xxxxx. If not, the message is
Memory Parity Error ????.
I/O Card Parity Error at xxxxxAn expansion card failed. If the address can be determined, it is displayed as xxxxx. If not, the message is
I/O Card Parity Error ????.
DMA Bus Time-outA device has driven the bus signal for more than 7.8 microseconds.
The Advanced/RH design supports Soft-off control via the SMM code in the BIOS. The CS1 pin out of the National
306B Ultra I/O controller is connected to the Soft-off control line in our power supply circuit.
The registers in the Ultra I/O controller that sets the I/O address and control of the CS1 pin is NOT setup until the
SMM code is activated. The code performs the following operations:
OUT 0Ch to I/O port 2Eh
OUT 75h to I/O port 2Fh
OUT 11h to I/O port 2Eh
OUT 00h to I/O port 2Fh
OUT 0Dh to I/O port 2Eh
OUT A0h to I/O port 2Fh
After setting the above registers, any read operation to I/O location 75H will trigger the Soft-off circuit and turn the
power supply off.