Intel 281786-002 User Manual
Advanced/ZP
Baby-AT Board
Technical Product Summary
®
Version 2
July, 1995
Order Number 281786-002
Advanced/ZP Technical Product Summary
Table of Contents
Introduction.......................................................................................................................................................................... 3
Board Level Features...........................................................................................................................................................5
CPU
Performance Upgrade
Second Level Cache
System Memory
Expansion Slots
Peripheral Component Interconnect (PCI) PCIset
National Semiconductor 87306 Super I/O Controller
System BIOS
Security Features
Connectors
Power Consumption
Appendix A − User-Installable Upgrades.......................................................................................................................... 14
Appendix B − Jumpers and Switches................................................................................................................................15
Appendix C − I/O Map......................................................................................................................................................17
Appendix D − Memory Map.............................................................................................................................................. 18
Appendix E − Interrupts & DMA Channels ..................................................................................................................... 18
Appendix F − Connectors .................................................................................................................................................. 19
Appendix G − BIOS Setup.................................................................................................................................................23
Appendix H − BIOS Recovery...........................................................................................................................................33
Appendix I − Error messages and Beep Codes ................................................................................................................. 34
Appendix J − Environmental Standards...........................................................................................................................36
Appendix K − Reliability Data..........................................................................................................................................36
Intel Corporation disclaims all warranties and liabilities for the use of this document and the information contained herein, and assumes no responsibility
for any errors which may appear in this document. Intel makes no commitment to update the information contained herein, and may make changes at any
time without notice. There are no express or implied licenses granted hereunder to any intellectual property rights of Intel Corporation or others to design
or fabricate Intel integrated circuits or integrated circuits based on the information in this document.
Contact your local sales office to obtain the latest specifications before placing your order.
*other product and corporate names may be trademarks or registered trademarks of other companies, and are used only for explanation and to the
owners’ benefit, without intent to infringe.
INTEL CORPORATION, 1995
Advanced/ZP Technical Product Summary • Page 2
Introduction
8.60"
10.0"
0.20"
5.60"
9.60"
3.50"
0.20"
0.0"
0.0"
0.70"
0.80"
3.80"
0.65"
4.00"
8.40"
PIN 1
The Intel Advanced/ZP baseboard features the Pentium processor in a Baby-AT form factor with integrated I/O.
Advanced/ZP baseboards are focused on providing the best possible performance at the lowest possible price for mainstream
desktop computers.
Advanced/ZP is a flexible baseboard which is available with the 75 MHz, 90 MHz, 100 MHz, or 120 MHz Pentium processor.
The processor is complemented by a standard 256 KB asynchronous SRAM second level write-back cache and support for up
to 128 MB of Fast Page or EDO DRAM. A Pentium OverDrive socket (Socket 5) provides access to future performance
enhancements.
The Advanced/ZP baseboard offers outstanding I/O capabilities starting with the full set of I/O, including a floppy drive
interface, dual channel PCI local bus IDE interfaces, two serial ports with FIFOs, an EPP/ECP capable parallel port, and an
infrared (IrDA) port. Two dedicated PCI local bus slots, and one shared PCI/ISA slot, provide a high bandwidth data path for
functions such as graphics that have a high data throughput requirement. The integrated Bus Mastering capable PCI IDE
controller provides two high performance IDE interfaces for hard drives and CD-ROMs. Bus mastering enhances the
performance in multi-tasking environments such as Windows* 95. The Advanced/ZP baseboard also provides three dedicated
ISA connectors and one shared PCI/ISA connector. There is one PCI full length capable slot, and three ISA full length
capable slots.
In addition to superior hardware capabilities, features like Windows 95-ready Plug and Play and Advanced Power
Management (APM) with application restart are provided by software available from Intel for the Advanced/ZP platform.
The Advanced/ZP baseboard provides the foundation for cost effective, high performance, highly expandable platforms which
deliver the latest in CPU and I/O technology.
Although the Advanced/ZP will support CGA emulation by VGA cards, it will not support CGA cards.
ADVANCED/ZP FORM FACTOR
The Advanced/ZP baseboard is designed to fit into a standard Baby-AT form factor chassis. Figure 1 illustrates the
mechanical form factor for the Advanced/ZP. The actual dimensions of the Advanced/ZP baseboard do not strictly adhere to
the standard Baby-AT guidelines, and exceptions to the standard are listed in the Baseboard Design Exceptions section.
Pentium™
Processor
Figure 1. Advanced/ZP Baseboard dimensions.
Advanced/ZP Technical Product Summary • Page 3
BASEBOARD DESIGN EXCEPTIONS
BASEBOARD DIMENSIONS
The Advanced/ZP is 3.0" shorter than the Baby-AT standard. The shorter board length may require some chassis to be
modified to add additional mounting holes.
MOUNTING HOLE PLACEMENT
The mounting holes located in the bottom left and right corners of Figure 1 are pseudo Baby-AT standard and are
available in many, but not all, Baby-AT compatible chassis.
FRONT PANEL CONNECTORS
There is no front panel connector on the baseboard for a Turbo/Deturbo switch. The processor speed can be set either
through a parameter in the CMOS Setup Utility, or from the keyboard (<CTL><ALT><+> = Turbo, <CLT><ALT><-> =
Deturbo). Changing processor speed from the keyboard may be prohibited by the operating system, or when the processor
is in protected mode.
Setting the processor to deturbo (or slow) only slows the processor to the approximate equivalent of a 25 MHz clock rate,
not the standard 8 MHz clock rate.
JUMPERS/SWITCHES
There is no Color/Mono jumper/switch on the baseboard to specify Monochrome or Color video mode at boot, the BIOS
will automatically detect the type of video card installed.
Also, there is no Flash write protect jumper/switch, the BIOS needs to be able to write to FLASH to support the Plug and
Play features.
Advanced/ZP Technical Product Summary • Page 4
Board Level Features
A
B
CDEFGHI
J
K
L
M
N
OPQRS VT
U
A − Two PCI IDE interfaces
B − National 87306 I/O controller
C − Primary power connector
D − Four SIMM sockets (two banks)
E − 82438FX Triton Data Path (TDP)
F − Parallel port connector
G − Floppy drive connector
H − 256KB Secondary cache
I − 82437FX Triton System Controller (TSC)
J − Socket 5 Pentium processor socket
K− CPU voltage regulator
L − Front Panel I/O connectors
M − Configuration switch block
N − 82371FB PCI ISA/IDE Accelerator (PIIX)
O − Battery for the Real-time clock
P − Four ISA expansion connectors
Q − BIOS recovery boot jumper
R − Flash EEPROM for system BIOS
S − Three PCI expansion connectors
T − 3.3 volt power connector for PCI
U − Serial port connectors
V − AT Keyboard Connector
(Optional PS/2 style Keyboard and Mouse connectors may
be available)
Figure 2. Advanced/ZP Board Level Features
CPU
PIN 1
The Advanced/ZP baseboard is designed to operate with 3.3 volt Pentium processors. A patented on-board voltage regulator
circuit provides the required 3.3 volts from the 5 volt tap provided by a standard PC power supply. The baseboard supports
the Pentium processors at iCOMP index 610 \ 75 MHz, 735 \ 90 Mhz, 815 \ 100 Mhz, and 1000 \ 120 Mhz. The Pentium
processor is backward-compatible with the 8086, 80286, i386 and i486 CPUs. It supports both read and write burst mode
bus cycles, and includes separate 8K on-chip code and data caches which employ a write-back policy. Also integrated into
the Pentium processor is an advanced numeric coprocessor which significantly increases the speed of floating point
operations, while maintaining backward compatibility with i486DX math coprocessor and complying to ANSI/IEEE
standard 754-1985.
All Advanced/ZP baseboards support the 75 MHz and 90 MHz processors. The matrix below shows which Printed Board
Assemblies (PBA number found on the baseboard) also support the 100 MHz or 120 MHz processor.
Processor Speed Supported by PBA Numbers:
75 MHz All PBAs
90 MHz All PBAs
100 MHz PBA 638995, PBA 641525, PBA 639379
120 MHz Suffixes -606, -607, -806, -807, -808 and above
Table 1. Processor support
PERFORMANCE UPGRADE
A 320-pin Type 5 Zero Insertion Force socket provides users with a performance upgrade path to future, higher speed,
Pentium processors. An OverDrive processor being developed for use with this socket will provide performance beyond
that delivered by the originally installed Pentium processor.
SECOND LEVEL CACHE
The Pentium processor's internal cache is complemented by 256 KB direct mapped write-back second level cache. The 256
KB cache configuration is implemented with eight 32kx8 asynchronous SRAM devices for the cache data and one 32kx8
SRAM for the cache tag. The cache size is set by three configuration jumpers located on the baseboard. This is preset by the
factory to support the onboard 256 KB configuration.
Advanced/ZP Technical Product Summary • Page 5
SYSTEM MEMORY
The Advanced/ZP baseboard provides four 72-pin SIMM sites for memory expansion. The sockets support 1M x 32 (4 MB),
2M x 32 (8 MB), 4M x 32 (16 MB), and 8M x 32 (32 MB) single-sided or double-sided SIMM modules. Minimum memory
size is 8 MB and maximum memory size, using four 8M x 32 SIMM modules, is 128 MB. For external CPU speeds of less
than 60 Mhz (used with 75, 90 and 120 Mhz processors) memory timing requires 70 ns fast page devices or, for higher
performance, 70 ns EDO DRAM. For external CPU speeds of 66 Mhz (used with 100 Mhz processors) you must use 60 nS
EDO DRAM, but 70 nS fast page DRAM may still be used. Parity generation and checking is not supported by the chip set.
The four sockets are arranged as Bank 0 and Bank 1, with each bank consisting of two sockets and providing a 64-bit wide
data path. Both SIMMs in a bank must be of the same memory size and type, however Banks 0 and 1 may have different
types of memory installed. It is even possible to have 70 ns Fast Page DRAM in one bank and 60 ns EDO DRAM in the
other, in which case each bank is independently optimized for maximum performance. Bank 0 only, Bank 1 only, or both
banks may be populated. There are no jumper settings required for the memory size or type, which is automatically detected
by the system BIOS. Tin lead SIMMs are required to be used when adding Fast Page or EDO DRAM.
EDO DRAM
Extended Data Out (or Hyper Page Mode) DRAM is designed to improve the DRAM read performance. EDO DRAM
holds the memory data valid until the next CAS# falling edge, unlike standard fast page mode DRAM which tri-states
the memory data when CAS# negates to precharge for the next cycle. With EDO, the CAS# precharge overlaps the data
valid time, allowing CAS# to negate earlier while still satisfying the memory data valid window time.
EXPANSION SLOTS
Up to six expansion slots may be populated on the Advanced/ZP baseboard. There are four ISA bus expansion conectors and
three PCI expansion connectors. One slot is shared by connectors that will accommodate either an ISA or a PCI expansion
card, but not both at the same time. This accounts for the disparity between the number of slots and connectors. All three
PCI expansion slots accept PCI bus mastering cards, and fully comply with the PCI 2.10 specification. Three of the ISA
slots and one PCI slot can accommodate full length add-in cards. Interference with the processor heat sink and CPU voltage
regulator support circuitry limits the rest of the ISA and PCI slots to being able to support only half-length add-in cards.
PCI 3.3 VOLT CAPABILITIES
To maintain strict compliance with the PCI specification, the baseboard provides a connector which can be used to route
3.3 volt power to the PCI slots. The connector may be used with a separate 3.3 volt power supply or with a custom
designed voltage converter. Note: The on-board 3.3 volt regulator provides power for the CPU, PCIset and L2 cache
only, not the PCI slots.
Advanced/ZP Technical Product Summary • Page 6
PERIPHERAL COMPONENT INTERCONNECT (PCI) PCISET
The Intel Triton 82430FX PCIset consists of the 82437FX Triton System Controller (TSC), two 82438FX Triton Data Path
(TDP) devices, and one 82371FB PCI ISA/IDE Accelerator (PIIX) bridge chip. The Triton PCIset provides the following
functions:
• CPU interface control
• Integrated L2 write-back cache controller
– Pipelined Burst or standard SRAM
– 256kB or 512kB Direct Mapped
– Integrated Tag Status Bits
• Integrated DRAM controller
– 64-bit path to Memory
– Support for EDO and Fast Page DRAM
– 4 MB to 128 MB main memory
• Fully synchronous PCI bus interface
– 25/30/33 MHz
– PCI to DRAM > 100 Mbytes/sec
– PCI to DRAM posting of 12 Dwords
– 5 Dword buffers for CPU-PCI write posting
– 4 Dword buffers for PCI to Memory bus master
cycles
– Support for up to 5 PCI masters
• Interface between the PCI bus and ISA bus
• Integrated fast IDE interface
– Support for up to 4 devices
– PIO Mode 4 transfers up to 16MB/sec
– Integrated 8 x 32-bit buffer for PCI IDE burst
transfers
• Enhanced Fast DMA controller
• Interrupt controller and steering
• Counters/Timers
• SMI interrupt logic and timer with Fast On/Off mode
82437FX TRITON SYSTEM CONTROLLER (TSC)
The 82437FX provides all control signals necessary to drive a second level cache and the DRAM array, including
multiplexed address signals. It also controls system access to memory and generates snoop controls to maintain cache
coherency. The TSC comes in a 208 pin QFP package.
82438FX TRITON DATA PATH (TDP)
There are two 82438FX components which provide data bus buffering and dual port buffering to the memory array.
Controlled by the 82437FX, the 82438FX devices add one load each to the PCI bus and perform all the necessary byte
and word swapping required. Memory and I/O write buffers are included in these devices. The TDP devices are 100 pin
QFP packages.
82371FB PCI ISA/IDE ACCELERATOR (PIIX)
The 82371FB provides the interface between the PCI and ISA buses and integrates a dual channel fast IDE interface
capable of supporting up to 4 devices, seven 32-bit DMA channels, five 16-bit timer/counters, two eight-channel interrupt
controllers, PCI-to-AT interrupt mapping circuitry, NMI logic, ISA refresh address generation, and PCI/ISA bus
arbitration circuitry. The PIIX comes in a 208-pin QFP package.
TRITON DESIGN CONSIDERATIONS
Triton Memory Hole Limitation
Due the design of the Triton chipset, only one memory hole can be active at a time. The user can not set the Base
Memory size to 512 KB and enable the ISA LFB at the same time.
Triton PCI Hold Time Requirement
The Triton chipset provides less hold time than the earlier Neptune and Mercury chipsets on the PCI address and data
lines, but still is within the PCI specification. (The PCI specification calls out a 0 ns minimum hold time.) Some PCI
expansion cards do not meet this requirement, and in fact require more hold time than the Triton chipset provides.
Disabling PCI write bursting will sometimes enable these cards to function.
Advanced/ZP Technical Product Summary • Page 7
IDE SUPPORT
The Advanced/ZP baseboard provides two independent high performance bus-mastering PCI IDE interfaces capable of
supporting PIO Mode 3 and Mode 4 devices for up to 16 MB/sec transfers. Support for ATAPI devices is provided in the
system BIOS. The system BIOS also supports Logical Block Addressing (LBA) and ECHS on both IDE interfaces. When
used in conjunction with a special driver the IDE interface operates as a PCI bus master for optimum performance in a
multi-tasking environment. One such driver is provided by Intel for the Windows 95 environment.
NATIONAL SEMICONDUCTOR 87306 SUPER I/O CONTROLLER
Control for the integrated serial ports, parallel port, floppy drive, RTC and keyboard controller is incorporated into a single
component, the National Semiconductor 87306. This component provides:
• Two NS16C550-compatible UARTs with send/receive 16 byte FIFO
- Support for an IrDA compliant Infra Red interface
• Multi-mode bi-directional parallel port
- Standard mode; IBM and Centronics compatible
- Enhanced Parallel Port (EPP) with BIOS/Driver support
- High Speed mode; Enhanced Capabilities Port (ECP) compatible
• Industry standard floppy controller with 16 byte data FIFO (2.88 MB floppy support)
• Integrated Real Time Clock accurate within +/- 13 minutes/yr
• Integrated 8042 compatible keyboard controller
Configuration of these interfaces is possible via the CMOS Setup program that can be invoked during boot-up. The serial
ports can be enabled as COM1, COM2 or disabled. COM2 can alternately be configured as an IRDA port. The parallel port
can be configured as normal, extended , or disabled. The floppy interface can be configured for 720 KB, 1.2 MB, 1.44 MB,
or 2.88 MB media. Header pins located near the back of the board allow cabling to use these interfaces.
KEYBOARD INTERFACE
The AT keyboard connector is located on the back panel side of the baseboard. The 5V lines to this connector is protected
with a PolySwitch* circuit which acts much like a self-healing fuse, re-establishing the connection after an over-current
condition is removed. While this device eliminates the possibility of having to replace a fuse, care should be taken to turn
off the system power before installing or removing a keyboard.
The integrated 8042 microcontroller contains the AMI Megakey keyboard controller code which, besides providing
traditional keyboard control functions, supports Power-On/Reset (POR) password protection. The POR password can be
defined by the user via the Setup program. The keyboard controller also provides for the following "hot key" sequences:
• CTRL-ALT-DEL: System software reset. This sequence performs a software reset of the system by jumping to the
beginning of the BIOS code and running the POST operation.
• CTRL-ALT+ and CTRL-ALT-: Turbo mode selection. CTRL-ALT- sets the system for de-turbo mode, emulating a 25
MHz AT, and CTRL-ALT+ sets the system for turbo mode. Changing the Turbo mode may be prohibited by an operating
system, or when the CPU is in Protected mode or virtual 86 mode under DOS.
• CTRL-ALT-<defined in setup>: Power down and coffee-break key sequences take advantage of the SMM features of
the Pentium processor to greatly reduce the system’s power consumption while maintaining the responsiveness necessary
to service external interrupts.
REAL TIME CLOCK, CMOS RAM AND BATTERY
The integrated Real Time Clock, RTC, is accurate to within 13 minutes/year. The RTC can be set via the BIOS SETUP
Program. CMOS memory supports the standard 128-byte battery-backed RAM, fourteen bytes for clock and control
registers, and 114 bytes of general purpose non-volatile CMOS RAM. All CMOS RAM is reserved for BIOS use. The
CMOS RAM can be set to specific values or cleared to the system default values using the BIOS SETUP program. Also,
Advanced/ZP Technical Product Summary • Page 8
the CMOS RAM values can be cleared to the system defaults by using a configuration switch on the baseboard. Appendix
System Address
FLASH Memory Area
F0000H
FFFFFH
64 KB Main BIOS
B lists switch and jumper configurations.
An external coin-cell style battery provides power to the RTC and CMOS memory. The battery has an estimated lifetime
of seven years and is socketed for easy replacement. Refer to Appendix A for battery replacement details.
IRDA (INFRARED) SUPPORT
Serial port 2 can be configured to support an IrDA module via a 5 pin header connector. Once configured for IrDA, the
user can transfer files to/from portable devices such as laptops, PDA’s and printers using application software such as
LapLink. The IrDA specification provides for data transfers at up to 115kbps from a distance of 1 meter.
A 5-pin header is provided to allow connection to a Hewlett Packard HSDSL-1000 compatible Infra-red
transmitter/receiver.
SYSTEM BIOS
The Advanced/ZP baseboard uses an American Megatrends Incorporated (AMI) Pentium Processor ROM BIOS, which is
stored in Flash EEPROM and easily upgraded using a floppy disk-based program. In addition to the AMIBIOS, the Flash
EEPROM also contains the Setup utility, Power-On Self Tests (POST), update recovery code, and the PCI autoconfiguration utility. This baseboard supports system BIOS shadowing, allowing the BIOS to execute from 32-bit onboard write-protected DRAM.
The BIOS displays a sign-on message during POST identifying the type of BIOS and a five-digit revision code. As an
example the BIOS for the Advanced/ZE will be 1.00.02.BS0. As BIOS updates occur the revision number will increase to
1.00.03.BS0, and so on.
Information on BIOS functions can be found in the IBM PS/2 and Personal Computer BIOS Technical Reference
published by IBM, and the ISA and EISA Hi-Flex AMIBIOS Technical Reference published by AMI. Both manuals are
available at most technical bookstores.
FLASH IMPLEMENTATION
The Intel 28F001BXT 1 Mb FLASH component is organized as 128K x 8 (128 KB). The Flash device is divided into five
areas, as described in Table 1.
EE000H EFFFFH 8 KB Boot Block (Not FLASH erasable)
ED000H EDFFFH 4 KB Plug and Play ESCD Storage Area
EC000H ECFFFH 4 KB OEM LOGO Area
E0000H EBFFFH 48 KB System BIOS Reserved
Table 2. Flash Memory Organization
The FLASH device resides in system memory in two 64 KB segments starting at E0000H, and can be mapped two
different ways, depending on the mode of operation. In Normal Mode, address line A16 is inverted, setting the E000H
and F000H segments so that the BIOS is organized as shown in the system address column above. Recovery mode
removes the inversion on address line A16, swapping the E000H and F000H segments so that the 8 KB boot block resides
at FE000H where the CPU expects the bootstrap loader to exist. This mode is only necessary in the unlikely event that a
BIOS upgrade procedure is interrupted, causing the BIOS area to be left in an unusable state. For information on
recovering the BIOS in the event of a catastrophic failure, refer to the appendix.
BIOS UPGRADES
FLASH memory makes distributing BIOS upgrades easy. A new version of the BIOS can be installed from a diskette.
BIOS upgrades will be available as downloadable files on the Intel bulletin board.
The disk-based Flash upgrade utility, FMUP.EXE, has three options for BIOS upgrades:
Advanced/ZP Technical Product Summary • Page 9
• The Flash BIOS can be updated from a file on a disk;
• The current BIOS code can be copied from the Flash EEPROM to a disk file as a backup in the event that an
upgrade cannot be successfully completed; or
• The BIOS in the Flash device can be compared with a disk file to ensure the system has the correct BIOS version.
The upgrade utility ensures the upgrade BIOS extension matches the target system to prevent accidentally installing a
BIOS for a different type of system. A recovery jumper is provided to allow recovery in the unlikely event of an
unsuccessful BIOS upgrade. The jumper forces the ROM decode to access a 8 KB block of write protected recovery code
in the Flash device.
SETUP UTILITY
The ROM-based Setup utility allows the configuration to be modified without opening the system for most basic changes.
The Setup utility is accessible only during the Power-On Self Test, POST, by pressing the <F1> key after the POST
memory test has begun and before boot begins. A prompt may be enabled that informs the user to press the <F1> key to
access Setup. A switch on the baseboard can be set to prevent user access to Setup for security purposes. Setup options are
detailed in the BIOS appendix.
PCI AUTO-CONFIGURATION
The PCI auto-configuration utility operates in conjunction with the system Setup utility to allow the insertion and
removal of PCI cards to the system without user intervention. When the system is turned on after adding a PCI add-in
card, the BIOS automatically configures interrupts, DMA channels, I/O space, and other parameters. The user does not
have to configure jumpers or worry about potential resource conflicts. Because PCI cards use the same interrupt resources
as ISA cards, the user must specify the interrupts used by ISA add-in cards in the Setup utility. The PCI AutoConfiguration function complies with version 2.10 of the PCI BIOS specification.
ISA PLUG & PLAY
The BIOS incorporates ISA Plug and Play capabilities conforming to version 1.0a of the Plug-n-Play specification. This
will allow auto-configuration of Plug and Play ISA cards, and resource management for legacy ISA cards, when used in
conjunction with the ISA Configuration Utility (ICU).
SHADOW MEMORY
Memory from C8000-DFFFF is not shadowed. This is a change from previous Intel products using AMI BIOS. This may
have a slight adverse affect on the performance of some non-Plug and Play ISA cards. All or part of this area may be used
as shared ISA memory if needed. Video BIOS located from C0000-C7FFF is shadowed to boost performance.
POWER MANAGEMENT
The Advanced/ZP will enable you to have an Energy Star compliant system through its Advanced Power Management
resources. The Advanced/ZP BIOS supports power management via System Management Mode (SMM) interrupts to the
CPU and Advanced Power Management (APM v1.1). In general, power management capabilities will allow the system to
be put into a power managed Stand By state. This can be accomplished by pressing the sleep/resume button on the front
of the chassis, entering an user configured hot-key sequence on the keyboard, or by the expiration of a hardware timer
which detects system inactivity for a user-configurable length of time. While in the Stand By state, the Advanced/ZP
baseboard reduces the system power consumption to Energy Star levels by utilizing the power saving capabilities of the
Pentium Processor, spinning down the IDE hard drive, and turning off an Energy Star rated monitor. Add-in cards
supplied with APM-aware drivers can also be put into a power managed state for further energy savings. The ability to
respond to external interrupts is fully maintained while in Stand By mode allowing the system to service requests such as
in-coming FAX’s or network messages while unattended.
FLASH LOGO AREA
Advanced/ZP supports a 4 KB programmable FLASH user area located at EC000-ECFFF. An OEM may use this area to
display a custom logo. The BIOS accesses the user area at several points during the boot up sequence.
Advanced/ZP Technical Product Summary • Page 10
SECURITY FEATURES
ADMINISTRATIVE PASSWORD
The administrative password protects several sensitive Setup options from being viewable to a user unless the password
is entered. These sensitive fields are viewable unless the administrative password is set.
BIOS PASSWORD
A BIOS password feature provides security during the boot process. A password can be entered using the Setup utility,
and will be required on boot up before normal operation of the system can commence. To enable, disable, or change the
password, refer to the Setup program options in the appendix.
If the password is forgotten, it can be cleared by turning off the system and setting the "password clear" jumper to the
clear position.
SETUP ENABLE SWITCH
A baseboard configuration switch controls access to the BIOS Setup utility. By setting switch SW5 to the ON position,
the user is prevented from accessing the Setup utility during the Power-On Self Test or at any other time. The message
prompting the user to press <F1> to enter setup is also disabled
CONNECTORS
FRONT PANEL CONNECTIONS
The Advanced/ZP baseboard provides header connectors to support functions typically located on the chassis bezel:
• System Reset
• Power LED
• Keyboard Lock
• Hard Drive activity LED
• System Speaker
• Secondary CPU Fan
• Infra-Red (IrDA) port
• Sleep/Resume
• Turbo LED
Sleep/Resume
Infra-Red
+12v Fan
Speaker
Reset
Keylock/
Power LED
HDD LED
Turbo LED
Advanced/ZP Technical Product Summary • Page 11
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