Intel® 855GME and Intel® 852GME
Chipset Memory Controller Hub
(MCH)
Thermal Design Guide for Embedded Applications
October 2003
Revision 1.0
Order Number: 273838-001Order Number: 273838-001
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Contents
5
Introduction
Introduction1
1.1Document Objective
This document is intended to aid system designers to properly implem ent a thermal management
design to ensure reliable and efficient operation of the Intel
memory controller hubs (MCHs). The objective of thermal management for chipset MCHs is to
ensure that the temperature of product while operating in a embedded system is maintained within
functional limits. The functional temperature limit is the range within which the electrical circui ts
within the silicon can be expected to meet specified performance requirements. Operation outside
the functional limit can degrade system performance, cause logic errors, or cause component and/
or system damage. Temperatures exceeding the maximum operating limits may result in
irreversible changes in the operating characteristics of the components. This document will provide
an understanding of th e op erat ing limits of the Intel
and suggest proper thermal design techniques based on a particular configuration.
1.2Terminology
TermDefinition
DDRDouble Data Rate
Flip Chip Ball Grid Array. A package type defined by a plastic substrate on to which a die is
FCBGA
Junction
PCBPrinted Circuit Board
TcaseThe measured temperature of a component at the geometric center of the top of the die.
TDP
TIM
Tjunctiontemperature at the hottest point in the die
MCHMemory Controller Hub, also referred to as chipset MCH
OEMOriginal Equipment Manufacturer
mounted using an underfill C4 (Controlled Collapse Chip Connection) attach style. The
primary electrical interface is an array of solder balls attached to the substrate opposite the
die.
Refers to a P-N junction on the silicon. In this document it is used as a temperature reference
point for the hottest point on the die (e.g., θ
resistance).
Thermal Design Power. Thermal solutions should be designed to dissipate this target power
level. The thermal design power is specified as the highest sustainable power level of most or
all of the real applications expected to be run on the given product, based on extrapolations in
both hardware and software technology over the life of the component. Thermal solutions
should be designed to dissipate this target power level.
Thermal Interface Material. This material is designed to fill surface voids between the die and
heat sink surfaces in order to facilitate heat transfer.
®
855GME and Intel® 852GME chipset
®
855GME and Intel® 852GME chipset MCHs
refers to the junction to ambient thermal
j-a
6Intel® 855GME and Intel® 852GME Thermal Design Guide for Embedded Applications
1.3Reference Documents
Table 1. Related reference documents
Document/Reference TitleSource/Document Number
®
Intel
Pentium® M Processor For
Embedded Applications Thermal
Design Guide
Intel® 855GME and Intel® 852GME Thermal Design Guide for Embedded Applications7
Mechanical Reference
Mechanical Reference2
The Intel® 855GME and Intel 852GME chipset MCHs are constructed with a Flip Chip Ball Grid
Array (FCBGA) package with a size of 37.5 mm x 37.5 mm. It includes 732 solder ball lands with
a ball pitch of 1.27 mm. The chipset MCH will also include capacitors moun ted on the top of the
package. Reference drawings are shown in Figure 1 and Figure 2. The drawings are not drawn to
scale and the units shown are in millimeters.
The 855GME and 852GME MCH packages will include capacitors on the top-side. The location of
capacitors may differ between the 855GME and 852GME MCHs. Care should be taken when
applying a thermal solution onto the die in order to avoid any accidental electrical shorts.
2.1Intel® 855GME and Intel® 852GME Chipset MCH
Package
Note: The capacitor locations shown below may not be representative of the exact placement on the
855GME or the 852GME MCH.
Figure 1. 855GME and 852GME chipset MCH Package Dimensions (mm) – Top View
37.5
37.5
Capacitor
Capacitor
7.6
7.6
37.5
37.5
10.3
10.3
1.60
1.60
Die
Die
Substrate
Substrate
0.81
0.81
?
?
Top View
Top View
8Intel® 855GME and Intel® 852GME Thermal Design Guide for Embedded Applications
Mechanical Reference
Figure 2. 855GME and 852GME Chipset MCH Package Dimensions (mm) - Side View
1.0
1.0
0.61
0.61
0.7
0.7
1.27
1.27
Side View
Side View
0.73
0.73
Intel® 855GME and Intel® 852GME Thermal Design Guide for Embedded Applications9
Computational Fluid Dynamics (CFD) Modeling
Computational Fluid Dynamics (CFD)
Modeling3
3.1855GM MCH Thermal Model
A Computational Fluid Dynamics (CFD) thermal model of the 855GM chipset MCH has been
developed to assist in the characterization of the package thermal limits and the evaluation of
cooling methods. The thermal model used in our analysis is based on the package construction
shown in Figure 3. Simplified cuboids with the correct material properties are used to model the
primary portions of the chipset MCH package as shown in Figure 4. Contact your Intel
representative for information on obtaining the CF D model.
Note: The CFD thermal model for the 855GM MCH may als o be us ed for the 8 55GME and t he 852G ME
chipset MCHs.
Figure 3. Package Construction Overview
Underfill
Underfill
Figure 4. 855GM MCH Thermal Model
Package Overview
Package Overview
Package Overview
Package Overview
Die
Die
855GM Thermal Model
Die
Substrate
Solder Balls
C4
C4 bumps
C4 bumps
Substrate
Substrate
Solder balls
Solder balls
B1998-01
10Intel® 855GME and Intel® 852GME Thermal Design Guide for Embedded Applications
Computational Fluid Dynamics (CFD) Modeling
3.2Thermal Design Power (TDP) Values
Use the following thermal design power (TDP) values when modeling based on the configuration
that is being simulated. When designing for intermediate configu r ations o n the 855GME MCH,
round up to next highest TDP value.
T able 2. 855GME and 852GME MCH Thermal Design Power
SKUConfig
®
855GME
Intel
MCH
Intel® 852GME
MCH
Core
VCC (V)
Max1.3525033351224Dual4.3
Min1.213320025611Single2.6
Max1.526633351224Dual5.7
GFX
Core
(MHz)
DDR
(MHz)
Memory
Size
(Mbytes)
# of
DIMMs
# of
Rows
3.3Maximum Temperature Specification
Use the following table to determine the maximum junction temperature value when modeling the
855GME or 852GME chipset MCH. The junction temperature is located at the hottest part of the
die.
T a ble 3. 855GME and 852GME Chipset MCHs Maximum Temperature Value
Tj,max (°C)
110
3.4Modeling Assumptions
Computational Fluid Dynamics (CFD) modeling is performed to provide a basis for estimating the
behavior of the Intel
configurations. Intel provides a Flotherm model of the 855GM and is available through field
sales. This model may also be used to simulate the 855GME and 852GME chipset MCHs. The
thermal model of the Intel
simulated CompactPCI* blade environment. Assumptions used in the thermal analyses are
summarized below. However, please note that they do not represent a specific design
recommendation and are mainly used as a basis for the thermal analysis.
®
855GME and Intel® 852GME chipset MCHs under varying cooling
®
855GME and Intel® 852GME chipset MCHs were analyzed in a
LVDS
Display
Settings
TDP
(W)
The following analysis was performed to evaluate the need for a heatsink to adequately cool the
855GME and 852GME chipset MCHs.
Thermal Modeling Ass umptions
:
1. Local Ambient Conditions between 40º C and 60º C. Local ambient is specified as the
temperature locally surrounding the processor. Most local ambient conditions for embedded
applications fall near the middle of that range.
2. Airflow ranges between 50 and 500 LFM.
3. The entire motherboard is modeled as an orthotropic cuboid with an effective thermal
conductivity based on the assumed copper content of the motherboard. In the analysis
Intel® 855GME and Intel® 852GME Thermal Design Guide for Embedded Applications11
Computational Fluid Dynamics (CFD) Modeling
T
°
presented the copper content is assumed to be 10 percent of the overall volume of the
motherboard.
4. Board-to-board spacing of 0.8”, consistent with the CompactPCI* specification.
5. Tj,max for the 855GME and 852GME chipset MCHs is 110 °C.
3.5Modeling Results – 855GME MCH
Some boundary conditions evaluated will necessitate a heatsink for the 855GME chipset MCH.
See Figure 5 for a graph of junction temperature (Tj) vs. airflow (in linear feet per minute) for
various local ambient temperature conditions. A heatsink will be needed in all cases where the Tj
of the 855GME chipset MCH die is greater than 110 °C.
Figure 5. 855GME MCH (4.3W) Junction Temperatures vs. Airflow
855GM E (4.3W ) Junction Temperatures vs. Airflow
at Various Local Am bient Tem peratures
140
130
Heatsink
Required
120
40 C
110
Tj (deg C)
100
90
80
50100150200250300350400450500
Airflow (LFM)
j max = 110
C
45 C
50 C
55 C
60 C
12Intel® 855GME and Intel® 852GME Thermal Design Guide for Embedded Applications
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