INFINEON TLE 6285 User Manual
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LIN-Transceiver LDO TLE 6285
Target Data Sheet
1Overview
1.1 Features
• Single-wire transceiver, suitable for LIN protocol
• Transmission rate up to 20 kBaud
• Compatible to LIN specification
• Compatible to ISO 9141 functions
• Very low current consumption in sleep mode
• Control output for voltage regulator
• Short circuit proof to ground and battery
• Overtemperature protection
• Output voltage 5V, tolerance £ ± 2 %
• 150 mA output current capability
• Low-drop voltage
• Overtemperature protection
• Reverse polarity protection
• Short-circuit proof
• Adjustable reset threshold
• Wide temperature range
• Suitable for use in automotive electronics
P-DSO-16-4
Type Ordering Code Package
TLE 6285 G on request P-DSO-16-4
1.2 Description
The TLE 6285 is a single-wire transceiver with a LDO. It is chip by chip integrated circuit
in a P-DSO-16-4 package. It works as an interface between the protocol controller and
the physical bus. The TLE 6285 is especially suitable to drive the bus line in LIN systems
in automotive and industrial applications. Further it can be used in standard ISO9141
systems.
In order to reduce the current consumption the TLE 6285 offers a sleep operation mode.
In this mode a voltage regulator can be controlled in order to minimize the current
consumption of the whole application (VR in sleep mode <1µA!). The on-chip voltage
regulator (VR) is designed for this application but it is also possible to use an external
Version 1.02 1 2002-05-15
Target Data TLE 6285
voltage regulator. A wake-up caused by a message on the bus enables the voltage
regulator and sets the RxD output low until the device is switched to normal operation
mode. To achieve proper operation of the µC, the device supplies a reset signal. The
reset delay time is selected application specific by an external capacitor. The reset
threshold is adjustable.
®
The IC is based on the Smart Power Technology SPT
which allows bipolar and CMOS
control circuitry in accordance with DMOS power devices existing on the same
monolithic circuit.
The TLE 6285 is designed to withstand the severe conditions of automotive applications.
Version 1.02 2 2002-05-15
1.3 Pin Configuration (top view)
Target Data TLE 6285
GND
INHI
RO
V
CCO
INHO
RxD
ENLIN
GND
GND
1
2
3
4
5
6
7
89
P-DSO-16-4
116
Leadframe
16
15
14
13
12
11
10
GND
RD
R
Th
V
BAT
BUS
TxD
V
CCI
GND
GND
Figure 1 Pinout
INHI
RO
V
CCO
INHO
RxD
ENLIN
GND
2
Chip:
Voltage
Regulator
4
5
6
7 10
8
Chip:
Transceiver
P-DSO-16-4
15
RD
143
R
Th
13
V
BAT
12
BUS
11
TxD
V
CCI
9
GND
Version 1.02 3 2002-05-15
Target Data TLE 6285
1.4 Pin Definitions and Functions:
Pin No. Symbol Function
1,8,9,16 GND Ground; place to cooling tabs to improve thermal behavior
2 INHI Inhibit Voltage Regulator Input; TTL compatible, HIGH active
(HIGH switches the VR on); connect to V
if not needed
BAT
3ROReset Output; open collector output connected to the output via
a resistor of 20kW
4V
CCO
5V Output; connected to GND with 22µF capacitor, ESC<3W
5 INHO Inhibit LIN Output; to control a voltage regulator
6RxDReceive Data Output; internal 30kW pull up to Vs, LOW in
dominat state
7ENLINEnable LIN Input; integrated 30kW pull down, transceiver in
normal operation mode when HIGH
10 V
CCI
5V Supply Input; VCC input to supply the LIN transceiver
11 TxD Transmit Data Input; internal 30kW pull up to Vs, LOW in
dominant state
12 BUS LIN BUS Output/Input; internal 30kW pull up to Vs, LOW in
dominant state
13 V
BAT
Battery Supply Input; a reverse current protection diode is
required, block GND with 100nF ceramic capacitor and 22µF
capacitor
14 R
Th
Reset Threshold; internal defined typical 4.6V, adjustable down
to 3.5V according to the voltage level on this pin; connect to GND
if not needed
15 RD Reset delay; connected to ground via external delay capacitor
Version 1.02 4 2002-05-15
1.5 Functional Block Diagram
Target Data TLE 6285
V
Bus
BAT
13
30 k
9
12
Output
Stage
Driver
Mode
Control
30 k
9
5
10
7
INHO
V
CCI
ENLIN
Temp.-
Protection
11
TxD
Receiver
6
RxD
TLE 6259 G
TLE 4299
13
V
I
Bat
4
5
GND
V
Q
CCO
Band-
Gap-
Reference
INHI
INH
2
Inhibit
Control
SI
R
14
RADJ
Th
Figure 2 Block Diagram
Reference
Current
and
Saturation
Control
Reset
Control
15
D
RD
1,8,9,16
R
SO
GND
GND
R
RO
3
AEB03104
SO
RO
RO
Version 1.02 5 2002-05-15
Target Data TLE 6285
p
2 Circuit Description
The TLE 6285 is a single-wire transceiver combined with a LDO. It is a chip by chip
integrated circuit in a P-DSO-16-4 package. It works as an interface between the
protocol controller and the physical bus. The TLE 6285 is especially suitable to drive the
bus line in LIN systems in automotive and industrial applications. Further it can be used
in standard ISO9141 systems. The on-chip voltage regulator with watchdog is designed
for sleep mode applications but it is also possible to use an external voltage regulator.
Start Up
Power Up
Normal Mode
ENLIN
INHO
high high
ENLIN
low
ENLIN
(V
CC
Sleep Mode
ENLIN
INHO
low floating
1)
after wake-up via bus
2)
ON when INHO not connected to INHI
3)
after start u
Figure 3 Operation Mode State Diagram
V
CC
ON
high
ON)
V
CC
OFF
2)
ENLIN high
Stand-By
INHO
ENLIN
low high
Wake Up
t > t
WAKE
RxD
low
high
V
CC
1)
ON
3)
2.1 Operation Modes
In order to reduce the current consumption the TLE 6285 offers a sleep operation mode.
This mode is selected by switching the enable input EN low (see figure 3, state
diagram). In the sleep mode a voltage regulator can be controlled via the INHO output
in order to minimize the current consumption of the whole application. A wake-up caused
by a message on the communication bus automatically enables the voltage regulator by
switching the INHO output high. In parallel the wake-up is indicated by setting the RxD
output low. When entering the normal mode this wake-up flag is reset and the RxD
output is released to transmit the bus data.
Version 1.02 6 2002-05-15
Target Data TLE 6285
In case the voltage regulator control input is not connected to INH output or the
microcontroller is active respectively, the TLE6285 can be set in normal operation mode
without a wake-up via the communication bus.
2.2 LIN Transceiver
The LIN Transceiver has already a pull up resistor of 30kW as termination implemented.
There is also a diode in this path, to protect the circuit from feedback of voltages from
the bus line to the power supply. To configure the TLE 6285 as a master node, an
additional external termination resistor of 1kW is required. To avoid reverse currents from
the bus line into the battery supply line in case of an unpowered node, it is also
recommended to place a diode in series to the external pull up. For small systems (low
bus capacitance) the EMC performance of the system is supported by an additional
capacitor of at least 1nF in the master node (see figure 6, application circuit).
An capacitor of 10µF at the supply voltage input V
buffers the input voltage. In
S
combination with the required reverse polarity diode this prevents the device from
detecting power down conditions in case of negative transients on the supply line.
2.3 Input Capacitor
C
The input capacitor
of approx. 1 W in series with
is necessary for compensation of line influences. Using a resistor
I
C
, the oscillating circuit consisting of input inductivity and
I
input capacitance can be damped. The output capacitor is necessary for the stability of
the regulating circuit. Stability is guaranteed at values ³ 22 mF and an ESR of £ 5 W
within the operating temperature range. For small tolerances of the reset delay the
spread of the capacitance of the delay capacitor and its temperature coefficient should
be noted.
2.4 Voltage regulator
The 6285 incorporates a PNP based very low drop linear voltage regular. It regulates the
output voltage to
= 5 V for an input voltage range of 5.5 V £ V
CC
£ 45 V. The control
I
V
circuit protects the device against potential caused by damages overcurrent and
overtemperature.
The internal control circuit achieves a 5 V output voltage with a tolerance of ± 2% in the
T
temperature range of
= – 40 to 150 °C.
j
The device includes a power on reset and an under voltage reset function with adjustable
reset delay time and adjustable reset switching threshold as well as a sense control/early
warning function. The device includes an inhibit function to disable it when the ECU is
not used for example while the motor is off.
V
The reset logic compares the output voltage
voltage drops below this level, the external reset delay capacitor
V
is lower than VLD, the reset output RO is switched Low. If the output voltage drop is
D
Version 1.02 7 2002-05-15
to an internal threshold. If the output
CC
C
is discharged. When
D
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