Datasheet TLE 6258 Datasheet (INFINEON)

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Single-Wire-Transceiver TLE 6258

Preliminary Data Sheet

1Overview

1.1 Features

• Single-wire transceiver, suitable for LIN protocol

• Compatible to LIN specification

• Compatible to ISO 9141 functions

• Transmission rate up to 20 kBaud

• Very low current consumption in stand-by mode

• Short circuit proof to ground and battery

• Overtemperature protection

P-DSO-8-3

Type Ordering Code Package

TLE 6258 G Q67006-A9469 P-DSO-8-3

Description

The single-wire transceiver TLE 6258 is a monolithic integrated circuit in a P-DSO-8-3
package. It works as an interface between the protocol controller and the physical bus.
The TLE 6258 is especially suitable to drive the bus line in LIN systems in automotive
and industrial applications. Further it can be used in standard ISO9141 systems.

In order to reduce the current consumption the TLE 6258 offers a stand-by mode. A
wake-up caused by a message on the bus sets the RxD output low until the device is
switched to normal operation mode.

®

The IC is based on the Siemens Power Technology SPT

which allows bipolar and
CMOS control circuitry in accordance with DMOS power devices existing on the same
monolithic circuit.

The TLE 6258 is designed to withst and the severe c onditions of automotive applic ations.

1 version: 2.02 date: 2001-08-08

1.2 Pin Configu r at io n (top view)

Preliminary Data TLE 6258

RxD

ENN

TxD

1

2

3

4

Figure 1: Pinout

1.3

Pin Definitions and Functions

Pin No. Symbol Function

P-DSO-8-3

8

7

6

5

n.c.

Vs

BusVcc

GND

1RxDReceive data output; integrated pull up, LOW i n dominant state,
2ENNEnable not input; integrated 30 kΩ pull up, transceiver i n normal

operation mode when LOW

3V

CC

5V supply input;
4TxDTransmit data input; integrated pull up, LOW in dominant state
5GNDGround;
6BusBus output/i nput; internal 30 kΩ pull up, LOW in dominan t state
7VsBattery supply input;
8 n.c. not connected

2 version: 2.02 date: 2001-08-08

1.4 Functional Block Diagram

7 3

Vs

Preliminary Data TLE 6258

Vcc

30 k

Ω

30 k

Ω

6

Bus

TLE 6258 G

Figure 2: Block Diagram

Output

Stage

Driver

Temp.-

Protection

Mode

Control

Receiver

2

4

1

5

ENN

TxD

RxD

GND

3 version: 2.02 date: 2001-08-08

1.5 Application In formation

Preliminary Data TLE 6258

Start Up

Power Up

Normal Mode

ENN

low

high

ENN

Stand-By

ENN

high

1)

RxD becomes low when wake-up via bus

Vcc

ON

1)

V

CC

ON

ENN

low

Figure 3: State Diagram

For fail safe reasons the TLE6258 has already a pull up resistor of 30kΩ implemented.
To achieve the re quired ti mings for t he dominan t to reces sive tr ansition of the bus signal
an additional exter nal terminat ion resistor of 1kΩ is required. It is recommen ded to place
this resistor in the master node. To avoid reverse currents from the bus line into the
battery supply line in case of an unpower ed nod e, it i s recommende d to pl ace a di ode in
series to the external pull up. For small systems (low bus capacitance) the EMC
performance of the system is supported by an additional capacitor of at least 1nF in the
master node (see figure 6, application circuit).

In order to reduce the current consumption the TLE 6258 offers a stand-by mode. This
mode is selected by switching the Enable Not (ENN) input high (see figure 3, state
diagram). In the st and-by mode a wake-up caused by a message o n the bus i s indica ted
by setting the RxD out put low. When en tering th e normal mode th is wake-up fl ag is reset
and the RxD output is released to transmit the bus data.

4 version: 2.02 date: 2001-08-08

Preliminary Data TLE 6258

2 Electrical Characteristics

2.1 Absolute M ax imum Ratings
Parameter Symbol Limit Values Unit Remarks

min. max.

Voltages

Supply voltage
Battery supply voltage
Bus input voltage
Bus input voltage

V
V

Logic voltages at
EN, TxD, RxD

Electrostati c discharge
voltage at Vs, Bus

Electrostati c discharge
voltage

V
V

V

V

V

CC

S

bus

bus

I

ESD

ESD

-0.3 6 V

-0.3 40 V

-20 32 V

-20 40 V t < 1 s

-0.3 V

CC

V0 V <

V

CC

< 5.5 V

+ 0.3

-4 4 kV human body model
(100 pF via 1.5 k Ω)

-2 2 kV human body model
(100 pF via 1.5 k Ω)

Temperatures

Junction temperatur e

Note: Maximum ratings are absolute ratings; exceeding any one of these values may cause

irreversible damage to the integrated circuit.

T

j

-40 150

C –

°

5 version: 2.02 date: 2001-08-08

Preliminary Data TLE 6258

2.2 Operating Range
Parameter Symbol Limit Values Unit Remarks

min. max.

Supply voltage
Battery Supply Vol tage
Junction temperature

V
V
T

j

CC

S

4.5 5.5 V
620V
– 40 150 °C

Thermal Shutdown (jun c tio n tem p e r at ure )

Thermal shutdown temp.

T

Thermal shutdown hyst. ∆

jSD

T – 10 – K

150 170 190 °C

Thermal Re si sta nces

Junction ambient

R

thj-a

– 185 K/W

–

–

6 version: 2.02 date: 2001-08-08

2.3 Electrical Characteristics

Preliminary Data TLE 6258

4.5 V < VCC<5.5V; 6.0V<VS<20V; RL=1kΩ; V
respect to ground; positive current flowing into pin; unless otherwise specified.

ENN

< V

ENN,ON

; -40 °C<Tj<125°C; all voltages with

Parameter Symbol Limit Values Unit Remark

min. typ. max.

Current Consumption

Current consumption
Current consumption I
Current consumption I
Current consumption I
Current consumption I
Current consumption I
Current consumption I

Current consumption I
Current consumption I

I

CC

S

CC

S

CC

S

CC

S

SCC0

0.5 1.5 mA

0.5 1.0 mA

0.7 2.0 mA

0.7 1.5 mA
20 30 µA
20 30 µA
20 40 µA

20 40 µA
16 30 µA

recessive state;
V

= V

TxD

recessive state;
V

= V

TxD

dominant state;
V

= 0 V

TxD

dominant state;
V

= 0 V

TxD

stand-by mode;

T

=25°C

j

stand-by mode;

T

=25°C

j

stand-by mode
stand-by mode
stand-by mode,

V

= 0 V, VS = 13.5 V

CC

CC

CC

Receiver Output R×D

HIGH level outp u t cu rrent

I

LOW level output current I

Bus receiver

Receiver threshold voltage,

V

recessive to dominant edge
Receiver threshold voltage,

V

dominant to recessive edge
Receiver hysteresis V

wake-up threshold vol tage V

RD,H
RD,L

bus,rd

bus,dr

bus,hys

wake

-0.7 -0.4 mA

0.4 0.7 mA

0.44
x

V

0.02
x

V

0.40x

V

S

S

S

0.48
x

V

S

0.52
x

V

S

0.04
x

V

S

0.55x

V

S

0.56
x

V

S

0.06
x

V

S

0.65x

V

S

V

V

mV

V

VRD = 0.8 x VCC,
VRD = 0.2 x VCC,

-8 V < V

V

bus,rec

V

bus,hys

V

bus,rec

bus

< V

=

- V

< V

< 20 V

bus

bus,dom

bus,dom

7 version: 2.02 date: 2001-08-08

2.3 Electrical Characteristics (cont’d)

Preliminary Data TLE 6258

4.5 V < VCC<5.5V; 6.0V<VS<20V; RL=1kΩ; V
respect to ground; positive current flowing into pin; unless otherwise specified.

ENN

< V

; -40 °C<Tj< 125 °C; all voltages with

ENN,ON

Parameter Symbol Limit Values Unit Remark

min. typ. max.

Transmission Input T×D

HIGH level input voltage

V

threshold
TxD input hysteresis V
LOW level input voltage

V

threshold

TxD pull up current I

TD,H

TD,hys
TD,L

TD

2.8 0.7 x

V

CC

V

300 600 mV

0.3 x

V

CC

2.2 V

-150 -110 -80 µA

recessive state

dominant state

V

< 0.3 Vcc

TxD

Bus transmitter

V

Bus recessive output voltage

V

Bus dominant output voltage V
Bus short circuit current I
Leakage current I

bus,rec

bus,dom
bus,sc
bus,lk

0.9 x

V

S

V

S

V

01.5V
40 85 125 mA

-350 -260 µA
520µA

= V

TxD

V

= 0 V;

TxD

V

bus,short

VCC=0V, VS=0V,
V

= -8 V, Tj<85°C

bus

VCC=0V, VS=0V,
V

= 20 V, Tj<85°C

bus

CC

= 13.5 V

Bus pull up resistance R

Enable not input (pin ENN)

HIGH level input voltage

V

threshold
LOW level input voltage

V

threshold
ENN input hysteresis

V

ENN pull up resistance R

bus

ENN,off

ENN,on

ENN,hys
ENN

20 30 47 kΩ

low power mode

normal operation
mode

0.3 x

V

CC

2.8 0.7 x

V

CC

V

2.2 V

300 600 mV

15 30 60 kΩ

8 version: 2.02 date: 2001-08-08

2.3 Electrical Characteristics (cont’d)

Preliminary Data TLE 6258

4.5 V < VCC<5.5V; 6.0V<VS<20V; RL=1kΩ; V
respect to ground; positive current flowing into pin; unless otherwise specified.

ENN

< V

ENN,ON

; -40 °C<Tj<125°C; all voltages with

Parameter Symbol Limit Values Unit Remark

min. typ. max.

Dynamic Transceiver Characteristics

falling edge slew rate

rising edge slew rate S

Propagation delay
TxD-to-RxD LOW (recessive
to dominant)

Propagation delay
TxD-to-RxD HIGH (dominant
to recessive)

S

bus(L)

bus(H)

t

d(L),TR

t

d(H),TR

-3 -2.0 -1 V/µs

11.53V/µs

246µs

246µs

80% > V

C

bus

T

ambient

V

CC

20% < V

C

bus

V

CC

C

bus

V

CC

C

RxD

C

bus

V

CC

C

RxD

bus

= 3.3 nF;

<85°C

= 5 V; VS = 13.5 V

bus

= 3.3 nF;

= 5 V; VS = 13.5 V

= 3.3nF;

= 5V; VS = 13.5V

= 20 pF

= 3.3 nF;

= 5 V; VS = 13.5V

= 20 nF

> 20%

< 80%

Propagation delay
TxD LOW to bus

Propagation delay
TxD HIGH to bus

Propagation delay
bus dominant to RxD LOW

Propagation delay
bus recessive to RxD HIGH

Receiver delay symmetry t
Transmitter delay sym metry t
Wake-up delay tim e t

t

d(L),T

t

d(H),T

t

d(L),R

t

d(H),R

sym,R
sym,T
wake

14µs

14µs

0.5 2.0 µs

0.5 2.0 µs

-2 2 µs

-2 2 µs
30 70 150 µs

VCC = 5 V

VCC = 5 V

VCC = 5V;

C

= 20pF

RxD

VCC = 5 V;

C

= 20 pF

RxD

t

= t

sym,R

t

sym,T

= t

d(L),R

d(L),T

- t

- t

d(H),R

d(H),T

9 version: 2.02 date: 2001-08-08

3 Diagrams

Preliminary Data TLE 6258

1k

Ω

Figure 4: Test circuits

V

CC

100 nF

C

bus

Vs

Bus

GND

ENN

TxD

RxD

V

CC

20 pF

100 nF

V

TxD

GND

t

t

d(L),TR

d(L),T

t

d(L),R

V

bus,rd

0.3*V

V

S

V

bus

GND

V

CC

V

RxD

GND

t

d(H),T

CC

t

d(H),TR

Figure 5: Timing diagrams for dynamic characteristics

t

d(H),R

V

bus,dr

0.7*V

t

t

CC

t

10 version: 2.02 date: 2001-08-08

4 Application

V

LIN bus

bat

master nod e

Preliminary Data TLE 6258

TLE 6258 G

Vs

ENN

22 µF

slave node

100 nF

1 k

1nF

100 nF

100 nF

RxD

GND

GND

TxD

V

V

CC

Q

100 nF

100 nF

5V

22 µF

Ω

Bus

V

I

e.g. TLE 4278

µP

GND

ECU 1

TLE 6258 G

Vs

ENN

RxD

22 µF

Figure 6: Application Circuit

100 nF

Bus

GND

V

I

e.g. TLE 4278

GND

TxD

V

V

CC

Q

100 nF

100 nF

5V

22 µF

µP

GND

ECU X

11 version: 2.02 date: 2001-08-08

5 Package Outlines

P-DSO-8-3

(Plastic Dual Small Outline Package)

Preliminary Data TLE 6258

Sorts of Packing

Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”.

SMD = Surface Mounted Device

Dimensions in mm

12 version: 2.02 date: 2001-08-08

Preliminary Data TLE 6258

Edition 1999-10-12

Published by Infineon Technologies AG
St.-Martin-Strasse 53
D-81541 München

© Infineon Technologies AG1999

All Rights Reserved.

Attention please!

The information herein is given to describe certai n components and shall not be considered as warranted characterist ics.
Terms of delivery and rights to technical change reserved.
We hereby di sclai m any an d all war ran tie s, incl udi ng but n ot l imite d to wa rran ties of non- inf rin gemen t, rega rdi ng circ uit s, de script ion s an d

charts stated herein.
Infineon Technologies is an approved CECC manufacturer.

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For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office
in Germany or our Infineon Technologies Representatives worldwide (see addres s list).

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Due to technical requirements components may contain dangerous substances. For information on the types in question please contact
your nearest Infineon Technologies Office.

Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Te ch­nologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect
the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or
to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or ot her
persons may be en dangered.

13 version: 2.02 date: 2001-08-08