INFINEON IPW50R250CP User Manual
IPW50R250CP
CoolMOSTM Power Transistor
Features
• Lowest figure-of-merit R
• Ultra low gate charge
• Extreme dv/dt rated
• High peak current capability
• Pb-free lead plating; RoHS compliant
• Quailfied according to JEDEC
CoolMOS CP is designed for:
• Hard & soft switching SMPS topologies
• CCM PFC for ATX, Notebook adapter, PDP and LCD TV
• PWM Stages for ATX, Notebook adapter, PDP and LCD TV
x Q
ON
g
1)
for target applications
Product Summary
V
DS @Tjmax
R
DS(on),max
Q
g,typ
PG-TO247
550 V
0.250
27 nC
Ω
Type Package Marking
IPW50R250CP PG-TO247 5R250P
Maximum ratings, at T
Parameter Symbol Conditions Unit
Continuous drain current
Pulsed drain current
Avalanche energy, single pulse
Avalanche energy, repetitive t
Avalanche current, repetitive t
MOSFET dv /dt ruggedness dv /dt
Gate source voltage
Power dissipation
=25 °C, unless otherwise specified
j
I
D
TC=25 °C
T
2)
AR
AR
2),3)
2),3)
I
D,pulse
E
AS
E
AR
I
AR
TC=25 °C
ID=5.2 A, VDD=50 V
ID=5.2 A, VDD=50 V
V
V
GS
static V
AC (f>1 Hz)
P
tot
TC=25 °C
=100 °C
C
=0...400 V
DS
Value
13
9
31
345 mJ
0.52
5.2
50
±20
±30
114
A
A
V/ns
W
Operating and storage temperature
T
j
stg
-55 ... 150
°C
, T
Mounting torque M3 and M3.5 screws 60 Ncm
Rev. 2.0 page 1 2007-11-07
Maximum ratings, at Tj=25 °C, unless otherwise specified
IPW50R250CP
Parameter Symbol Conditions Unit
Continuous diode forward current
Diode pulse current
Reverse diode dv /dt
2)
4)
I
S
I
S,pulse
T
C
=25 °C
dv /dt 15 V/ns
Parameter Symbol Conditions Unit
Value
7.8
31
Values
A
min. typ. max.
Thermal characteristics
Thermal resistance, junction - case
Thermal resistance, junction ambient
Soldering temperature,
wavesoldering only allowed at leads
Electrical characteristics, at T
R
thJC
R
thJA
T
sold
=25 °C, unless otherwise specified
j
leaded - - 62
1.6 mm (0.063 in.)
from case for 10 s
- - 1.1 K/W
- - 260 °C
Static characteristics
Drain-source breakdown voltage
Gate threshold voltage
Zero gate voltage drain current
Gate-source leakage current
Drain-source on-state resistance
Gate resistance
V
(BR)DSSVGS
V
GS(th)
I
DSS
I
GSS
R
DS(on)
R
G
=0 V, ID=250 µA
VDS=VGS, ID=0.52 mA
VDS=500 V, VGS=0 V,
T
=25 °C
j
V
=500 V, VGS=0 V,
DS
T
=150 °C
j
VGS=20 V, VDS=0 V
VGS=10 V, ID=7.8 A,
T
=25 °C
j
V
=10 V, ID=7.8 A,
GS
T
=150 °C
j
500 - - V
2.5 3 3.5
--1µA
-10-
- - 100 nA
- 0.22 0.25
- 0.54 -
f =1 MHz, open drain - 2.2 -
Ω
Ω
Rev. 2.0 page 2 2007-11-07
IPW50R250CP
Parameter Symbol Conditions Unit
Values
min. typ. max.
Dynamic characteristics
Input capacitance
Output capacitance
Effective output capacitance, energy
5)
related
Effective output capacitance, time
6)
related
Turn-on delay time
Rise time
Turn-off delay time
Fall time
C
C
C
C
t
t
t
t
iss
oss
o(er)
o(tr)
d(on)
r
d(off)
f
=0 V, VDS=100 V,
V
GS
f =1 MHz
=0 V, VDS=0 V
V
GS
to 400 V
V
=400 V,
DD
V
=10 V, ID=7.8 A,
GS
= 23.1Ω
R
G
- 1420 - pF
-63-
-60-
- 130 -
-35-ns
-14-
-80-
-11-
Gate Charge Characteristics
Gate to source charge
Gate to drain charge
Gate charge total
Gate plateau voltage
Q
Q
Q
V
gs
gd
g
plateau
V
=400 V, ID=7.8 A,
DD
V
=0 to 10 V
GS
-6-nC
-9-
-2736
- 5.2 - V
Reverse Diode
Diode forward voltage
Reverse recovery time
Reverse recovery charge
Peak reverse recovery current
1)
J-STD20 and JESD22
2)
Pulse width tp limited by T
3)
Repetitive avalanche causes additional power losses that can be calculated as PAV=EAR*f.
4)
ISD≤ID, di /dt ≤200A/µs, V
5)
C
is a fixed capacitance that gives the same stored energy as C
o(er)
6)
C
is a fixed capacitance that gives the same charging time as C
o(tr)
j,max
DClink
=400V, V
V
SD
t
rr
Q
rr
I
rrm
peak<V(BR)DSS
VGS=0 V, IF=7.8 A,
T
=25 °C
j
VR=400 V, IF=IS,
di
/dt =100 A/µs
F
, Tj<T
, identical low and high side switch
jmax
while VDS is rising from 0 to 80% V
oss
while VDS is rising from 0 to 80% V
oss
- 0.9 1.2 V
- 300 - ns
- 3.1 - µC
-23-A
DSS.
DSS.
Rev. 2.0 page 3 2007-11-07
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