IPW50R140CP
CoolMOSTM Power Transistor
Features
• Worldwide best R
• Lowest figure of merit R
• Ultra low gate charge
• Extreme dv/dt rated
• High peak current capability
• Pb-free lead plating; RoHS compliant
• Quailfied according to JEDEC
CoolMOS CP is designed for:
• Hard & soft switching SMPS topologies
• CCM PFC for ATX, Notebookadapter & PDP and LCD TV
• PWM for ATX, Notebook adapter, PDP and LCD TV
Type Package Marking
DS ,on
in TO220
x Q
ON
g
1)
for target applications
Product Summary
V
DS @Tjmax
R
DS(on),max
Q
g,typ
PG-TO247
550 V
0.140
48 nC
Ω
IPW50R140CP PG-TO247 5R140P
Maximum ratings, at T
Parameter Symbol Conditions Unit
Continuous drain current
Pulsed drain current
Avalanche energy, single pulse
Avalanche energy, repetitive t
Avalanche current, repetitive t
MOSFET dv /dt ruggedness dv /dt
Gate source voltage
Power dissipation
Operating and storage temperature
=25 °C, unless otherwise specified
j
I
D
TC=25 °C
T
2)
AR
AR
2),3)
2),3)
I
D,pulse
E
AS
E
AR
I
AR
TC=25 °C
ID=9.3 A, VDD=50 V
ID=9.3 A, VDD=50 V
V
V
GS
static V
AC (f >1 Hz)
P
tot
, T
T
j
TC=25 °C
stg
=100 °C
C
=0...400 V
DS
Value
23
15
56
616 mJ
0.93
9.3
50
±20
±30
192
-55 ... 150
A
A
V/ns
W
°C
Mounting torque M3 and M3.5 screws 60 Ncm
Rev. 2.1 page 1 2008-01-21
Maximum ratings, at Tj=25 °C, unless otherwise specified
IPW50R140CP
Parameter Symbol Conditions Unit
Continuous diode forward current
Diode pulse current
Reverse diode dv /dt
2)
4)
I
S
I
S,pulse
T
C
=25 °C
dv /dt 15 V/ns
Parameter Symbol Conditions Unit
Value
14
56
Values
A
min. typ. max.
Thermal characteristics
Thermal resistance, junction - case
Thermal resistance, junction ambient
Soldering temperature,
wavesoldering only allowed at leads
Electrical characteristics, at T
=25 °C, unless otherwise specified
j
R
thJC
R
thJA
T
sold
leaded - - 62
1.6 mm (0.063 in.)
from case for 10 s
- - 0.65 K/W
- - 260 °C
Static characteristics
Drain-source breakdown voltage
Gate threshold voltage
Zero gate voltage drain current
Gate-source leakage current
Drain-source on-state resistance
Gate resistance
V
(BR)DSSVGS
V
GS(th)
I
DSS
I
GSS
R
DS(on)
R
G
=0 V, ID=250 µA
VDS=VGS, ID=0.93 mA
VDS=500 V, VGS=0 V,
T
=25 °C
j
V
=500 V, VGS=0 V,
DS
T
=150 °C
j
VGS=20 V, VDS=0 V
VGS=10 V, ID=14 A,
T
=25 °C
j
V
=10 V, ID=14 A,
GS
T
=150 °C
j
500 - - V
2.5 3 3.5
--2µA
-20-
- - 100 nA
- 0.13 0.14
- 0.32 -
f =1 MHz, open drain - 2.2 -
Ω
Ω
Rev. 2.1 page 2 2008-01-21
IPW50R140CP
Parameter Symbol Conditions Unit
Values
min. typ. max.
Dynamic characteristics
Input capacitance
Output capacitance
Effective output capacitance, energy
5)
related
Effective output capacitance, time
6)
related
Turn-on delay time
Rise time
Turn-off delay time
Fall time
C
C
C
C
t
t
t
t
iss
oss
o(er)
o(tr)
d(on)
r
d(off)
f
V
=0 V, VDS=100 V,
GS
f =1 MHz
=0 V, VDS=0 V
V
GS
to 400 V
V
=400 V,
DD
V
=10 V, ID=14 A,
GS
=12.2 Ω
R
G
- 2540 - pF
- 110 -
- 110 -
- 230 -
-35-ns
-14-
-80-
- 8.0 -
Gate Charge Characteristics
Gate to source charge
Q
gs
-11-nC
Gate to drain charge
Gate charge total
Gate plateau voltage
Q
Q
V
gd
g
plateau
V
=400 V, ID=14 A,
DD
V
=0 to 10 V
GS
-15-
-4864
- 5.2 - V
Reverse Diode
Diode forward voltage
Reverse recovery time
Reverse recovery charge
Peak reverse recovery current
1)
J-STD20 and JESD22
2)
Pulse width tp limited by T
3)
Repetitive avalanche causes additional power losses that can be calculated as PAV=EAR*f.
4)
ISD≤ID, di /dt≤200A/µs, V
5)
C
is a fixed capacitance that gives the same stored energy as C
o(er)
6)
C
is a fixed capacitance that gives the same charging time as C
o(tr)
j,max
DClink
=400V, V
V
SD
t
rr
Q
rr
I
rrm
peak<V(BR)DSS
VGS=0 V, IF=14 A,
T
=25 °C
j
VR=400 V, IF=IS,
di
/dt =100 A/µs
F
, Tj<T
, identical low and high side switch
jmax
oss
oss
- 0.9 1.2 V
- 400 - ns
- 5.6 - µC
-26-A
while VDS is rising from 0 to 80% V
while VDS is rising from 0 to 80% V
DSS.
DSS.
Rev. 2.1 page 3 2008-01-21
1 Power dissipation 2 Safe operating area
P
=f(TC) ID=f(VDS); TC=25 °C; D =0
tot
parameter: t
200
180
160
140
120
10
10
2
1
p
limited by on-state
resistance
IPW50R140CP
1 µs
10 µs
100 µs
1 ms
[W]
100
tot
P
[A]
D
I
80
0
60
10
40
20
-1
0
0 25 50 75 100 125 150 175
TC [°C]
10
10
0
10
1
VDS [V]
3 Max. transient thermal impedance 4 Typ. output characteristics
Z
=f(tp); ID=f(VDS); Tj=25 °C
(thJC)
parameter: D=t
0
10
/T parameter: V
p
0.5
GS
75
60
DC
10 ms
10
3
8 V
10
10 V
2
20 V
7 V
45
[A]
D
I
6 V
30
5.5 V
15
5 V
4.5 V
0
0 5 10 15 20
VDS [V]
[K/W]
10
thJC
Z
10
-1
-2
10
0.2
0.1
0.05
0.02
0.01
single pulse
-5
10
10
-3
-4
10
-2
10
-1
10
0
tp [s]
Rev. 2.1 page 4 2008-01-21
IPW50R140CP
5 Typ. output characteristics 6 Typ. drain-source on-state resistance
I
=f(VDS); Tj=150 °C R
D
parameter: V
GS
=f(ID); Tj=150 °C
DS(on)
parameter: V
GS
50
40
8 V
20 V
10 V
7 V
6 V
0.8
0.7
0.6
30
[A]
D
I
5.5 V
20
10
0
0 5 10 15 20 25
VDS [V]
5 V
4.5 V
]
Ω
[
0.5
DS(on)
R
5.5 V
0.4
0.3
0.2
0 102030405060
ID [A]
7 Drain-source on-state resistance 8 Typ. transfer characteristics
R
=f(Tj); ID=14 A; VGS=10 V ID=f(VGS); |VDS|>2|ID|R
DS(on)
parameter: T
j
DS(on)max
7 V
10 V
6.5 V
6 V
0.35
100
0.3
80
25 °C
0.25
]
Ω
[
0.2
DS(on)
R
0.15
98 %
typ
0.1
0.05
-60 -20 20 60 100 140 180
Tj [°C]
60
[A]
D
I
40
150 °C
20
0
0246810
VGS [V]
Rev. 2.1 page 5 2008-01-21
IPW50R140CP
9 Typ. gate charge 10 Forward characteristics of reverse diode
V
=f(Q
GS
parameter: V
); ID=14 A pulsed IF=f(VSD)
gate
DD
10
parameter: T
2
10
j
25 °C, 98%
120 V
8
150 °C
400 V
10
1
25 °C
6
[V]
GS
V
[A]
F
I
4
0
10
2
-1
0
0 1020304050
Q
[nC]
gate
10
0 0.5 1 1.5 2
VSD [V]
11 Avalanche energy 12 Drain-source breakdown voltage
E
=f(Tj); ID=9.3 A; VDD=50 V V
AS
=f(Tj); ID=0.25 mA
BR(DSS)
150 °C, 98%
700
600
500
400
[mJ]
AS
E
300
200
100
0
25 75 125 175
Tj [°C]
580
560
540
520
[V]
BR(DSS)
500
V
480
460
440
-60 -20 20 60 100 140 180
Tj [°C]
Rev. 2.1 page 6 2008-01-21
13 Typ. capacitances 14 Typ. Coss stored energy
IPW50R140CP
C =f(V
100000
10000
1000
C [pF]
); VGS=0 V; f =1 MHz E
DS
5
10
4
10
Ciss
3
10
Coss
2
100
10
1
10
10
10
1
Crss
0
0 100 200 300 400 500
VDS [V]
= f(VDS)
oss
12
9
[µJ]
6
oss
E
3
0
0 100 200 300 400 500
VDS [V]
Rev. 2.1 page 7 2008-01-21
Definition of diode switching characteristics
IPW50R140CP
Rev. 2.1 page 8 2008-01-21
PG-TO247: Outlines
IPW50R140CP
Rev. 2.1 page 9 2008-01-21
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2007 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of
conditions or characteristics. With respect to any examples or hints given herein, any typical
values stated herein and/or any information regarding the application of the device,
Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind,
including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please
contact the nearest Infineon Technologies Office
(www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances. For information
on the types in question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with
the express written approval of Infineon Technologies, if a failure of such components can
reasonably be expected to cause the failure of that life-support device or system or to affect
the safety or effectiveness of that device or system. Life support devices or systems are
intended to be implanted in the human body or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user
or other persons may be endangered.
IPW50R140CP
Rev. 2.1 page 10 2008-01-21
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